From patchwork Tue Apr 30 08:37:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648467 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB75B41C89; Tue, 30 Apr 2024 08:39:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466354; cv=none; b=YAb7Qn/mJayr4IbjjwqdpOIT9yXPwBk/6MFfCpetxumpxiU2TbYggL0DW+3ApGd9CtEWUxKt2dFFp81mTrqh7dm+D/yRaO1CQYXhgRN+1SXhtGlzwOdqpLIjTFJmCTTaVGUJbyKDCdxubopdpQWYZsjUOGpryFtj0GNfo5YJ6D0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466354; c=relaxed/simple; bh=G1UAW0H9h1wFRSfJQIj8x5FIWwrzTgw72kS9F2yRFtE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=nD/RAravCiZUKjarFus8ODdyzHe7ciwXJUunbwpT+kSDWt9sBevDTmd2XmHCC563NxVyM1/G2Q+UMwxyDSlPfstqRTodG3WQvchnNiSw+jzSDWoGWIMctXoBq2WdiojCPgv6SUMinKJtQcdHKC+uB9WYvaPwGekJqc7y8+ntkXs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=k8zW+xUF; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="k8zW+xUF" Received: by mail.gandi.net (Postfix) with ESMTPA id AF2AA20005; Tue, 30 Apr 2024 08:39:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466350; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=TKlAO4KsYqpHiNkyQhj+YDisqgQI3Psuq2ZrhzBKVbE=; b=k8zW+xUF9Ig2N46QYNzzXAZWkk9CwpQGFVoL1lcxo7Ne2Tyt12nrZm4PxjG/LH00SmaMB/ NPpyw/hwPz60R0x13V+NbvA3m87UJYXm3oYZDpiWInwc1xVubDenz3jCXxFx5vKahNLwDd dulid62Pnia2byihDIgvvoUmmt6xXx8CoufsOP9pQHO/IJtJJYhBn11qWdqYHqB/N5NDVK ceBa8baD+QBXcS+ZOXnxIvY3iTSsk1egyBCEprHswV6oJsEBUG9+BKSkf8YnAvhM3wFdgG 3pvdYrxeGS5er10NdS6UNmQMHiMwPMhmkPNa6qdbGjxX4HivsFkGP6yKze3U2A== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH 01/17] mfd: syscon: Add reference counting and device managed support Date: Tue, 30 Apr 2024 10:37:10 +0200 Message-ID: <20240430083730.134918-2-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger Syscon releasing is not supported. Without release function, unbinding a driver that uses syscon whether explicitly or due to a module removal left the used syscon in a in-use state. For instance a syscon_node_to_regmap() call from a consumer retrieve a syscon regmap instance. Internally, syscon_node_to_regmap() can create syscon instance and add it to the existing syscon list. No API is available to release this syscon instance, remove it from the list and free it when it is not used anymore. Introduce reference counting in syscon in order to keep track of syscon usage using syscon_{get,put}() and add a device managed version of syscon_regmap_lookup_by_phandle(), to automatically release the syscon instance on the consumer removal. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/mfd/syscon.c | 145 ++++++++++++++++++++++++++++++++++--- include/linux/mfd/syscon.h | 18 +++++ 2 files changed, 154 insertions(+), 9 deletions(-) diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c index 7d0e91164cba..86898831b842 100644 --- a/drivers/mfd/syscon.c +++ b/drivers/mfd/syscon.c @@ -34,6 +34,7 @@ struct syscon { struct regmap *regmap; struct reset_control *reset; struct list_head list; + struct kref refcount; }; static const struct regmap_config syscon_regmap_config = { @@ -147,6 +148,8 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_res) syscon->regmap = regmap; syscon->np = np; + of_node_get(syscon->np); + kref_init(&syscon->refcount); spin_lock(&syscon_list_slock); list_add_tail(&syscon->list, &syscon_list); @@ -168,7 +171,30 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_res) return ERR_PTR(ret); } -static struct regmap *device_node_get_regmap(struct device_node *np, +static void syscon_free(struct kref *kref) +{ + struct syscon *syscon = container_of(kref, struct syscon, refcount); + + spin_lock(&syscon_list_slock); + list_del(&syscon->list); + spin_unlock(&syscon_list_slock); + + regmap_exit(syscon->regmap); + of_node_put(syscon->np); + kfree(syscon); +} + +static void syscon_get(struct syscon *syscon) +{ + kref_get(&syscon->refcount); +} + +static void syscon_put(struct syscon *syscon) +{ + kref_put(&syscon->refcount, syscon_free); +} + +static struct syscon *device_node_get_syscon(struct device_node *np, bool check_res) { struct syscon *entry, *syscon = NULL; @@ -183,9 +209,23 @@ static struct regmap *device_node_get_regmap(struct device_node *np, spin_unlock(&syscon_list_slock); - if (!syscon) + if (!syscon) { syscon = of_syscon_register(np, check_res); + if (IS_ERR(syscon)) + return ERR_CAST(syscon); + } else { + syscon_get(syscon); + } + + return syscon; +} +static struct regmap *device_node_get_regmap(struct device_node *np, + bool check_res) +{ + struct syscon *syscon; + + syscon = device_node_get_syscon(np, check_res); if (IS_ERR(syscon)) return ERR_CAST(syscon); @@ -198,12 +238,23 @@ struct regmap *device_node_to_regmap(struct device_node *np) } EXPORT_SYMBOL_GPL(device_node_to_regmap); -struct regmap *syscon_node_to_regmap(struct device_node *np) +static struct syscon *syscon_node_to_syscon(struct device_node *np) { if (!of_device_is_compatible(np, "syscon")) return ERR_PTR(-EINVAL); - return device_node_get_regmap(np, true); + return device_node_get_syscon(np, true); +} + +struct regmap *syscon_node_to_regmap(struct device_node *np) +{ + struct syscon *syscon; + + syscon = syscon_node_to_syscon(np); + if (IS_ERR(syscon)) + return ERR_CAST(syscon); + + return syscon->regmap; } EXPORT_SYMBOL_GPL(syscon_node_to_regmap); @@ -223,11 +274,11 @@ struct regmap *syscon_regmap_lookup_by_compatible(const char *s) } EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_compatible); -struct regmap *syscon_regmap_lookup_by_phandle(struct device_node *np, - const char *property) +static struct syscon *syscon_lookup_by_phandle(struct device_node *np, + const char *property) { struct device_node *syscon_np; - struct regmap *regmap; + struct syscon *syscon; if (property) syscon_np = of_parse_phandle(np, property, 0); @@ -237,12 +288,24 @@ struct regmap *syscon_regmap_lookup_by_phandle(struct device_node *np, if (!syscon_np) return ERR_PTR(-ENODEV); - regmap = syscon_node_to_regmap(syscon_np); + syscon = syscon_node_to_syscon(syscon_np); if (property) of_node_put(syscon_np); - return regmap; + return syscon; +} + +struct regmap *syscon_regmap_lookup_by_phandle(struct device_node *np, + const char *property) +{ + struct syscon *syscon; + + syscon = syscon_lookup_by_phandle(np, property); + if (IS_ERR(syscon)) + return ERR_CAST(syscon); + + return syscon->regmap; } EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_phandle); @@ -293,6 +356,70 @@ struct regmap *syscon_regmap_lookup_by_phandle_optional(struct device_node *np, } EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_phandle_optional); +static struct syscon *syscon_from_regmap(struct regmap *regmap) +{ + struct syscon *entry, *syscon = NULL; + + spin_lock(&syscon_list_slock); + + list_for_each_entry(entry, &syscon_list, list) + if (entry->regmap == regmap) { + syscon = entry; + break; + } + + spin_unlock(&syscon_list_slock); + + return syscon; +} + +void syscon_put_regmap(struct regmap *regmap) +{ + struct syscon *syscon; + + syscon = syscon_from_regmap(regmap); + if (!syscon) + return; + + syscon_put(syscon); +} +EXPORT_SYMBOL_GPL(syscon_put_regmap); + +static void devm_syscon_release(struct device *dev, void *res) +{ + syscon_put(*(struct syscon **)res); +} + +static struct regmap *__devm_syscon_get(struct device *dev, + struct syscon *syscon) +{ + struct syscon **ptr; + + if (IS_ERR(syscon)) + return ERR_CAST(syscon); + + ptr = devres_alloc(devm_syscon_release, sizeof(struct syscon *), GFP_KERNEL); + if (!ptr) { + syscon_put(syscon); + return ERR_PTR(-ENOMEM); + } + + *ptr = syscon; + devres_add(dev, ptr); + + return syscon->regmap; +} + +struct regmap *devm_syscon_regmap_lookup_by_phandle(struct device *dev, + struct device_node *np, + const char *property) +{ + struct syscon *syscon = syscon_lookup_by_phandle(np, property); + + return __devm_syscon_get(dev, syscon); +} +EXPORT_SYMBOL_GPL(devm_syscon_regmap_lookup_by_phandle); + static int syscon_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; diff --git a/include/linux/mfd/syscon.h b/include/linux/mfd/syscon.h index c315903f6dab..164b9bcb49c3 100644 --- a/include/linux/mfd/syscon.h +++ b/include/linux/mfd/syscon.h @@ -15,6 +15,7 @@ #include struct device_node; +struct device; #ifdef CONFIG_MFD_SYSCON struct regmap *device_node_to_regmap(struct device_node *np); @@ -28,6 +29,11 @@ struct regmap *syscon_regmap_lookup_by_phandle_args(struct device_node *np, unsigned int *out_args); struct regmap *syscon_regmap_lookup_by_phandle_optional(struct device_node *np, const char *property); +void syscon_put_regmap(struct regmap *regmap); + +struct regmap *devm_syscon_regmap_lookup_by_phandle(struct device *dev, + struct device_node *np, + const char *property); #else static inline struct regmap *device_node_to_regmap(struct device_node *np) { @@ -67,6 +73,18 @@ static inline struct regmap *syscon_regmap_lookup_by_phandle_optional( return NULL; } +static intline void syscon_put_regmap(struct regmap *regmap) +{ +} + +static inline +struct regmap *devm_syscon_regmap_lookup_by_phandle(struct device *dev, + struct device_node *np, + const char *property) +{ + return NULL; +} + #endif #endif /* __LINUX_MFD_SYSCON_H__ */ From patchwork Tue Apr 30 08:37:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648468 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A04C1272C6; Tue, 30 Apr 2024 08:39:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466355; cv=none; b=SvsjYCcXlv5ps3TlAQXTw2YtxUmaedhE1UCm0lRA+T43fWlgFTsNXbUhnp6mqVdcYsFncMtoaY/G4iwCM4nmCEcGlhk8az5YZMli04GZMxoRYz5AXOH7mjGweHur+W3dOV3/mN4YFDzQiZBvRipnY6YblL7quswjMMvmqyqezAM= ARC-Message-Signature: i=1; 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Tue, 30 Apr 2024 08:39:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466351; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qWz5W3H1K/5hoRA60ibUkKhWpaUcvtXlrgxGqSMHDyg=; b=i9REab5R16i2TBWSrVxDiCTgdfngr9MAdImqM+UmYIebxm9Evtc4JU8Dj/qKqf4BkVXN3Y HJxDX+xWQSLScAxOn4r2iLjpFz0uiplKnZbBmod+3dbgcp90McRgYmZQ3dO8HC0bAdzfgd V3uxPoJ7IVR2+21AR8LofvVs3Z9qH1gsG8YN7Jf5CXnjdGIbGoXRDAWLnkjSq6KxZsIydH 25hrjt0sjG4s85T6ab8uVVAP2leivuj+WqokFv5NJbSUfVQMKrtf5PwuX1C2z6LFSIXgCe 9gbAzV7zJ+48nUeZ8n8TStwCqCKFrzQrZh3Im4aQtgh+2Ugz8KfGU+OvEhockw== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH 02/17] reset: mchp: sparx5: Remove dependencies and allow building as a module Date: Tue, 30 Apr 2024 10:37:11 +0200 Message-ID: <20240430083730.134918-3-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger The sparx5 reset controller depends on the SPARX5 architecture or the LAN966x SoC. This reset controller can be used by the LAN966x PCI device and so it needs to be available on all architectures. Also the LAN966x PCI device driver can be built as a module and this reset controller driver has no reason to be a builtin driver in that case. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/reset/Kconfig | 3 +-- drivers/reset/reset-microchip-sparx5.c | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 85b27c42cf65..04dbfe317fc7 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -124,8 +124,7 @@ config RESET_LPC18XX This enables the reset controller driver for NXP LPC18xx/43xx SoCs. config RESET_MCHP_SPARX5 - bool "Microchip Sparx5 reset driver" - depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST + tristate "Microchip Sparx5 reset driver" default y if SPARX5_SWITCH select MFD_SYSCON help diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 636e85c388b0..69915c7b4941 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -158,6 +158,7 @@ static const struct of_device_id mchp_sparx5_reset_of_match[] = { }, { } }; +MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match); static struct platform_driver mchp_sparx5_reset_driver = { .probe = mchp_sparx5_reset_probe, @@ -180,3 +181,4 @@ postcore_initcall(mchp_sparx5_reset_init); MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); MODULE_AUTHOR("Steen Hegelund "); +MODULE_LICENSE("GPL"); From patchwork Tue Apr 30 08:37:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648469 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 31F61128376; Tue, 30 Apr 2024 08:39:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466357; cv=none; b=i4ZIJMf1MTJbPzeOS0RBnr/iOhpmbaOax0xzUK7LNpQNFSPQfhFB21c9ULg/9NO+f/V/KPspfrmw/NUbBWqaZH2Hf8UDKHWiKNmVmMg72F9NekhtR3ofOKdDh0yp1fBYuwi/AkyetjaBnDc5PR9RE2ABn573Rs2nXIA2Rz3AGlc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466357; c=relaxed/simple; bh=QvIZPcFIxECl5ypxatKmykPf8ABcwLk+5NAwN21I9+4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=cSeWZfS4gnZsMfgMa+rQoBkvubbPbXWOi6L3m3zV0j5X8f4Z34o+k6+mqS+GsES/iC3Z4bCRkDlaOhFZVY/FblhzS1VdDhAb1GoeMENVkmwf56NHCd6eG8pPxfTXbkE+ewzCtJ+Q2eCDSlY9Qi1kKLuQ2dcFveOzJgAbRaaI5DA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=ei6Cc0i5; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ei6Cc0i5" Received: by mail.gandi.net (Postfix) with ESMTPA id E117B20010; Tue, 30 Apr 2024 08:39:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466353; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=qxAq7qxzKoem8aXbH9fXtuWzQPqQzhAER6fvu7zb1R4=; b=ei6Cc0i5Tyy6hry1zGIuvQ738sLwbRXunJcfF5AXysqct4QsgJI1HqHFs5KG5LW6qrGPX4 NrKBs8HIy8IYahz7V0CtSsHA14Fsb3pCZjnRfliX9knEypLMmO6mAcI6nYK2djDCI88vqP edWu0zy+Y9dUbMZNcm3Cg+ZssEjU6FTHBBBEeIS4eqFixUCraHl3mFFigtomyo17bOXHWp hmtGGLrlWfo+aJaB/ixdz9fq/btWAre7sYQMti3JLyJO4W5WrVSneohrBnhYJ4p+CTJJ8w sRsxu8MQKxmpVLAI2VxKXfWCdKS/jwRyokyBEQ6bEU3SiJ+8NEI4yYjECkl5+g== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH 03/17] reset: mchp: sparx5: Release syscon when not use anymore Date: Tue, 30 Apr 2024 10:37:12 +0200 Message-ID: <20240430083730.134918-4-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger The sparx5 reset controller does not release syscon when it is not used anymore. This reset controller is used by the LAN966x PCI device driver. It can be removed from the system at runtime and needs to release its consumed syscon on removal. Use the newly introduced devm_syscon_regmap_lookup_by_phandle() in order to get the syscon and automatically release it on removal. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/reset/reset-microchip-sparx5.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 69915c7b4941..c4fe65291a43 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -65,15 +65,11 @@ static const struct reset_control_ops sparx5_reset_ops = { static int mchp_sparx5_map_syscon(struct platform_device *pdev, char *name, struct regmap **target) { - struct device_node *syscon_np; + struct device *dev = &pdev->dev; struct regmap *regmap; int err; - syscon_np = of_parse_phandle(pdev->dev.of_node, name, 0); - if (!syscon_np) - return -ENODEV; - regmap = syscon_node_to_regmap(syscon_np); - of_node_put(syscon_np); + regmap = devm_syscon_regmap_lookup_by_phandle(dev, dev->of_node, name); if (IS_ERR(regmap)) { err = PTR_ERR(regmap); dev_err(&pdev->dev, "No '%s' map: %d\n", name, err); From patchwork Tue Apr 30 08:37:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648470 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B72B31292D2; Tue, 30 Apr 2024 08:39:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466358; cv=none; b=FJBdOEmMznjozunfjuih9Z+NgF3D/gKsrG9W/hlqXawiyAK7rEv0ms2VcrPUSgYC7UttFzEfHbYcsUmtnq7ctxqygQGjWKtCCErCTPkZYbtIetPFnX2mk29s/L3QjDpbMmcu2TSlSYjS2Ch2kE5XVLHFtHohRIUwbmMJE7WZvoI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466358; c=relaxed/simple; bh=9JD6NWoGfDEIQIduEDC370roBJXlkhonyzBg+qc2pFg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=l/yo+jd2Wm9aiwf7voo0OTFOd29VOhVFo8F6mVqvDnRNJZ8q7mdUzKJLEjIFn0EdJCEfvBq9CaDQfnuz3Gpd/EVNHBLynl9AZi0PfahENQ8FI+qIHKxvwjbJjsw4Ub5yKzRZvw8s5zDmNNBAUB5WlXD3AAW7n0yaGfG9RuZ3N2M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=G0pcULHd; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="G0pcULHd" Received: by mail.gandi.net (Postfix) with ESMTPA id 8BF0520009; Tue, 30 Apr 2024 08:39:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466355; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yQCmnd7DbFj5IxQKgje4KI56L2MhsXyiKeIjOIac594=; b=G0pcULHd1GS1Kd5ctB8CoCy+juU+WQe4NOXWHKIOPlA2HcBeyndoLZIcNdhk8IoE+wmxrZ K5JEQNoVQ79/u4K3yo5AC4dhHiAFBXGI8XE7CuuDRbreLi0cRvvzKw139Wlop5I9ZHQoai IjzEl8+uLGxlICtjb7W/hE805uKRG06Yk1eAM5KlzyC2YPCQG+l9jlzJZSluNa1cnct8V9 dGC0g+TmB1NyK10tEF2z7rocBsP1li2NHUmygMEw2gFs4C6YDiQQowZjOnJ6pkHSHZJ6FU 9JIzdYkyNFMMzz/uVxv9lHEYiFqLbfaBYUCr3MkuW7OTUHmPOH4Uz8q8QrIbKg== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH 04/17] reset: core: add get_device()/put_device on rcdev Date: Tue, 30 Apr 2024 10:37:13 +0200 Message-ID: <20240430083730.134918-5-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger Since the rcdev structure is allocated by the reset controller drivers themselves, they need to exists as long as there is a consumer. A call to module_get() is already existing but that does not work when using device-tree overlays. In order to guarantee that the underlying reset controller device does not vanish while using it, add a get_device() call when retrieving a reset control from a reset controller device and a put_device() when releasing that control. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/reset/core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/reset/core.c b/drivers/reset/core.c index dba74e857be6..999c3c41cf21 100644 --- a/drivers/reset/core.c +++ b/drivers/reset/core.c @@ -812,6 +812,7 @@ __reset_control_get_internal(struct reset_controller_dev *rcdev, kref_init(&rstc->refcnt); rstc->acquired = acquired; rstc->shared = shared; + get_device(rcdev->dev); return rstc; } @@ -826,6 +827,7 @@ static void __reset_control_release(struct kref *kref) module_put(rstc->rcdev->owner); list_del(&rstc->list); + put_device(rstc->rcdev->dev); kfree(rstc); } From patchwork Tue Apr 30 08:37:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648471 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80D82129A9C; Tue, 30 Apr 2024 08:39:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466360; cv=none; b=pUuxFyGpdtWPeAUJcKLxFiTD7PQRbeGez5ApT/WGuLgNtROb1hYaw2Z7IdrNwvCTm7Thu+Rx0DnWtGtyKNmcfFhXRO/JAEDQbQ/TRNzwV3GOBF+L0geD+MrFLaU0eNrL8QApdhQmyv0n/qKV7Jj/iQYZ4R5SFKxKhclGyplT1sA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466360; c=relaxed/simple; bh=cUtrFBYYTOydS6VWD1TQj52pXtF62FbzoeyNmkpjv4U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Q5cnYR2mIiwsBlNPLBrN8a/dXHHpcRbxziU/pzD4a270jCROt1UStIH8ln2NAFjYp5tMxMnf2j4BuMUOvVu82SNBk+SvFT6Zji0sRQOPOR6l/QOgeHdsFjlgaD5hhgExI1zyY/wXLciR2iPVvRJ14AA37SSgEw8gk7tmaBhVkt0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=K6wfWpn+; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="K6wfWpn+" Received: by mail.gandi.net (Postfix) with ESMTPA id 3FA4A20013; Tue, 30 Apr 2024 08:39:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466356; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OW0f/DmFWJycnlx0nA84xv4H0lvNTD6HCGeHYDQEruo=; b=K6wfWpn+JDUTu1B6Oy5ReSrajYi58yXFAgCH+P5vWL26tTZXLfcFiH1wc+dw5UldujukmK Mks9XNG+ImLUWxxh1HUGm6DqTvWVx+0QWiY4z/ZaOZ7i8LdnHgQxzIY0CItOvRL1PhQXTS CG/ICThpNlDQVlkA3pt6yxXBz3mhWLM8zxDViubC4iYNFlSC1gnCp5fPY4LPWRI8jd33hG FBw/rcD7mJiHw77xLebBzIjoyDJ0P6z88BmyabQ6ee457UZpVLjmfBQxs7/VmmYmDl9Mwu UuIMug/YZIyTN7fWjRR3W4Cjt84aFWaW0PzHj1ui9lJxWoH5K09yzmx9R+zr7w== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH 05/17] reset: mchp: sparx5: set the dev member of the reset controller Date: Tue, 30 Apr 2024 10:37:14 +0200 Message-ID: <20240430083730.134918-6-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger In order to guarantee the device will not be deleted by the reset controller consumer, set the dev member of the reset controller. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/reset/reset-microchip-sparx5.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index c4fe65291a43..1ef2aa1602e3 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -117,6 +117,7 @@ static int mchp_sparx5_reset_probe(struct platform_device *pdev) return err; ctx->rcdev.owner = THIS_MODULE; + ctx->rcdev.dev = &pdev->dev; ctx->rcdev.nr_resets = 1; ctx->rcdev.ops = &sparx5_reset_ops; ctx->rcdev.of_node = dn; From patchwork Tue Apr 30 08:37:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648472 X-Patchwork-Delegate: kuba@kernel.org Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 365AD13D29F; Tue, 30 Apr 2024 08:39:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466362; cv=none; b=WQhf7yqpUqEVHCjWdATgyL1S7XfpCw2/UKisXQphRP5gW45cEkSF6/kSRgOhkJAiKOFkPvxop6hNvURoMo+tzAmpulyM8qHgbTu+HyQn20Jeqawz7ga1XVMd6fgFpJJ8OKU0AnArErWyWcFdw5Zg9cm0jA1rhVkAkcgK6t1VZg0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466362; c=relaxed/simple; bh=AJFmHIGOkJRAYhf/8wonVpIevTwCpu2sASdLQiX0x/0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=r4rWTlhktDbIeHxM32LB2zeT5yMWhSbgBC+MyZh7uCWVg/vRgemFo8c/4yGIWYRTyqFKD8ol0ExaKIqT+20dhRuXlYCQb66HTfz6drQe/jTuEg5/FdwntozzOAaqO66HysjO/jTXAxSVR1mkcA7/Dv08LOtgfZrw136yhP3xWuY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=auirbtCm; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="auirbtCm" Received: by mail.gandi.net (Postfix) with ESMTPA id 0E4AF20005; Tue, 30 Apr 2024 08:39:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466358; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=db+xWsJmRVlLKMGx3o8SQOd/IsogiIOXl7irmhHKbrQ=; b=auirbtCmhKrJ3MS1CoWMnj+iHFN5vu2m8v7E/kBLL6w/9xgStDbnVEw4fPZBwINtiVpyxd EFCRQG8AByYI+G2XYFeCDvnUsh3QTTYzmboURPgFw3FqF+buIdGgv2r3T2DESpaJMS3J0P wJwpHfPgdbhY1TGUtKCSPzdZ8x6qOXInQPYaR3FGdQBJXAMSe5h39PFhHLMeHRtDAHWfwT Gd68S6JDJ8Cn6cKkFPKdlmDMQN6NpjGYIUTwpLIXYPpU2bSjZQ1K7GLhmeh5UUy0tw2N5Q T/JvY+jJie+Dp12w+9UrxOMkQ79b9aehEaNtNYB0mitxjJ1EpAPxxKT5oz4XuA== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 06/17] dt-bindings: net: mscc-miim: Add resets property Date: Tue, 30 Apr 2024 10:37:15 +0200 Message-ID: <20240430083730.134918-7-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com X-Patchwork-Delegate: kuba@kernel.org Add the (optional) resets property. The mscc-miim device is impacted by the switch reset especially when the mscc-miim device is used as part of the LAN966x PCI device. Signed-off-by: Herve Codina --- Documentation/devicetree/bindings/net/mscc,miim.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/net/mscc,miim.yaml b/Documentation/devicetree/bindings/net/mscc,miim.yaml index 5b292e7c9e46..a8c92cec85a6 100644 --- a/Documentation/devicetree/bindings/net/mscc,miim.yaml +++ b/Documentation/devicetree/bindings/net/mscc,miim.yaml @@ -38,6 +38,14 @@ properties: clock-frequency: true + resets: + items: + - description: Reset controller used for switch core reset (soft reset) + + reset-names: + items: + - const: switch + required: - compatible - reg From patchwork Tue Apr 30 08:37:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648473 X-Patchwork-Delegate: kuba@kernel.org Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F01A9146D60; Tue, 30 Apr 2024 08:39:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466364; cv=none; b=SLUZQNMxMmiW9N7M7KCyQTWtQPTvOMtkOC+GLo/K3h084DJXiRoF/O1ylGw99SY1zRgvKz7HiPNyBrA691LIiqEmUuD4KxRUG2O8eGyLAePGa7TqZgTJ4AD2ZUixn7g1hvaPCEN3rqcGVzyIHB3SAuD/uh7iveIvtcg6tZ72wwo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466364; c=relaxed/simple; bh=UkUmDmxYo9Z/orbhrhvuP0Jxzv03WEWdvOtiwQ6A4GA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=O3MxDiaV+FiO8Wfs7ZtsmC3A8WqBzmuTAXAUGei/JpyOdB6b5vlbNfM2omKhuUTuDUY15aXljZSdExmhrjV9CXus0VUUGV1SqTCG4zFhY4syiXcvAt34Z3ZC5OVyunl3uxsBC+Otc+TJRm1CjtWGN+q+1vajF22OMM48Fc51+Ik= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=PkKYwEje; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="PkKYwEje" Received: by mail.gandi.net (Postfix) with ESMTPA id BB5E320015; Tue, 30 Apr 2024 08:39:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466360; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dJSqGEJGADbhF8fZ9qZ11gAumSDZqofEqkJWMC7XU28=; b=PkKYwEjepQFKsmPU6ES8oP7VCvNCO36bwkdceo9QDNFq/F7RZ3nr1wEqVMQXpLNRsfS8bd cziQpMvEEs/fkqqFQOdR6e68ArlctCWQB9WEpulWhkT6eVQOzmEe6bzKt0jSQoW3s6eRlq tenycx1I7v3xqyhPDekJWpV8ny+LFellPQStsWMbmexdypZw5VkNzsdpg9cxHNQY7WjyAA qDxU7JA8FCyv5rt3jo5PFEuL/OjqoSibtnRLJTCIUpEH/cWz075udAmO4FrGSZFM8ShcZE 9i/ubSDBuQuKESoZ6SPibEipQ6xeCEEHBF8x7i51AzUs7UCl/H0+dzJ/m5HEfw== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 07/17] net: mdio: mscc-miim: Handle the switch reset Date: Tue, 30 Apr 2024 10:37:16 +0200 Message-ID: <20240430083730.134918-8-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com X-Patchwork-Delegate: kuba@kernel.org The mscc-miim device can be impacted by the switch reset, at least when this device is part of the LAN966x PCI device. Handle this newly added (optional) resets property. Signed-off-by: Herve Codina --- drivers/net/mdio/mdio-mscc-miim.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/mdio/mdio-mscc-miim.c b/drivers/net/mdio/mdio-mscc-miim.c index c29377c85307..6a6c1768f533 100644 --- a/drivers/net/mdio/mdio-mscc-miim.c +++ b/drivers/net/mdio/mdio-mscc-miim.c @@ -19,6 +19,7 @@ #include #include #include +#include #define MSCC_MIIM_REG_STATUS 0x0 #define MSCC_MIIM_STATUS_STAT_PENDING BIT(2) @@ -270,11 +271,18 @@ static int mscc_miim_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; struct regmap *mii_regmap, *phy_regmap; + struct reset_control *reset; struct device *dev = &pdev->dev; struct mscc_miim_dev *miim; struct mii_bus *bus; int ret; + reset = devm_reset_control_get_optional_shared(dev, "switch"); + if (IS_ERR(reset)) + return dev_err_probe(dev, PTR_ERR(reset), "Failed to get reset\n"); + + reset_control_reset(reset); + mii_regmap = ocelot_regmap_from_resource(pdev, 0, &mscc_miim_regmap_config); if (IS_ERR(mii_regmap)) From patchwork Tue Apr 30 08:37:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648474 X-Patchwork-Delegate: kuba@kernel.org Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A50E5127E05; Tue, 30 Apr 2024 08:39:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466366; cv=none; b=dFWounQ5MsDFIvjVs11DShuFXROJYpPxeth8rkiztYvVHOM6MX+L9A2UAuOfos0QNPqAR4eUZqkVcb3Ka8r9WnXxRJuKne+pRyVQpjkUaYPhIOoHHwOMUkmECRgZaIPaD67pKXHgOSf1V7THPl/s9lqKdoV9sfOr40enUljFytY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466366; c=relaxed/simple; bh=pPIRCQnCQ54gleMHzSJgynVz1ieLpAHzSMf1eRn4xpc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FecCaoDY7cbPLzXErxkaG6Fcj+zLT8m8JfNhNKwNiDHt31guld1BxhJniAKrWjKyJrWwSHS06qGC9rzix6ZNgLSVlB5LOobR7ypMs4HUyaCxOMgvia7oTA1ApGwHRi6/yMGVyBy2HFPyuT20/c6S+elB482fKhsBhkDRBGVwya0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=CYR+iijX; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="CYR+iijX" Received: by mail.gandi.net (Postfix) with ESMTPA id 6C5F62000B; Tue, 30 Apr 2024 08:39:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466362; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=d5YbcXC52ww526burA7UWFbg9yga41Sb6wn1P/AlvTU=; b=CYR+iijXYHPyEiqnx/a6T1Ywhq1GpJRb33mcIqa0sWGRBTzYskWJ37NbriQ7KbCIGg+MbC yr+I66X2h1KHobrrbkVVmZTiZkd2ek5UejeyML0Toq57SjSpzVk6Yq1BySS9HqKRzkcHQe APlDG3MgOOGKDNAV6Ohx8FBqmCvsV81Am2at7qCjOGfgFkkkywyqsnvelCRdsCFwA+hsZZ Sexj5w2EfPRSWqjxdME2KBfSUomSPIEQE5T7o/qnnUJSBnUJjd1WrWgkONlwUXjeQOcfEN ieimIcMD9QlPcxAeojY8/HqPPjEPrzeqIIuEo9oMCITGltbaKRvvgC0euMHBaw== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , stable@vger.kernel.org Subject: [PATCH 08/17] net: lan966x: remove debugfs directory in probe() error path Date: Tue, 30 Apr 2024 10:37:17 +0200 Message-ID: <20240430083730.134918-9-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com X-Patchwork-Delegate: kuba@kernel.org A debugfs directory entry is create early during probe(). This entry is not removed on error path leading to some "already present" issues in case of EPROBE_DEFER. Create this entry later in the probe() code to avoid the need to change many 'return' in 'goto' and add the removal in the already present error path. Fixes: 942814840127 ("net: lan966x: Add VCAP debugFS support") Cc: Signed-off-by: Herve Codina Reviewed-by: Andrew Lunn --- drivers/net/ethernet/microchip/lan966x/lan966x_main.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.c b/drivers/net/ethernet/microchip/lan966x/lan966x_main.c index 2635ef8958c8..61d88207eed4 100644 --- a/drivers/net/ethernet/microchip/lan966x/lan966x_main.c +++ b/drivers/net/ethernet/microchip/lan966x/lan966x_main.c @@ -1087,8 +1087,6 @@ static int lan966x_probe(struct platform_device *pdev) platform_set_drvdata(pdev, lan966x); lan966x->dev = &pdev->dev; - lan966x->debugfs_root = debugfs_create_dir("lan966x", NULL); - if (!device_get_mac_address(&pdev->dev, mac_addr)) { ether_addr_copy(lan966x->base_mac, mac_addr); } else { @@ -1179,6 +1177,8 @@ static int lan966x_probe(struct platform_device *pdev) return dev_err_probe(&pdev->dev, -ENODEV, "no ethernet-ports child found\n"); + lan966x->debugfs_root = debugfs_create_dir("lan966x", NULL); + /* init switch */ lan966x_init(lan966x); lan966x_stats_init(lan966x); @@ -1257,6 +1257,8 @@ static int lan966x_probe(struct platform_device *pdev) destroy_workqueue(lan966x->stats_queue); mutex_destroy(&lan966x->stats_lock); + debugfs_remove_recursive(lan966x->debugfs_root); + return err; } From patchwork Tue Apr 30 08:37:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648475 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 21FBA199EB1; Tue, 30 Apr 2024 08:39:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466367; cv=none; b=B00SJwtle1uclKBEy5r/gvywDXJg25SbSX3xRI8zSZZMXF1X2AFCXrB1VmxFFTLcbd/OLL+LrirMyuPzpjdLYUvgG5jJzwTgbqBWO8gjIbUfVoUn/SklZOYCoJXl3X5U+SjVMCLYaR0BxnlsR5ypIC6a+/VnvozbZOu/lTnn+gA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466367; c=relaxed/simple; bh=BmIPRrPsWExE/bvNJkt/S/QgFBuICgJGLZOGqiYJQD8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Ml46xtuzGIToI21HABDXn2TSMTzJJc6G3S2Xskld5HyKI3MjVoRrHcBfav49uIXM2AZWMijLok93JBioQh3g0gmrHRg6VNWnDoZDGUHJ5QxCWbi5qcIopMJJdSBvx6rnSYdOtVx88ntJJ9+Ucq+c56+HRls+qckcaLmNqjJinLA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=ZrW8MfNX; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ZrW8MfNX" Received: by mail.gandi.net (Postfix) with ESMTPA id 2156720017; Tue, 30 Apr 2024 08:39:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466363; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2nJGaOl0FeqlO/nJG1uJcVNnq20e1Q7cPnBeXIjZqf8=; b=ZrW8MfNXswi6w4Sw9CbwPmY76PE29Aj3BQ7N1U/LH7sqHw1sHivT3CQ9v9vYY3FkVovjTv VOMY7PlGhWAvLItJ2pRHdgSwfFeDHqZzwMVsKlh7XWg2/S9kTF8bWnUmN3rj1cb0Q/c4IZ TiQmQeMzWnPcaNEsjQdkZ7mMNjmew7DBSpzYVCqh3I92HRHB2lH+7L/Qi4+4Z9S7ii3KmF B9fGO67kPYYkpCpZw9mVV7vYTQEYGRA9kbmshlxrvZno/j/ZQePJxD8fyUPNaQGfp9r07O lqn8MnG92Kp18n0ErZcFfutRfKQoiUl8Uh8o4QE71M5e7KAObu/oxb14cfM8xA== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 09/17] dt-bindings: interrupt-controller: Add support for Microchip LAN966x OIC Date: Tue, 30 Apr 2024 10:37:18 +0200 Message-ID: <20240430083730.134918-10-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com The Microchip LAN966x outband interrupt controller (OIC) maps the internal interrupt sources of the LAN966x device to an external interrupt. When the LAN966x device is used as a PCI device, the external interrupt is routed to the PCI interrupt. Signed-off-by: Herve Codina Reviewed-by: Rob Herring (Arm) --- .../microchip,lan966x-oic.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/microchip,lan966x-oic.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/microchip,lan966x-oic.yaml b/Documentation/devicetree/bindings/interrupt-controller/microchip,lan966x-oic.yaml new file mode 100644 index 000000000000..b2adc7174177 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/microchip,lan966x-oic.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/microchip,lan966x-oic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip LAN966x outband interrupt controller + +maintainers: + - Herve Codina + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +description: | + The Microchip LAN966x outband interrupt controller (OIC) maps the internal + interrupt sources of the LAN966x device to an external interrupt. + When the LAN966x device is used as a PCI device, the external interrupt is + routed to the PCI interrupt. + +properties: + compatible: + const: microchip,lan966x-oic + + '#interrupt-cells': + const: 2 + + interrupt-controller: true + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - '#interrupt-cells' + - interrupt-controller + - interrupts + - reg + +additionalProperties: false + +examples: + - | + interrupt-controller@e00c0120 { + compatible = "microchip,lan966x-oic"; + reg = <0xe00c0120 0x190>; + #interrupt-cells = <2>; + interrupt-controller; + interrupts = <0>; + interrupt-parent = <&intc>; + }; +... From patchwork Tue Apr 30 08:37:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648476 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EAC8819DF6E; Tue, 30 Apr 2024 08:39:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466369; cv=none; b=AbyxLTTf5vqwiMN44WYEwnaJyZCjLgbrsMAIfajIWf+tpgaNaZv9h4M4UGct1RsNuj5saSZM1YaPlqSy/TsOfkeEgmKBYa7r0JZXVY/eBoGfTzuSLgMYcfu8FEyMsJMPC8cYPe2gw0FcUuJukKxvR6vJvfHploYAJvdLyKeyojw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466369; c=relaxed/simple; bh=gSXVwtdIWbvqyHA1LHIG2txFyFYNd3M5GrZOOtiWc6s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DZ5ZBNpIl8AMLjk2J7A9BgOX7Q71w5poGsHyQr5XQBBu8Ndn4L+REcs3Bh/yU4OwdRui/YhjJFz2R33ARFjjJZQ4Wd2xFM/N65TxN1rC9WRTMqVh2otsx5PpyQvUSSOPhPJucQo+SLE0PPO2ig+42SQce3Cqjfp/H42tbacKP3w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=mHAOEK+e; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="mHAOEK+e" Received: by mail.gandi.net (Postfix) with ESMTPA id DC0462000F; Tue, 30 Apr 2024 08:39:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466365; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vW5ZHo+q6cI+MkyIRY7diNLEI/hwcmD0uHSjypXUjAM=; b=mHAOEK+eE7xWNOSsxKQaxgm5u3y1GZXmIyb8qWRuL9rrvzi4kMWMKI4BONS85C+XFQvjDz 4dLS9dcfA92zvpqnRfaL0l2GWPYRb3JZRqm2wmxRdsJ7GB+xiKYGwVhiWJkZPZQyYKapLp owwE1LrrF2c8IMBkUfNKU7GRsRRbSPKMqqeFXpPsv13GSSSFbo0VglAGvcui8z6zrRQC6L yDtTiTlWrm3/7+Bs1NnoRX18c65wMvxYQnEgOJzuTXKsB3pVRLCCN77vTe2nu3KT82sRuj G+iQprPOdHzs6NnEr0+lZlX/J4VHJ7YGu+1oWd6WWcJJZocQqRGR1FHloTjn7A== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 10/17] irqdomain: Add missing parameter descriptions in docs Date: Tue, 30 Apr 2024 10:37:19 +0200 Message-ID: <20240430083730.134918-11-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com During compilation, several warning of the following form were raised: Function parameter or struct member 'x' not described in 'yyy' Add the missing function parameter descriptions. Signed-off-by: Herve Codina --- kernel/irq/irqdomain.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index 3dd1c871e091..1ed8c4d3cf2e 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -111,6 +111,7 @@ EXPORT_SYMBOL_GPL(__irq_domain_alloc_fwnode); /** * irq_domain_free_fwnode - Free a non-OF-backed fwnode_handle + * @fwnode: fwnode_handle to free * * Free a fwnode_handle allocated with irq_domain_alloc_fwnode. */ @@ -981,6 +982,12 @@ EXPORT_SYMBOL_GPL(__irq_resolve_mapping); /** * irq_domain_xlate_onecell() - Generic xlate for direct one cell bindings + * @d: IRQ domain involved in the translation + * @ctrlr: the DT node for the device whose interrupt we're translating + * @intspec: the interrupt specifier data from the DT + * @intsize: the number of entries in @intspec + * @out_hwirq: pointer at which to write the hwirq number + * @out_type: pointer at which to write the interrupt type * * Device Tree IRQ specifier translation function which works with one cell * bindings where the cell value maps directly to the hwirq number. @@ -999,6 +1006,12 @@ EXPORT_SYMBOL_GPL(irq_domain_xlate_onecell); /** * irq_domain_xlate_twocell() - Generic xlate for direct two cell bindings + * @d: IRQ domain involved in the translation + * @ctrlr: the DT node for the device whose interrupt we're translating + * @intspec: the interrupt specifier data from the DT + * @intsize: the number of entries in @intspec + * @out_hwirq: pointer at which to write the hwirq number + * @out_type: pointer at which to write the interrupt type * * Device Tree IRQ specifier translation function which works with two cell * bindings where the cell values map directly to the hwirq number @@ -1017,6 +1030,12 @@ EXPORT_SYMBOL_GPL(irq_domain_xlate_twocell); /** * irq_domain_xlate_onetwocell() - Generic xlate for one or two cell bindings + * @d: IRQ domain involved in the translation + * @ctrlr: the DT node for the device whose interrupt we're translating + * @intspec: the interrupt specifier data from the DT + * @intsize: the number of entries in @intspec + * @out_hwirq: pointer at which to write the hwirq number + * @out_type: pointer at which to write the interrupt type * * Device Tree IRQ specifier translation function which works with either one * or two cell bindings where the cell values map directly to the hwirq number @@ -1050,6 +1069,10 @@ EXPORT_SYMBOL_GPL(irq_domain_simple_ops); /** * irq_domain_translate_onecell() - Generic translate for direct one cell * bindings + * @d: IRQ domain involved in the translation + * @fwspec: FW interrupt specifier to translate + * @out_hwirq: pointer at which to write the hwirq number + * @out_type: pointer at which to write the interrupt type */ int irq_domain_translate_onecell(struct irq_domain *d, struct irq_fwspec *fwspec, @@ -1067,6 +1090,10 @@ EXPORT_SYMBOL_GPL(irq_domain_translate_onecell); /** * irq_domain_translate_twocell() - Generic translate for direct two cell * bindings + * @d: IRQ domain involved in the translation + * @fwspec: FW interrupt specifier to translate + * @out_hwirq: pointer at which to write the hwirq number + * @out_type: pointer at which to write the interrupt type * * Device Tree IRQ specifier translation function which works with two cell * bindings where the cell values map directly to the hwirq number From patchwork Tue Apr 30 08:37:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648477 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94698127E35; 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arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="U62vzJuf" Received: by mail.gandi.net (Postfix) with ESMTPA id 936B920019; Tue, 30 Apr 2024 08:39:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466367; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FR4QwoKXFxJ43DqRB1RdYBgvIbxpWMAKeBkjAclMBCo=; b=U62vzJufh3VZTyqvmwaW+57SPJP2V4ICvdNaqZ+5lqYH+O0xOu+63mFkBD58xH9Ebq7yNn aALbjX6NKcTzaihIuNMyPWUwLkLcKSaYA0aquJT7lZ296Ib55VV3WV6zzH4mdeLqlTXLv8 iKsR/Lwob8gebssiMxGWJYMSBgijo8fpVmhYDQHNgXEnY3L1yvWjmJ7/KOKAA8/v2IAvme LriSoGCL39T8pjYtMRJ37R7icA8pcBsNpnvKj6cYa9XXKTwNMxhMaPpu3iYzy3YM6Yw8ju Bp1CnZQ+ToiX1bRTXxRkY2y6tCP0KCGM92Irfu1yhWBIqmksvFd++nxX5zrpnA== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 11/17] irqdomain: Introduce irq_domain_alloc() and irq_domain_publish() Date: Tue, 30 Apr 2024 10:37:20 +0200 Message-ID: <20240430083730.134918-12-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com The irq_domain_add_*() family functions create an irq_domain and also publish this newly created to domain. Once an irq_domain is published, consumers can request IRQ in order to use them. Some interrupt controller drivers have to perform some more operations with the created irq_domain in order to have it ready to be used. For instance: - Allocate generic irq chips with irq_alloc_domain_generic_chips() - Retrieve the generic irq chips with irq_get_domain_generic_chip() - Initialize retrieved chips: set register base address and offsets, set several hooks such as irq_mask, irq_unmask, ... To avoid a window where the domain is published but not yet ready to be used, introduce irq_domain_alloc_*() family functions to create the irq_domain and irq_domain_publish() to publish the irq_domain. With this new functions, any additional initialisation can then be done between the call creating the irq_domain and the call publishing it. Signed-off-by: Herve Codina --- include/linux/irqdomain.h | 16 +++++++ kernel/irq/irqdomain.c | 91 ++++++++++++++++++++++++++++----------- 2 files changed, 82 insertions(+), 25 deletions(-) diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index 21ecf582a0fe..86203e7e6659 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -257,6 +257,22 @@ static inline struct fwnode_handle *irq_domain_alloc_fwnode(phys_addr_t *pa) } void irq_domain_free_fwnode(struct fwnode_handle *fwnode); +struct irq_domain *irq_domain_alloc(struct fwnode_handle *fwnode, unsigned int size, + irq_hw_number_t hwirq_max, int direct_max, + const struct irq_domain_ops *ops, + void *host_data); + +static inline struct irq_domain *irq_domain_alloc_linear(struct fwnode_handle *fwnode, + unsigned int size, + const struct irq_domain_ops *ops, + void *host_data) +{ + return irq_domain_alloc(fwnode, size, size, 0, ops, host_data); +} + +void irq_domain_free(struct irq_domain *domain); +void irq_domain_publish(struct irq_domain *domain); +void irq_domain_unpublish(struct irq_domain *domain); struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, unsigned int size, irq_hw_number_t hwirq_max, int direct_max, const struct irq_domain_ops *ops, diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index 1ed8c4d3cf2e..ed353789fb27 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -231,7 +231,38 @@ static struct irq_domain *__irq_domain_create(struct fwnode_handle *fwnode, return domain; } -static void __irq_domain_publish(struct irq_domain *domain) +struct irq_domain *irq_domain_alloc(struct fwnode_handle *fwnode, unsigned int size, + irq_hw_number_t hwirq_max, int direct_max, + const struct irq_domain_ops *ops, + void *host_data) +{ + return __irq_domain_create(fwnode, size, hwirq_max, direct_max, ops, + host_data); +} +EXPORT_SYMBOL_GPL(irq_domain_alloc); + +/** + * irq_domain_free() - Free an irq domain. + * @domain: domain to free + * + * This routine is used to free an irq domain. The caller must ensure + * that the domain is not published. + */ +void irq_domain_free(struct irq_domain *domain) +{ + fwnode_dev_initialized(domain->fwnode, false); + fwnode_handle_put(domain->fwnode); + if (domain->flags & IRQ_DOMAIN_NAME_ALLOCATED) + kfree(domain->name); + kfree(domain); +} +EXPORT_SYMBOL_GPL(irq_domain_free); + +/** + * irq_domain_publish() - Publish an irq domain. + * @domain: domain to publish + */ +void irq_domain_publish(struct irq_domain *domain) { mutex_lock(&irq_domain_mutex); debugfs_add_domain_dir(domain); @@ -240,6 +271,36 @@ static void __irq_domain_publish(struct irq_domain *domain) pr_debug("Added domain %s\n", domain->name); } +EXPORT_SYMBOL_GPL(irq_domain_publish); + +/** + * irq_domain_unpublish() - Unpublish an irq domain. + * @domain: domain to unpublish + * + * This routine is used to unpublish an irq domain. The caller must ensure + * that all mappings within the domain have been disposed of prior to + * use, depending on the revmap type. + */ +void irq_domain_unpublish(struct irq_domain *domain) +{ + mutex_lock(&irq_domain_mutex); + debugfs_remove_domain_dir(domain); + + WARN_ON(!radix_tree_empty(&domain->revmap_tree)); + + list_del(&domain->link); + + /* + * If the going away domain is the default one, reset it. + */ + if (unlikely(irq_default_domain == domain)) + irq_set_default_host(NULL); + + mutex_unlock(&irq_domain_mutex); + + pr_debug("Removed domain %s\n", domain->name); +} +EXPORT_SYMBOL_GPL(irq_domain_unpublish); /** * __irq_domain_add() - Allocate a new irq_domain data structure @@ -264,7 +325,7 @@ struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, unsigned int s domain = __irq_domain_create(fwnode, size, hwirq_max, direct_max, ops, host_data); if (domain) - __irq_domain_publish(domain); + irq_domain_publish(domain); return domain; } @@ -280,28 +341,8 @@ EXPORT_SYMBOL_GPL(__irq_domain_add); */ void irq_domain_remove(struct irq_domain *domain) { - mutex_lock(&irq_domain_mutex); - debugfs_remove_domain_dir(domain); - - WARN_ON(!radix_tree_empty(&domain->revmap_tree)); - - list_del(&domain->link); - - /* - * If the going away domain is the default one, reset it. - */ - if (unlikely(irq_default_domain == domain)) - irq_set_default_host(NULL); - - mutex_unlock(&irq_domain_mutex); - - pr_debug("Removed domain %s\n", domain->name); - - fwnode_dev_initialized(domain->fwnode, false); - fwnode_handle_put(domain->fwnode); - if (domain->flags & IRQ_DOMAIN_NAME_ALLOCATED) - kfree(domain->name); - kfree(domain); + irq_domain_unpublish(domain); + irq_domain_free(domain); } EXPORT_SYMBOL_GPL(irq_domain_remove); @@ -1183,7 +1224,7 @@ struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent, domain->parent = parent; domain->flags |= flags; - __irq_domain_publish(domain); + irq_domain_publish(domain); } return domain; From patchwork Tue Apr 30 08:37:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648478 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 85F801A38DF; Tue, 30 Apr 2024 08:39:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466373; cv=none; b=nf1JJMNR8fD+/J1jspC9yV/Pxjkr02zbqMEdAmRALBTcWf5hi6oOBvktHCjFDmKEfxpVlfYPNgTvPMZ9/m2o6LTmR/3TytPZcrUzUFdeYw6tf2W1khFbU33dmbAxJyL1yOu02KF1bzRENqHEXRqSTMpGIOS+OpgKmUxMvYHcvpE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466373; c=relaxed/simple; bh=wmXUG+a+/MF9HrF3nkritZtoBsVbTyk5TkSaL3lB8Gk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=YXPnT3IqgnXqw0cNRIzKss5jb9jjfYNrvxa4oKLCzQc5GPhnl5hf0gUYDZswoFUoPYGo+QDZlOhW/FV0uUEB2lApkwtNsVZPXc1lg6gp1BShLOXtxuy7AhirjOK85+JyatvcIWFx3vCyMcl8xxd5+blIRyJzGceeRecZJbqpTkE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=pHhh9Abx; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="pHhh9Abx" Received: by mail.gandi.net (Postfix) with ESMTPA id 5B7842000E; Tue, 30 Apr 2024 08:39:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466368; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8HrxA/+8yLc71qfYdn9ZorS/cSEEyapLB+JeDi6Qlp8=; b=pHhh9Abxqvq2jTen/UgLW19vrJ4MHKM8pxomrQSjpHAxCqoD26axtEdoe3T2Kl9NACch7W s83NOYVZDAQuKLlrIFFdFp4W90n4ScUytC/iKZAcovL9p30B1olFpf2a3bP5NLQb9Lt5ln lMShcJiuTAPFsQfIovkudTpn06uwmMfTbaftdVzqqu75mWVnSsO3J/HcYvGdc9wCVgFtR4 AyRnkFcHDt8MY7KH6uVmsvwvzFn6UnHaII4hCDUBka8EGTa6LZJuS+ZuIy/IBX/jXfIiFL h+Bb7HWOXvlCrP1i4tHSa2/AaVXtUf0KlUpa9ATB9RVD7LJ41TTF/yUada7amA== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 12/17] irqchip: Add support for LAN966x OIC Date: Tue, 30 Apr 2024 10:37:21 +0200 Message-ID: <20240430083730.134918-13-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com The Microchip LAN966x outband interrupt controller (OIC) maps the internal interrupt sources of the LAN966x device to an external interrupt. When the LAN966x device is used as a PCI device, the external interrupt is routed to the PCI interrupt. Signed-off-by: Herve Codina --- drivers/irqchip/Kconfig | 12 ++ drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-lan966x-oic.c | 301 ++++++++++++++++++++++++++++++ 3 files changed, 314 insertions(+) create mode 100644 drivers/irqchip/irq-lan966x-oic.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 72c07a12f5e1..973eebc8d1d1 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -169,6 +169,18 @@ config IXP4XX_IRQ select IRQ_DOMAIN select SPARSE_IRQ +config LAN966X_OIC + tristate "Microchip LAN966x OIC Support" + select GENERIC_IRQ_CHIP + select IRQ_DOMAIN + help + Enable support for the LAN966x Outbound Interrupt Controller. + This controller is present on the Microchip LAN966x PCI device and + maps the internal interrupts sources to PCIe interrupt. + + To compile this driver as a module, choose M here: the module + will be called irq-lan966x-oic. + config MADERA_IRQ tristate diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index ec4a18380998..762d3078aa3b 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -101,6 +101,7 @@ obj-$(CONFIG_IMX_IRQSTEER) += irq-imx-irqsteer.o obj-$(CONFIG_IMX_INTMUX) += irq-imx-intmux.o obj-$(CONFIG_IMX_MU_MSI) += irq-imx-mu-msi.o obj-$(CONFIG_MADERA_IRQ) += irq-madera.o +obj-$(CONFIG_LAN966X_OIC) += irq-lan966x-oic.o obj-$(CONFIG_LS1X_IRQ) += irq-ls1x.o obj-$(CONFIG_TI_SCI_INTR_IRQCHIP) += irq-ti-sci-intr.o obj-$(CONFIG_TI_SCI_INTA_IRQCHIP) += irq-ti-sci-inta.o diff --git a/drivers/irqchip/irq-lan966x-oic.c b/drivers/irqchip/irq-lan966x-oic.c new file mode 100644 index 000000000000..342f0dbf16e3 --- /dev/null +++ b/drivers/irqchip/irq-lan966x-oic.c @@ -0,0 +1,301 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for the Microchip LAN966x outbound interrupt controller + * + * Copyright (c) 2024 Technology Inc. and its subsidiaries. + * + * Authors: + * Horatiu Vultur + * Clément Léger + * Herve Codina + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct lan966x_oic_chip_regs { + int reg_off_ena_set; + int reg_off_ena_clr; + int reg_off_sticky; + int reg_off_ident; + int reg_off_map; +}; + +struct lan966x_oic_data { + struct irq_domain *domain; + void __iomem *regs; + int irq; +}; + +#define LAN966X_OIC_NR_IRQ 86 + +/* Interrupt sticky status */ +#define LAN966X_OIC_INTR_STICKY 0x30 +#define LAN966X_OIC_INTR_STICKY1 0x34 +#define LAN966X_OIC_INTR_STICKY2 0x38 + +/* Interrupt enable */ +#define LAN966X_OIC_INTR_ENA 0x48 +#define LAN966X_OIC_INTR_ENA1 0x4c +#define LAN966X_OIC_INTR_ENA2 0x50 + +/* Atomic clear of interrupt enable */ +#define LAN966X_OIC_INTR_ENA_CLR 0x54 +#define LAN966X_OIC_INTR_ENA_CLR1 0x58 +#define LAN966X_OIC_INTR_ENA_CLR2 0x5c + +/* Atomic set of interrupt */ +#define LAN966X_OIC_INTR_ENA_SET 0x60 +#define LAN966X_OIC_INTR_ENA_SET1 0x64 +#define LAN966X_OIC_INTR_ENA_SET2 0x68 + +/* Mapping of source to destination interrupts (_n = 0..8) */ +#define LAN966X_OIC_DST_INTR_MAP(_n) 0x78 +#define LAN966X_OIC_DST_INTR_MAP1(_n) 0x9c +#define LAN966X_OIC_DST_INTR_MAP2(_n) 0xc0 + +/* Currently active interrupt sources per destination (_n = 0..8) */ +#define LAN966X_OIC_DST_INTR_IDENT(_n) 0xe4 +#define LAN966X_OIC_DST_INTR_IDENT1(_n) 0x108 +#define LAN966X_OIC_DST_INTR_IDENT2(_n) 0x12c + +static unsigned int lan966x_oic_irq_startup(struct irq_data *data) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); + struct irq_chip_type *ct = irq_data_get_chip_type(data); + struct lan966x_oic_chip_regs *chip_regs = gc->private; + u32 map; + + irq_gc_lock(gc); + + /* Map the source interrupt to the destination */ + map = irq_reg_readl(gc, chip_regs->reg_off_map); + map |= data->mask; + irq_reg_writel(gc, map, chip_regs->reg_off_map); + + irq_gc_unlock(gc); + + ct->chip.irq_ack(data); + ct->chip.irq_unmask(data); + + return 0; +} + +static void lan966x_oic_irq_shutdown(struct irq_data *data) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); + struct irq_chip_type *ct = irq_data_get_chip_type(data); + struct lan966x_oic_chip_regs *chip_regs = gc->private; + u32 map; + + ct->chip.irq_mask(data); + + irq_gc_lock(gc); + + /* Unmap the interrupt */ + map = irq_reg_readl(gc, chip_regs->reg_off_map); + map &= ~data->mask; + irq_reg_writel(gc, map, chip_regs->reg_off_map); + + irq_gc_unlock(gc); +} + +static int lan966x_oic_irq_set_type(struct irq_data *data, unsigned int flow_type) +{ + if (flow_type != IRQ_TYPE_LEVEL_HIGH) { + pr_err("lan966x oic doesn't support flow type %d\n", flow_type); + return -EINVAL; + } + + return 0; +} + +static void lan966x_oic_irq_handler_domain(struct irq_domain *d, u32 first_irq) +{ + struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, first_irq); + struct lan966x_oic_chip_regs *chip_regs = gc->private; + unsigned long ident; + unsigned int hwirq; + + ident = irq_reg_readl(gc, chip_regs->reg_off_ident); + if (!ident) + return; + + for_each_set_bit(hwirq, &ident, 32) + generic_handle_domain_irq(d, hwirq + first_irq); +} + +static void lan966x_oic_irq_handler(struct irq_desc *desc) +{ + struct irq_domain *d = irq_desc_get_handler_data(desc); + struct irq_chip *chip = irq_desc_get_chip(desc); + + chained_irq_enter(chip, desc); + lan966x_oic_irq_handler_domain(d, 0); + lan966x_oic_irq_handler_domain(d, 32); + lan966x_oic_irq_handler_domain(d, 64); + chained_irq_exit(chip, desc); +} + +static struct lan966x_oic_chip_regs lan966x_oic_chip_regs[3] = { + { + .reg_off_ena_set = LAN966X_OIC_INTR_ENA_SET, + .reg_off_ena_clr = LAN966X_OIC_INTR_ENA_CLR, + .reg_off_sticky = LAN966X_OIC_INTR_STICKY, + .reg_off_ident = LAN966X_OIC_DST_INTR_IDENT(0), + .reg_off_map = LAN966X_OIC_DST_INTR_MAP(0), + }, { + .reg_off_ena_set = LAN966X_OIC_INTR_ENA_SET1, + .reg_off_ena_clr = LAN966X_OIC_INTR_ENA_CLR1, + .reg_off_sticky = LAN966X_OIC_INTR_STICKY1, + .reg_off_ident = LAN966X_OIC_DST_INTR_IDENT1(0), + .reg_off_map = LAN966X_OIC_DST_INTR_MAP1(0), + }, { + .reg_off_ena_set = LAN966X_OIC_INTR_ENA_SET2, + .reg_off_ena_clr = LAN966X_OIC_INTR_ENA_CLR2, + .reg_off_sticky = LAN966X_OIC_INTR_STICKY2, + .reg_off_ident = LAN966X_OIC_DST_INTR_IDENT2(0), + .reg_off_map = LAN966X_OIC_DST_INTR_MAP2(0), + } +}; + +static void lan966x_oic_chip_init(struct lan966x_oic_data *lan966x_oic, + struct irq_chip_generic *gc, + struct lan966x_oic_chip_regs *chip_regs) +{ + gc->reg_base = lan966x_oic->regs; + gc->chip_types[0].regs.enable = chip_regs->reg_off_ena_set; + gc->chip_types[0].regs.disable = chip_regs->reg_off_ena_clr; + gc->chip_types[0].regs.ack = chip_regs->reg_off_sticky; + gc->chip_types[0].chip.irq_startup = lan966x_oic_irq_startup; + gc->chip_types[0].chip.irq_shutdown = lan966x_oic_irq_shutdown; + gc->chip_types[0].chip.irq_set_type = lan966x_oic_irq_set_type; + gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; + gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; + gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; + gc->private = chip_regs; + + /* Disable all interrupts handled by this chip */ + irq_reg_writel(gc, ~0, chip_regs->reg_off_ena_clr); +} + +static void lan966x_oic_chip_exit(struct irq_chip_generic *gc) +{ + /* Disable and ack all interrupts handled by this chip */ + irq_reg_writel(gc, ~0, gc->chip_types[0].regs.disable); + irq_reg_writel(gc, ~0, gc->chip_types[0].regs.ack); +} + +static int lan966x_oic_probe(struct platform_device *pdev) +{ + struct device_node *node = pdev->dev.of_node; + struct lan966x_oic_data *lan966x_oic; + struct device *dev = &pdev->dev; + struct irq_chip_generic *gc; + int ret; + int i; + + lan966x_oic = devm_kmalloc(dev, sizeof(*lan966x_oic), GFP_KERNEL); + if (!lan966x_oic) + return -ENOMEM; + + lan966x_oic->regs = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(lan966x_oic->regs)) + return dev_err_probe(dev, PTR_ERR(lan966x_oic->regs), + "failed to map resource\n"); + + lan966x_oic->domain = irq_domain_alloc_linear(of_node_to_fwnode(node), + LAN966X_OIC_NR_IRQ, + &irq_generic_chip_ops, NULL); + if (!lan966x_oic->domain) { + dev_err(dev, "failed to create an IRQ domain\n"); + return -EINVAL; + } + + lan966x_oic->irq = platform_get_irq(pdev, 0); + if (lan966x_oic->irq < 0) { + dev_err_probe(dev, lan966x_oic->irq, "failed to get the IRQ\n"); + goto err_domain_free; + } + + ret = irq_alloc_domain_generic_chips(lan966x_oic->domain, 32, 1, "lan966x-oic", + handle_level_irq, 0, 0, 0); + if (ret) { + dev_err_probe(dev, ret, "failed to alloc irq domain gc\n"); + goto err_domain_free; + } + + /* Init chips */ + BUILD_BUG_ON(DIV_ROUND_UP(LAN966X_OIC_NR_IRQ, 32) != ARRAY_SIZE(lan966x_oic_chip_regs)); + for (i = 0; i < ARRAY_SIZE(lan966x_oic_chip_regs); i++) { + gc = irq_get_domain_generic_chip(lan966x_oic->domain, i * 32); + lan966x_oic_chip_init(lan966x_oic, gc, &lan966x_oic_chip_regs[i]); + } + + irq_set_chained_handler_and_data(lan966x_oic->irq, lan966x_oic_irq_handler, + lan966x_oic->domain); + + irq_domain_publish(lan966x_oic->domain); + platform_set_drvdata(pdev, lan966x_oic); + return 0; + +err_domain_free: + irq_domain_free(lan966x_oic->domain); + return ret; +} + +static void lan966x_oic_remove(struct platform_device *pdev) +{ + struct lan966x_oic_data *lan966x_oic = platform_get_drvdata(pdev); + struct irq_chip_generic *gc; + int i; + + for (i = 0; i < ARRAY_SIZE(lan966x_oic_chip_regs); i++) { + gc = irq_get_domain_generic_chip(lan966x_oic->domain, i * 32); + lan966x_oic_chip_exit(gc); + } + + irq_set_chained_handler_and_data(lan966x_oic->irq, NULL, NULL); + + for (i = 0; i < LAN966X_OIC_NR_IRQ; i++) + irq_dispose_mapping(irq_find_mapping(lan966x_oic->domain, i)); + + irq_domain_unpublish(lan966x_oic->domain); + + for (i = 0; i < ARRAY_SIZE(lan966x_oic_chip_regs); i++) { + gc = irq_get_domain_generic_chip(lan966x_oic->domain, i * 32); + irq_remove_generic_chip(gc, ~0, 0, 0); + } + + kfree(lan966x_oic->domain->gc); + irq_domain_free(lan966x_oic->domain); +} + +static const struct of_device_id lan966x_oic_of_match[] = { + { .compatible = "microchip,lan966x-oic" }, + {} /* sentinel */ +}; +MODULE_DEVICE_TABLE(of, lan966x_oic_of_match); + +static struct platform_driver lan966x_oic_driver = { + .probe = lan966x_oic_probe, + .remove_new = lan966x_oic_remove, + .driver = { + .name = "lan966x-oic", + .of_match_table = lan966x_oic_of_match, + }, +}; +module_platform_driver(lan966x_oic_driver); + +MODULE_AUTHOR("Herve Codina "); +MODULE_DESCRIPTION("Microchip LAN966x OIC driver"); +MODULE_LICENSE("GPL"); From patchwork Tue Apr 30 08:37:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648479 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 107EC1272D9; Tue, 30 Apr 2024 08:39:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466374; cv=none; b=r9W8gaLQ6Jf0fiyBWP36f0P/s4RHmaV4wnO+TH0d83FJxK5Zldq+tRwffFq1Ma29CouCp20Ft3jTqkd6MwrtrVshKE3VH2NN3/+IJn0U7wm/3OhqQGbV2YEagoA2LsdJan4SgpL/MdtPMYjlFUB2USMZW2HEv1q/02o3CsS4ato= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466374; c=relaxed/simple; bh=bSOs+xbWjg9vODwLMkXoJiN1ThLHAAoIZudT6CvSiOo=; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 13/17] MAINTAINERS: Add the Microchip LAN966x OIC driver entry Date: Tue, 30 Apr 2024 10:37:22 +0200 Message-ID: <20240430083730.134918-14-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com After contributing the driver, add myself as the maintainer for the Microchip LAN966x OIC driver. Signed-off-by: Herve Codina --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ebf03f5f0619..a15f19008d6e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14465,6 +14465,12 @@ L: netdev@vger.kernel.org S: Maintained F: drivers/net/ethernet/microchip/lan966x/* +MICROCHIP LAN966X OIC DRIVER +M: Herve Codina +S: Maintained +F: Documentation/devicetree/bindings/interrupt-controller/microchip,lan966x-oic.yaml +F: drivers/irqchip/irq-lan966x-oic.c + MICROCHIP LCDFB DRIVER M: Nicolas Ferre L: linux-fbdev@vger.kernel.org From patchwork Tue Apr 30 08:37:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648480 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B025A1BED87; Tue, 30 Apr 2024 08:39:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466376; cv=none; b=b26/H7qQB51ZZ53ROpz6PPN0fROx3kxLATFNIpnj5xfEuT+/w4WxOC7uUsVhCKxKv30QF4b5R62gKusZYLkHqcfcvn3Q4ptvNF8ncuhjc0VtN8oiKaDeW1ISzRgeGEg+5KKCuMDjYCNWf0dbORHtQSx4Z8GsWYWwhNQdn4LPj2k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466376; c=relaxed/simple; bh=QZpvZsfKgX3F8oDhD1XKg83UlmJnd2VYkZjW6DQVGU0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=j4RleFKudDKe/Nkh7LvVoqKgReMgPpAYsJgs5ZX6rSk+Dsz7riYoKl0ESollgr0lpwBf2UMjqTHpeAVQ9tax26gYyYvJ2ZPrth7FPO4KnAhGPFKLJdIAAEONDVzFrlWPNRO7EwUckOtrnm4VnfENgr+p1pKJTf/iOskHfUVXnaU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=F7kImKJ0; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="F7kImKJ0" Received: by mail.gandi.net (Postfix) with ESMTPA id 8EF7C2000F; Tue, 30 Apr 2024 08:39:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466372; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HOrdL8D1Yo1+FTRkcba34oG6bd3Uzs7JBNkhgICtpjg=; b=F7kImKJ0zmG8XOjLM+GJ3WGHJg94BRx9PKzFcwJtvbab1UExnVPJ2t0MEJyrQ2BBifkU68 HeUwQkBVa6NFUWChkprKxl7x4daH0239zjzr7iW1Oq+xiZRl7NmoMbkfPF3p2PX0a2cPvt 5hx/A/9725qGixJZbfHadeDiLoO3uR8wxKPr2+gXTKnddSnpb1JIbcbQj0KL/KGzLCaodc jhM5ig5JcSyahH/y9bRSct+7j9YPbbit16TsKCznxOvvOQsGMOdyr1nbjUuHVP6IPgc/iE 5XUcWe5r+J0D10Id0dSE1a26F4lUj3D5caTy51zcfxrLsuU6dKX6b/UVUTcxsQ== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 14/17] of: dynamic: Introduce of_changeset_add_prop_bool() Date: Tue, 30 Apr 2024 10:37:23 +0200 Message-ID: <20240430083730.134918-15-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com APIs to add some properties in a changeset exist but nothing to add a DT boolean property (i.e. a property without any values). Fill this lack with of_changeset_add_prop_bool(). Signed-off-by: Herve Codina --- drivers/of/dynamic.c | 25 +++++++++++++++++++++++++ include/linux/of.h | 3 +++ 2 files changed, 28 insertions(+) diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c index 4d57a4e34105..37d3b0a272dc 100644 --- a/drivers/of/dynamic.c +++ b/drivers/of/dynamic.c @@ -1052,3 +1052,28 @@ int of_changeset_add_prop_u32_array(struct of_changeset *ocs, return ret; } EXPORT_SYMBOL_GPL(of_changeset_add_prop_u32_array); + +/** + * of_changeset_add_prop_bool - Add a boolean property (i.e. a property without + * any values) to a changeset. + * + * @ocs: changeset pointer + * @np: device node pointer + * @prop_name: name of the property to be added + * + * Create a boolean property and add it to a changeset. + * + * Return: 0 on success, a negative error value in case of an error. + */ +int of_changeset_add_prop_bool(struct of_changeset *ocs, struct device_node *np, + const char *prop_name) +{ + struct property prop; + + prop.name = (char *)prop_name; + prop.length = 0; + prop.value = NULL; + + return of_changeset_add_prop_helper(ocs, np, &prop); +} +EXPORT_SYMBOL_GPL(of_changeset_add_prop_bool); diff --git a/include/linux/of.h b/include/linux/of.h index a0bedd038a05..9633199a954a 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -1652,6 +1652,9 @@ static inline int of_changeset_add_prop_u32(struct of_changeset *ocs, return of_changeset_add_prop_u32_array(ocs, np, prop_name, &val, 1); } +int of_changeset_add_prop_bool(struct of_changeset *ocs, struct device_node *np, + const char *prop_name); + #else /* CONFIG_OF_DYNAMIC */ static inline int of_reconfig_notifier_register(struct notifier_block *nb) { From patchwork Tue Apr 30 08:37:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648481 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 40D751BF6D7; Tue, 30 Apr 2024 08:39:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466377; cv=none; b=WcDmRhc/MTUm5oUZu+SrIok13oVAe40FqzpHslSEZDiyrnf46MP5sITLVW8jrTbdVfcwPPXekYblqyVCgUxxb3akROSZAXvjE9sg+NLNafz2pfeMery44a8/jhmp7T8KxIilFOWOMERH+N3hIaTJSBrBL5Jp0hq1sdfteacJJr0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466377; c=relaxed/simple; bh=wDWXPuQPX0SK7eCiZC1Dda7dfb6gfYPOkdHIxbXuONY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kQaUJesp0Vlzd+6ysaeCNsBY3zSfmZdQQd0fvbvqHlAAVovzWt/a9x3MlBw9Cjmx/FaJKq5M1OfxQuNFKfNfZUUyy/T27dL3pfWRutcL2I0xZnNUv+ZQ5Vo1L3oGCLEHhSp2OWbqBbaTv/l6OFezysOU6ZZRiNGB1KYIobcvia8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=a1xRvzFe; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="a1xRvzFe" Received: by mail.gandi.net (Postfix) with ESMTPA id 331C320014; Tue, 30 Apr 2024 08:39:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466373; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EL/+wWthdbbXpsMfHadEqQrahJY+3VcTmg9gLeOEcoI=; b=a1xRvzFeeKIKQGG0I7FiPVUgVyIrQwZl8MJm/CPkMjOEjYyT9Ie0Umir5GpeC47xIn0y/Z yLGkaqdm3WCC0uX/WrU2T1flH87ngShPmFcd8QL75pDHdbngjKiwUYkt3Sy80J8OzKn7Md 1XHxJ9mqrv4sbtLXSy8KgpRLlFCogcZFyfSo06fmkfGmhLf/yJgAQTne7vUgEV59l+trvl aKhvnI9PDh9/XBwZ4e4fQ1lBevOlWcl9KProlh5ZBfDDioNS5bDakrHdtkB2rN+gJMw+KQ +8jybgwR+4yDjCxRTs6Jlsz87DdhrYHfDqHE7i0VuW9w9zkJtlHQn8KwYVuc+A== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 15/17] pci: of_property: Add the interrupt-controller property in PCI device nodes Date: Tue, 30 Apr 2024 10:37:24 +0200 Message-ID: <20240430083730.134918-16-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com PCI devices and bridges DT nodes created during the PCI scan are created with the interrupt-map property set to handle interrupts. In order to set this interrupt-map property at a specific level, a phandle to the parent interrupt controller is needed. On systems that are not fully described by a device-tree, the parent interrupt controller may be unavailable (i.e. not described by the device-tree). As mentioned in the [1], avoiding the use of the interrupt-map property and considering a PCI device as an interrupt controller itself avoid the use of a parent interrupt phandle. In that case, the PCI device itself as an interrupt controller is responsible for routing the interrupts described in the device-tree world (DT overlay) to the PCI interrupts. Add the 'interrupt-controller' property in the PCI device DT node. [1]: https://lore.kernel.org/lkml/CAL_Jsq+je7+9ATR=B6jXHjEJHjn24vQFs4Tvi9=vhDeK9n42Aw@mail.gmail.com/ Signed-off-by: Herve Codina --- drivers/pci/of_property.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/pci/of_property.c b/drivers/pci/of_property.c index c2c7334152bc..9f8b940029ed 100644 --- a/drivers/pci/of_property.c +++ b/drivers/pci/of_property.c @@ -183,6 +183,26 @@ static int of_pci_prop_interrupts(struct pci_dev *pdev, return of_changeset_add_prop_u32(ocs, np, "interrupts", (u32)pin); } +static int of_pci_prop_intr_ctrl(struct pci_dev *pdev, struct of_changeset *ocs, + struct device_node *np) +{ + int ret; + u8 pin; + + ret = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin); + if (ret != 0) + return ret; + + if (!pin) + return 0; + + ret = of_changeset_add_prop_u32(ocs, np, "#interrupt-cells", 1); + if (ret) + return ret; + + return of_changeset_add_prop_bool(ocs, np, "interrupt-controller"); +} + static int of_pci_prop_intr_map(struct pci_dev *pdev, struct of_changeset *ocs, struct device_node *np) { @@ -334,6 +354,10 @@ int of_pci_add_properties(struct pci_dev *pdev, struct of_changeset *ocs, ret = of_pci_prop_intr_map(pdev, ocs, np); if (ret) return ret; + } else { + ret = of_pci_prop_intr_ctrl(pdev, ocs, np); + if (ret) + return ret; } ret = of_pci_prop_ranges(pdev, ocs, np); From patchwork Tue Apr 30 08:37:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648482 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7E4A1C0DC7; Tue, 30 Apr 2024 08:39:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466379; cv=none; b=YwHa1slgbI40Unkz9RVrkPM1+C+FDrNXGq/kJnhk5K4tvpf5DyyXyy7UrmG3evdxBOUsU0bDB9rqQxh8q9yTC5hYXBSD72TJn5+Cuy+bx0Y5iBgi8kRu+SV4x7RIm8LEieBGtg84iXkDoaBM6B10OFhYK+9OtvqykyIF/cl0hR4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466379; c=relaxed/simple; bh=nliaHWA/NMStS5UotZ7BKISP29iSI3mDU9pVVa55xuI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=kjcjTxXrtAyeohkIiayN/9uB/GYsUKhnccoXMQVI78HHldef0aTQDATebYQ3klUBSLGVZ5aA4yNErw94DCawpWAUCZVC5tCEXDHGB5x5cOe6PY8gO6nu9BdZvgC74zASQcIrlddaR2jx2rkRARWfYzriUqewDH6d/nFmWbpPQzY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Ysu7qESt; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Ysu7qESt" Received: by mail.gandi.net (Postfix) with ESMTPA id CA7AC2000B; Tue, 30 Apr 2024 08:39:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1714466375; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1x6u+GMy96SLnvHnPDRb/JeS/VQcZwMT1qoZIOF3XQc=; b=Ysu7qEStKewqPlfDKZxeb4N/jgwYmmGV23M+nB1ssvvXEtpld6bg0vA+QtO27Wg21aV2kI ndlDkh2GU7qiEFqM5oL8iDq/OWcIwvP1CikwguzY9+pb8ewrumTcdw9ryr7eRqYNOqKwT0 iFiaupFzyYk0He0UThVMkWQsk3hYRmFo02yrvUkz28w3mbUnAu3BJKi5Bf8jE+m2AFegVC oiyPIR4xmhmtjIBXsXRmQYTXYTb+E1ryajRVJml+HHNVA/dCW7Q8Gn4B9xHx/Oufipv7Ba pksW2xIiJ9cg8ytIia9f1zFyfLDjcvY2PWr2YFqvn/fjdJI/+vxC/0I0DSxXYA== From: Herve Codina To: Herve Codina , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 16/17] mfd: Add support for LAN966x PCI device Date: Tue, 30 Apr 2024 10:37:25 +0200 Message-ID: <20240430083730.134918-17-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com Add a PCI driver that handles the LAN966x PCI device using a device-tree overlay. This overlay is applied to the PCI device DT node and allows to describe components that are present in the device. The memory from the device-tree is remapped to the BAR memory thanks to "ranges" properties computed at runtime by the PCI core during the PCI enumeration. The PCI device itself acts as an interrupt controller and is used as the parent of the internal LAN966x interrupt controller to route the interrupts to the assigned PCI INTx interrupt. Signed-off-by: Herve Codina --- drivers/mfd/Kconfig | 24 ++++ drivers/mfd/Makefile | 4 + drivers/mfd/lan966x_pci.c | 229 +++++++++++++++++++++++++++++++++++ drivers/mfd/lan966x_pci.dtso | 167 +++++++++++++++++++++++++ drivers/pci/quirks.c | 1 + 5 files changed, 425 insertions(+) create mode 100644 drivers/mfd/lan966x_pci.c create mode 100644 drivers/mfd/lan966x_pci.dtso diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 4b023ee229cf..e5f5d2986dd3 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -144,6 +144,30 @@ config MFD_ATMEL_FLEXCOM by the probe function of this MFD driver according to a device tree property. +config MFD_LAN966X_PCI + tristate "Microchip LAN966x PCIe Support" + depends on PCI + select OF + select OF_OVERLAY + select IRQ_DOMAIN + help + This enables the support for the LAN966x PCIe device. + This is used to drive the LAN966x PCIe device from the host system + to which it is connected. + + This driver uses an overlay to load other drivers to support for + LAN966x internal components. + Even if this driver does not depend on these other drivers, in order + to have a fully functional board, the following drivers are needed: + - fixed-clock (COMMON_CLK) + - lan966x-oic (LAN966X_OIC) + - lan966x-cpu-syscon (MFD_SYSCON) + - lan966x-switch-reset (RESET_MCHP_SPARX5) + - lan966x-pinctrl (PINCTRL_OCELOT) + - lan966x-serdes (PHY_LAN966X_SERDES) + - lan966x-miim (MDIO_MSCC_MIIM) + - lan966x-switch (LAN966X_SWITCH) + config MFD_ATMEL_HLCDC tristate "Atmel HLCDC (High-end LCD Controller)" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index c66f07edcd0e..165a9674ff48 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -284,3 +284,7 @@ rsmu-i2c-objs := rsmu_core.o rsmu_i2c.o rsmu-spi-objs := rsmu_core.o rsmu_spi.o obj-$(CONFIG_MFD_RSMU_I2C) += rsmu-i2c.o obj-$(CONFIG_MFD_RSMU_SPI) += rsmu-spi.o + +lan966x-pci-objs := lan966x_pci.o +lan966x-pci-objs += lan966x_pci.dtbo.o +obj-$(CONFIG_MFD_LAN966X_PCI) += lan966x-pci.o diff --git a/drivers/mfd/lan966x_pci.c b/drivers/mfd/lan966x_pci.c new file mode 100644 index 000000000000..d9d886a1948f --- /dev/null +++ b/drivers/mfd/lan966x_pci.c @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Microchip LAN966x PCI driver + * + * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries. + * + * Authors: + * Clément Léger + * Hervé Codina + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* Embedded dtbo symbols created by cmd_wrap_S_dtb in scripts/Makefile.lib */ +extern char __dtbo_lan966x_pci_begin[]; +extern char __dtbo_lan966x_pci_end[]; + +struct pci_dev_intr_ctrl { + struct pci_dev *pci_dev; + struct irq_domain *irq_domain; + int irq; +}; + +static int pci_dev_irq_domain_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw) +{ + irq_set_chip_and_handler(virq, &dummy_irq_chip, handle_simple_irq); + return 0; +} + +static const struct irq_domain_ops pci_dev_irq_domain_ops = { + .map = pci_dev_irq_domain_map, + .xlate = irq_domain_xlate_onecell, +}; + +static irqreturn_t pci_dev_irq_handler(int irq, void *data) +{ + struct pci_dev_intr_ctrl *intr_ctrl = data; + int ret; + + ret = generic_handle_domain_irq(intr_ctrl->irq_domain, 0); + return ret ? IRQ_NONE : IRQ_HANDLED; +} + +static struct pci_dev_intr_ctrl *pci_dev_create_intr_ctrl(struct pci_dev *pdev) +{ + struct pci_dev_intr_ctrl *intr_ctrl; + struct fwnode_handle *fwnode; + int ret; + + if (!pdev->irq) + return ERR_PTR(-EOPNOTSUPP); + + fwnode = dev_fwnode(&pdev->dev); + if (!fwnode) + return ERR_PTR(-ENODEV); + + intr_ctrl = kmalloc(sizeof(*intr_ctrl), GFP_KERNEL); + if (!intr_ctrl) + return ERR_PTR(-ENOMEM); + + intr_ctrl->pci_dev = pdev; + + intr_ctrl->irq_domain = irq_domain_create_linear(fwnode, 1, &pci_dev_irq_domain_ops, + intr_ctrl); + if (!intr_ctrl->irq_domain) { + pci_err(pdev, "Failed to create irqdomain\n"); + ret = -ENOMEM; + goto err_free_intr_ctrl; + } + + ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY); + if (ret < 0) { + pci_err(pdev, "Unable alloc irq vector (%d)\n", ret); + goto err_remove_domain; + } + intr_ctrl->irq = pci_irq_vector(pdev, 0); + ret = request_irq(intr_ctrl->irq, pci_dev_irq_handler, IRQF_SHARED, + dev_name(&pdev->dev), intr_ctrl); + if (ret) { + pci_err(pdev, "Unable to request irq %d (%d)\n", intr_ctrl->irq, ret); + goto err_free_irq_vector; + } + + return intr_ctrl; + +err_free_irq_vector: + pci_free_irq_vectors(pdev); +err_remove_domain: + irq_domain_remove(intr_ctrl->irq_domain); +err_free_intr_ctrl: + kfree(intr_ctrl); + return ERR_PTR(ret); +} + +static void pci_dev_remove_intr_ctrl(struct pci_dev_intr_ctrl *intr_ctrl) +{ + free_irq(intr_ctrl->irq, intr_ctrl); + pci_free_irq_vectors(intr_ctrl->pci_dev); + irq_dispose_mapping(irq_find_mapping(intr_ctrl->irq_domain, 0)); + irq_domain_remove(intr_ctrl->irq_domain); + kfree(intr_ctrl); +} + +static void devm_pci_dev_remove_intr_ctrl(void *data) +{ + struct pci_dev_intr_ctrl *intr_ctrl = data; + + pci_dev_remove_intr_ctrl(intr_ctrl); +} + +static int devm_pci_dev_create_intr_ctrl(struct pci_dev *pdev) +{ + struct pci_dev_intr_ctrl *intr_ctrl; + + intr_ctrl = pci_dev_create_intr_ctrl(pdev); + + if (IS_ERR(intr_ctrl)) + return PTR_ERR(intr_ctrl); + + return devm_add_action_or_reset(&pdev->dev, devm_pci_dev_remove_intr_ctrl, intr_ctrl); +} + +struct lan966x_pci { + struct device *dev; + struct pci_dev *pci_dev; + int ovcs_id; +}; + +static int lan966x_pci_load_overlay(struct lan966x_pci *data) +{ + u32 dtbo_size = __dtbo_lan966x_pci_end - __dtbo_lan966x_pci_begin; + void *dtbo_start = __dtbo_lan966x_pci_begin; + int ret; + + ret = of_overlay_fdt_apply(dtbo_start, dtbo_size, &data->ovcs_id, data->dev->of_node); + if (ret) + return ret; + + return 0; +} + +static void lan966x_pci_unload_overlay(struct lan966x_pci *data) +{ + of_overlay_remove(&data->ovcs_id); +} + +static int lan966x_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + struct device *dev = &pdev->dev; + struct lan966x_pci *data; + int ret; + + if (!dev->of_node) { + dev_err(dev, "Missing of_node for device\n"); + return -EINVAL; + } + + /* Need to be done before devm_pci_dev_create_intr_ctrl. + * It allocates an IRQ and so pdev->irq is updated + */ + ret = pcim_enable_device(pdev); + if (ret) + return ret; + + ret = devm_pci_dev_create_intr_ctrl(pdev); + if (ret) + return ret; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + dev_set_drvdata(dev, data); + data->dev = dev; + data->pci_dev = pdev; + + ret = lan966x_pci_load_overlay(data); + if (ret) + return ret; + + pci_set_master(pdev); + + ret = of_platform_default_populate(dev->of_node, NULL, dev); + if (ret) + goto err_unload_overlay; + + return 0; + +err_unload_overlay: + lan966x_pci_unload_overlay(data); + return ret; +} + +static void lan966x_pci_remove(struct pci_dev *pdev) +{ + struct device *dev = &pdev->dev; + struct lan966x_pci *data = dev_get_drvdata(dev); + + of_platform_depopulate(dev); + + lan966x_pci_unload_overlay(data); + + pci_clear_master(pdev); +} + +static struct pci_device_id lan966x_pci_ids[] = { + { PCI_DEVICE(0x1055, 0x9660) }, + { 0, } +}; +MODULE_DEVICE_TABLE(pci, lan966x_pci_ids); + +static struct pci_driver lan966x_pci_driver = { + .name = "mchp_lan966x_pci", + .id_table = lan966x_pci_ids, + .probe = lan966x_pci_probe, + .remove = lan966x_pci_remove, +}; +module_pci_driver(lan966x_pci_driver); + +MODULE_AUTHOR("Herve Codina "); +MODULE_DESCRIPTION("Microchip LAN966x PCI driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/lan966x_pci.dtso b/drivers/mfd/lan966x_pci.dtso new file mode 100644 index 000000000000..041f4319e4cd --- /dev/null +++ b/drivers/mfd/lan966x_pci.dtso @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Microchip UNG + */ + +#include +#include +#include +#include +#include + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target-path=""; + __overlay__ { + #address-cells = <3>; + #size-cells = <2>; + + pci-ep-bus@0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + /* + * map @0xe2000000 (32MB) to BAR0 (CPU) + * map @0xe0000000 (16MB) to BAR1 (AMBA) + */ + ranges = <0xe2000000 0x00 0x00 0x00 0x2000000 + 0xe0000000 0x01 0x00 0x00 0x1000000>; + + oic: oic@e00c0120 { + compatible = "microchip,lan966x-oic"; + #interrupt-cells = <2>; + interrupt-controller; + interrupts = <0>; /* PCI INTx assigned interrupt */ + reg = <0xe00c0120 0x190>; + }; + + cpu_clk: cpu_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <600000000>; // CPU clock = 600MHz + }; + + ddr_clk: ddr_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <30000000>; // Fabric clock = 30MHz + }; + + sys_clk: sys_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <15625000>; // System clock = 15.625MHz + }; + + cpu_ctrl: syscon@e00c0000 { + compatible = "microchip,lan966x-cpu-syscon", "syscon"; + reg = <0xe00c0000 0xa8>; + }; + + reset: reset@e200400c { + compatible = "microchip,lan966x-switch-reset"; + reg = <0xe200400c 0x4>; + reg-names = "gcb"; + #reset-cells = <1>; + cpu-syscon = <&cpu_ctrl>; + }; + + gpio: pinctrl@e2004064 { + compatible = "microchip,lan966x-pinctrl"; + reg = <0xe2004064 0xb4>, + <0xe2010024 0x138>; + resets = <&reset 0>; + reset-names = "switch"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 78>; + interrupt-parent = <&oic>; + interrupt-controller; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; + + tod_pins: tod_pins { + pins = "GPIO_36"; + function = "ptpsync_1"; + }; + + fc0_a_pins: fcb4-i2c-pins { + /* RXD, TXD */ + pins = "GPIO_9", "GPIO_10"; + function = "fc0_a"; + }; + + }; + + serdes: serdes@e202c000 { + compatible = "microchip,lan966x-serdes"; + reg = <0xe202c000 0x9c>, + <0xe2004010 0x4>; + #phy-cells = <2>; + }; + + mdio1: mdio@e200413c { + #address-cells = <1>; + #size-cells = <0>; + compatible = "microchip,lan966x-miim"; + reg = <0xe200413c 0x24>, + <0xe2010020 0x4>; + + resets = <&reset 0>; + reset-names = "switch"; + + lan966x_phy0: ethernet-lan966x_phy@1 { + reg = <1>; + }; + + lan966x_phy1: ethernet-lan966x_phy@2 { + reg = <2>; + }; + }; + + switch: switch@e0000000 { + compatible = "microchip,lan966x-switch"; + reg = <0xe0000000 0x0100000>, + <0xe2000000 0x0800000>; + reg-names = "cpu", "gcb"; + + interrupt-parent = <&oic>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, + <9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "xtr", "ana"; + + resets = <&reset 0>; + reset-names = "switch"; + + pinctrl-names = "default"; + pinctrl-0 = <&tod_pins>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port0: port@0 { + phy-handle = <&lan966x_phy0>; + + reg = <0>; + phy-mode = "gmii"; + phys = <&serdes 0 CU(0)>; + }; + + port1: port@1 { + phy-handle = <&lan966x_phy1>; + + reg = <1>; + phy-mode = "gmii"; + phys = <&serdes 1 CU(1)>; + }; + }; + }; + }; + }; + }; +}; diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index eff7f5df08e2..9933f245b781 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -6241,6 +6241,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xa76e, dpc_log_size); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5020, of_pci_make_dev_node); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5021, of_pci_make_dev_node); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_REDHAT, 0x0005, of_pci_make_dev_node); +DECLARE_PCI_FIXUP_FINAL(0x1055, 0x9660, of_pci_make_dev_node); /* * Devices known to require a longer delay before first config space access From patchwork Tue Apr 30 08:37:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13648483 Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5B43F1C2304; Tue, 30 Apr 2024 08:39:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466380; cv=none; b=Gve7HC/pLamaDfEOcYmIwE35jmeBWO0MvKT4wSKot+BeWU5dlnsKJa3ynjejb48XqLGM8TKBkylutocXfRTHA7fLTvNpwYRuB8Z/ZT3w4VDMM8d90GgZgNFiK48E63DBOVdicb2vTlCXN1HWnurg0ShMJdPSrAK1ozaT6GBJ+io= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714466380; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lee Jones , Arnd Bergmann , Horatiu Vultur , UNGLinuxDriver@microchip.com, Andrew Lunn , Heiner Kallweit , Russell King , Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon , Alexandre Belloni Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH 17/17] MAINTAINERS: Add the Microchip LAN966x PCI driver entry Date: Tue, 30 Apr 2024 10:37:26 +0200 Message-ID: <20240430083730.134918-18-herve.codina@bootlin.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20240430083730.134918-1-herve.codina@bootlin.com> References: <20240430083730.134918-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com After contributing the driver, add myself as the maintainer for the Microchip LAN966x PCI driver. Signed-off-by: Herve Codina --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index a15f19008d6e..2dfb010dc211 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14471,6 +14471,12 @@ S: Maintained F: Documentation/devicetree/bindings/interrupt-controller/microchip,lan966x-oic.yaml F: drivers/irqchip/irq-lan966x-oic.c +MICROCHIP LAN966X PCI DRIVER +M: Herve Codina +S: Maintained +F: drivers/mfd/lan966x_pci.c +F: drivers/mfd/lan966x_pci.dtso + MICROCHIP LCDFB DRIVER M: Nicolas Ferre L: linux-fbdev@vger.kernel.org