From patchwork Tue Apr 30 12:00:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648851 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66169C4345F for ; Tue, 30 Apr 2024 12:02:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6uR7/d/Wg/csB6PTrG38rnYY/zDjR4cgLIVXwR3YhG4=; b=yNiV2/l3TKVk2E DLdckSqOORvsF84n6IxyZm+HVN+yXlsTGEGY08qKSFCEUilIRiRgEXOFJem1WV/UJHfD/0ee9rQ8i xsbCMMObPDR1ZSzO8FKNb1tQUzLxBkWsH1kl3mL+2MYXRN2qyIk62LieuEuW39qESsDu60trPjcDz t/oJ3CjS+wCGMauOWCwwxNXxd3kNJi6tkEZ0IMwzMxm8pSTZhc25+PYBaz6Ga7th0crIpLgBEFmZ8 bFSUbFytn6b6LL7tv2nF1IM2m4Fl3I4duAJOY4YsWvEW1+K21YNO+Pvy16ZkpIdKIIytqu4m6eUzz dE9NZgyKipFUKiS4v8ww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBi-00000006Ghp-1hII; Tue, 30 Apr 2024 12:02:22 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBf-00000006Gfe-1tnS for linux-rockchip@bombadil.infradead.org; Tue, 30 Apr 2024 12:02:19 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=eVbb3bW6AfEVUBMoqm3Hyuz4iSTbBNkUeL3un6g+fvU=; b=HFfrfNJfE65yvWlp/AF9kv04Hn GpVVYCEts5KrVhREMs/B82bitLgh3I6nX+FJ3wR5IXmr0Q0vsj14XG+yQ+3jjk5X7MfkPhSXpba8+ rKaGrwvK4bUoxmGIenSI1XvSjlaXjUye5/4ASGXIkVG8odX66L3OYpv/OF313RwKBzW7srArWtAhe Uz9BCLZxejdmnecb/UstX0xxHMAdUDR36PJLg0XK7lBxVtK8RKonRAu+Exf4iVTee+Vs0dNvoPnvA DBQk5ztBp6dw2WhtGrUfCmAiFYxpgfD8Rgcb4BOS7MJhVWnL872xn+oWW2w1uVqh1qpgM8jDGDTop qWLEYs/w==; Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBZ-0000000Gvz7-3Psw for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:18 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 97B9061475; Tue, 30 Apr 2024 12:02:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7ED08C4AF53; Tue, 30 Apr 2024 12:01:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478521; bh=2auuQGe9uHpx39X2DRGeyL4wn09dTQhuOpMdAqllMYs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=EosXEdTek2E40smXhuEIGDxUvmmW9wEsWePza5cW+B9qJbPla0yG6LphRr07y/ypt YP5BI19dzXKR4VzkA2sqkEghrbFNEHcgYAjVJ9PGmTPjdRPRz58mrgtv5D775EeEVT KCCpirt/XxvDnp3Uvv5tQF2FFMJtJz7/SZ35wW6jd85pSEyWJz0iu7JKucmUCkhutM mPCVXt8m0+ZnIU+Maeh2otyBzLX6AW5LcZOMEPi3IISrST12b0MDZe8tVfSdWjh7XD yqs+jlMKUb4Zk2wkgOmPmWa92HuyxqqRDCqDx2KIWo/rhbYwpTyNJ5OG9NZQqnYN/7 yiYZajI2Befkw== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:00:58 +0200 Subject: [PATCH v2 01/14] dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific reg-name MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-1-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1296; i=cassel@kernel.org; h=from:subject:message-id; bh=2auuQGe9uHpx39X2DRGeyL4wn09dTQhuOpMdAqllMYs=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m54EhHDfYpZSPL3KQkrk0aO9Vm8vs+1ea82a8kG5 8+emHqlo5SFQYyLQVZMkcX3h8v+4m73KccV79jAzGFlAhnCwMUpABPJV2D4X7T+/puP6Y6remsl 3aVC1mbc7vhpNVP50OS+y3WSgfzP/BkZuluDGAVWfLg2d9fvRZEBbgdcjbZN3pR+8VViy5Rzs04 94QIA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_130214_182616_D9512F9A X-CRM114-Status: GOOD ( 11.39 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Considering that some drivers (e.g. pcie-dw-rockchip.c) already use the reg-name "apb" for the device tree binding in Root Complex mode (snps,dw-pcie.yaml), it doesn't make sense that those drivers should use a different reg-name when running in Endpoint mode (snps,dw-pcie-ep.yaml). Therefore, since "apb" is already defined in snps,dw-pcie.yaml, add it also for snps,dw-pcie-ep.yaml. Signed-off-by: Niklas Cassel Reviewed-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml index bbdb01d22848..00dec01f1f73 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml @@ -100,7 +100,7 @@ properties: for new bindings. oneOf: - description: See native 'elbi/app' CSR region for details. - enum: [ link, appl ] + enum: [ apb, link, appl ] - description: See native 'atu' CSR region for details. enum: [ atu_dma ] allOf: From patchwork Tue Apr 30 12:00:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648848 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D82A3C4345F for ; Tue, 30 Apr 2024 12:02:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=c+6l9S2Zh/arUM9ogs+/BpQowBLrFi48zSMNXmNHxSk=; b=rvjIXkzTVflnH0 9rRLM9cFR1uyDnpvf5q+UFU4ktQlD0MsW9A6zAQ7G9BmOSZ/clH6TGh9ZWRN2LtTWckaKKcXYPWrm 0dIXMXFTsoLcYnvDENp6zishCma3kJwvVzh2gJh0HqCzK1NsCdqUObclvrTHo4QicVgtEEuhB03i7 kGHSHtMp2Bnel4qYzY0/mN4r/lXKCaM1dkurbZMMZpxMKPkDYvGb1YbJaAdHbnyPR8P/ZVhmla+es K0se7uuGku4PjXvtrkySOpkuOZwwi+dvv7mS0+P6JxPIKw9MzoF+jPPMncVMU/GMHQfYSqL1V/bQd 8Lou9eA5mWGeBEHiMbyg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBU-00000006GZu-2r5e; Tue, 30 Apr 2024 12:02:08 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBS-00000006GZ7-1nuS for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:07 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id D29C661423; Tue, 30 Apr 2024 12:02:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B9693C4AF1B; Tue, 30 Apr 2024 12:02:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478525; bh=dazCN/iT/MHdY+ckymlAcfBjUpa3OmMTl+4+NDKJR2A=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=GmLBbkco7H+9TF70s3xCJzzCfE+wdzetILLrSRfKajcLXOUyneNVwNAo2N0wW/2Qu JVs/Y6Zk1mr5uKcN1+7av/t5pKjBiAGS+brI7STdhgcZS/XTDp2OJLEiMwMRHcWmQV itYQP8UD5ZA/mI7VxSN6Wc3ekS5uXsvw68IsM31imleh37XZzmyORiXqbxZlEOBQ7B jEtwHGzrjebJBmyCAcJpV8WeIOZm1n8sHSB9iX230DK7X9H7V9qHWjBeTMVlsXLjnS ptfChZylMwPiEjKjertC235sJDxMHxsiaE+ChLcxr9nEgMdJaKPdsemMK+36b6yVeB cvISqnHavpxtA== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:00:59 +0200 Subject: [PATCH v2 02/14] dt-bindings: PCI: snps,dw-pcie-ep: Add vendor specific interrupt-names MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-2-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1267; i=cassel@kernel.org; h=from:subject:message-id; bh=dazCN/iT/MHdY+ckymlAcfBjUpa3OmMTl+4+NDKJR2A=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m5wV9fa+ca2plhz546ct3//n9v0lXNZ8tKMOcf2h /1s2zxjQkcpC4MYF4OsmCKL7w+X/cXd7lOOK96xgZnDygQyhIGLUwAmYjmFkeHQvPVe1rsP/PMS bLy9+FVcTWhc8HJ1/d7c+1ueJzRus2hh+Gd1jdEjKMfuqtt3B50n1vb6QedjFq6Uf2W3ZFWKDWd WFRsA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050206_573437_A8ACEF3A X-CRM114-Status: GOOD ( 10.98 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Considering that some drivers (e.g. pcie-dw-rockchip.c) already use the interrupt-names "sys", "pmc", "msg", "err" for the device tree binding in Root Complex mode (snps,dw-pcie.yaml), it doesn't make sense that those drivers should use different interrupt-names when running in Endpoint mode (snps,dw-pcie-ep.yaml). Therefore, since "sys", "pmc", "msg", "err" are already defined in snps,dw-pcie.yaml, add them also for snps,dw-pcie-ep.yaml. Signed-off-by: Niklas Cassel Reviewed-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml index 00dec01f1f73..f5f12cbc2cb3 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml @@ -156,7 +156,7 @@ properties: for new bindings. oneOf: - description: See native "app" IRQ for details - enum: [ intr ] + enum: [ intr, sys, pmc, msg, err ] max-functions: maximum: 32 From patchwork Tue Apr 30 12:01:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648849 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E668C4345F for ; Tue, 30 Apr 2024 12:02:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=+2wwfItC21P+OG79JLqII9uBkZnvJ2TZryQaXrXedLY=; b=wUAkl5rvzI0NQm VUKrbf0x70w2uZK4vjy6NTTLNHyvL9Uecjm/AdAZ+hqGDjY+x5RTP5Wan199eTw15fvLqYTi1S2Vz PkKo7ozW4esA2QftCnxqur4HkKkcx316pFR+FQBByDa/je9sCWrRZkNR/RjWYDv9T1IfwfN4Ep7zl gKC+cvuH6k+bsudiAQqu7IBJYl7y2wuiuHd81RLPEV21Ee1JarOMkf8pnWsZmYTMZ4/fLT+0ohsjf iWQ32AkAV1VRoPCNlLNY6TnYku8s5kDvSydZBVFQu8b+iZK7TET/yOYQMxdrt4IDgCAq8Ilyw0dqu ZsuD9VYwynVU5ZLeA/JQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBa-00000006GcO-3HBd; Tue, 30 Apr 2024 12:02:14 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBX-00000006Gaa-0mfs for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:12 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 1D80D614FF; Tue, 30 Apr 2024 12:02:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F1CF0C4AF19; Tue, 30 Apr 2024 12:02:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478529; bh=MgvdOL0gkl34L22gpJGsJpktQEWaY6MRdjg4t+pKTZ4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=cI1UUdyJQ6nyysGSO+1CFiMo62exm3q0sFo04KTrjpmYiOW67SwkDuj9cRNXEN11s wSnF0O7y79kXJwkUWHGrELr5bH+QlrU5yMipuuudfpGgSb3vA7GpSV9rzrzVBDAluN VmdlApL/NjvYILsWii/g6Eye6VHZAoAeV0PeYnH1sQOLQdnag8tbSPXgpp3INP8QX+ PIRR2tYDbGz+bGoavGTRKAeEUj+Fq1PtCMjKfxdM4iE4ZORcpGVLyhaIqQtIRsd56I 77Bbcn4BowgktzugL1IPpW+k0v+9ZglQVHXFROw/sBoGUQoHvyNPhYq2OC8BeQU3Ok ogZ7mR+B9cDIQ== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:00 +0200 Subject: [PATCH v2 03/14] dt-bindings: PCI: snps,dw-pcie-ep: Add tx_int{a,b,c,d} legacy irqs MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-3-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1672; i=cassel@kernel.org; h=from:subject:message-id; bh=MgvdOL0gkl34L22gpJGsJpktQEWaY6MRdjg4t+pKTZ4=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m74LT61fuHJ1GeOp0xSvxu7LDd9d7BFXTVe+2UK6 42p3lLGHaUsDGJcDLJiiiy+P1z2F3e7TzmueMcGZg4rE8gQBi5OAZjIp80M/x3+/Im7ezlCNc/5 x4Hi/z/zby/I6tylEpLMzsH59UMq11OGP/zr778T9bgTftz889UJtwrNwlkSfU4FMEx4raB5fAJ rGxsA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050211_356855_B5FC187A X-CRM114-Status: UNSURE ( 9.49 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The DWC core has four interrupt signals: tx_inta, tx_intb, tx_intc, tx_intd that are triggered when the PCIe controller (when running in Endpoint mode) has sent an Assert_INTA Message to the upstream device. Some DWC controllers have these interrupt in a combined interrupt signal. Add the description of these interrupts to the device tree binding. Signed-off-by: Niklas Cassel Reviewed-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml index f5f12cbc2cb3..f474b9e3fc7e 100644 --- a/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml @@ -151,6 +151,15 @@ properties: Application-specific IRQ raised depending on the vendor-specific events basis. const: app + - description: + Interrupts triggered when the controller itself (in Endpoint mode) + has sent an Assert_INT{A,B,C,D}/Desassert_INT{A,B,C,D} message to + the upstream device. + pattern: "^tx_int(a|b|c|d)$" + - description: + Combined interrupt signal raised when the controller has sent an + Assert_INT{A,B,C,D} message. See "^tx_int(a|b|c|d)$" for details. + const: legacy - description: Vendor-specific IRQ names. Consider using the generic names above for new bindings. From patchwork Tue Apr 30 12:01:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648850 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 88FEEC19F53 for ; Tue, 30 Apr 2024 12:02:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7nICfAxnpTitUukPy/RfRlVhxqtfwECAWqUzGaJjFq0=; b=nqueJ3T5jGl7Hi ieX9fQiawGm7zSLCL1EevC3111//JMQfDhJeOnGS2JR8C42+QCijK6EI5Hw675SvWSK+PaLCv5ZOD xTrCfkkBp53w5njOxPw6jhESe5IKYI3yC7M1rtDg8gy1+/jc3w6Ia0jTalH4VCttCDfXdnKXlzViE oH5la6twgGtkceZwtcGlIRnU5gBirZVUNdqMINmHOGlpFeyhddQnHYXwiddfJkl6TemC+AKGBOGpj FT92EiEznbcn5gYWzHNCWbWyAihTVtpTSb/TwgGDEQrw2qKkqUySbJ74j2wYgVPu2nUt/T/ydDfyE iVN4V8dO5ontR6zShuTg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBg-00000006Ggh-16Px; Tue, 30 Apr 2024 12:02:20 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBc-00000006Gcd-4B9R for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:18 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id C8151CE1021; Tue, 30 Apr 2024 12:02:14 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3596CC4AF1A; Tue, 30 Apr 2024 12:02:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478534; bh=FN05hy9jvB+E6GTH6BA3O2fKOPPC2nQRvjx6DsGtqeY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=pJWb5KQFQVbxuxIhHSuHiCd8i/KXkK06fvflLzA+2p1+o/7qpvTaoogdiazefxPpV 0AK4lMA3vNDC9Mt7cmW3Vq+gszJ0u4Sou+jRAVYeW7WMjz4le4L/s2iCzrxQ6oHphx hFj+42lvSLYkAsOKajB2c8hLwiMfjef6eusdM7GZEfsJS+TbDNAJsfZDZuxJjI6IZp uqKOLQKUgvHL+yBQgQTv/W1EFo0u+U312/IN/FoGsi44NXTRUe3It9d0XSGxg2Usia JN3nudu8KkSEpnabqcNhObPYuYz2/8LZrUvlmJOyftHXcP85g8uRlfb2K3ng1kAR4L Z+ImHV1aAqWhQ== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:01 +0200 Subject: [PATCH v2 04/14] dt-bindings: PCI: rockchip-dw-pcie: Prepare for Endpoint mode support MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-4-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=8019; i=cassel@kernel.org; h=from:subject:message-id; bh=FN05hy9jvB+E6GTH6BA3O2fKOPPC2nQRvjx6DsGtqeY=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m44vtpKIPD/esaFfBnTbjuF7Du9IvNRyLGYBeXGV b3TlnRc7ChlYRDjYpAVU2Tx/eGyv7jbfcpxxTs2MHNYmUCGMHBxCsBE7oUwMpxle2t6e7Wq3Z6w o/rNj7XSrhdJBX+dpOFV6RLvxpTDepGR4YXC9HMn4nRMzdJ7Unfw9tvOFvyiWzwrz//ryz1ZDZx hDAA= X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050217_452053_23AC67C0 X-CRM114-Status: GOOD ( 15.70 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Refactor the rockchip-dw-pcie binding to move generic properties to a new rockchip-dw-pcie-common binding that can be shared by both RC and EP mode. No functional change intended. Signed-off-by: Niklas Cassel Reviewed-by: Rob Herring (Arm) --- .../bindings/pci/rockchip-dw-pcie-common.yaml | 111 +++++++++++++++++++++ .../devicetree/bindings/pci/rockchip-dw-pcie.yaml | 93 +---------------- 2 files changed, 114 insertions(+), 90 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml new file mode 100644 index 000000000000..60d190a77580 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml @@ -0,0 +1,111 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DesignWare based PCIe RC/EP controller on Rockchip SoCs + +maintainers: + - Shawn Lin + - Simon Xue + - Heiko Stuebner + +description: |+ + Generic properties for the DesignWare based PCIe RC/EP controller on Rockchip + SoCs. + +properties: + clocks: + minItems: 5 + items: + - description: AHB clock for PCIe master + - description: AHB clock for PCIe slave + - description: AHB clock for PCIe dbi + - description: APB clock for PCIe + - description: Auxiliary clock for PCIe + - description: PIPE clock + - description: Reference clock for PCIe + + clock-names: + minItems: 5 + items: + - const: aclk_mst + - const: aclk_slv + - const: aclk_dbi + - const: pclk + - const: aux + - const: pipe + - const: ref + + interrupts: + items: + - description: + Combined system interrupt, which is used to signal the following + interrupts - phy_link_up, dll_link_up, link_req_rst_not, hp_pme, + hp, hp_msi, link_auto_bw, link_auto_bw_msi, bw_mgt, bw_mgt_msi, + edma_wr, edma_rd, dpa_sub_upd, rbar_update, link_eq_req, ep_elbi_app + - description: + Combined PM interrupt, which is used to signal the following + interrupts - linkst_in_l1sub, linkst_in_l1, linkst_in_l2, + linkst_in_l0s, linkst_out_l1sub, linkst_out_l1, linkst_out_l2, + linkst_out_l0s, pm_dstate_update + - description: + Combined message interrupt, which is used to signal the following + interrupts - ven_msg, unlock_msg, ltr_msg, cfg_pme, cfg_pme_msi, + pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active + - description: + Combined legacy interrupt, which is used to signal the following + interrupts - inta, intb, intc, intd + - description: + Combined error interrupt, which is used to signal the following + interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout, + tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx, + nf_err_rx, f_err_rx, radm_qoverflow + + interrupt-names: + items: + - const: sys + - const: pmc + - const: msg + - const: legacy + - const: err + + num-lanes: true + + phys: + maxItems: 1 + + phy-names: + const: pcie-phy + + power-domains: + maxItems: 1 + + resets: + minItems: 1 + maxItems: 2 + + reset-names: + oneOf: + - const: pipe + - items: + - const: pwr + - const: pipe + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - num-lanes + - phys + - phy-names + - power-domains + - resets + - reset-names + +additionalProperties: true + +... diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml index 5f719218c472..550d8a684af3 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/pci/rockchip-dw-pcie.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: DesignWare based PCIe controller on Rockchip SoCs +title: DesignWare based PCIe Root Complex controller on Rockchip SoCs maintainers: - Shawn Lin @@ -12,12 +12,13 @@ maintainers: - Heiko Stuebner description: |+ - RK3568 SoC PCIe host controller is based on the Synopsys DesignWare + RK3568 SoC PCIe Root Complex controller is based on the Synopsys DesignWare PCIe IP and thus inherits all the common properties defined in snps,dw-pcie.yaml. allOf: - $ref: /schemas/pci/snps,dw-pcie.yaml# + - $ref: /schemas/pci/rockchip-dw-pcie-common.yaml# properties: compatible: @@ -40,61 +41,6 @@ properties: - const: apb - const: config - clocks: - minItems: 5 - items: - - description: AHB clock for PCIe master - - description: AHB clock for PCIe slave - - description: AHB clock for PCIe dbi - - description: APB clock for PCIe - - description: Auxiliary clock for PCIe - - description: PIPE clock - - description: Reference clock for PCIe - - clock-names: - minItems: 5 - items: - - const: aclk_mst - - const: aclk_slv - - const: aclk_dbi - - const: pclk - - const: aux - - const: pipe - - const: ref - - interrupts: - items: - - description: - Combined system interrupt, which is used to signal the following - interrupts - phy_link_up, dll_link_up, link_req_rst_not, hp_pme, - hp, hp_msi, link_auto_bw, link_auto_bw_msi, bw_mgt, bw_mgt_msi, - edma_wr, edma_rd, dpa_sub_upd, rbar_update, link_eq_req, ep_elbi_app - - description: - Combined PM interrupt, which is used to signal the following - interrupts - linkst_in_l1sub, linkst_in_l1, linkst_in_l2, - linkst_in_l0s, linkst_out_l1sub, linkst_out_l1, linkst_out_l2, - linkst_out_l0s, pm_dstate_update - - description: - Combined message interrupt, which is used to signal the following - interrupts - ven_msg, unlock_msg, ltr_msg, cfg_pme, cfg_pme_msi, - pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active - - description: - Combined legacy interrupt, which is used to signal the following - interrupts - inta, intb, intc, intd - - description: - Combined error interrupt, which is used to signal the following - interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout, - tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx, - nf_err_rx, f_err_rx, radm_qoverflow - - interrupt-names: - items: - - const: sys - - const: pmc - - const: msg - - const: legacy - - const: err - legacy-interrupt-controller: description: Interrupt controller node for handling legacy PCI interrupts. type: object @@ -119,47 +65,14 @@ properties: msi-map: true - num-lanes: true - - phys: - maxItems: 1 - - phy-names: - const: pcie-phy - - power-domains: - maxItems: 1 - ranges: minItems: 2 maxItems: 3 - resets: - minItems: 1 - maxItems: 2 - - reset-names: - oneOf: - - const: pipe - - items: - - const: pwr - - const: pipe - vpcie3v3-supply: true required: - - compatible - - reg - - reg-names - - clocks - - clock-names - msi-map - - num-lanes - - phys - - phy-names - - power-domains - - resets - - reset-names unevaluatedProperties: false From patchwork Tue Apr 30 12:01:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648852 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C259C4345F for ; Tue, 30 Apr 2024 12:02:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4iCHbWGwy0bt2Ljt4KQogrh6n16XqEgDNb7xsvlus7I=; b=xrY88SuuiEdel1 BcTWMTYfr6P5Hzoi4M8izeO854INwR3PfxUQIc67uJS6YxRzPE8VVBFS+BBAInQHr8bemAAB0yXgZ VpMV+jvBCv8kc4tpiD3VBfZESojKKout+nWMzyjiYJAPp4zJmQCCvY/SW13GSYETEmJFmQqolR6M+ LlF/Xz9dwR4T7curdRJob2eJ3RjAXbHq1IvlMS2ccflkHsiWCe7N37bYpRKafcswFvpkJBhotdiDD UZV5LN0FpLGuNk1dh0A+jlOUNZNzyKvFIHRBrdRhZfeVgnI+fdbIZLXYX0cEDxkB2kLnQ7z7czhmY umoZ92CObYKqhcrxgPpw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBn-00000006Glb-0buq; Tue, 30 Apr 2024 12:02:27 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBk-00000006Giu-2gPM for linux-rockchip@bombadil.infradead.org; Tue, 30 Apr 2024 12:02:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Cc:To:In-Reply-To:References: Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Sender:Reply-To:Content-ID:Content-Description; bh=ER1xXZFolpnR0VGnTVgmMbuPeSBEt77ZPA+ZNaqgLdo=; b=pddiRFuAIS0y/+lQ6b0i6Q4z9J n+LoVhKerL/W1WIVbAnxG88qltXzI+J2Z4+imZ0mpPw+BKY3toPS/OrcNEULPAD2DYLd7FclMybW7 j+bEnRm7x8nGMbTBBLjHb6bN5SfxgK13agwoOfsDYNj8AGgn9McMQ+WC8FAVPDyHhIEQ4kO40lr7j ovMQxm1iH2audCQMveDSAergEL9WN3WJOQEQjP6J23nBoknsZb9ppsjBS/YgnR0CfgADFsnw/EzGh SwsnZ/I6Z7F4wXudidd/A+79vAzCyiYDi57k0nIeCBtrLqX95lLFIGaGFTvekuj0VlAHbat4ahSzY AXWB7REw==; Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBg-0000000Gw0B-0vVE for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:23 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id D9AE7614FD; Tue, 30 Apr 2024 12:02:18 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6D3A1C4AF18; Tue, 30 Apr 2024 12:02:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478538; bh=SXHxPE8zdJjZdXXAcX4rmqThuC0XgqJgg4dqgMQmx28=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=jcfFiRxp5K7LfbIMniYp++vMuQbnDaFXF0YR0h5thqTf9lraoZA1Y/Eyv0yNcpQ4B ZyjF0pW6E6uCtmuUmRSmUxQv4yhNP2VHl8MMsaIHzUhwruFscnYx5SIeRw2MHvUEdX iQE5rGBZR7fWh8eMo05TmvrEaAr+7zYDWF0pnKBFBQjTAel+GbLy2eDpKcCTDCAGez 6qhUIM2lgG0PsERpLlibUovx99bOmrmPv6wY2cp/MoCyw9UVzLIayHN3QzLUBf1ud8 GTs6/5es9P/Y3VL1ibb9DXXgjYVdqVTuEpxAFcgGQ+RwK/0NZ+E4OQuuqXN7pyTR6l jKcOcqEI2Rq2A== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:02 +0200 Subject: [PATCH v2 05/14] dt-bindings: PCI: rockchip-dw-pcie: Fix description of legacy irq MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-5-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1900; i=cassel@kernel.org; h=from:subject:message-id; bh=SXHxPE8zdJjZdXXAcX4rmqThuC0XgqJgg4dqgMQmx28=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m441tzTf77xz82K1Zr9X+013sfoxBo0de7ceEPkz wSnu2fLOkpZGMS4GGTFFFl8f7jsL+52n3Jc8Y4NzBxWJpAhDFycAjARXmdGhiUMygeTJisba9x3 neDwdPECtyONrOd2Hrsja2hoU7VAxILhn33z8w+HQvlCzOxsZ5XzPqipX5bNc6h8TZrXHPv9GY6 CHAA= X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_130220_725263_0512AAA4 X-CRM114-Status: GOOD ( 10.14 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The descriptions of the combined interrupt signals (level1) mention all the lower interrupt signals (level2) for each combined interrupt, regardless if the lower (level2) signal is RC or EP specific. E.g. the description of "Combined system interrupt" includes rbar_update, which is EP specific, and the description of "Combined message interrupt" includes obff_idle, obff_obff, obff_cpu_active, which are all EP specific. The only exception is the "Combined legacy interrupt", which for some reason does not provide an exhaustive list of the lower (level2) signals. Add the missing lower interrupt signals: tx_inta, tx_intb, tx_intc, and tx_intd for the "Combined legacy interrupt", as per the rk3568 and rk3588 Technical Reference Manuals, such that the descriptions of the combined interrupt signals are consistent. Signed-off-by: Niklas Cassel Reviewed-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml index 60d190a77580..ec5e6a3d048e 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml @@ -56,7 +56,8 @@ properties: pm_pme, pm_to_ack, pm_turnoff, obff_idle, obff_obff, obff_cpu_active - description: Combined legacy interrupt, which is used to signal the following - interrupts - inta, intb, intc, intd + interrupts - inta, intb, intc, intd, tx_inta, tx_intb, tx_intc, + tx_intd - description: Combined error interrupt, which is used to signal the following interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout, From patchwork Tue Apr 30 12:01:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9D16C4345F for ; Tue, 30 Apr 2024 12:02:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HYb3nsQmhGBSVrDfkONd1Dsfkzr/wWAF0YGZ39fnCg4=; b=miClILOh9SBnYO bM5WAVysAaHUeNHCLGxUl+1OUZejpoeBzg2pjcAMT+JAWL0VsGNnWELTfzKdIRlnRDyUazJQ6LrI/ BaDZ+y6SEl0qYR77Ob7J3NKoyL02Kr5ErEbsapcmgZEGbmd8/trD7bgB6Esu9JBuxMj/nXS0rGDfs v4+UqVB2nSoCBoBtrtHU42KUVMFPf8yUhbVdy838sJZWb+DF2XzyIXIg0o2st3YE6pz6jqjDqdV8s OymdfMeyiuACbWivH9if/cYpybPd3eaInq2id+LimJMazPAY96OTMTyyA0P8bo9RnJXVv9KLjBbso S8AE9ov9vGjznxCDFQ9g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBp-00000006GnL-2SIg; Tue, 30 Apr 2024 12:02:29 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBj-00000006Gi0-16tp for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:25 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 9E18A61423; Tue, 30 Apr 2024 12:02:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A80D6C4AF51; Tue, 30 Apr 2024 12:02:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478542; bh=lzYyTB2OvdhD5k4zG4pbiEVMIEt2tbp4NUdYxqaO9x8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Ec2nS7ABva/cSfofJiBnJSh0tLqY6xNang2HofW9orU8v9x//svVgR2kN7lPY/f5s zcLkdCR37VaVk3Jz1uR771McTUui7beQdRQ4zmxPKfNq5+xfClYngKAvmVec9RwgHx nV5sPWE9JSurmAE32vBpdvZP26/v2e+xxH27f6hIKtyIWjbL05GfYUsUcIMN1xn7vV lRO4uqTynYLRQW5bQrzxsqUy+LMKsUiQXM/FjYIL8jlnpPaH1vuG2c3/dhOnoSLJA7 YgVfNggpEIUXB1vWY6TbUie70SrUPdph8UKPWGZIAMneXBiFNY2xCQHne9LbQesHvT DT6dTQD2DVuDQ== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:03 +0200 Subject: [PATCH v2 06/14] dt-bindings: rockchip: Add DesignWare based PCIe Endpoint controller MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-6-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5484; i=cassel@kernel.org; h=from:subject:message-id; bh=lzYyTB2OvdhD5k4zG4pbiEVMIEt2tbp4NUdYxqaO9x8=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m4IbJ+tf/LKHblq80Mct4o0Zs1uy1TdvvmDUWBAw P6t1upMHaUsDGJcDLJiiiy+P1z2F3e7TzmueMcGZg4rE8gQBi5OAZjI8XaG//WXWhdLROk8nr1l g/vu2+/2Zh60OODUaVcsmNxn8rt8YhzD/1zXqhIlweTUxNvzfJzm2s6VEz596s1sHj0NQYU7Pmn 1vAA= X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050223_494871_073B5EE5 X-CRM114-Status: GOOD ( 11.87 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Document DT bindings for PCIe Endpoint controller found in Rockchip SoCs. Signed-off-by: Niklas Cassel Reviewed-by: Rob Herring (Arm) --- .../bindings/pci/rockchip-dw-pcie-common.yaml | 14 ++++ .../bindings/pci/rockchip-dw-pcie-ep.yaml | 95 ++++++++++++++++++++++ 2 files changed, 109 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml index ec5e6a3d048e..cc9adfc7611c 100644 --- a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-common.yaml @@ -39,6 +39,7 @@ properties: - const: ref interrupts: + minItems: 5 items: - description: Combined system interrupt, which is used to signal the following @@ -63,14 +64,27 @@ properties: interrupts - aer_rc_err, aer_rc_err_msi, rx_cpl_timeout, tx_cpl_timeout, cor_err_sent, nf_err_sent, f_err_sent, cor_err_rx, nf_err_rx, f_err_rx, radm_qoverflow + - description: + eDMA write channel 0 interrupt + - description: + eDMA write channel 1 interrupt + - description: + eDMA read channel 0 interrupt + - description: + eDMA read channel 1 interrupt interrupt-names: + minItems: 5 items: - const: sys - const: pmc - const: msg - const: legacy - const: err + - const: dma0 + - const: dma1 + - const: dma2 + - const: dma3 num-lanes: true diff --git a/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-ep.yaml new file mode 100644 index 000000000000..e0c8668afc01 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/rockchip-dw-pcie-ep.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/rockchip-dw-pcie-ep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: DesignWare based PCIe Endpoint controller on Rockchip SoCs + +maintainers: + - Niklas Cassel + +description: |+ + RK3588 SoC PCIe Endpoint controller is based on the Synopsys DesignWare + PCIe IP and thus inherits all the common properties defined in + snps,dw-pcie-ep.yaml. + +allOf: + - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# + - $ref: /schemas/pci/rockchip-dw-pcie-common.yaml# + +properties: + compatible: + enum: + - rockchip,rk3568-pcie-ep + - rockchip,rk3588-pcie-ep + + reg: + items: + - description: Data Bus Interface (DBI) registers + - description: Data Bus Interface (DBI) shadow registers + - description: Rockchip designed configuration registers + - description: Memory region used to map remote RC address space + - description: Address Translation Unit (ATU) registers + + reg-names: + items: + - const: dbi + - const: dbi2 + - const: apb + - const: addr_space + - const: atu + +required: + - interrupts + - interrupt-names + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + pcie3x4_ep: pcie-ep@fe150000 { + compatible = "rockchip,rk3588-pcie-ep"; + clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, + <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, + <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err", + "dma0", "dma1", "dma2", "dma3"; + max-link-speed = <3>; + num-lanes = <4>; + phys = <&pcie30phy>; + phy-names = "pcie-phy"; + power-domains = <&power RK3588_PD_PCIE>; + reg = <0xa 0x40000000 0x0 0x00100000>, + <0xa 0x40100000 0x0 0x00100000>, + <0x0 0xfe150000 0x0 0x00010000>, + <0x9 0x00000000 0x0 0x40000000>, + <0xa 0x40300000 0x0 0x00100000>; + reg-names = "dbi", "dbi2", "apb", "addr_space", "atu"; + resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>; + reset-names = "pwr", "pipe"; + }; + }; +... From patchwork Tue Apr 30 12:01:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648854 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3419DC10F16 for ; Tue, 30 Apr 2024 12:02:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NV3FoRDqWZSr12rXHPNNmV8DvgPoIPvABa9tHu3cTZY=; b=AX+uDDmgzlrEap ZuQ8uFUL7ObNNBFMDD9ja/1XTJDy6EMXR5E89FHPzPCmGW+c4SUJ0zCcf9Ra3RJPgA0hxZsebt1N9 8jb2q+Q+BNUdd5QYZ9cWPkxuxClDmfaXJOkI8iMrmJzhpJvu85oYB6tRK/bhRM6VPBH7S+adEn/9k E+7mqZmx7RNJ3OyMbFgSXFD1RohWEvN1a57omWgQ8H0FpUGvMGt3wpdK5GCljjjDcSTwN1gcOoi5t 7Qk1lT1O/pDsOvtawJRz+9PvAzEiy9fLnufjo3e/szj/wjWUYrTu18X1NdZ91Xa3uvnDyp7rKDRGD jASmekJBfs9Qt7Zq49ZA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBs-00000006Gq1-42v7; Tue, 30 Apr 2024 12:02:32 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBn-00000006Gln-2biS for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:29 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 157E2614F8; Tue, 30 Apr 2024 12:02:27 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EDC8DC4AF19; Tue, 30 Apr 2024 12:02:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478546; bh=lzJ2BxKBBswxjN9lBrWUoaKYI/aG2NTtIprX120aOD4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Mshrpd3+GxeXid8yQwzqyaI9ns5tOsXZMqB0SmwCgCCxjhboCwiHiY3X83OacEbzn hBjfOrR+sKtjWYhJxFl0XxLYi6d1dHM8iysbDBIKfrUetJjK/adMcN1GlY+x9HxCnB Xiz36g4u3Q0I6Lz02uj7AiYvzYLCrAIZJXrh8+KD7CLFgtcaSK5Yiyy1reLAXwFNBC H/X1DVas9vnQFgrq+ATGLLI+nTdC1TfcVAQNckUBE0bfMkkCGJhKA6ZfTl2pZiWh+u k1OpuAxuzC2ZRkfkVei2dJRX1IDW/7szMUSUNx/Xo6nZ1sXKb0jcNzppKoBoF2mB9M SovevHKW4CJqw== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:04 +0200 Subject: [PATCH v2 07/14] PCI: dw-rockchip: Fix weird indentation MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-7-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1116; i=cassel@kernel.org; h=from:subject:message-id; bh=lzJ2BxKBBswxjN9lBrWUoaKYI/aG2NTtIprX120aOD4=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m7Y9e/gD7YlVyYUJzaoewtGKy2Y0XVgy/ZFdfejV 9ZN01c70VHKwiDGxSArpsji+8Nlf3G3+5TjindsYOawMoEMYeDiFICJyMQwMuzTmntRV5k3IyxS ePqZk28aPObOSOhYITnjuOJE6X8Hbksy/LM30/x+r3Bqa4txlpLE9b/G6+a8vBFTHhIVua7kicb lmwwA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050227_969201_3D88BD5A X-CRM114-Status: UNSURE ( 9.22 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Fix the indentation of rockchip_pcie_{readl,writel}_apb() parameters to match the opening parenthesis. Signed-off-by: Niklas Cassel Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index d6842141d384..1993c430b90c 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -60,14 +60,13 @@ struct rockchip_pcie { struct irq_domain *irq_domain; }; -static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, - u32 reg) +static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, u32 reg) { return readl_relaxed(rockchip->apb_base + reg); } -static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip, - u32 val, u32 reg) +static void rockchip_pcie_writel_apb(struct rockchip_pcie *rockchip, u32 val, + u32 reg) { writel_relaxed(val, rockchip->apb_base + reg); } From patchwork Tue Apr 30 12:01:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648855 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A102CC4345F for ; Tue, 30 Apr 2024 12:02:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pXB6qk+wCiek0i4/3w5eq7+kgkuW1CWUYBKGqY6x4uU=; b=chVtyF1nRzKjYo 0zqCTB/s52FZozQIJaEAsXqnnx5Wnnn42wR/dZ7bP6LetOMeC77BfrxFHXFp5O8pUJMvWIt3gFgEt 3U1hpuxeDfa21FSti8GQmCikHzBC2c1pUG4LH/w8+k/1gO4uj0VTfPMdnUklSz394UygxBN3T4i86 mFNeFg2l/29iPftqaslwj6DVGCBp8O7uzyJ6ZB2omsz0jBTlGi6Fhajv0u3v7sSUbgkQVBMwQZWoN TVF4pU1Zg10/Ipt+pIjlFwXlernifB0/Bjwn+Esrh+xuD9VHuq0cATdjVo7GK86dLFPm+vQqTNfkx DpT1nbWGCkZFzSg6pupQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBw-00000006Gsb-1tUy; Tue, 30 Apr 2024 12:02:36 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBr-00000006Gon-47D4 for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:33 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 514DA61423; Tue, 30 Apr 2024 12:02:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3A2E3C4AF1C; Tue, 30 Apr 2024 12:02:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478551; bh=FF5kjYOiGGFH7JDZ21aiyiTHxQMew/SAJYkr6QWZ3L0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=KcaGiXU402q2xQs1/uLSZa/2IXGGF1G1oar16jKhwao5h/3LvE1Cr8fpKyoOQeogD 3+76kl+NvaU+nVPkuWi+zhdQ5NOUBJJfFqbzz94OTjWDgWcyAW/Uvph7SUWZRdv4nv i1S9f5Y4Uhem+EEbjhh7YquW7EAEFgoNdQsHZKBw97txvORKVhRMqBQJcoZleVecrN UL5S2CCqB5+BHMz8zfsa1XMQ+rbwiMZquwAZzTwvElOKQ4eUrXh7FiZq/USfbGOQGS dnfA50YMvZ/jqfrwHhdYb17cPtE/sslhfzBqKw5SSJRlBf3l9Tp8zBxoi2rKiO/3zi h3Z8JkTXyEPuA== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:05 +0200 Subject: [PATCH v2 08/14] PCI: dw-rockchip: Add rockchip_pcie_ltssm() helper MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-8-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1425; i=cassel@kernel.org; h=from:subject:message-id; bh=FF5kjYOiGGFH7JDZ21aiyiTHxQMew/SAJYkr6QWZ3L0=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m7Yto2TsXXa9x3nrPfs9TMQ+7DrU/zR4y1KWS5nS m8rMOhd7ihlYRDjYpAVU2Tx/eGyv7jbfcpxxTs2MHNYmUCGMHBxCsBEPiQyMnzQyH+4l3d+9dO9 is6/p825cCD4fILegV/LHr1UDn45v7CQkaHD4/Uc7t3c2tf9Tzf/05NtSIi8spShnfXWdOWM6ni GU8wA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050232_239167_1B186974 X-CRM114-Status: GOOD ( 10.30 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add a rockchip_pcie_ltssm() helper function that reads the LTSSM status. This helper will be used in additional places in follow-up patches. Signed-off-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index 1993c430b90c..4023fd86176f 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -143,6 +143,11 @@ static int rockchip_pcie_init_irq_domain(struct rockchip_pcie *rockchip) return 0; } +static inline u32 rockchip_pcie_ltssm(struct rockchip_pcie *rockchip) +{ + return rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_LTSSM_STATUS); +} + static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip) { rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_ENABLE_LTSSM, @@ -152,7 +157,7 @@ static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip) static int rockchip_pcie_link_up(struct dw_pcie *pci) { struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); - u32 val = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_LTSSM_STATUS); + u32 val = rockchip_pcie_ltssm(rockchip); if ((val & PCIE_LINKUP) == PCIE_LINKUP && (val & PCIE_LTSSM_STATUS_MASK) == PCIE_L0S_ENTRY) From patchwork Tue Apr 30 12:01:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E3EA3C4345F for ; Tue, 30 Apr 2024 12:02:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tFDhkRNb4/zThH9G2X9j80eZPthUwddSNpajfcMKTN4=; b=i4i38mdCgvdkdQ 06zbDJSOYnG0IaJtsVJajsskN5UqahwkOC0zFBNNWiavrdI/3CGo6pziCs36h721e6RfQZiOyl49H ShQfnKr6F/mv6g/+57prJ4DvHkDGLwcCKmVI0av3mFEIa/krj48fLg5LRGLr7Ccnkd75k+7MNYwmi VJAXt64BYg0XcGm7s25EofQbZnmppBTbJAnl605QPvHZmuulThJVqi0sKQKmeP87WlielAZ5ML6ty PrDM7rG8r/YgIKKnKPtxM/pNVLFLUJYqmF0Nws2KXd8PKK+sKC6QBcto4fGUE9PrNHPErMQAvbQ/k 3NoCkFEP+CBqv7IDbCIw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mC2-00000006Gx2-09Kh; Tue, 30 Apr 2024 12:02:42 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mBx-00000006Gsk-2yke for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:39 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 129C5CE100F; Tue, 30 Apr 2024 12:02:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 73288C2BBFC; Tue, 30 Apr 2024 12:02:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478555; bh=T2rCqCvWqvq9XcLiSqbgVvv2b58vZBopULJOizrdRIQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=nyemq8Xg8LIN3Ba/QYifHGONhN4tpetFkTFyAEgIAVm9VDMuqGkB76eq0VNxYPIy7 KR3g+l+SSemiE+gw8tf0Zl1uC4t5bfIg/qdzlkS/2/0SLi/yMfRnvhsd4rC6eu3rK4 PRaqHI0TrBNgPRbYi5f0uaZwL6FKG/vGXhKRwcpGH90WT4adSL1eA1b8aeFDn6k0Hd yW/BRXiR1wRYQV5v/7G6clFzzGN+Hx82AUSxc5jbVuVUcDtO2bsiQbZCPhA6QAPs4w m8BJCQTdy4+pe+am1mGHL7lNIWQ4i6gbzqm6Ux3T98A1g/AHTFKZ44uOlL9iqymCwH Hnen86+2P9msA== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:06 +0200 Subject: [PATCH v2 09/14] PCI: dw-rockchip: Refactor the driver to prepare for EP mode MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-9-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4417; i=cassel@kernel.org; h=from:subject:message-id; bh=T2rCqCvWqvq9XcLiSqbgVvv2b58vZBopULJOizrdRIQ=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m6wPnf3Tq/wPr/nMTLG/+oW6U3lYt9Y+2jZ9A0ah ryRj7c1dZSyMIhxMciKKbL4/nDZX9ztPuW44h0bmDmsTCBDGLg4BWAixVcYGe4Kqdx/8lzVqZBV 9PrSSQLLZG+I+jX9efai5miAD+Nk4ccM/2x+pv1I+FTNoXz43xb5lW32DFc59A7Mcm93cDlQ8nB HCg8A X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050238_216531_8B6EA86E X-CRM114-Status: GOOD ( 17.07 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org This refactors the driver to prepare for EP mode. Add of-match data to the existing compatible, and explicitly define it as DW_PCIE_RC_TYPE. This way, we will be able to add EP mode in a follow-up patch in a much less intrusive way, which makes the follup-up patches much easier to review. No functional change intended. Signed-off-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 72 +++++++++++++++++++++------ 1 file changed, 57 insertions(+), 15 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index 4023fd86176f..f985539fb00a 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -58,6 +58,11 @@ struct rockchip_pcie { struct gpio_desc *rst_gpio; struct regulator *vpcie3v3; struct irq_domain *irq_domain; + enum dw_pcie_device_mode mode; +}; + +struct rockchip_pcie_of_data { + enum dw_pcie_device_mode mode; }; static int rockchip_pcie_readl_apb(struct rockchip_pcie *rockchip, u32 reg) @@ -195,7 +200,6 @@ static int rockchip_pcie_host_init(struct dw_pcie_rp *pp) struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); struct device *dev = rockchip->pci.dev; - u32 val = HIWORD_UPDATE_BIT(PCIE_LTSSM_ENABLE_ENHANCE); int irq, ret; irq = of_irq_get_byname(dev->of_node, "legacy"); @@ -209,12 +213,6 @@ static int rockchip_pcie_host_init(struct dw_pcie_rp *pp) irq_set_chained_handler_and_data(irq, rockchip_pcie_intx_handler, rockchip); - /* LTSSM enable control mode */ - rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL); - - rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_RC_MODE, - PCIE_CLIENT_GENERAL_CONTROL); - return 0; } @@ -288,13 +286,41 @@ static const struct dw_pcie_ops dw_pcie_ops = { .start_link = rockchip_pcie_start_link, }; +static int rockchip_pcie_configure_rc(struct rockchip_pcie *rockchip) +{ + struct dw_pcie_rp *pp; + u32 val; + + if (!IS_ENABLED(CONFIG_PCIE_ROCKCHIP_DW_HOST)) + return -ENODEV; + + /* LTSSM enable control mode */ + val = HIWORD_UPDATE_BIT(PCIE_LTSSM_ENABLE_ENHANCE); + rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL); + + rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_RC_MODE, + PCIE_CLIENT_GENERAL_CONTROL); + + pp = &rockchip->pci.pp; + pp->ops = &rockchip_pcie_host_ops; + + return dw_pcie_host_init(pp); +} + static int rockchip_pcie_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct rockchip_pcie *rockchip; - struct dw_pcie_rp *pp; + const struct rockchip_pcie_of_data *data; + enum dw_pcie_device_mode mode; int ret; + data = of_device_get_match_data(dev); + if (!data) + return -EINVAL; + + mode = (enum dw_pcie_device_mode)data->mode; + rockchip = devm_kzalloc(dev, sizeof(*rockchip), GFP_KERNEL); if (!rockchip) return -ENOMEM; @@ -303,9 +329,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev) rockchip->pci.dev = dev; rockchip->pci.ops = &dw_pcie_ops; - - pp = &rockchip->pci.pp; - pp->ops = &rockchip_pcie_host_ops; + rockchip->mode = mode; ret = rockchip_pcie_resource_get(pdev, rockchip); if (ret) @@ -342,10 +366,21 @@ static int rockchip_pcie_probe(struct platform_device *pdev) if (ret) goto deinit_phy; - ret = dw_pcie_host_init(pp); - if (!ret) - return 0; + switch (rockchip->mode) { + case DW_PCIE_RC_TYPE: + ret = rockchip_pcie_configure_rc(rockchip); + if (ret) + goto deinit_clk; + break; + default: + dev_err(dev, "INVALID device type %d\n", rockchip->mode); + ret = -EINVAL; + goto deinit_clk; + } + return 0; + +deinit_clk: clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks); deinit_phy: rockchip_pcie_phy_deinit(rockchip); @@ -356,8 +391,15 @@ static int rockchip_pcie_probe(struct platform_device *pdev) return ret; } +static const struct rockchip_pcie_of_data rockchip_pcie_rc_of_data = { + .mode = DW_PCIE_RC_TYPE, +}; + static const struct of_device_id rockchip_pcie_of_match[] = { - { .compatible = "rockchip,rk3568-pcie", }, + { + .compatible = "rockchip,rk3568-pcie", + .data = &rockchip_pcie_rc_of_data, + }, {}, }; From patchwork Tue Apr 30 12:01:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D8822C4345F for ; Tue, 30 Apr 2024 12:02:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=CG12oRIJzC+EEkq+/yPgTn09Qd+/YJChLhUz4C4sqWg=; b=F8WgLPOWUZUKgu YnNGN1fVfgpEZiyeU3d3xvLhV/RQWHp9kT4TSCB8ZTnjrsEYAqDyhIrTTwxg56errLV3A5LhP1I0o FQadHQPAxWd7Pg3GCCgnGvujvh/F5n4vxPPQAy6T5pvXoHwUIDiP+06tC6yUp5GXFVjvmHY6z/zrf CkgAqkzYCog2+tgLzFAS340O3ivEzqfpe8U06aEbE9V+p5AGB4V9Y9bPE7ibfWObcitiMf85X0NiV qdNPeQWRu8uJp44zJ1yyuFme0PxBprnAd0guOdmcMTIkyWw/6IPITVx7cYc5tWpxnSdj+NCizjezh 46xwAJjyfNntdQBgikOA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mC5-00000006Gzx-2bzG; Tue, 30 Apr 2024 12:02:45 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mC1-00000006Gw6-0yDy for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:42 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id C8019614FC; Tue, 30 Apr 2024 12:02:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AAD3DC4AF18; Tue, 30 Apr 2024 12:02:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478559; bh=58kdoqhkMWSvOTNRnkUL+Dx7X57eBg3JtCaWStyIDvY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=RPhfPTWzDlztDQhqRthOfAZP5enmulZUPfQ2XfzPMNkCldQmz7hZ244X+v5M1kanl ioN+QUU1hSr2ap8Ij27km+2oQAbN34D1mnn4CoqqF7IlD9MeFdWe8VtTrQkxy6W8iL e5eolMVPfHUxatLCwJ3gBO7/Veg58A2bV4XnQDmW7VU91fgETCv0O20wyZHaNaRJhB 0KBfj1x1Hz5vmAi5NUf9LkVyehZP3NScze1ZJQ4voXpFOlR68iDfbBN5sQEWJlyZIH 2uU+tUcL2CmnFwzdJFmXLqMZWFWNm75Z9OV6sBJiqUY4aQJul6dg7oDjGskmbnXq+x K46+ywLPCskYA== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:07 +0200 Subject: [PATCH v2 10/14] PCI: dw-rockchip: Add explicit rockchip,rk3588-pcie compatible MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-10-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=941; i=cassel@kernel.org; h=from:subject:message-id; bh=58kdoqhkMWSvOTNRnkUL+Dx7X57eBg3JtCaWStyIDvY=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m4wuHXfeubc5mtHJD8yafyV/aSwM7bsRsTCj4Lt/ 69NXm3ytaOUhUGMi0FWTJHF94fL/uJu9ynHFe/YwMxhZQIZwsDFKQATORjKyDCxXuNKxnc/63/N U5zCNzdlZUzSXxoYJncy9nNQ5IRz53sY/spGWOaEBnBw6qfvN14iuGhuo5nT3bLXavV7JF77nxM MZQQA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050241_464780_14D2AC48 X-CRM114-Status: GOOD ( 10.10 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The rockchip-dw-pcie.yaml device tree binding already defines rockchip,rk3588-pcie as a supported compatible string. Add an explicit rockchip,rk3588-pcie entry to make it easier to find the driver that implements this compatible string. Signed-off-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index f985539fb00a..f38d267e4e64 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -400,6 +400,10 @@ static const struct of_device_id rockchip_pcie_of_match[] = { .compatible = "rockchip,rk3568-pcie", .data = &rockchip_pcie_rc_of_data, }, + { + .compatible = "rockchip,rk3588-pcie", + .data = &rockchip_pcie_rc_of_data, + }, {}, }; From patchwork Tue Apr 30 12:01:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648858 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6926BC4345F for ; Tue, 30 Apr 2024 12:02:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=qVpJAH+06KDbHnc/aW3ZuQpmVdyG53fzKUlX+a57yO0=; b=M1KhswReJEYGp/ BIgbfoCjQxhy3Seyjl9beiDKNKwPurctqFwy0I87nMNjfanjCdMrNId/H+Cqnwjejs4w0W+PFZM7i 9P3/wYGxb6mxNDwsUoNpUJMRA18lYpkdPD3+cm2Lz62AGo3RPMGKepdmuMIJZ6FCCEDrVzJXYSdb3 uQGTG+azTc4Dl631eE6WWYFtoPsmGo2qm1QwVkqslitU/YvhsyEjPc8qbuH4FaYou+gQqvGU2sZPF bMT+45/zSjp0ndWjKd8xsr2FpbENx13Z4bFzJf348wcbw0Jl9Q5qAdAjcvmbO61QyWdH60uJ6KWgv apR1x9g+EACx6VBy9zAA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mC9-00000006H2W-0Ghr; Tue, 30 Apr 2024 12:02:49 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mC4-00000006Gz7-2Wa6 for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:47 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 0C009614FD; Tue, 30 Apr 2024 12:02:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E7561C4AF19; Tue, 30 Apr 2024 12:02:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478563; bh=KKezyn/XrsrdUGmwMl+9QvJJ8bcKDxP+lCmQctoad+k=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=c6UW/X842kayfwT26w7j1ASvSMSvl5toK+pCl52y0CT4UN/m/ICWXIiFh6qfoYQM3 oYwvr6RMm9vow0q3llSBRXxxzUT3jvSEPcgOnODO49eHYIHD7YFJOZRbckCKGCNFSl 9dkuWtIA4cFkCvIG5u305Vq5OaF1u2QEE5Xo6y1E/Xh2IKYH7NFQ5iBbA4ADFDhANc 3c7j4Hd7HEXOTOZc92DcMvI9micitSHpshDrgDz5rV9Mb/iM2i8a+VEA3+JVedL0AK +17aG6DsmEk+gfE3eILVIElMznqRcYvAPip11oRtAnxFyDDXkwkRQPkJ4yAhY5x22Q SKIVGv2rUItqA== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:08 +0200 Subject: [PATCH v2 11/14] PCI: dw-rockchip: Add endpoint mode support MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-11-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=9538; i=cassel@kernel.org; h=from:subject:message-id; bh=KKezyn/XrsrdUGmwMl+9QvJJ8bcKDxP+lCmQctoad+k=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m5IOmLAGxS6p0w6c1pdNqfq8sp9LZKNuXvPJKQWV 2x+qdvUUcrCIMbFICumyOL7w2V/cbf7lOOKd2xg5rAygQxh4OIUgIkUnmNkuKKgU83pXsaz7NlP NjfD31eufstXSBfiMJJx8mtyeGH0gJHhJUuKVtNERmbVLs6/z5qCVspOZzn1sdPV+ZRuRUJBtxo jAA== X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050244_856391_1B1E467A X-CRM114-Status: GOOD ( 21.90 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The PCIe controller in rk3568 and rk3588 can operate in endpoint mode. This endpoint mode support heavily leverages the existing code in pcie-designware-ep.c. Add support for endpoint mode to the existing pcie-dw-rockchip glue driver. Signed-off-by: Niklas Cassel --- drivers/pci/controller/dwc/Kconfig | 17 ++- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 177 ++++++++++++++++++++++++++ 2 files changed, 191 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index 8afacc90c63b..9fae0d977271 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -311,16 +311,27 @@ config PCIE_RCAR_GEN4_EP SoCs. To compile this driver as a module, choose M here: the module will be called pcie-rcar-gen4.ko. This uses the DesignWare core. +config PCIE_ROCKCHIP_DW + bool + config PCIE_ROCKCHIP_DW_HOST - bool "Rockchip DesignWare PCIe controller" - select PCIE_DW + bool "Rockchip DesignWare PCIe controller (host mode)" select PCIE_DW_HOST depends on PCI_MSI depends on ARCH_ROCKCHIP || COMPILE_TEST depends on OF help Enables support for the DesignWare PCIe controller in the - Rockchip SoC except RK3399. + Rockchip SoC (except RK3399) to work in host mode. + +config PCIE_ROCKCHIP_DW_EP + bool "Rockchip DesignWare PCIe controller (endpoint mode)" + select PCIE_DW_EP + depends on ARCH_ROCKCHIP || COMPILE_TEST + depends on OF + help + Enables support for the DesignWare PCIe controller in the + Rockchip SoC (except RK3399) to work in endpoint mode. config PCI_EXYNOS tristate "Samsung Exynos PCIe controller" diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index f38d267e4e64..7614c20c7112 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -34,10 +34,16 @@ #define to_rockchip_pcie(x) dev_get_drvdata((x)->dev) #define PCIE_CLIENT_RC_MODE HIWORD_UPDATE_BIT(0x40) +#define PCIE_CLIENT_EP_MODE HIWORD_UPDATE(0xf0, 0x0) #define PCIE_CLIENT_ENABLE_LTSSM HIWORD_UPDATE_BIT(0xc) +#define PCIE_CLIENT_DISABLE_LTSSM HIWORD_UPDATE(0x0c, 0x8) +#define PCIE_CLIENT_INTR_STATUS_MISC 0x10 +#define PCIE_CLIENT_INTR_MASK_MISC 0x24 #define PCIE_SMLH_LINKUP BIT(16) #define PCIE_RDLH_LINKUP BIT(17) #define PCIE_LINKUP (PCIE_SMLH_LINKUP | PCIE_RDLH_LINKUP) +#define PCIE_RDLH_LINK_UP_CHGED BIT(1) +#define PCIE_LINK_REQ_RST_NOT_INT BIT(2) #define PCIE_L0S_ENTRY 0x11 #define PCIE_CLIENT_GENERAL_CONTROL 0x0 #define PCIE_CLIENT_INTR_STATUS_LEGACY 0x8 @@ -159,6 +165,12 @@ static void rockchip_pcie_enable_ltssm(struct rockchip_pcie *rockchip) PCIE_CLIENT_GENERAL_CONTROL); } +static void rockchip_pcie_disable_ltssm(struct rockchip_pcie *rockchip) +{ + rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_DISABLE_LTSSM, + PCIE_CLIENT_GENERAL_CONTROL); +} + static int rockchip_pcie_link_up(struct dw_pcie *pci) { struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); @@ -195,6 +207,13 @@ static int rockchip_pcie_start_link(struct dw_pcie *pci) return 0; } +static void rockchip_pcie_stop_link(struct dw_pcie *pci) +{ + struct rockchip_pcie *rockchip = to_rockchip_pcie(pci); + + rockchip_pcie_disable_ltssm(rockchip); +} + static int rockchip_pcie_host_init(struct dw_pcie_rp *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); @@ -220,6 +239,59 @@ static const struct dw_pcie_host_ops rockchip_pcie_host_ops = { .init = rockchip_pcie_host_init, }; +static void rockchip_pcie_ep_init(struct dw_pcie_ep *ep) +{ + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + enum pci_barno bar; + + for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) + dw_pcie_ep_reset_bar(pci, bar); +}; + +static int rockchip_pcie_raise_irq(struct dw_pcie_ep *ep, u8 func_no, + unsigned int type, u16 interrupt_num) +{ + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + + switch (type) { + case PCI_IRQ_INTX: + return dw_pcie_ep_raise_intx_irq(ep, func_no); + case PCI_IRQ_MSI: + return dw_pcie_ep_raise_msi_irq(ep, func_no, interrupt_num); + case PCI_IRQ_MSIX: + return dw_pcie_ep_raise_msix_irq(ep, func_no, interrupt_num); + default: + dev_err(pci->dev, "UNKNOWN IRQ type\n"); + } + + return 0; +} + +static const struct pci_epc_features rockchip_pcie_epc_features = { + .linkup_notifier = true, + .msi_capable = true, + .msix_capable = true, + .align = SZ_64K, + .bar[BAR_0] = { .type = BAR_FIXED, .fixed_size = SZ_1M, }, + .bar[BAR_1] = { .type = BAR_FIXED, .fixed_size = SZ_1M, }, + .bar[BAR_2] = { .type = BAR_FIXED, .fixed_size = SZ_1M, }, + .bar[BAR_3] = { .type = BAR_FIXED, .fixed_size = SZ_1M, }, + .bar[BAR_4] = { .type = BAR_RESERVED, }, + .bar[BAR_5] = { .type = BAR_FIXED, .fixed_size = SZ_1M, }, +}; + +static const struct pci_epc_features * +rockchip_pcie_get_features(struct dw_pcie_ep *ep) +{ + return &rockchip_pcie_epc_features; +} + +static const struct dw_pcie_ep_ops rockchip_pcie_ep_ops = { + .init = rockchip_pcie_ep_init, + .raise_irq = rockchip_pcie_raise_irq, + .get_features = rockchip_pcie_get_features, +}; + static int rockchip_pcie_clk_init(struct rockchip_pcie *rockchip) { struct device *dev = rockchip->pci.dev; @@ -284,8 +356,39 @@ static void rockchip_pcie_phy_deinit(struct rockchip_pcie *rockchip) static const struct dw_pcie_ops dw_pcie_ops = { .link_up = rockchip_pcie_link_up, .start_link = rockchip_pcie_start_link, + .stop_link = rockchip_pcie_stop_link, }; +static irqreturn_t rockchip_pcie_ep_sys_irq_thread(int irq, void *arg) +{ + struct rockchip_pcie *rockchip = arg; + struct dw_pcie *pci = &rockchip->pci; + struct device *dev = pci->dev; + u32 reg, val; + + reg = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_STATUS_MISC); + + dev_dbg(dev, "PCIE_CLIENT_INTR_STATUS_MISC: %#x\n", reg); + dev_dbg(dev, "LTSSM_STATUS: %#x\n", rockchip_pcie_ltssm(rockchip)); + + if (reg & PCIE_LINK_REQ_RST_NOT_INT) { + dev_dbg(dev, "hot reset or link-down reset\n"); + dw_pcie_ep_linkdown(&pci->ep); + } + + if (reg & PCIE_RDLH_LINK_UP_CHGED) { + val = rockchip_pcie_ltssm(rockchip); + if ((val & PCIE_LINKUP) == PCIE_LINKUP) { + dev_dbg(dev, "link up\n"); + dw_pcie_ep_linkup(&pci->ep); + } + } + + rockchip_pcie_writel_apb(rockchip, reg, PCIE_CLIENT_INTR_STATUS_MISC); + + return IRQ_HANDLED; +} + static int rockchip_pcie_configure_rc(struct rockchip_pcie *rockchip) { struct dw_pcie_rp *pp; @@ -307,6 +410,63 @@ static int rockchip_pcie_configure_rc(struct rockchip_pcie *rockchip) return dw_pcie_host_init(pp); } +static int rockchip_pcie_configure_ep(struct platform_device *pdev, + struct rockchip_pcie *rockchip) +{ + struct device *dev = &pdev->dev; + int irq, ret; + u32 val; + + if (!IS_ENABLED(CONFIG_PCIE_ROCKCHIP_DW_EP)) + return -ENODEV; + + irq = platform_get_irq_byname(pdev, "sys"); + if (irq < 0) { + dev_err(dev, "missing sys IRQ resource\n"); + return irq; + } + + ret = devm_request_threaded_irq(dev, irq, NULL, + rockchip_pcie_ep_sys_irq_thread, + IRQF_ONESHOT, "pcie-sys", rockchip); + if (ret) { + dev_err(dev, "failed to request PCIe sys IRQ\n"); + return ret; + } + + /* LTSSM enable control mode */ + val = HIWORD_UPDATE_BIT(PCIE_LTSSM_ENABLE_ENHANCE); + rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL); + + rockchip_pcie_writel_apb(rockchip, PCIE_CLIENT_EP_MODE, + PCIE_CLIENT_GENERAL_CONTROL); + + rockchip->pci.ep.ops = &rockchip_pcie_ep_ops; + rockchip->pci.ep.page_size = SZ_64K; + + dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)); + + ret = dw_pcie_ep_init(&rockchip->pci.ep); + if (ret) { + dev_err(dev, "failed to initialize endpoint\n"); + return ret; + } + + ret = dw_pcie_ep_init_registers(&rockchip->pci.ep); + if (ret) { + dev_err(dev, "failed to initialize DWC endpoint registers\n"); + dw_pcie_ep_deinit(&rockchip->pci.ep); + return ret; + } + + dw_pcie_ep_init_notify(&rockchip->pci.ep); + + /* unmask DLL up/down indicator and hot reset/link-down reset */ + rockchip_pcie_writel_apb(rockchip, 0x60000, PCIE_CLIENT_INTR_MASK_MISC); + + return ret; +} + static int rockchip_pcie_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -372,6 +532,11 @@ static int rockchip_pcie_probe(struct platform_device *pdev) if (ret) goto deinit_clk; break; + case DW_PCIE_EP_TYPE: + ret = rockchip_pcie_configure_ep(pdev, rockchip); + if (ret) + goto deinit_clk; + break; default: dev_err(dev, "INVALID device type %d\n", rockchip->mode); ret = -EINVAL; @@ -395,15 +560,27 @@ static const struct rockchip_pcie_of_data rockchip_pcie_rc_of_data = { .mode = DW_PCIE_RC_TYPE, }; +static const struct rockchip_pcie_of_data rockchip_pcie_ep_of_data = { + .mode = DW_PCIE_EP_TYPE, +}; + static const struct of_device_id rockchip_pcie_of_match[] = { { .compatible = "rockchip,rk3568-pcie", .data = &rockchip_pcie_rc_of_data, }, + { + .compatible = "rockchip,rk3568-pcie-ep", + .data = &rockchip_pcie_ep_of_data, + }, { .compatible = "rockchip,rk3588-pcie", .data = &rockchip_pcie_rc_of_data, }, + { + .compatible = "rockchip,rk3588-pcie-ep", + .data = &rockchip_pcie_ep_of_data, + }, {}, }; From patchwork Tue Apr 30 12:01:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD647C4345F for ; Tue, 30 Apr 2024 12:02:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=M3tDNMBcrQZ6EFyELuYPo9GcJmbT9dMVlX1kXVlBSfw=; b=XFaTs1IKb2n1rt DbasFChl/cyvd7FfbBWMZRO6XMdYVgPQDDSoqNCBUlMSBQelnjeX1UpE3b/JDQItpI7uwqiCaz2TX z3HA+BorYTt5qY9tyyaiG/OAmG2zQpPNONf+00jSoJ54xroSzKNZ8hwEuYV/twYVLT6QS38I4zrzN AO5E0oAwioz3WE5NRFEKXGtMObg1zP+NHyvQaMB98T+1fY2NJn8tI5e6UvxB3Hf6V6WrSBTDsd+r7 Sg8dJjBjPMoOcT+m0dNaCUF65a8pC0j2rjuiK6BIqFvie6Y1bxnvQnatlRVbsQ1yfa6eW2n6qUZeh 15It+0Kramd+lKOcdqjg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mCE-00000006H6l-27Wp; Tue, 30 Apr 2024 12:02:54 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mCA-00000006H2d-2re0 for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:52 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id BF994CE102A; Tue, 30 Apr 2024 12:02:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2B9F1C4AF18; Tue, 30 Apr 2024 12:02:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478567; bh=xz35v8bxYvqgegncoSCGyIO3ONqjFxudlkCESFdUVaA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Yc2VNkSuE7HFl+WPcKW2rKl6MknP7M5cKkRq10sOeLEMY2hLHek353uXhl6lVNlrX RtktzsP3QWQlT/vEjkkQCmC7QBRItzxX81gB8fgV/hpzUukn8hphbYi1p0Z9H3cdky a/85YK803ONUf5Ct51pEHuv6iLoYDkqV+/0UXHaIwwqNVlGmBeyyLk/WFDSDpEoEVw X2gaKux4AzInTCDOu9ttgyhvK7tcRvRH5n5TWdAxMmwz5tjdq9aULGoOQikfi2GNy9 PNp5gDEW9U94e/XTZhmwZPqpD7bk78wCiLAVvYAcp+9wZts2248htW7mIMFevM/uQ9 twE/BG/o50FTw== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:09 +0200 Subject: [PATCH v2 12/14] misc: pci_endpoint_test: Add support for rockchip rk3588 MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-12-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2286; i=cassel@kernel.org; h=from:subject:message-id; bh=xz35v8bxYvqgegncoSCGyIO3ONqjFxudlkCESFdUVaA=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m7YEHKXM1//Y8si07YXJfdu6LRc7MnX/RQa+u+17 8WDL+f7dpSyMIhxMciKKbL4/nDZX9ztPuW44h0bmDmsTCBDGLg4BWAiWzIYGZocdtnpfFi01zZZ 1Crk9711OzY/efb/akWoXVNY+vGtqiaMDGu/RDM6pQRGX7e6KBabV3Gwa29JkMitWdcPn9vyfH7 ZZlYA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050251_456273_C9151B07 X-CRM114-Status: GOOD ( 17.13 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Rockchip rk3588 requires 64k alignment. While there is an existing device_id:vendor_id in the driver with 64k alignment, that device_id:vendor_id is am654, which uses BAR2 instead of BAR0 as the test_reg_bar, and also has special is_am654_pci_dev() checks in the driver to disallow BAR0. In order to allow testing all BARs, add a new rk3588 entry in the driver. We intentionally do not add the vendor id to pci_ids.h, since the policy for that file is that the vendor id has to be used by multiple drivers. Hopefully, this new entry will be short-lived, as there is a series on the mailing list which intends to move the address alignment restrictions from this driver to the endpoint side. Add a new entry for rk3588 in order to allow us to test all BARs. Signed-off-by: Niklas Cassel Reviewed-by: Manivannan Sadhasivam --- drivers/misc/pci_endpoint_test.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/misc/pci_endpoint_test.c b/drivers/misc/pci_endpoint_test.c index c38a6083f0a7..a7f593b4e3b3 100644 --- a/drivers/misc/pci_endpoint_test.c +++ b/drivers/misc/pci_endpoint_test.c @@ -84,6 +84,9 @@ #define PCI_DEVICE_ID_RENESAS_R8A774E1 0x0025 #define PCI_DEVICE_ID_RENESAS_R8A779F0 0x0031 +#define PCI_VENDOR_ID_ROCKCHIP 0x1d87 +#define PCI_DEVICE_ID_ROCKCHIP_RK3588 0x3588 + static DEFINE_IDA(pci_endpoint_test_ida); #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \ @@ -980,6 +983,11 @@ static const struct pci_endpoint_test_data j721e_data = { .irq_type = IRQ_TYPE_MSI, }; +static const struct pci_endpoint_test_data rk3588_data = { + .alignment = SZ_64K, + .irq_type = IRQ_TYPE_MSI, +}; + static const struct pci_device_id pci_endpoint_test_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x), .driver_data = (kernel_ulong_t)&default_data, @@ -1017,6 +1025,9 @@ static const struct pci_device_id pci_endpoint_test_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721S2), .driver_data = (kernel_ulong_t)&j721e_data, }, + { PCI_DEVICE(PCI_VENDOR_ID_ROCKCHIP, PCI_DEVICE_ID_ROCKCHIP_RK3588), + .driver_data = (kernel_ulong_t)&rk3588_data, + }, { } }; MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl); From patchwork Tue Apr 30 12:01:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4F26C4345F for ; Tue, 30 Apr 2024 12:03:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=7GrzYuNiPHs/QTI4KLx7UVz2l/cyG+SG312DlaLVvyo=; b=KfPRku9EuRYsBp qtOP9XRyTohMc0f75zenqufUOpFQwKE2Ogu6sbjSWZkV3aiLMraXIZ4x2u6SsQQfTTciTc/C1IyZe 0sNxyDjnhxvRIeeMZVahJKPHvT95AaPqnP3Z2EgKZVuFII377JMohGRWateT8vBSDZskZWDstiKJW YDIp4+GxqW4HHWbX/BF7G8K8lx1WqMWuP6hQJrzZ0e6K8cDmFWcnlMXVHOWy1sF3ZxGEOqTDgD569 fwaC0dy7BFZmG+DuqptiVj7cOycrg5pauyNiCXjJy3NxqAZHua/z2+7/2hi3jp/neHtmPIVfcs92C mPZ7Iqb/dzVffyrlJ8eQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mCH-00000006H9Y-39mp; Tue, 30 Apr 2024 12:02:57 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mCD-00000006H5S-13VI for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:54 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 82403614FE; Tue, 30 Apr 2024 12:02:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 63837C4AF19; Tue, 30 Apr 2024 12:02:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478572; bh=zV5QDNN0Jd7t4ZstveDXwSQbOhLYZJYhoixvLN8ii44=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=bh1innN4bSe7ShLCJYGYTiTn7nounMZ/tuwOze97iGXMMxJzpXvE5cmZ+nXYs8TZB 2X4ukO9gW+fs+7tZPXqR3v0itT1QHjEDlJ7rs53Wj5+88nZubq+HuVOYUzd9BF04bT G9GyjlWT0AU+s1HNeB5tgl7kxs6XJ0Gq5HUt/Q3yoYiTQj3ZLssgoeLUUea5FZPdfZ uDVziwjZhcn6TTw3PtW3XL3h46HvhMZtJiBIbzPUO3NrUZ1X4ESpdSTLASWmAVQ8n5 c7hDG4Estl8M1pVXfWIcDbQBz4T/EqEKpypgrmoDc5NpGtmaO/28+0qXxnR53C+T1y NEhj+vxPyu2aQ== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:10 +0200 Subject: [PATCH v2 13/14] arm64: dts: rockchip: Add PCIe endpoint mode support MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-13-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2324; i=cassel@kernel.org; h=from:subject:message-id; bh=zV5QDNN0Jd7t4ZstveDXwSQbOhLYZJYhoixvLN8ii44=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m6ov7r60hGGqQvvepXPNCxu+1PJdOj+JvVm58SFH 4XDTgt+7yhlYRDjYpAVU2Tx/eGyv7jbfcpxxTs2MHNYmUCGMHBxCsBEfokz/BV/9uKufcXXieVh N6/euePQ1WHJvYU5yLZ2t8abI8VuFZEM/wN13hnMEnCXkrGPWJegVGm1bmXV++eJjGrGQktj1X5 OYAYA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050253_472805_E632A970 X-CRM114-Status: GOOD ( 10.62 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add a device tree node representing PCIe endpoint mode. The controller can either be configured to run in Root Complex or Endpoint node. If a user wants to run the controller in endpoint mode, the user has to disable the pcie3x4 node and enable the pcie3x4_ep node. Signed-off-by: Niklas Cassel --- arch/arm64/boot/dts/rockchip/rk3588.dtsi | 35 ++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index 5519c1430cb7..09a06e8c43b7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -136,6 +136,41 @@ pcie3x4_intc: legacy-interrupt-controller { }; }; + pcie3x4_ep: pcie-ep@fe150000 { + compatible = "rockchip,rk3588-pcie-ep"; + clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, + <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, + <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-names = "sys", "pmc", "msg", "legacy", "err", + "dma0", "dma1", "dma2", "dma3"; + max-link-speed = <3>; + num-lanes = <4>; + phys = <&pcie30phy>; + phy-names = "pcie-phy"; + power-domains = <&power RK3588_PD_PCIE>; + reg = <0xa 0x40000000 0x0 0x00100000>, + <0xa 0x40100000 0x0 0x00100000>, + <0x0 0xfe150000 0x0 0x00010000>, + <0x9 0x00000000 0x0 0x40000000>, + <0xa 0x40300000 0x0 0x00100000>; + reg-names = "dbi", "dbi2", "apb", "addr_space", "atu"; + resets = <&cru SRST_PCIE0_POWER_UP>, <&cru SRST_P_PCIE0>; + reset-names = "pwr", "pipe"; + status = "disabled"; + }; + pcie3x2: pcie@fe160000 { compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie"; #address-cells = <3>; From patchwork Tue Apr 30 12:01:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Niklas Cassel X-Patchwork-Id: 13648861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6BA94C4345F for ; Tue, 30 Apr 2024 12:03:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jamFWqZ37RVbZ8+tYkM/G8Xzl711L7R7dEzSppqzdrw=; b=rlzn4eYSW7biyV OZ69zk+FbSaaPnWqBysLaapWOKdLfAVgS/C/RDmrmdzR+cvUIuEZBPvqmxPujHe67eZTgjt8A2gjG xXsf36ji5YyncVWRvrkHQNpzVuSK7vLy0pr4aqJsR6ZYPFx9iz+qKGgl6H+ZVkJtgw6v54lJo2w1H 2JwsQd57mxZXA4iVJpMLbnrveKsvZm0rM/8Aw/BHKzUtWDSwIyecz2Up1tEhr4MYFH+V3f/xCsjFb BQyiUivWqT3BTngcyR0R7nhmIwSX4ql/Y/a/c/kiskubRZ2tH2bthIERXYz7yOIDOYI8TMlI5mDJ9 ghlImZNVGwyY365HTr5Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mCM-00000006HCB-44xu; Tue, 30 Apr 2024 12:03:02 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1s1mCH-00000006H8y-1htM for linux-rockchip@lists.infradead.org; Tue, 30 Apr 2024 12:02:58 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id B160861423; Tue, 30 Apr 2024 12:02:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9AB46C4AF4D; Tue, 30 Apr 2024 12:02:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1714478576; bh=4qN66Ir2UFp9Lf/FY4N/yTmNKplsIfb7tfx/17jEJAs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=rLHPEnZibt7OJr1eTiQLTuY+eDrC60md33XSlHmvaYOb/805uoAJNmTN2A2zt1zvd Vp2r4tIbeeH+sBIvfWhnb870QL0TqAJP0qlh8ldT3WzdUPuXv5NYyr+w6POdUB+lMf hubF77nk3JmyWgY320MCrJau9CMt4Q2aunuMX8pNnMCHz4i/KS7uZxN1VOmF8IeYXV fMMrLUOEia485MYpqLnt/OvLokk7LevU9upTM7cdxMQ+TLhpWWn3zJo+9FX7/U1YC5 W9AOgYAhHcOwaiTgoAxiQDpWh1DsGG8flHvcLoMyFxKSX4WbqUcSfp46nIEpwsSvAr quF974GACKYTA== From: Niklas Cassel Date: Tue, 30 Apr 2024 14:01:11 +0200 Subject: [PATCH v2 14/14] arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode MIME-Version: 1.0 Message-Id: <20240430-rockchip-pcie-ep-v1-v2-14-a0f5ee2a77b6@kernel.org> References: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> In-Reply-To: <20240430-rockchip-pcie-ep-v1-v2-0-a0f5ee2a77b6@kernel.org> To: Jingoo Han , Manivannan Sadhasivam , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Niklas Cassel , Kishon Vijay Abraham I , Arnd Bergmann , Damien Le Moal , Jon Lin , Shawn Lin , Simon Xue Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-rockchip@lists.infradead.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3453; i=cassel@kernel.org; h=from:subject:message-id; bh=4qN66Ir2UFp9Lf/FY4N/yTmNKplsIfb7tfx/17jEJAs=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGNIM7m5geWLQMk+lOOWKxaY5TY8NLWfW59VXChj3O079t 36z5/O7HaUsDGJcDLJiiiy+P1z2F3e7TzmueMcGZg4rE8gQBi5OAZiIRx/DX0Ep2ziB7uclkluv 2dk9Ds94fWJv7+Y8vkj+dlvBl/PPBDD8z/69Z/1TJwFWienXbqZsmfZOf0Hjh2DFCwVZhdVMJyd IsAMA X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240430_050257_631447_D9B205F5 X-CRM114-Status: GOOD ( 16.02 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add rock5b overlays for PCIe endpoint mode support. If using the rock5b as an endpoint against a normal PC, only the rk3588-rock-5b-pcie-ep.dtbo needs to be applied. If using two rock5b:s, with one board as EP and the other board as RC, rk3588-rock-5b-pcie-ep.dtbo and rk3588-rock-5b-pcie-srns.dtbo has to be applied to the respective boards. Signed-off-by: Niklas Cassel --- arch/arm64/boot/dts/rockchip/Makefile | 5 +++++ .../boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso | 25 ++++++++++++++++++++++ .../dts/rockchip/rk3588-rock-5b-pcie-srns.dtso | 16 ++++++++++++++ 3 files changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index f906a868b71a..d827432d5111 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -117,6 +117,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb @@ -127,3 +129,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-nanopi-r6c.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-orangepi-5.dtb + +# Enable support for device-tree overlays +DTC_FLAGS_rk3588-rock-5b += -@ diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso new file mode 100644 index 000000000000..672d748fcc67 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * DT-overlay to run the PCIe3_4L Dual Mode controller in Endpoint mode + * in the SRNS (Separate Reference Clock No Spread) configuration. + * + * NOTE: If using a setup with two ROCK 5B:s, with one board running in + * RC mode and the other board running in EP mode, see also the device + * tree overlay: rk3588-rock-5b-pcie-srns.dtso. + */ + +/dts-v1/; +/plugin/; + +&pcie30phy { + rockchip,rx-common-refclk-mode = <0 0 0 0>; +}; + +&pcie3x4 { + status = "disabled"; +}; + +&pcie3x4_ep { + vpcie3v3-supply = <&vcc3v3_pcie30>; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-srns.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-srns.dtso new file mode 100644 index 000000000000..1a0f1af65c43 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-srns.dtso @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * DT-overlay to run the PCIe3_4L Dual Mode controller in Root Complex + * mode in the SRNS (Separate Reference Clock No Spread) configuration. + * + * This device tree overlay is only needed (on the RC side) when running + * a setup with two ROCK 5B:s, with one board running in RC mode and the + * other board running in EP mode. + */ + +/dts-v1/; +/plugin/; + +&pcie30phy { + rockchip,rx-common-refclk-mode = <0 0 0 0>; +};