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Wed, 1 May 2024 08:32:32 GMT Received: from hu-skakitap-hyd.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 1 May 2024 01:32:28 -0700 From: Satya Priya Kakitapalli Date: Wed, 1 May 2024 14:02:18 +0530 Subject: [PATCH v3 1/2] dt-bindings: clock: qcom: Add AHB clock for SM8150 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240501-videocc-sm8150-dt-node-v3-1-2c4bd9ef48bd@quicinc.com> References: <20240501-videocc-sm8150-dt-node-v3-0-2c4bd9ef48bd@quicinc.com> In-Reply-To: <20240501-videocc-sm8150-dt-node-v3-0-2c4bd9ef48bd@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Michael Turquette , "Stephen Boyd" CC: Dmitry Baryshkov , Ajit Pandey , Imran Shaik , "Taniya Das" , Jagadeesh Kona , , , , , "Satya Priya Kakitapalli" X-Mailer: b4 0.12.4 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: _C_8vJOcoyC_5WKDmYPfwaPgLJ9iOdgP X-Proofpoint-ORIG-GUID: _C_8vJOcoyC_5WKDmYPfwaPgLJ9iOdgP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-01_08,2024-04-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 mlxlogscore=970 priorityscore=1501 phishscore=0 mlxscore=0 adultscore=0 bulkscore=0 clxscore=1015 suspectscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2405010059 SM8150 videocc needs AHB clock, so update the bindings for sm8150 to add the AHB clock. Fixes: 35d26e9292e2 ("dt-bindings: clock: Add YAML schemas for the QCOM VIDEOCC clock bindings") Signed-off-by: Satya Priya Kakitapalli --- .../devicetree/bindings/clock/qcom,videocc.yaml | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index 6999e36ace1b..68bac801adb0 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -75,7 +75,6 @@ allOf: enum: - qcom,sc7180-videocc - qcom,sdm845-videocc - - qcom,sm8150-videocc then: properties: clocks: @@ -101,6 +100,22 @@ allOf: - const: bi_tcxo - const: bi_tcxo_ao + - if: + properties: + compatible: + enum: + - qcom,sm8150-videocc + then: + properties: + clocks: + items: + - description: AHB + - description: Board XO source + clock-names: + items: + - const: iface + - const: bi_tcxo + - if: properties: compatible: From patchwork Wed May 1 08:32:19 2024 Content-Type: text/plain; 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Signed-off-by: Satya Priya Kakitapalli --- arch/arm64/boot/dts/qcom/sa8155p.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/sm8150.dtsi | 14 ++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8155p.dtsi b/arch/arm64/boot/dts/qcom/sa8155p.dtsi index ffb7ab695213..9e70effc72e1 100644 --- a/arch/arm64/boot/dts/qcom/sa8155p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155p.dtsi @@ -38,3 +38,7 @@ &rpmhpd { */ compatible = "qcom,sa8155p-rpmhpd"; }; + +&videocc { + power-domains = <&rpmhpd SA8155P_CX>; +}; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index a35c0852b5a1..55c9046f4fb9 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -3715,6 +3716,19 @@ usb_2_dwc3: usb@a800000 { }; }; + videocc: clock-controller@ab00000 { + compatible = "qcom,sm8150-videocc"; + reg = <0 0x0ab00000 0 0x10000>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "bi_tcxo"; + power-domains = <&rpmhpd SM8150_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + camnoc_virt: interconnect@ac00000 { compatible = "qcom,sm8150-camnoc-virt"; reg = <0 0x0ac00000 0 0x1000>;