From patchwork Thu May 2 09:03:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13651452 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A59F5025A; Thu, 2 May 2024 09:04:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714640644; cv=none; b=bOwYn2mwKmPJpq4Q1TXze9b5sc1h5l87YfY8CFl36BSuI2VUGY8sclUWF3UOrKOtMfcabZDfjnFme8QAfDJf//JEQ5w9gKM2LC+TipceW6hbUSKAOwcIMZYW1WbXWZlwMsKxwi6+1TkAh/g8wPFuoZKEdJCGPAmPBrigOxKJdEw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714640644; c=relaxed/simple; bh=W5SmV7WXw5lJR/+adKBzqeWyayHZTu6CMLTd9waL4eg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Xkku3Nxg3fkWpO3uz6RyMjtzmReCQLjm8Thw57NjZ1vxWK00yD4yuDIxFNyFzz7YBl77wIWdgn03EXAre5LtNGTNl1N65AsVkt0H46dksgMMqL7AKZu7644Y9TH1jacqkiZ7qE3TyXK0scZ7oxXdCnmfVMa6sPy9i9UNpTAsvWM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=kw4+3bxU; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="kw4+3bxU" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4427jKvU007935; Thu, 2 May 2024 09:03:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=dUhP1JRQDIoFUufdDjT1Cnc9UMhNoZA4QjK7m1Sbuzw=; b=kw 4+3bxUzMIgYKvwyZ9pkQ1DeMaIJ3Y8D1SFw7FrsDRatoGJ3zPyJygqioVsLpMIqm JGQFALPaN8oiWbIzKTsoLBALvTq/8WL9b5swoX5oxaYcc0nlfSPUfWjs4xQujA3F D1LJD6ZhmkcUodUD7qH1A0ZgpxEJWpvy279yxzKZ6PbRtemkGk3XMFO5lO6qpex7 U8vniIOjp0iVIp9pg92aYdV5CUSZKnzIPLyynMURd31w79bBtlpXdeZHJPahOiHi ZGAuTk/TWH8fQxpdkyfMeATJlBqLnJ01t/Gv0fL9Ub+xfNAM7AL1Z+GcMlOd44al dfIbGEvhM/ADywD7h7kg== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3xv6q0r4mp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 02 May 2024 09:03:55 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44293saL004483 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 2 May 2024 09:03:54 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 2 May 2024 02:03:49 -0700 From: Komal Bajaj To: Bjorn Andersson , Konrad Dybcio , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Bjorn Andersson , , , Jack Pham , Krishna Kurapati PSSNV , Komal Bajaj , Amrit Anand Subject: [PATCH v3 1/3] arm64: dts: qcom: qdu1000: Add USB3 and PHY support Date: Thu, 2 May 2024 14:33:24 +0530 Message-ID: <20240502090326.21489-2-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240502090326.21489-1-quic_kbajaj@quicinc.com> References: <20240502090326.21489-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: vGjxNo0a_phl0zDMXP2IGUYb5eEfr6FK X-Proofpoint-GUID: vGjxNo0a_phl0zDMXP2IGUYb5eEfr6FK X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-01_16,2024-05-02_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 spamscore=0 mlxlogscore=999 malwarescore=0 phishscore=0 adultscore=0 clxscore=1015 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2405020053 Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and SNPS HS PHY on QDU1000/QRU1000 SoCs. Also add required pins for USB, so that the interface can work reliably. Co-developed-by: Amrit Anand Signed-off-by: Amrit Anand Signed-off-by: Komal Bajaj --- arch/arm64/boot/dts/qcom/qdu1000.dtsi | 120 ++++++++++++++++++++++++++ 1 file changed, 120 insertions(+) -- 2.42.0 diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index 832f472c4b7a..72ff94ce5ad4 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -6,6 +6,8 @@ #include #include #include +#include +#include #include #include #include @@ -913,6 +915,124 @@ opp-384000000 { }; }; + usb_1_hsphy: phy@88e3000 { + compatible = "qcom,qdu1000-usb-hs-phy", + "qcom,usb-snps-hs-7nm-phy"; + reg = <0x0 0x088e3000 0x0 0x120>; + #phy-cells = <0>; + + clocks =<&gcc GCC_USB2_CLKREF_EN>; + clock-names = "ref"; + + resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; + + status = "disabled"; + }; + + usb_1_qmpphy: phy@88e5000 { + compatible = "qcom,qdu1000-qmp-usb3-uni-phy"; + reg = <0x0 0x088e5000 0x0 0x2000>; + + clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, + <&gcc GCC_USB2_CLKREF_EN>, + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", + "ref", + "com_aux", + "pipe"; + + resets = <&gcc GCC_USB3_PHY_PRIM_BCR>, + <&gcc GCC_USB3PHY_PHY_PRIM_BCR>; + reset-names = "phy", + "phy_phy"; + + #clock-cells = <0>; + clock-output-names = "usb3_uni_phy_pipe_clk_src"; + + #phy-cells = <0>; + + status = "disabled"; + }; + + usb_1: usb@a6f8800 { + compatible = "qcom,qdu1000-dwc3", "qcom,dwc3"; + reg = <0 0x0a6f8800 0 0x400>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "sleep", + "mock_utmi"; + + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + + interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 8 IRQ_TYPE_EDGE_RISING>, + <&pdc 9 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "hs_phy_irq", + "ss_phy_irq", + "dp_hs_phy_irq", + "dm_hs_phy_irq"; + + power-domains = <&gcc USB30_PRIM_GDSC>; + required-opps = <&rpmhpd_opp_nom>; + + resets = <&gcc GCC_USB30_PRIM_BCR>; + + interconnects = <&system_noc MASTER_USB3 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &system_noc SLAVE_USB3_0 QCOM_ICC_TAG_ALWAYS>; + + interconnect-names = "usb-ddr", + "apps-usb"; + + status = "disabled"; + + usb_1_dwc3: usb@a600000 { + compatible = "snps,dwc3"; + reg = <0 0x0a600000 0 0xcd00>; + interrupts = ; + + iommus = <&apps_smmu 0xc0 0x0>; + snps,dis_u2_susphy_quirk; + snps,dis_enblslpm_quirk; + phys = <&usb_1_hsphy>, + <&usb_1_qmpphy>; + phy-names = "usb2-phy", + "usb3-phy"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + usb_1_dwc3_hs: endpoint { + }; + }; + + port@1 { + reg = <1>; + + usb_1_dwc3_ss: endpoint { + }; + }; + }; + }; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,qdu1000-pdc", "qcom,pdc"; reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>; From patchwork Thu May 2 09:03:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13651453 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C3E4524B8; Thu, 2 May 2024 09:04:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714640645; cv=none; b=tq0Vu4iAfqzpgttRz0RfUEgtq0IqHJkGdy8MrFoTKIgJaCNxfzjLzxPZDtObOtiIGA3BcH8Wg5DiUv4jfYK1ew+8DJkXnEnXpetNxSr/QkMVIDOH4jsXWW/HhY7jV63B3sNWvn+Lapz9iETnEiGdDxLPRx0y5xvXHqlAUar0/4s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714640645; c=relaxed/simple; bh=VtgvTudouFVz530Zxmo5sY0rq4AWfZuSPg/MG0XKAs0=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=lSmu5T6ZnAvIZMHDoZOX9X6koAXxKwSVUySUiCaRHZqeFOiVVoMVVHCJq0unZ3rYWAD2WePtUImWy5nQK2XLF/z2VErl5Zc5tOM+wfVvE9LkUVLcGp/xYu6yNIiIOJxoUb0nm3UI1AljnjMMZmiRCkln7eS14mxWSbYGQ5+zMGU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=AEHcltqx; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="AEHcltqx" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4428t7mk026251; Thu, 2 May 2024 09:04:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=M26WgbKo+NTRAs9z4cXQT5+E1b/gW8bEnIm/ih/IhwM=; b=AE Hcltqxmf5Jzow/00L0rWC/XvDLyhbnddT8VJXhgyduuVm6d5RjWXrv5+C8PvS7Sk f5U9uz2BuBRLExQsTh/H4STWRIw80E9ZhSAeDiuacrOeQjmaL2241TElDC/jMIV2 fhE1VLvk2rCJtuAnhVF6iGt9wjKpgvAIMVU5owrwtVrvveFBLa8msNcphLPTm37Y O/D1OzE/dgaSRlvDwVsChjBFHWt/q8dv+0kQQFy7FqiERPMGdHAQsxqGrNzpAJTn QZPeJVGnGj2ucZrwzvodRLajEyZ/tnzoK7ATGeK0zC8a1c1SFQ7nAloW/JYZpDaQ lAuD4Blar4NlYDZf34yw== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3xv6q0r4mw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 02 May 2024 09:04:00 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44293xBb001493 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 2 May 2024 09:04:00 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 2 May 2024 02:03:55 -0700 From: Komal Bajaj To: Bjorn Andersson , Konrad Dybcio , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Bjorn Andersson , , , Jack Pham , Krishna Kurapati PSSNV , Komal Bajaj , Amrit Anand Subject: [PATCH v3 2/3] arm64: dts: qcom: qdu1000-idp: enable USB nodes Date: Thu, 2 May 2024 14:33:25 +0530 Message-ID: <20240502090326.21489-3-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240502090326.21489-1-quic_kbajaj@quicinc.com> References: <20240502090326.21489-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: FDuajEOe2WGb7znkQmUKaQsgEMzaLPG0 X-Proofpoint-GUID: FDuajEOe2WGb7znkQmUKaQsgEMzaLPG0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-01_16,2024-05-02_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 spamscore=0 mlxlogscore=388 malwarescore=0 phishscore=0 adultscore=0 clxscore=1015 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2405020053 Enable both USB controllers and associated hsphy and qmp phy nodes on QDU1000 IDP. Co-developed-by: Amrit Anand Signed-off-by: Amrit Anand Signed-off-by: Komal Bajaj --- arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) -- 2.42.0 diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts index 5a25cdec969e..e65305f8136c 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts @@ -500,3 +500,26 @@ &tlmm { &uart7 { status = "okay"; }; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l8a_0p91>; + vdda18-supply = <&vreg_l14a_1p8>; + vdda33-supply = <&vreg_l2a_2p3>; + + status = "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply = <&vreg_l8a_0p91>; + vdda-pll-supply = <&vreg_l3a_1p2>; + + status = "okay"; +}; From patchwork Thu May 2 09:03:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13651455 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 46E455466C; Thu, 2 May 2024 09:04:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714640657; cv=none; b=Z66PODFKfzr5CLwFX07AGgAQcW3khvqRy8aM6WnN5pxvT5QNOdDvHUBoXcIrvVL/Nnz1r/wYO3+6xMxv5Pq3Um1zrSpIOzWi1GZbjnvJEBqGpZ5hVEpqyjKATIUbaAoHp13MfpVmK9AJW21/sflJiqE9xDuYggMve6231eRAFDg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714640657; c=relaxed/simple; bh=6ybnRSgzmwgQhvj2h0wA5WBI6u0bsgXxQhPo6NKgvDA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=oRZbSpe+G5tfqYW+O38Y6NRLKIpANPjJu5XQG4EyP10+WTWgzNaCg8IIr12oTUm6b5fnASD1ojQFXnKH1RnlvVVWbXCbEk4muhiUP5hCyxk8C87RqtDVNeUsUwPdnsO+ooUsHdRPk8Jua97z7XJekfHLWX3dxrPAKDXBhvyjbUY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=D2qoC6O7; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="D2qoC6O7" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4428uIDQ024281; Thu, 2 May 2024 09:04:07 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=56YwCakw/N/Wc/uAVUqHrPlre6xDW45zzKL9YBLI5ZE=; b=D2 qoC6O7FH4Ul09kIEB4WfbywXfx4/A03nZ51YBBbTwCReLsE5/8xepl4faDbN/DxT Ok6bWrylq9jewUheUWEIuq2jfQtV/6vKCxr5jvjEjK+ohVdmlTzVuWgTqDqiUWVr WlJonHAWDqyduSeZ7XCdvO/EWFm593hKkmP29n4F3DhIgnsjw8bV49MuWLx4wKRF cCF2MUkYKatsphC7fb+mSfOIhFgeJnQD5vFIcoNt/qgggdSZHUh0Vg11ym4NXpu5 MjryeN/lw8IPSo2TVnRjhmJ2DwcEY5cYnGlv2AanpyjUmXCYGstRneMnMhUaYFaE 7rY4Wzf0axDQYLJ25PUg== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3xud76axmh-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 02 May 2024 09:04:06 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 442945EU004937 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 2 May 2024 09:04:05 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 2 May 2024 02:04:00 -0700 From: Komal Bajaj To: Bjorn Andersson , Konrad Dybcio , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Bjorn Andersson , , , Jack Pham , Krishna Kurapati PSSNV , Komal Bajaj , Amrit Anand Subject: [PATCH v3 3/3] arm64: dts: qcom: qru1000-idp: enable USB nodes Date: Thu, 2 May 2024 14:33:26 +0530 Message-ID: <20240502090326.21489-4-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240502090326.21489-1-quic_kbajaj@quicinc.com> References: <20240502090326.21489-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: qruT8GfQ36aZWrjg0pEqTNA5jdVeS7Yc X-Proofpoint-GUID: qruT8GfQ36aZWrjg0pEqTNA5jdVeS7Yc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-01_16,2024-05-02_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 suspectscore=0 malwarescore=0 phishscore=0 spamscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 bulkscore=0 mlxscore=0 lowpriorityscore=0 mlxlogscore=388 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2405020053 Enable both USB controllers and associated hsphy and qmp phy nodes on QRU1000 IDP. Co-developed-by: Amrit Anand Signed-off-by: Amrit Anand Signed-off-by: Komal Bajaj --- arch/arm64/boot/dts/qcom/qru1000-idp.dts | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) -- 2.42.0 diff --git a/arch/arm64/boot/dts/qcom/qru1000-idp.dts b/arch/arm64/boot/dts/qcom/qru1000-idp.dts index 2a862c83309e..1c781d9e24cf 100644 --- a/arch/arm64/boot/dts/qcom/qru1000-idp.dts +++ b/arch/arm64/boot/dts/qcom/qru1000-idp.dts @@ -467,3 +467,26 @@ &tlmm { &uart7 { status = "okay"; }; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&usb_1_hsphy { + vdda-pll-supply = <&vreg_l8a_0p91>; + vdda18-supply = <&vreg_l14a_1p8>; + vdda33-supply = <&vreg_l2a_2p3>; + + status = "okay"; +}; + +&usb_1_qmpphy { + vdda-phy-supply = <&vreg_l8a_0p91>; + vdda-pll-supply = <&vreg_l3a_1p2>; + + status = "okay"; +};