From patchwork Mon May 6 03:49:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 13654901 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 357CA3E462; Mon, 6 May 2024 04:17:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714969064; cv=none; b=sXin694aHw2As7vVFxRIliATnqfPyX0UwFy8azztQp7pISDTvJbwUizKPCP8f12hS7jYgYZUDX8trFsxkidKQdd1QmdLNbZu810/A3FYs1PXsV18x7DtcEpk1cZeAkwXh/lZ9OWDlQ3kPDInd31oqud24NdQfm1fcb9+eD5T5jE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714969064; c=relaxed/simple; bh=TzUV4Bs4H8jIHBvaoHFp0CU+YT2lsaLKJRDLCI8Oy0E=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=GdHceooJrHdt5AnogoIiEXqrw9Eh8OxWz3iBRCela8LmDlWBsgaCr31qYxMxTVheGgGLjdvFRJ2xnEuiy4Xy5yDkbmcp5UA8RR6tSy8GLyseAL96D/IbQZWDXklhfjYuopgl+aMXb/auLN5SUHIDfSYmKI3j2QRS7m//dpG2zZM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 36A9B200370; Mon, 6 May 2024 06:08:17 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id DDA5520032E; Mon, 6 May 2024 06:08:16 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 90088181D0F9; Mon, 6 May 2024 12:08:14 +0800 (+08) From: Shengjiu Wang To: abelvesa@kernel.org, peng.fan@nxp.com, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, marex@denx.de, imx@lists.linux.dev, shengjiu.wang@gmail.com Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 1/4] dt-bindings: clock: imx8mp: Add #reset-cells property Date: Mon, 6 May 2024 11:49:16 +0800 Message-Id: <1714967359-27905-2-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1714967359-27905-1-git-send-email-shengjiu.wang@nxp.com> References: <1714967359-27905-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Make audiomix block control a reset provider for Enhanced Audio Return Channel (eARC). Signed-off-by: Shengjiu Wang --- Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml b/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml index 0a6dc1a6e122..6588a17a7d9a 100644 --- a/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml +++ b/Documentation/devicetree/bindings/clock/imx8mp-audiomix.yaml @@ -44,6 +44,9 @@ properties: ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h for the full list of i.MX8MP IMX8MP_CLK_AUDIOMIX_ clock IDs. + '#reset-cells': + const: 1 + required: - compatible - reg From patchwork Mon May 6 03:49:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 13654900 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A79454438F; Mon, 6 May 2024 04:17:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714969064; cv=none; b=JvB0bDK4Tdlwx2ZMRLaaUuKXuSxq7912SDOdN7sEAJi3rbu5ojK4jtS9Da3/xYCS4B6cOW18ByFhjYrnqz5KQHLyXyDwwkiis7ZpEYAEomCaIB4FdxUh4xGoF8hk07+1fuuTP+hOQ2GicFtRZ+J8cztBNKPJQ+0JQZFiOgGTkcQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714969064; c=relaxed/simple; bh=4CEjQSYX3GXUZ4ocoRPzhRwNngXzTisWUSOPcHSJ/4o=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=uTcUsWZtQvtMsCDMMWSZWkiAWuYHyNWhHT8v2a+ScqgTnGBTP24hC1sOJfowd/lNBrZ3T/ATd061Jnd+fcW9UsvhsHDgEmHyGPjYwWGoaJ453gr58XiD3Cvv0NTxpqu7Q/Tdm2m3XqDrWPdecQOiKd276ODChb5WpAzGVq1XO0g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 05FDB200444; Mon, 6 May 2024 06:08:19 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 6B81B20032E; Mon, 6 May 2024 06:08:18 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 29905181D0FD; Mon, 6 May 2024 12:08:16 +0800 (+08) From: Shengjiu Wang To: abelvesa@kernel.org, peng.fan@nxp.com, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, marex@denx.de, imx@lists.linux.dev, shengjiu.wang@gmail.com Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/4] clk: imx: clk-audiomix: Add reset controller Date: Mon, 6 May 2024 11:49:17 +0800 Message-Id: <1714967359-27905-3-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1714967359-27905-1-git-send-email-shengjiu.wang@nxp.com> References: <1714967359-27905-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Audiomix block control can be a reset controller for Enhanced Audio Return Channel (eARC). The eARC PHY software reset and eARC controller software reset can be supported. Signed-off-by: Shengjiu Wang --- drivers/clk/imx/clk-imx8mp-audiomix.c | 82 +++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c index ae2c0f254225..58630b521e67 100644 --- a/drivers/clk/imx/clk-imx8mp-audiomix.c +++ b/drivers/clk/imx/clk-imx8mp-audiomix.c @@ -14,6 +14,7 @@ #include #include #include +#include #include @@ -36,6 +37,8 @@ #define SAI_PLL_MNIT_CTL 0x410 #define IPG_LP_CTRL 0x504 +#define EARC_RESET_MASK 0x3 + #define SAIn_MCLK1_PARENT(n) \ static const struct clk_parent_data \ clk_imx8mp_audiomix_sai##n##_mclk1_parents[] = { \ @@ -213,6 +216,7 @@ static const u16 audiomix_regs[] = { struct clk_imx8mp_audiomix_priv { void __iomem *base; u32 regs_save[ARRAY_SIZE(audiomix_regs)]; + struct reset_controller_dev rcdev; /* Must be last */ struct clk_hw_onecell_data clk_data; @@ -233,6 +237,80 @@ static void clk_imx8mp_audiomix_save_restore(struct device *dev, bool save) } } +static int clk_imx8mp_audiomix_reset_set(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) +{ + struct clk_imx8mp_audiomix_priv *drvdata = container_of(rcdev, + struct clk_imx8mp_audiomix_priv, rcdev); + unsigned int mask = BIT(id); + u32 reg; + + pm_runtime_get_sync(rcdev->dev); + + /* bit = 0 reset, bit = 1 unreset */ + reg = readl(drvdata->base + EARC); + if (assert) + writel(reg & ~mask, drvdata->base + EARC); + else + writel(reg | mask, drvdata->base + EARC); + + pm_runtime_put_sync(rcdev->dev); + + return 0; +} + +static int clk_imx8mp_audiomix_reset_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + clk_imx8mp_audiomix_reset_set(rcdev, id, true); + + return clk_imx8mp_audiomix_reset_set(rcdev, id, false); +} + +static int clk_imx8mp_audiomix_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return clk_imx8mp_audiomix_reset_set(rcdev, id, true); +} + +static int clk_imx8mp_audiomix_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + return clk_imx8mp_audiomix_reset_set(rcdev, id, false); +} + +static int clk_imx8mp_audiomix_reset_xlate(struct reset_controller_dev *rcdev, + const struct of_phandle_args *reset_spec) +{ + unsigned long id = reset_spec->args[0]; + + if (!(BIT(id) & EARC_RESET_MASK)) + return -EINVAL; + + return id; +} + +static const struct reset_control_ops clk_imx8mp_audiomix_reset_ops = { + .reset = clk_imx8mp_audiomix_reset_reset, + .assert = clk_imx8mp_audiomix_reset_assert, + .deassert = clk_imx8mp_audiomix_reset_deassert, +}; + +static int clk_imx8mp_audiomix_register_reset_controller(struct device *dev) +{ + struct clk_imx8mp_audiomix_priv *drvdata = dev_get_drvdata(dev); + + drvdata->rcdev.owner = THIS_MODULE; + drvdata->rcdev.nr_resets = fls(EARC_RESET_MASK); + drvdata->rcdev.ops = &clk_imx8mp_audiomix_reset_ops; + drvdata->rcdev.of_node = dev->of_node; + drvdata->rcdev.dev = dev; + drvdata->rcdev.of_reset_n_cells = 1; + drvdata->rcdev.of_xlate = clk_imx8mp_audiomix_reset_xlate; + + return devm_reset_controller_register(dev, &drvdata->rcdev); +} + static int clk_imx8mp_audiomix_probe(struct platform_device *pdev) { struct clk_imx8mp_audiomix_priv *priv; @@ -338,6 +416,10 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev) if (ret) goto err_clk_register; + ret = clk_imx8mp_audiomix_register_reset_controller(dev); + if (ret) + goto err_clk_register; + pm_runtime_put_sync(dev); return 0; From patchwork Mon May 6 03:49:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 13654899 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6B40D43AD4; Mon, 6 May 2024 04:17:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714969063; cv=none; b=eyLbKChgHk6Dlsz13nFdwhyYDvxC0eqlVu1jbMSfKXnMeKhSIlpe4EZQfWDwHxiiCL2KLu7PbpiE+8UufLxPuni2RSRoOjh/8N+5fKQ2FNpUQVlLFElb71qlW+aCBu8bfIj2GRfEy9qWJrALun8u9UEZevy7hzrK9lTGyHnQGrQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Mon, 6 May 2024 06:08:19 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id ABBE9181D0F9; Mon, 6 May 2024 12:08:17 +0800 (+08) From: Shengjiu Wang To: abelvesa@kernel.org, peng.fan@nxp.com, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, marex@denx.de, imx@lists.linux.dev, shengjiu.wang@gmail.com Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 3/4] clk: imx: clk-audiomix: Add CLK_SET_RATE_PARENT flags for clocks Date: Mon, 6 May 2024 11:49:18 +0800 Message-Id: <1714967359-27905-4-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1714967359-27905-1-git-send-email-shengjiu.wang@nxp.com> References: <1714967359-27905-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Add CLK_SET_RATE_PARENT flags that when the device driver sets the child clock rate, parent clock frequency can be refined accordingly. Signed-off-by: Shengjiu Wang --- drivers/clk/imx/clk-imx8mp-audiomix.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c index 58630b521e67..6c888abcc6b5 100644 --- a/drivers/clk/imx/clk-imx8mp-audiomix.c +++ b/drivers/clk/imx/clk-imx8mp-audiomix.c @@ -348,12 +348,12 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev) for (i = 0; i < ARRAY_SIZE(sels); i++) { if (sels[i].num_parents == 1) { hw = devm_clk_hw_register_gate_parent_data(dev, - sels[i].name, &sels[i].parent, 0, + sels[i].name, &sels[i].parent, CLK_SET_RATE_PARENT, base + sels[i].reg, sels[i].shift, 0, NULL); } else { hw = devm_clk_hw_register_mux_parent_data_table(dev, sels[i].name, sels[i].parents, - sels[i].num_parents, 0, + sels[i].num_parents, CLK_SET_RATE_PARENT, base + sels[i].reg, sels[i].shift, sels[i].width, 0, NULL, NULL); @@ -396,7 +396,8 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev) clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_BYPASS] = hw; hw = devm_clk_hw_register_gate(dev, "sai_pll_out", "sai_pll_bypass", - 0, base + SAI_PLL_GNRL_CTL, 13, + CLK_SET_RATE_PARENT, + base + SAI_PLL_GNRL_CTL, 13, 0, NULL); if (IS_ERR(hw)) { ret = PTR_ERR(hw); @@ -405,7 +406,8 @@ static int clk_imx8mp_audiomix_probe(struct platform_device *pdev) clk_hw_data->hws[IMX8MP_CLK_AUDIOMIX_SAI_PLL_OUT] = hw; hw = devm_clk_hw_register_fixed_factor(dev, "sai_pll_out_div2", - "sai_pll_out", 0, 1, 2); + "sai_pll_out", + CLK_SET_RATE_PARENT, 1, 2); if (IS_ERR(hw)) { ret = PTR_ERR(hw); goto err_clk_register; From patchwork Mon May 6 03:49:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 13654898 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4715043AD2; Mon, 6 May 2024 04:17:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=92.121.34.21 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714969063; cv=none; b=cer9mgfUXiYlM45bGA/KUuzZMm5VlvsjkCYewPTX9GGlI3QWJZiKqMyWG5orng2RmKi3Ygk/QVRLf1ewRhUsnhICuSERk78wITTFZKM8edlR6ok+kaPkLCGC+To/b+GmFC4Nc+lWNZYaphTr2aZJxFxJBqyb/k2fCUYZym5q0YE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1714969063; c=relaxed/simple; bh=8AkZow0zy3cCykY5vOkTm58WsUldiO/7qubT1gZKeV4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=adeBdNWo9BKjewwpGooeMbcA1BS8MmjiwqFiDAqJtgZ5kg2dXeoafdV9tKCAZ+8T0eSk9HtCT1cpgshaWjhmVCk+xcfAiC1RUiuX8Bwg0d9OYvVzDIiIIUj7dDf8TmgVg15pLbP645bD2iE1V9biIPmau2mpk9CAl5Ai6LKb9n0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; arc=none smtp.client-ip=92.121.34.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 5078620032E; Mon, 6 May 2024 06:08:21 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 03CCD20093C; Mon, 6 May 2024 06:08:21 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 3E342181D0F8; Mon, 6 May 2024 12:08:19 +0800 (+08) From: Shengjiu Wang To: abelvesa@kernel.org, peng.fan@nxp.com, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, marex@denx.de, imx@lists.linux.dev, shengjiu.wang@gmail.com Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 4/4] clk: imx: clk-audiomix: Corrent parent clock for earc_phy and audpll Date: Mon, 6 May 2024 11:49:19 +0800 Message-Id: <1714967359-27905-5-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1714967359-27905-1-git-send-email-shengjiu.wang@nxp.com> References: <1714967359-27905-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: According to Reference Manual, The parent clock of "earc_phy" is "sai_pll_out_div2", The parent clock of "audpll" is "osc_24m". Fixes: 6cd95f7b151c ("clk: imx: imx8mp: Add audiomix block control") Signed-off-by: Shengjiu Wang --- drivers/clk/imx/clk-imx8mp-audiomix.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/clk/imx/clk-imx8mp-audiomix.c b/drivers/clk/imx/clk-imx8mp-audiomix.c index 6c888abcc6b5..ec6e175394e4 100644 --- a/drivers/clk/imx/clk-imx8mp-audiomix.c +++ b/drivers/clk/imx/clk-imx8mp-audiomix.c @@ -158,6 +158,15 @@ static const struct clk_parent_data clk_imx8mp_audiomix_pll_bypass_sels[] = { PDM_SEL, 2, 0 \ } +#define CLK_GATE_PARENT(gname, cname, pname) \ + { \ + gname"_cg", \ + IMX8MP_CLK_AUDIOMIX_##cname, \ + { .fw_name = pname, .name = pname }, NULL, 1, \ + CLKEN0 + 4 * !!(IMX8MP_CLK_AUDIOMIX_##cname / 32), \ + 1, IMX8MP_CLK_AUDIOMIX_##cname % 32 \ + } + struct clk_imx8mp_audiomix_sel { const char *name; int clkid; @@ -175,14 +184,14 @@ static struct clk_imx8mp_audiomix_sel sels[] = { CLK_GATE("earc", EARC_IPG), CLK_GATE("ocrama", OCRAMA_IPG), CLK_GATE("aud2htx", AUD2HTX_IPG), - CLK_GATE("earc_phy", EARC_PHY), + CLK_GATE_PARENT("earc_phy", EARC_PHY, "sai_pll_out_div2"), CLK_GATE("sdma2", SDMA2_ROOT), CLK_GATE("sdma3", SDMA3_ROOT), CLK_GATE("spba2", SPBA2_ROOT), CLK_GATE("dsp", DSP_ROOT), CLK_GATE("dspdbg", DSPDBG_ROOT), CLK_GATE("edma", EDMA_ROOT), - CLK_GATE("audpll", AUDPLL_ROOT), + CLK_GATE_PARENT("audpll", AUDPLL_ROOT, "osc_24m"), CLK_GATE("mu2", MU2_ROOT), CLK_GATE("mu3", MU3_ROOT), CLK_PDM,