From patchwork Mon May 6 16:15:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13655709 X-Patchwork-Delegate: kw@linux.com Received: from out-183.mta0.migadu.com (out-183.mta0.migadu.com [91.218.175.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B99F3156864 for ; Mon, 6 May 2024 16:15:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.183 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012131; cv=none; b=eLEPbH3KECOn6Q7rKDcRYrRGiukLsCcVBgi20xuTjXJq3gYBtGlNAYFX/rorFZdUoiiYtIvM7acm0iG6LKuAheZoZex1K3oNvwKDhSomsL6aAaAWJLPHGek0kCv4EFJ8b+sfuGeemscw8cmOZHiVdOaCV9ETAKhlKoIdpm2Yst8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012131; c=relaxed/simple; bh=TyVattB9P0e8t5wNQ0gFDVFIeSr9GsPdV2eaRo2WGrE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qikCN4ju3ZuO6o5IoKYwH40DhdfJYUduOsfv/2zSBExeDbpnFr8fPlDebSajsqosrtzdqQt99kd8SXRQf1qTe8lTOgAhr5iG5o6mkE3snUtT2KINOL0vzz6Qz0jZxddULFG9XJF09jNdwam7bqGo+sot68LuztPbDt0RQsR2B3Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=OQ6tviJw; arc=none smtp.client-ip=91.218.175.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="OQ6tviJw" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1715012127; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=b+3dT2d6ER0IlCAsSUbORGIL1TSfGEpzpmkwOt0cz4c=; b=OQ6tviJwGSEY0TWJ3+kEBSIEDqs2zfHC3tbET9g3HdLstFkr1B1N2IrDSCopVx2fYtmlZv nHrXvRullyq92bsuUKlc0EnRNiFjKgqFNPxlAUUGjQJ8RJ5ifkBqzq5DmSoFCAQtU9JpH9 2CHk6kpLFtpSAzPU/iSHqDbCfsr0U/k= From: Sean Anderson To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Bjorn Helgaas , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sean Anderson , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org Subject: [PATCH v2 1/7] dt-bindings: pci: xilinx-nwl: Add phys Date: Mon, 6 May 2024 12:15:04 -0400 Message-Id: <20240506161510.2841755-2-sean.anderson@linux.dev> In-Reply-To: <20240506161510.2841755-1-sean.anderson@linux.dev> References: <20240506161510.2841755-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Add phys properties so Linux can power-on/configure the GTR transcievers. Signed-off-by: Sean Anderson --- Changes in v2: - Remove phy-names - Add an example Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml index 426f90a47f35..693b29039a9b 100644 --- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml @@ -61,6 +61,10 @@ properties: interrupt-map: maxItems: 4 + phys: + minItems: 1 + maxItems: 4 + power-domains: maxItems: 1 @@ -110,6 +114,7 @@ examples: - | #include #include + #include #include soc { #address-cells = <2>; @@ -138,6 +143,7 @@ examples: <0x0 0x0 0x0 0x3 &pcie_intc 0x3>, <0x0 0x0 0x0 0x4 &pcie_intc 0x4>; msi-parent = <&nwl_pcie>; + phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>; power-domains = <&zynqmp_firmware PD_PCIE>; iommus = <&smmu 0x4d0>; pcie_intc: legacy-interrupt-controller { From patchwork Mon May 6 16:15:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13655710 X-Patchwork-Delegate: kw@linux.com Received: from out-180.mta0.migadu.com (out-180.mta0.migadu.com [91.218.175.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEE8B156C69 for ; Mon, 6 May 2024 16:15:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012133; cv=none; b=ZQV3IjRfM/bljcKzk/eHc02AYcpgM26UOIklZ3o1aud485ubq/fZzN2KiPcAau8EaVL0fBnbYoOh+EzUIs3VILidht4Yyagdnki9YF/Dhb1+jrgyABFWHSOfD2BiYbHlet7o+iYoeAV2eKRy1yGOinma7df2J6HCneLkufCBRpo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012133; c=relaxed/simple; bh=ioA0HGN434X5LfI1Q/glCw84Ax+UD4cQobrMiTiDEoA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=m5KiDLUATfvklgoRet7pC3sAxMOEyCvfOCjFbL+V2J4SyrTn6CJ616QMBT9WDudmrZc6UQGN+rkw3nxYG4cCzaMhaAdU1uwRR3d7TTV3Sd1cUyf0wLQ4ELxsreedo5yv0d3X5x6eLfD/K1Lk6s3vM01Ta7APXFow4VpRZBj8tKI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=AGn0twPM; arc=none smtp.client-ip=91.218.175.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="AGn0twPM" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1715012130; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VQg5GnmyntnuTwJSymksMsk4lzmwO9PWXcLwJAirNTY=; b=AGn0twPM8mhmFzjce9Zg2phkoHLhsynNSoenjc+yvob6ogHFKyDXBJ5jm95zPqJV9dUG6C kwUGkz+9MaNPaQ4ZohphRJqe4u+HUmnSNLMd60Y9K89mdC00o9MT6zuFaxOer+NnVxX4K0 nkfkWmKUmv0kColXIUOYIIvPe2dpof8= From: Sean Anderson To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Bjorn Helgaas , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sean Anderson , stable@vger.kernel.org, Bharat Kumar Gogada Subject: [PATCH v2 2/7] PCI: xilinx-nwl: Fix off-by-one Date: Mon, 6 May 2024 12:15:05 -0400 Message-Id: <20240506161510.2841755-3-sean.anderson@linux.dev> In-Reply-To: <20240506161510.2841755-1-sean.anderson@linux.dev> References: <20240506161510.2841755-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT IRQs start at 0, so we don't need to subtract 1. Fixes: 9a181e1093af ("PCI: xilinx-nwl: Modify IRQ chip for legacy interrupts") Cc: Signed-off-by: Sean Anderson --- (no changes since v1) drivers/pci/controller/pcie-xilinx-nwl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index 0408f4d612b5..437927e3bcca 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -371,7 +371,7 @@ static void nwl_mask_intx_irq(struct irq_data *data) u32 mask; u32 val; - mask = 1 << (data->hwirq - 1); + mask = 1 << data->hwirq; raw_spin_lock_irqsave(&pcie->leg_mask_lock, flags); val = nwl_bridge_readl(pcie, MSGF_LEG_MASK); nwl_bridge_writel(pcie, (val & (~mask)), MSGF_LEG_MASK); @@ -385,7 +385,7 @@ static void nwl_unmask_intx_irq(struct irq_data *data) u32 mask; u32 val; - mask = 1 << (data->hwirq - 1); + mask = 1 << data->hwirq; raw_spin_lock_irqsave(&pcie->leg_mask_lock, flags); val = nwl_bridge_readl(pcie, MSGF_LEG_MASK); nwl_bridge_writel(pcie, (val | mask), MSGF_LEG_MASK); From patchwork Mon May 6 16:15:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13655711 X-Patchwork-Delegate: kw@linux.com Received: from out-178.mta0.migadu.com (out-178.mta0.migadu.com [91.218.175.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A791155757 for ; Mon, 6 May 2024 16:15:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012135; cv=none; b=HsUhyLTId3P0tcBr3nO8jAXJmSEN5afh06TedDmVy5dOhVj7FxpWlOho6roagCTyk8aX5lmpheiGi+CsAB7iv06DkTIKAw2Q4J1SII52zOeIXeuhGnTNeBxGfelRfBR/eWD9pcTkBKyjRQ0v4rqsMYW453ySUKg8qEgKXJcoPUs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012135; c=relaxed/simple; bh=R6C/JcAy4XUIj+2mid0YFJ1dW39G3VQ8kRlz1b3tSQ8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=PEscBlt9fFBRNoUZgaVa+10+7g4+FwQba3ycuoYtVhJGiImni9natxVbuxWLq7djwEAeTBeciWrpo0wCUBV3MRro509TjeMvwz4NGtuNZc3NMgCbd3TrRMRUxlwfP2sxj86PoJO2j1GRFCVzDgiyQ62VSuW4yuooWwt+pnMFdoo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=UmNnAkZt; arc=none smtp.client-ip=91.218.175.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="UmNnAkZt" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1715012132; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=h+uuIXz4xj0FsFVOIz/Umf+nSIXJTEGtc5WA6Ask/xo=; b=UmNnAkZt69uncR2bK65N3nLGjWNQelPZuzR+EvIbgyA1A3HHhfV2Wp22U1ArZ63ws2g9qB D24jz0VCKxhn7FgBs+asHT8kCCYIj446WQ89OkW/VZReFL9+hd3c0xHBPO9VoUTpcq5yRH A+9c4s8uS9ungOaEFzBLYtPNsFQgyFw= From: Sean Anderson To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Bjorn Helgaas , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sean Anderson Subject: [PATCH v2 3/7] PCI: xilinx-nwl: Fix register misspelling Date: Mon, 6 May 2024 12:15:06 -0400 Message-Id: <20240506161510.2841755-4-sean.anderson@linux.dev> In-Reply-To: <20240506161510.2841755-1-sean.anderson@linux.dev> References: <20240506161510.2841755-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT MSIC -> MISC Fixes: c2a7ff18edcd ("PCI: xilinx-nwl: Expand error logging") Signed-off-by: Sean Anderson --- (no changes since v1) drivers/pci/controller/pcie-xilinx-nwl.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index 437927e3bcca..ce881baac6d8 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -80,8 +80,8 @@ #define MSGF_MISC_SR_NON_FATAL_DEV BIT(22) #define MSGF_MISC_SR_FATAL_DEV BIT(23) #define MSGF_MISC_SR_LINK_DOWN BIT(24) -#define MSGF_MSIC_SR_LINK_AUTO_BWIDTH BIT(25) -#define MSGF_MSIC_SR_LINK_BWIDTH BIT(26) +#define MSGF_MISC_SR_LINK_AUTO_BWIDTH BIT(25) +#define MSGF_MISC_SR_LINK_BWIDTH BIT(26) #define MSGF_MISC_SR_MASKALL (MSGF_MISC_SR_RXMSG_AVAIL | \ MSGF_MISC_SR_RXMSG_OVER | \ @@ -96,8 +96,8 @@ MSGF_MISC_SR_NON_FATAL_DEV | \ MSGF_MISC_SR_FATAL_DEV | \ MSGF_MISC_SR_LINK_DOWN | \ - MSGF_MSIC_SR_LINK_AUTO_BWIDTH | \ - MSGF_MSIC_SR_LINK_BWIDTH) + MSGF_MISC_SR_LINK_AUTO_BWIDTH | \ + MSGF_MISC_SR_LINK_BWIDTH) /* Legacy interrupt status mask bits */ #define MSGF_LEG_SR_INTA BIT(0) @@ -299,10 +299,10 @@ static irqreturn_t nwl_pcie_misc_handler(int irq, void *data) if (misc_stat & MSGF_MISC_SR_FATAL_DEV) dev_err(dev, "Fatal Error Detected\n"); - if (misc_stat & MSGF_MSIC_SR_LINK_AUTO_BWIDTH) + if (misc_stat & MSGF_MISC_SR_LINK_AUTO_BWIDTH) dev_info(dev, "Link Autonomous Bandwidth Management Status bit set\n"); - if (misc_stat & MSGF_MSIC_SR_LINK_BWIDTH) + if (misc_stat & MSGF_MISC_SR_LINK_BWIDTH) dev_info(dev, "Link Bandwidth Management Status bit set\n"); /* Clear misc interrupt status */ From patchwork Mon May 6 16:15:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13655712 X-Patchwork-Delegate: kw@linux.com Received: from out-171.mta0.migadu.com (out-171.mta0.migadu.com [91.218.175.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DFF29156665 for ; Mon, 6 May 2024 16:15:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012137; cv=none; b=IjlBMTXazbGEfpMnqbdeWfNg2hJnEpfnT/aW6hK+uQqnOWoop8X8INaQyUIUGA5dipv7Nwigkj80M+/gsuIwAdu1IYfIDunUrw4qHNHFF/Pv8+D5w4wjehnPlqNnG7EdpMCHyKhzCGTlcTDvmYV1KEYwMJpa7bEzzEscfMyIOX8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012137; c=relaxed/simple; bh=Z1/InqPro1U0+pj2thLeLheiLnUhwHnjffb+hYMRUik=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BNQhS7wxEgzLWvgzAMLvoPuPhlpRO1CUBlDL8y9t9F37TMZaNemx16fSskpdKhpeiWyqwkFgeGjc9a+4a7v1l8gGo8kCUtR1oXB74Bc5Z3+DkWxICXiZXrnvwiZ1cOq92lFjCgJZ05B7453kFU11C7adYUQKaGCR59RMAVx6b7k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=V8HnOUT/; arc=none smtp.client-ip=91.218.175.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="V8HnOUT/" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1715012134; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aQwH77/vqcL6nAroUqOCPsVDtJd7S7+cLJcYruhNakw=; b=V8HnOUT/VokwW+uYWJOISqr2V5v6Hx9Xoch5AKCRFlN5KF9ZmcjEHTt060RfbQ2OyloYl0 ulGRfNMLiLhxQ39fynU7VsQN3xOB4F++inlb8uUHUllvZCCTQmyTrtrBGnDz3rG6hdLDJs VVEciYL6NT/6ir8pzFieDDiO7D1GnU8= From: Sean Anderson To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Bjorn Helgaas , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sean Anderson Subject: [PATCH v2 4/7] PCI: xilinx-nwl: Rate-limit misc interrupt messages Date: Mon, 6 May 2024 12:15:07 -0400 Message-Id: <20240506161510.2841755-5-sean.anderson@linux.dev> In-Reply-To: <20240506161510.2841755-1-sean.anderson@linux.dev> References: <20240506161510.2841755-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT The conditions logged by the misc interrupt can occur repeatedly and continuously. Avoid rendering the console unusable by rate-limiting these messages. Signed-off-by: Sean Anderson --- (no changes since v1) drivers/pci/controller/pcie-xilinx-nwl.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index ce881baac6d8..c0a60cebdb2e 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -267,37 +267,37 @@ static irqreturn_t nwl_pcie_misc_handler(int irq, void *data) return IRQ_NONE; if (misc_stat & MSGF_MISC_SR_RXMSG_OVER) - dev_err(dev, "Received Message FIFO Overflow\n"); + dev_err_ratelimited(dev, "Received Message FIFO Overflow\n"); if (misc_stat & MSGF_MISC_SR_SLAVE_ERR) - dev_err(dev, "Slave error\n"); + dev_err_ratelimited(dev, "Slave error\n"); if (misc_stat & MSGF_MISC_SR_MASTER_ERR) - dev_err(dev, "Master error\n"); + dev_err_ratelimited(dev, "Master error\n"); if (misc_stat & MSGF_MISC_SR_I_ADDR_ERR) - dev_err(dev, "In Misc Ingress address translation error\n"); + dev_err_ratelimited(dev, "In Misc Ingress address translation error\n"); if (misc_stat & MSGF_MISC_SR_E_ADDR_ERR) - dev_err(dev, "In Misc Egress address translation error\n"); + dev_err_ratelimited(dev, "In Misc Egress address translation error\n"); if (misc_stat & MSGF_MISC_SR_FATAL_AER) - dev_err(dev, "Fatal Error in AER Capability\n"); + dev_err_ratelimited(dev, "Fatal Error in AER Capability\n"); if (misc_stat & MSGF_MISC_SR_NON_FATAL_AER) - dev_err(dev, "Non-Fatal Error in AER Capability\n"); + dev_err_ratelimited(dev, "Non-Fatal Error in AER Capability\n"); if (misc_stat & MSGF_MISC_SR_CORR_AER) - dev_err(dev, "Correctable Error in AER Capability\n"); + dev_err_ratelimited(dev, "Correctable Error in AER Capability\n"); if (misc_stat & MSGF_MISC_SR_UR_DETECT) - dev_err(dev, "Unsupported request Detected\n"); + dev_err_ratelimited(dev, "Unsupported request Detected\n"); if (misc_stat & MSGF_MISC_SR_NON_FATAL_DEV) - dev_err(dev, "Non-Fatal Error Detected\n"); + dev_err_ratelimited(dev, "Non-Fatal Error Detected\n"); if (misc_stat & MSGF_MISC_SR_FATAL_DEV) - dev_err(dev, "Fatal Error Detected\n"); + dev_err_ratelimited(dev, "Fatal Error Detected\n"); if (misc_stat & MSGF_MISC_SR_LINK_AUTO_BWIDTH) dev_info(dev, "Link Autonomous Bandwidth Management Status bit set\n"); From patchwork Mon May 6 16:15:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13655713 X-Patchwork-Delegate: kw@linux.com Received: from out-182.mta0.migadu.com (out-182.mta0.migadu.com [91.218.175.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CB1E15664D for ; Mon, 6 May 2024 16:15:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012139; cv=none; b=dmkDnxw+MZcgiil01ddXnkeaEOzgIbYF/0Z9+VlIxclB7KpUYT7MxmcGEMcO4xTLT7rJz5qEcT5eUraMXkSIUHw4ZGZx5CzGKUnuHl+w/9x35L0RIx1g8vIsDfJobPHnqKr6tPkIGlSfTZkTzLz4dAVg7fbU9JvoF+hieTH10YI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012139; c=relaxed/simple; bh=zUjxErAfNxsRNkAthkqFDhI6NogrjhKQNib6awNIKNc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Dj66hCtnFzm+ub4ys3xJfJ+62l3jF70Ymc9qfFdPv9cIGEBL2WkKqRZef6QUZSMhKzJsB0oFt8zsj4P3fXlU3/XhjMdzC9ggHCaP2Fz5HlDHAtXCEX3lRRIOUBc9n9Hps9ZB5XtYxIeOlfI4LUlNMuvLh9INVA7VGsA0lZWKhtA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=beKg6+up; arc=none smtp.client-ip=91.218.175.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="beKg6+up" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1715012136; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vtlPUzut99fgqzwIOlVSGdtokjNewldmjFQ9baMdh6A=; b=beKg6+up+zeyc8oCa+O2DfND2aDcOLe9OAGt/ipw2zvOqryyv9MZuXQ1PWKJEshAbUcNQk 9mz4D8Rl9/1ZBN38EBGquhMW0CZ9uI579Lcj1QEc1QGjp9bNJMgigGh3ZUUZTIVugu0ivX fQI57+BYBLoTFKdl82MjJYMmUk8lKkY= From: Sean Anderson To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Bjorn Helgaas , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sean Anderson , Bharat Kumar Gogada , Lorenzo Pieralisi , Michal Simek Subject: [PATCH v2 5/7] PCI: xilinx-nwl: Clean up clock on probe failure/removal Date: Mon, 6 May 2024 12:15:08 -0400 Message-Id: <20240506161510.2841755-6-sean.anderson@linux.dev> In-Reply-To: <20240506161510.2841755-1-sean.anderson@linux.dev> References: <20240506161510.2841755-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Make sure we turn off the clock on probe failure and device removal. Fixes: de0a01f52966 ("PCI: xilinx-nwl: Enable the clock through CCF") Signed-off-by: Sean Anderson --- (no changes since v1) drivers/pci/controller/pcie-xilinx-nwl.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index c0a60cebdb2e..424cc5a1b4d1 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -779,6 +779,7 @@ static int nwl_pcie_probe(struct platform_device *pdev) return -ENODEV; pcie = pci_host_bridge_priv(bridge); + platform_set_drvdata(pdev, pcie); pcie->dev = dev; @@ -801,13 +802,13 @@ static int nwl_pcie_probe(struct platform_device *pdev) err = nwl_pcie_bridge_init(pcie); if (err) { dev_err(dev, "HW Initialization failed\n"); - return err; + goto err_clk; } err = nwl_pcie_init_irq_domain(pcie); if (err) { dev_err(dev, "Failed creating IRQ Domain\n"); - return err; + goto err_clk; } bridge->sysdata = pcie; @@ -817,11 +818,23 @@ static int nwl_pcie_probe(struct platform_device *pdev) err = nwl_pcie_enable_msi(pcie); if (err < 0) { dev_err(dev, "failed to enable MSI support: %d\n", err); - return err; + goto err_clk; } } - return pci_host_probe(bridge); + err = pci_host_probe(bridge); + +err_clk: + if (err) + clk_disable_unprepare(pcie->clk); + return err; +} + +static void nwl_pcie_remove(struct platform_device *pdev) +{ + struct nwl_pcie *pcie = platform_get_drvdata(pdev); + + clk_disable_unprepare(pcie->clk); } static struct platform_driver nwl_pcie_driver = { @@ -831,5 +844,6 @@ static struct platform_driver nwl_pcie_driver = { .of_match_table = nwl_pcie_of_match, }, .probe = nwl_pcie_probe, + .remove_new = nwl_pcie_remove, }; builtin_platform_driver(nwl_pcie_driver); From patchwork Mon May 6 16:15:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13655714 X-Patchwork-Delegate: kw@linux.com Received: from out-171.mta0.migadu.com (out-171.mta0.migadu.com [91.218.175.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ACB6E156653 for ; Mon, 6 May 2024 16:15:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012141; cv=none; b=SHQyNnFh1OSGbgj1k6XvG6jXxs8u9dvh1SAkzPKY5+z4GREIpUDIcnDBw7+1ofWejntWyhNhAAWbJSZe2aHf8r5xVwOwT0P5EPutLGjhoyZqIoZpCSVIP1hGvF2u6uH3YtqWEB14jolfBxuUDiCpcws4FvOl/CR6FYokvRvScUA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012141; c=relaxed/simple; bh=wMWeRjhSwJ6uSpmrW8+ckHY4I9c54ZmMIivHdPuG4Lg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BWhuFfI5UlbprFzETXx/UM7m5nXFurtodaGIXGdNn+KSI+EjiqDXDwV8TfiMuyqOUsHWtBRjn6Hy+UBwdzJ13l3AoH+aFHNlgUqwory5koERmWdJWcyDyfpL/OFM0ZgH3ksksNZrOe/NTVQnY6O4MslxDOYFmJJqfQE6z4eyTlQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=nAc75tKK; arc=none smtp.client-ip=91.218.175.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="nAc75tKK" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1715012138; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6i/SJ7VatesNXmh/HC9q2B25IAsAKm2+03IxNVFUYGQ=; b=nAc75tKKd/wUpiy5BtEC8Nj/NNVFGHFTXCR9Mvpkjrm/3Xf2/r2KJXsSC+0mFGaXo5W9We yCQX1376TIrLaq8ljEFTP/bBlHny4KTBgKcMiQtF4ExfQ8iKDka1L0BVUQ0fjnXaHQY4LW 12CexWMG0H50ZXw/q3EctaA0SU8bOtY= From: Sean Anderson To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Bjorn Helgaas , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sean Anderson Subject: [PATCH v2 6/7] PCI: xilinx-nwl: Add phy support Date: Mon, 6 May 2024 12:15:09 -0400 Message-Id: <20240506161510.2841755-7-sean.anderson@linux.dev> In-Reply-To: <20240506161510.2841755-1-sean.anderson@linux.dev> References: <20240506161510.2841755-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Add support for enabling/disabling PCIe phys. We can't really do anything about failures in the disable/remove path, so just warn. Signed-off-by: Sean Anderson --- Changes in v2: - Get phys by index and not by name drivers/pci/controller/pcie-xilinx-nwl.c | 68 ++++++++++++++++++++++-- 1 file changed, 65 insertions(+), 3 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index 424cc5a1b4d1..d32cf4247836 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -157,6 +158,7 @@ struct nwl_pcie { void __iomem *breg_base; void __iomem *pcireg_base; void __iomem *ecam_base; + struct phy *phy[4]; phys_addr_t phys_breg_base; /* Physical Bridge Register Base */ phys_addr_t phys_pcie_reg_base; /* Physical PCIe Controller Base */ phys_addr_t phys_ecam_base; /* Physical Configuration Base */ @@ -521,6 +523,43 @@ static int nwl_pcie_init_msi_irq_domain(struct nwl_pcie *pcie) return 0; } +static int nwl_pcie_phy_enable(struct nwl_pcie *pcie) +{ + int i, ret; + + for (i = 0; i < ARRAY_SIZE(pcie->phy); i++) { + ret = phy_init(pcie->phy[i]); + if (ret) + goto err; + + ret = phy_power_on(pcie->phy[i]); + if (ret) { + WARN_ON(phy_exit(pcie->phy[i])); + goto err; + } + } + + return 0; + +err: + while (--i) { + WARN_ON(phy_power_off(pcie->phy[i])); + WARN_ON(phy_exit(pcie->phy[i])); + } + + return ret; +} + +static void nwl_pcie_phy_disable(struct nwl_pcie *pcie) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(pcie->phy); i++) { + WARN_ON(phy_power_off(pcie->phy[i])); + WARN_ON(phy_exit(pcie->phy[i])); + } +} + static int nwl_pcie_init_irq_domain(struct nwl_pcie *pcie) { struct device *dev = pcie->dev; @@ -732,6 +771,7 @@ static int nwl_pcie_parse_dt(struct nwl_pcie *pcie, { struct device *dev = pcie->dev; struct resource *res; + int i; res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "breg"); pcie->breg_base = devm_ioremap_resource(dev, res); @@ -759,6 +799,18 @@ static int nwl_pcie_parse_dt(struct nwl_pcie *pcie, irq_set_chained_handler_and_data(pcie->irq_intx, nwl_pcie_leg_handler, pcie); + + for (i = 0; i < ARRAY_SIZE(pcie->phy); i++) { + pcie->phy[i] = devm_of_phy_get_by_index(dev, dev->of_node, i); + if (PTR_ERR(pcie->phy[i]) == -ENODEV) { + pcie->phy[i] = NULL; + break; + } + + if (IS_ERR(pcie->phy[i])) + return PTR_ERR(pcie->phy[i]); + } + return 0; } @@ -799,16 +851,22 @@ static int nwl_pcie_probe(struct platform_device *pdev) return err; } + err = nwl_pcie_phy_enable(pcie); + if (err) { + dev_err(dev, "could not enable PHYs\n"); + goto err_clk; + } + err = nwl_pcie_bridge_init(pcie); if (err) { dev_err(dev, "HW Initialization failed\n"); - goto err_clk; + goto err_phy; } err = nwl_pcie_init_irq_domain(pcie); if (err) { dev_err(dev, "Failed creating IRQ Domain\n"); - goto err_clk; + goto err_phy; } bridge->sysdata = pcie; @@ -818,12 +876,15 @@ static int nwl_pcie_probe(struct platform_device *pdev) err = nwl_pcie_enable_msi(pcie); if (err < 0) { dev_err(dev, "failed to enable MSI support: %d\n", err); - goto err_clk; + goto err_phy; } } err = pci_host_probe(bridge); +err_phy: + if (err) + nwl_pcie_phy_disable(pcie); err_clk: if (err) clk_disable_unprepare(pcie->clk); @@ -834,6 +895,7 @@ static void nwl_pcie_remove(struct platform_device *pdev) { struct nwl_pcie *pcie = platform_get_drvdata(pdev); + nwl_pcie_phy_disable(pcie); clk_disable_unprepare(pcie->clk); } From patchwork Mon May 6 16:15:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Anderson X-Patchwork-Id: 13655715 X-Patchwork-Delegate: kw@linux.com Received: from out-175.mta0.migadu.com (out-175.mta0.migadu.com [91.218.175.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A1488157E94 for ; Mon, 6 May 2024 16:15:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.218.175.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715012143; cv=none; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1715012140; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Ck8JgZysAqiIqlF+N+8+WdMTAZK/jkIRufdhwHxvwE4=; b=UpPf7Ox7SFE6/WLTzUKvDVSsuy/M5WEJuFj+ZO70agQ5WPL0K2MGVALnPQTfs09ZEJGbEd HprA8xSjWt++oRwyvMRXQ7ULv9gX/siwXF8ZJJVJlLmBIpKTYbsCyhsWl7B0YtmMuNkDIM yQxX3tO1Qfr0Tvl43E3cmXJ0c8Fm38U= From: Sean Anderson To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Rob Herring , linux-pci@vger.kernel.org Cc: Michal Simek , Bjorn Helgaas , Thippeswamy Havalige , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sean Anderson Subject: [PATCH v2 7/7] arm64: zynqmp: Add PCIe phys Date: Mon, 6 May 2024 12:15:10 -0400 Message-Id: <20240506161510.2841755-8-sean.anderson@linux.dev> In-Reply-To: <20240506161510.2841755-1-sean.anderson@linux.dev> References: <20240506161510.2841755-1-sean.anderson@linux.dev> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Add PCIe phy bindings for the ZCU102. Signed-off-by: Sean Anderson Tested-by: thippeswamy.havalige@amd.com --- Changes in v2: - Remove phy-names arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts index ad8f23a0ec67..d2175f3dd099 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts @@ -941,6 +941,7 @@ conf-pull-none { &pcie { status = "okay"; + phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>; }; &psgtr {