From patchwork Wed May 8 15:47:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13658886 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DD8AFC04FFE for ; Wed, 8 May 2024 15:48:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5F9E71122F3; Wed, 8 May 2024 15:48:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="C0XXyb6X"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id AB7DE1122F3 for ; Wed, 8 May 2024 15:48:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715183286; x=1746719286; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JLUZaw8bgm9CFNA9i6A2LxR8jfBnzqShwD2K+VbxKWM=; b=C0XXyb6XAQuYE1Zbi/Ij5CAMTJyEqf3AGF1E7fCvo7bRCBcvgmcZmFOQ +Bz4Ri0VmJbRPF8nD8hYytwOBNMEuVi7ylkCUkxbKFXbaWajqDGuDucci O6FwUgu7Qs1hZcgvzs25F0rUzHoLiVKlvLfiULKDSt7kWtikY3Ci6o4mA Cfm5BlPpWGYumePOqGJXM+f8/lib0jwjRaNwPh+aOMt04sPROWUWduhGZ mdXKjm3f5hJ4KsV0oxiK+yV8rerav0RJ4hirDfjw4KahufgeI2vITlFw+ 6pLru+iUKovYZq+KUMjPMfKxHpWeTuZe55QI10ZlEEcmxiia/FTBH9d0C g==; X-CSE-ConnectionGUID: N2kfPyFLRVO08XXX7llEQg== X-CSE-MsgGUID: 1yKr8UooRyW89ZkK48tPTw== X-IronPort-AV: E=McAfee;i="6600,9927,11067"; a="10924956" X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="10924956" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:06 -0700 X-CSE-ConnectionGUID: 3J9X68TDSrWwnBP5vEnLeg== X-CSE-MsgGUID: icYl8hfXSmCjeyJi8pDMgg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="52137107" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.105]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:04 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH 01/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_CTL Date: Wed, 8 May 2024 18:47:47 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VRR_CTL register macro. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_vrr.c | 13 ++++++++----- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 894ee97b3e1b..b1136aee775f 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -213,13 +213,15 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) 0, PIPE_VBLANK_WITH_DELAY); if (!crtc_state->vrr.flipline) { - intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), 0); + intel_de_write(dev_priv, + TRANS_VRR_CTL(dev_priv, cpu_transcoder), 0); return; } intel_de_write(dev_priv, TRANS_VRR_VMIN(cpu_transcoder), crtc_state->vrr.vmin - 1); intel_de_write(dev_priv, TRANS_VRR_VMAX(cpu_transcoder), crtc_state->vrr.vmax - 1); - intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), trans_vrr_ctl(crtc_state)); + intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder), + trans_vrr_ctl(crtc_state)); intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), crtc_state->vrr.flipline - 1); } @@ -263,7 +265,7 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) VRR_VSYNC_END(crtc_state->vrr.vsync_end) | VRR_VSYNC_START(crtc_state->vrr.vsync_start)); - intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), + intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder), VRR_CTL_VRR_ENABLE | trans_vrr_ctl(crtc_state)); } @@ -276,7 +278,7 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) if (!old_crtc_state->vrr.enable) return; - intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), + intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder), trans_vrr_ctl(old_crtc_state)); intel_de_wait_for_clear(dev_priv, TRANS_VRR_STATUS(cpu_transcoder), VRR_STATUS_VRR_EN_LIVE, 1000); @@ -292,7 +294,8 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; u32 trans_vrr_ctl, trans_vrr_vsync; - trans_vrr_ctl = intel_de_read(dev_priv, TRANS_VRR_CTL(cpu_transcoder)); + trans_vrr_ctl = intel_de_read(dev_priv, + TRANS_VRR_CTL(dev_priv, cpu_transcoder)); crtc_state->vrr.enable = trans_vrr_ctl & VRR_CTL_VRR_ENABLE; diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5670eee4a498..a178e9f6804c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1233,7 +1233,7 @@ #define _TRANS_VRR_CTL_B 0x61420 #define _TRANS_VRR_CTL_C 0x62420 #define _TRANS_VRR_CTL_D 0x63420 -#define TRANS_VRR_CTL(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_CTL_A) +#define TRANS_VRR_CTL(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_CTL_A) #define VRR_CTL_VRR_ENABLE REG_BIT(31) #define VRR_CTL_IGN_MAX_SHIFT REG_BIT(30) #define VRR_CTL_FLIP_LINE_EN REG_BIT(29) From patchwork Wed May 8 15:47:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13658887 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6529DC04FFE for ; Wed, 8 May 2024 15:48:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 981BD112693; Wed, 8 May 2024 15:48:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Q1MCqRBf"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id 536ED112693 for ; Wed, 8 May 2024 15:48:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715183290; x=1746719290; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kK0SEhsrHA3ELSGCOfmet0aSAPqXc9wKlrxOUv5ZRbs=; b=Q1MCqRBf/8AYYIA05M5nIGr+ke6Sva6yXYyk6GZOEmTsqeDwK9bFEzxf 45hBX+UmF98sScK/Xt23qrS+WON+yiSbVdJmFTpkSLBM506LbtKpN/QQg tzIyMt4+FwUiwGyFL5M93NK3Ucyl/RJzRAPpjfhVh0gogHTvaQhGD6PHa JmA1p0W03WmUvgPCaBU91xopjUysvetuyUCYUuhdtslQS4dMxL18t0h0W NECL11xQaEh/AKr70WaQEH+Eu8y5iY6Sx2hRgB91X9VEEVb7pjXT33WtW iMw992YnCcadVGYvS2zjnejcJRuJg21/j7Fl1bbtINzcy/ocsFizwBISU g==; X-CSE-ConnectionGUID: DCizYFBgTi2nWf4Y5V9dkA== X-CSE-MsgGUID: nMZ1VsYAR4uefMnYigfLXg== X-IronPort-AV: E=McAfee;i="6600,9927,11067"; a="28532108" X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="28532108" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:10 -0700 X-CSE-ConnectionGUID: W8lIwL4jR2yQ++OXOfHwbQ== X-CSE-MsgGUID: EBGHLKS9Tzma3FAMUDpnEw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="29447074" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.105]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:09 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH 02/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VMAX Date: Wed, 8 May 2024 18:47:48 +0300 Message-Id: <6256642f1943b87650fdf600ef08f6d3b8617a87.1715183162.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VRR_VMAX register macro. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_vrr.c | 6 ++++-- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index b1136aee775f..d9024ccf6098 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -219,7 +219,8 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) } intel_de_write(dev_priv, TRANS_VRR_VMIN(cpu_transcoder), crtc_state->vrr.vmin - 1); - intel_de_write(dev_priv, TRANS_VRR_VMAX(cpu_transcoder), crtc_state->vrr.vmax - 1); + intel_de_write(dev_priv, TRANS_VRR_VMAX(dev_priv, cpu_transcoder), + crtc_state->vrr.vmax - 1); intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder), trans_vrr_ctl(crtc_state)); intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), crtc_state->vrr.flipline - 1); @@ -309,7 +310,8 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) if (trans_vrr_ctl & VRR_CTL_FLIP_LINE_EN) { crtc_state->vrr.flipline = intel_de_read(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder)) + 1; - crtc_state->vrr.vmax = intel_de_read(dev_priv, TRANS_VRR_VMAX(cpu_transcoder)) + 1; + crtc_state->vrr.vmax = intel_de_read(dev_priv, + TRANS_VRR_VMAX(dev_priv, cpu_transcoder)) + 1; crtc_state->vrr.vmin = intel_de_read(dev_priv, TRANS_VRR_VMIN(cpu_transcoder)) + 1; } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a178e9f6804c..693b4e562d46 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1247,7 +1247,7 @@ #define _TRANS_VRR_VMAX_B 0x61424 #define _TRANS_VRR_VMAX_C 0x62424 #define _TRANS_VRR_VMAX_D 0x63424 -#define TRANS_VRR_VMAX(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VMAX_A) +#define TRANS_VRR_VMAX(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VMAX_A) #define VRR_VMAX_MASK REG_GENMASK(19, 0) #define _TRANS_VRR_VMIN_A 0x60434 From patchwork Wed May 8 15:47:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13658888 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EDDD8C04FFE for ; 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X-CSE-ConnectionGUID: VwhwMkvyRK+ZxCOFhAb1WQ== X-CSE-MsgGUID: oGF5/UcERMyPk2O3Elku1A== X-IronPort-AV: E=McAfee;i="6600,9927,11067"; a="28532116" X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="28532116" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:14 -0700 X-CSE-ConnectionGUID: 9uSZGsUxShyVYB1KGwJeCA== X-CSE-MsgGUID: 86ZUncqySYua8NUX2Ugfqw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="29447086" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.105]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:13 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH 03/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VMIN Date: Wed, 8 May 2024 18:47:49 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VRR_VMIN register macro. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_vrr.c | 6 ++++-- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index d9024ccf6098..fd0f0794f6dc 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -218,7 +218,8 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) return; } - intel_de_write(dev_priv, TRANS_VRR_VMIN(cpu_transcoder), crtc_state->vrr.vmin - 1); + intel_de_write(dev_priv, TRANS_VRR_VMIN(dev_priv, cpu_transcoder), + crtc_state->vrr.vmin - 1); intel_de_write(dev_priv, TRANS_VRR_VMAX(dev_priv, cpu_transcoder), crtc_state->vrr.vmax - 1); intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder), @@ -312,7 +313,8 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) crtc_state->vrr.flipline = intel_de_read(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder)) + 1; crtc_state->vrr.vmax = intel_de_read(dev_priv, TRANS_VRR_VMAX(dev_priv, cpu_transcoder)) + 1; - crtc_state->vrr.vmin = intel_de_read(dev_priv, TRANS_VRR_VMIN(cpu_transcoder)) + 1; + crtc_state->vrr.vmin = intel_de_read(dev_priv, + TRANS_VRR_VMIN(dev_priv, cpu_transcoder)) + 1; } if (crtc_state->vrr.enable) { diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 693b4e562d46..775c878ca72f 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1254,7 +1254,7 @@ #define _TRANS_VRR_VMIN_B 0x61434 #define _TRANS_VRR_VMIN_C 0x62434 #define _TRANS_VRR_VMIN_D 0x63434 -#define TRANS_VRR_VMIN(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VMIN_A) +#define TRANS_VRR_VMIN(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VMIN_A) #define VRR_VMIN_MASK REG_GENMASK(15, 0) #define _TRANS_VRR_VMAXSHIFT_A 0x60428 From patchwork Wed May 8 15:47:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13658889 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 351F5C04FFE for ; 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X-CSE-ConnectionGUID: hhV+p/K/RFKGqvU+X5XTFA== X-CSE-MsgGUID: GLUHVI1RTAGoJwrHxT61gA== X-IronPort-AV: E=McAfee;i="6600,9927,11067"; a="28532125" X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="28532125" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:19 -0700 X-CSE-ConnectionGUID: MpBQ/EqpS86L2I8TQgsf5w== X-CSE-MsgGUID: q34RuJVaQF66+qHdH7bFsw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="29447101" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.105]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:18 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH 04/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VMAXSHIFT Date: Wed, 8 May 2024 18:47:50 +0300 Message-Id: <6117aa8936a8e91c58a7a0bada21f266c79a0e5f.1715183162.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VRR_VMAXSHIFT register macro. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_reg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 775c878ca72f..9739ef525e13 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1261,7 +1261,7 @@ #define _TRANS_VRR_VMAXSHIFT_B 0x61428 #define _TRANS_VRR_VMAXSHIFT_C 0x62428 #define _TRANS_VRR_VMAXSHIFT_D 0x63428 -#define TRANS_VRR_VMAXSHIFT(trans) _MMIO_TRANS2(dev_priv, trans, \ +#define TRANS_VRR_VMAXSHIFT(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, \ _TRANS_VRR_VMAXSHIFT_A) #define VRR_VMAXSHIFT_DEC_MASK REG_GENMASK(29, 16) #define VRR_VMAXSHIFT_DEC REG_BIT(16) From patchwork Wed May 8 15:47:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13658890 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7C9FC04FFE for ; Wed, 8 May 2024 15:48:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4FEFC1126C1; Wed, 8 May 2024 15:48:24 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="dOlawy7p"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0DDF21126C1 for ; Wed, 8 May 2024 15:48:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715183303; x=1746719303; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=wVixzfNOjts3z0f79wuGi2GiX4s86phbIofHw/c1C/w=; b=dOlawy7pCkUOaM4beVpHwimQ5VL+n6kGFbxf62PORGHsKZOolC9YObU3 IK4tIVuNf0i4qKukJE8IU1YNseg2uh6vEuL1Z/SKA0Bk9IJa7rmTLDfKX 9Vd+UCUkG/Uq+FRVFomg4Ur5sBh/OOU9eKeTd+XtdjXJrRUGTPyD2ekzo uxgAhPsqOoCyDPDGLbduCtlK9K8tfLWt51vxo0FPQyQrTtVLwIOMqcquH x5OLpJYl8B+i+qNB2yWFb6NYGW3VYowCSCcTksCViWoMeX2E7e9R1XhXD h9vTt/Ym/gZg8Wo7ZcZ8qoHo+m4N7F6nu8ERI+/M3Gvrs/XhgRFX2qChe A==; X-CSE-ConnectionGUID: lWOKij6ZQPaze5Y0spdk2A== X-CSE-MsgGUID: a8GA9b8xTDSTFnOuwrtEcA== X-IronPort-AV: E=McAfee;i="6600,9927,11067"; a="10925011" X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="10925011" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:23 -0700 X-CSE-ConnectionGUID: M2Ywced+RzaK+14tj3pzmg== X-CSE-MsgGUID: A9+Mb4+kSm2KKMTSGtnVPQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="52137316" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.105]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:22 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH 05/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_STATUS Date: Wed, 8 May 2024 18:47:51 +0300 Message-Id: <57285c891b10d4827423c20563f2b4a2632e65c1.1715183162.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VRR_STATUS register macro. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_vrr.c | 3 ++- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index fd0f0794f6dc..05cbd6e4fc60 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -282,7 +282,8 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder), trans_vrr_ctl(old_crtc_state)); - intel_de_wait_for_clear(dev_priv, TRANS_VRR_STATUS(cpu_transcoder), + intel_de_wait_for_clear(dev_priv, + TRANS_VRR_STATUS(dev_priv, cpu_transcoder), VRR_STATUS_VRR_EN_LIVE, 1000); intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), 0); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9739ef525e13..df43b9eb5374 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1271,7 +1271,7 @@ #define _TRANS_VRR_STATUS_B 0x6142C #define _TRANS_VRR_STATUS_C 0x6242C #define _TRANS_VRR_STATUS_D 0x6342C -#define TRANS_VRR_STATUS(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_STATUS_A) +#define TRANS_VRR_STATUS(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_STATUS_A) #define VRR_STATUS_VMAX_REACHED REG_BIT(31) #define VRR_STATUS_NOFLIP_TILL_BNDR REG_BIT(30) #define VRR_STATUS_FLIP_BEF_BNDR REG_BIT(29) From patchwork Wed May 8 15:47:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13658891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 375D0C04FFE for ; Wed, 8 May 2024 15:48:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AF8261126D9; Wed, 8 May 2024 15:48:28 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="WKi2Lmqz"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2DF5F1126D9 for ; Wed, 8 May 2024 15:48:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715183307; x=1746719307; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fpFcFE4eTjEKBmwC5A+Mcv1O6Q/sZgcQ846b0nLVpxs=; b=WKi2Lmqz6wqtqqicB5D/vHlmaKhVX87hewu09A1ewaL56KF6zOUE6w80 hvXpQ7PRDQrA8S71n8Nv6kMYMxU+kx0PXI8RAESvPV1l8fK8+DKz5mD4w dvbVxcG7MXTvKpuDnthYSb77Rwrs6ErLsMlpLQg8YaasKaXUci5jhNSBD ul8Vc5BKZrZhKiRt06eJtNg4W04hMVk3CjauYaUfeqRcdRArPLwM0PZYC EVIWAmPmD4FHrlrKl82rRqxG71IycoQXAy7O2UB2oUg9vTSs8vaVfbR5O a36wHpm9rMWxn1Pu6ZkfEpgmVNhVUc4SGswWy+uTVS/9iDLSp8/TK6Qsf Q==; X-CSE-ConnectionGUID: dtFSdTd6Rq6EePK4AwA1pw== X-CSE-MsgGUID: dYHS2vp8SAmQqhrYElHBRQ== X-IronPort-AV: E=McAfee;i="6600,9927,11067"; a="10925017" X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="10925017" Received: from fmviesa002.fm.intel.com ([10.60.135.142]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:27 -0700 X-CSE-ConnectionGUID: op54B7bBQc2UVRuGvY5Uuw== X-CSE-MsgGUID: HDgpSmu8TGKy3Avv1Kjqtg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="52137351" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.105]) by fmviesa002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:26 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH 06/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VTOTAL_PREV Date: Wed, 8 May 2024 18:47:52 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VRR_VTOTAL_PREV register macro. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_reg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index df43b9eb5374..745ef9a32d88 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1291,7 +1291,7 @@ #define _TRANS_VRR_VTOTAL_PREV_B 0x61480 #define _TRANS_VRR_VTOTAL_PREV_C 0x62480 #define _TRANS_VRR_VTOTAL_PREV_D 0x63480 -#define TRANS_VRR_VTOTAL_PREV(trans) _MMIO_TRANS2(dev_priv, trans, \ +#define TRANS_VRR_VTOTAL_PREV(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, \ _TRANS_VRR_VTOTAL_PREV_A) #define VRR_VTOTAL_FLIP_BEFR_BNDR REG_BIT(31) #define VRR_VTOTAL_FLIP_AFTER_BNDR REG_BIT(30) From patchwork Wed May 8 15:47:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13658892 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BB2AEC04FFE for ; Wed, 8 May 2024 15:48:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 095F71126DB; Wed, 8 May 2024 15:48:33 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="g9OKbyRm"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id 784081126DB for ; Wed, 8 May 2024 15:48:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715183311; x=1746719311; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=2DtiU+3wf4v3iXkL3UMDQXsu831it//HO/25tScKmsU=; b=g9OKbyRmvQxr9/ILxjdKQYI+n+oGe0PEnl6IYapfVipgsXuZliXqY+cw 7HljuaPuYVRL+7fnLG3/Uije2yTbvIeClmsO9QB+bl3a6r0lf5u7+rDka 7DA9ohioZP5SwDn1vdog/ZjsBvjgkl4HDAAJHT/eNepSNySc/6csedVnn RhVZZe7wFFCm441yk3Lj8DaplDERJiF4VHoJ8ZWCi5xB/9O3RhOJyrSt8 52Hbkz8PqftSERcI6Gbxwd3hm68yrynM1sC4GkcYt+wEglM9XzcYXJs1A nq6aQ8poYotZaEzgJ8isHkLgkVYxbMJ6r8qByo8R6az61IMr/MJbNleFf Q==; X-CSE-ConnectionGUID: bOsKKi3YRDySQutXhj3DYA== X-CSE-MsgGUID: DuW+i8IdTdWRWvAwMhDs0w== X-IronPort-AV: E=McAfee;i="6600,9927,11067"; a="28532136" X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="28532136" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:31 -0700 X-CSE-ConnectionGUID: vJ5OexJrTGCitk6J2xdAtw== X-CSE-MsgGUID: tfV7i3FKRoG2udr4om1Jhw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="29447143" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.105]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:30 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH 07/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_FLIPLINE Date: Wed, 8 May 2024 18:47:53 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VRR_FLIPLINE register macro. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_vrr.c | 6 ++++-- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 05cbd6e4fc60..e7709b06b92c 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -224,7 +224,8 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) crtc_state->vrr.vmax - 1); intel_de_write(dev_priv, TRANS_VRR_CTL(dev_priv, cpu_transcoder), trans_vrr_ctl(crtc_state)); - intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), crtc_state->vrr.flipline - 1); + intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(dev_priv, cpu_transcoder), + crtc_state->vrr.flipline - 1); } void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) @@ -311,7 +312,8 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) REG_FIELD_GET(VRR_CTL_PIPELINE_FULL_MASK, trans_vrr_ctl); if (trans_vrr_ctl & VRR_CTL_FLIP_LINE_EN) { - crtc_state->vrr.flipline = intel_de_read(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder)) + 1; + crtc_state->vrr.flipline = intel_de_read(dev_priv, + TRANS_VRR_FLIPLINE(dev_priv, cpu_transcoder)) + 1; crtc_state->vrr.vmax = intel_de_read(dev_priv, TRANS_VRR_VMAX(dev_priv, cpu_transcoder)) + 1; crtc_state->vrr.vmin = intel_de_read(dev_priv, diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 745ef9a32d88..9f63d68eb9a0 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1302,7 +1302,7 @@ #define _TRANS_VRR_FLIPLINE_B 0x61438 #define _TRANS_VRR_FLIPLINE_C 0x62438 #define _TRANS_VRR_FLIPLINE_D 0x63438 -#define TRANS_VRR_FLIPLINE(trans) _MMIO_TRANS2(dev_priv, trans, \ +#define TRANS_VRR_FLIPLINE(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, \ _TRANS_VRR_FLIPLINE_A) #define VRR_FLIPLINE_MASK REG_GENMASK(19, 0) From patchwork Wed May 8 15:47:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13658893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3DF48C19F4F for ; Wed, 8 May 2024 15:48:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9E8D2112BEB; Wed, 8 May 2024 15:48:38 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="JL7duz8E"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 36766112BEB for ; Wed, 8 May 2024 15:48:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715183317; x=1746719317; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RABHxFKi6hPCEm3pJLr5N+DNFkBHZsOnE9JZ3S0xkUc=; b=JL7duz8EfjfFOSRZHEebx6WWw+wtA5m5kLTwn/eB9EawIWcIIuevyaIp 7XVcN94/uESsUdOibRvLgLHH47AefvIVeTfp7nYCIGxY5jV/3fhQB2IHt FFArVyPfA6e8Onjhn+Wa32kzI4pAAk7IxetTFkJALOFBciZd6Kb4+aYXV 3mws/4qXb9tN/Zh7bMqc5JiZ17aCdv8qOftkKS3Z/WFoc4t0fU/FqURUO D6cyEq+E1oAmUfsFuv4r8w6tGjQxfXFoop+ruhfoschaHHm0VEOqwQE/x H1Q3dx//PBPoNhR6m8lCGa2IfXLqXSY+Pj312uAuJ+HHGauPix1Gftss6 Q==; X-CSE-ConnectionGUID: r+sNC4HUTd+mTaCPQGy4iQ== X-CSE-MsgGUID: PV6QKtf/S5+46CRiBSx7cg== X-IronPort-AV: E=McAfee;i="6600,9927,11067"; a="11215379" X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="11215379" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:37 -0700 X-CSE-ConnectionGUID: hHScRgUBRVakbzr+s/6pVA== X-CSE-MsgGUID: i2Kc6WuwTaiI4UoWN49k9A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="28884891" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.105]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:35 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH 08/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_STATUS2 Date: Wed, 8 May 2024 18:47:54 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VRR_STATUS2 register macro. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_reg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9f63d68eb9a0..18c8ef911579 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1310,7 +1310,7 @@ #define _TRANS_VRR_STATUS2_B 0x6143C #define _TRANS_VRR_STATUS2_C 0x6243C #define _TRANS_VRR_STATUS2_D 0x6343C -#define TRANS_VRR_STATUS2(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_STATUS2_A) +#define TRANS_VRR_STATUS2(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_STATUS2_A) #define VRR_STATUS2_VERT_LN_CNT_MASK REG_GENMASK(19, 0) #define _TRANS_PUSH_A 0x60A70 From patchwork Wed May 8 15:47:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13658894 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D7E55C04FFE for ; Wed, 8 May 2024 15:48:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 63EB111308D; Wed, 8 May 2024 15:48:42 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="OFNLTFj7"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id CF91511308D for ; Wed, 8 May 2024 15:48:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1715183321; x=1746719321; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=04rGwcGtfLLnKG2YEiWgPeRrAPx4vrUBvpmpvK0vmzQ=; b=OFNLTFj7r2e76+ha3BFtoWzUSGdXdxe7qapEFUrUAyrH53GfQCbSFBCx HWxK56ZY2FSwbZ0hgZLeA+CPi3g3YZZPIHHaPiTGs0eHd40GBL0Au0Zzu lZJIIfj1An+Korv9yyhap84ZY22eELr6M9h+tHlfTv2XvaPpI6PRDKvwv 7d+m/OoiEio5XyAjFQ3syyMSt/6S6NZrEw/0biRsY/BNWp6H0UattOolR +EZ2MJi17sc8+XY92t4CCoCc1h+prnjtNB5N5vXLI9BFnI7hnzvi9Fpo3 sRcVn7LM8dMwaKahIuUVkJOaHT7VamKWPfnpTDBt6lfgdveY+qwiGvwfm g==; X-CSE-ConnectionGUID: NGy18X3VQ6SoHJlI3o5wew== X-CSE-MsgGUID: lQ/VbTKLQeaFLlj84sOpBg== X-IronPort-AV: E=McAfee;i="6600,9927,11067"; a="11215384" X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="11215384" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:41 -0700 X-CSE-ConnectionGUID: U7QxHM1AS2KYr7a8L4GAHg== X-CSE-MsgGUID: 6bTvuEXfQxGzXSCAA+sWWw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,145,1712646000"; d="scan'208";a="28884898" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.105]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:39 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH 09/10] drm/i915: pass dev_priv explicitly to TRANS_PUSH Date: Wed, 8 May 2024 18:47:55 +0300 Message-Id: <5b2a4eea42cf76830a829d8a543d877cad0fc52d.1715183162.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_PUSH register macro. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_vrr.c | 9 +++++---- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index e7709b06b92c..5031b7ac8007 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -237,7 +237,7 @@ void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) if (!crtc_state->vrr.enable) return; - intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), + intel_de_write(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder), TRANS_PUSH_EN | TRANS_PUSH_SEND); } @@ -250,7 +250,7 @@ bool intel_vrr_is_push_sent(const struct intel_crtc_state *crtc_state) if (!crtc_state->vrr.enable) return false; - return intel_de_read(dev_priv, TRANS_PUSH(cpu_transcoder)) & TRANS_PUSH_SEND; + return intel_de_read(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder)) & TRANS_PUSH_SEND; } void intel_vrr_enable(const struct intel_crtc_state *crtc_state) @@ -261,7 +261,8 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) if (!crtc_state->vrr.enable) return; - intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), TRANS_PUSH_EN); + intel_de_write(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder), + TRANS_PUSH_EN); if (HAS_AS_SDP(dev_priv)) intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder), @@ -286,7 +287,7 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) intel_de_wait_for_clear(dev_priv, TRANS_VRR_STATUS(dev_priv, cpu_transcoder), VRR_STATUS_VRR_EN_LIVE, 1000); - intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), 0); + intel_de_write(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder), 0); if (HAS_AS_SDP(dev_priv)) intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder), 0); diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 18c8ef911579..9d443365b85a 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1317,7 +1317,7 @@ #define _TRANS_PUSH_B 0x61A70 #define _TRANS_PUSH_C 0x62A70 #define _TRANS_PUSH_D 0x63A70 -#define TRANS_PUSH(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_PUSH_A) +#define TRANS_PUSH(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_PUSH_A) #define TRANS_PUSH_EN REG_BIT(31) #define TRANS_PUSH_SEND REG_BIT(30) From patchwork Wed May 8 15:47:56 2024 Content-Type: text/plain; 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d="scan'208";a="28884914" Received: from mklonows-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.105]) by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 May 2024 08:48:44 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH 10/10] drm/i915: pass dev_priv explicitly to TRANS_VRR_VSYNC Date: Wed, 8 May 2024 18:47:56 +0300 Message-Id: <61b464bedfd75a97ca214e066be5417d790ccb26.1715183162.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VRR_VSYNC register macro. Signed-off-by: Jani Nikula Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/display/intel_vrr.c | 9 ++++++--- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 5031b7ac8007..fbfece3f687c 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -265,7 +265,8 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) TRANS_PUSH_EN); if (HAS_AS_SDP(dev_priv)) - intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder), + intel_de_write(dev_priv, + TRANS_VRR_VSYNC(dev_priv, cpu_transcoder), VRR_VSYNC_END(crtc_state->vrr.vsync_end) | VRR_VSYNC_START(crtc_state->vrr.vsync_start)); @@ -290,7 +291,8 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) intel_de_write(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder), 0); if (HAS_AS_SDP(dev_priv)) - intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder), 0); + intel_de_write(dev_priv, + TRANS_VRR_VSYNC(dev_priv, cpu_transcoder), 0); } void intel_vrr_get_config(struct intel_crtc_state *crtc_state) @@ -326,7 +328,8 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) if (HAS_AS_SDP(dev_priv)) { trans_vrr_vsync = - intel_de_read(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder)); + intel_de_read(dev_priv, + TRANS_VRR_VSYNC(dev_priv, cpu_transcoder)); crtc_state->vrr.vsync_start = REG_FIELD_GET(VRR_VSYNC_START_MASK, trans_vrr_vsync); crtc_state->vrr.vsync_end = diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 9d443365b85a..7af0623bb9b5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1322,7 +1322,7 @@ #define TRANS_PUSH_SEND REG_BIT(30) #define _TRANS_VRR_VSYNC_A 0x60078 -#define TRANS_VRR_VSYNC(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VSYNC_A) +#define TRANS_VRR_VSYNC(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_VRR_VSYNC_A) #define VRR_VSYNC_END_MASK REG_GENMASK(28, 16) #define VRR_VSYNC_END(vsync_end) REG_FIELD_PREP(VRR_VSYNC_END_MASK, (vsync_end)) #define VRR_VSYNC_START_MASK REG_GENMASK(12, 0)