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Thu, 09 May 2024 15:37:36 -0700 (PDT) From: Dmitry Baryshkov Date: Fri, 10 May 2024 01:37:34 +0300 Subject: [PATCH RFC 1/7] drm/mipi-dsi: wrap more functions for streamline handling MIME-Version: 1.0 Message-Id: <20240510-dsi-panels-upd-api-v1-1-317c78a0dcc8@linaro.org> References: <20240510-dsi-panels-upd-api-v1-0-317c78a0dcc8@linaro.org> In-Reply-To: <20240510-dsi-panels-upd-api-v1-0-317c78a0dcc8@linaro.org> To: Douglas Anderson , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Sumit Semwal , Caleb Connolly , Marijn Suijten , Vinod Koul Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=9046; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=vRxiLvTGirbB6HN43H6Eoei1WmxE/UqWmb9+hJ19B+U=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmPVAuK86GU8+ebU/1bVmiEBTyjZ+Bg5j7tOlty DaCkxLKzTGJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZj1QLgAKCRCLPIo+Aiko 1YWoB/9zqwhRLAqs5SU32GE/oZfJ/4r5Ewh0B+3p+KKiFO/MoILG5QBiSBlw09fRoyjCcKxKOqk v3SifezXPjC9mSGKE3owHb9fVL2GmsOEVct669hYocAXHvZMkwM3PCqBpm6HmMA9zPyAIZNu5lQ ipuTJt0YczcR4Xe/cHHqGtj6iRXM56SxsVYpmRi4IdvzLIfSRAePrgScU4g9D0Qrr/mNqI08bil 1KvLUlaMIa6vo776VEoCbgMX+BtWIZEZhkF86mTPNt/aSQn8tlcZeWvVs/4mRmkuEo1fMDb9qNG KNr6AuQ264YR/sq9E4pl/8hx7G7QO3MlqN3dtZqeKhFsyUQ/ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Follow the pattern of mipi_dsi_dcs_*_multi() and wrap several existing MIPI DSI functions to use the context for processing. This simplifies and streamlines driver code to use simpler code pattern. Note, msleep function is also wrapped in this way as it is frequently called inbetween other mipi_dsi_dcs_*() functions. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/drm_mipi_dsi.c | 209 +++++++++++++++++++++++++++++++++++++++++ include/drm/drm_mipi_dsi.h | 19 ++++ 2 files changed, 228 insertions(+) diff --git a/drivers/gpu/drm/drm_mipi_dsi.c b/drivers/gpu/drm/drm_mipi_dsi.c index d2957cb692d3..4e5e7ad10b7e 100644 --- a/drivers/gpu/drm/drm_mipi_dsi.c +++ b/drivers/gpu/drm/drm_mipi_dsi.c @@ -1429,6 +1429,215 @@ int mipi_dsi_dcs_get_display_brightness_large(struct mipi_dsi_device *dsi, } EXPORT_SYMBOL(mipi_dsi_dcs_get_display_brightness_large); +/** + * mipi_dsi_picture_parameter_set_multi() - transmit the DSC PPS to the peripheral + * @ctx: Context for multiple DSI transactions + * @pps: VESA DSC 1.1 Picture Parameter Set + * + * Like mipi_dsi_picture_parameter_set() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_picture_parameter_set_multi(struct mipi_dsi_multi_context *ctx, + const struct drm_dsc_picture_parameter_set *pps) +{ + struct mipi_dsi_device *dsi = ctx->dsi; + struct device *dev = &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret = mipi_dsi_picture_parameter_set(dsi, pps); + if (ret < 0) { + ctx->accum_err = ret; + dev_err(dev, "sending PPS failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_picture_parameter_set_multi); + +/** + * mipi_dsi_compression_mode_ext() - enable/disable DSC on the peripheral + * @ctx: Context for multiple DSI transactions + * @enable: Whether to enable or disable the DSC + * @algo: Selected compression algorithm + * @pps_selector: Select PPS from the table of pre-stored or uploaded PPS entries + * + * Like mipi_dsi_compression_mode_ext_multi() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_compression_mode_ext_multi(struct mipi_dsi_multi_context *ctx, + bool enable, + enum mipi_dsi_compression_algo algo, + unsigned int pps_selector) +{ + struct mipi_dsi_device *dsi = ctx->dsi; + struct device *dev = &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret = mipi_dsi_compression_mode_ext(dsi, enable, algo, pps_selector); + if (ret < 0) { + ctx->accum_err = ret; + dev_err(dev, "sending COMPRESSION_MODE failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_compression_mode_ext_multi); + +/** + * mipi_dsi_dcs_nop_multi() - send DCS NOP packet + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_nop() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_nop_multi(struct mipi_dsi_multi_context *ctx) +{ + struct mipi_dsi_device *dsi = ctx->dsi; + struct device *dev = &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret = mipi_dsi_dcs_nop(dsi); + if (ret < 0) { + ctx->accum_err = ret; + dev_err(dev, "sending DCS NOP failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_nop_multi); + +/** + * mipi_dsi_dcs_enter_sleep_mode_multi() - send DCS ENTER_SLEEP_MODE packet + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_enter_sleep_mode() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_enter_sleep_mode_multi(struct mipi_dsi_multi_context *ctx) +{ + struct mipi_dsi_device *dsi = ctx->dsi; + struct device *dev = &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret = mipi_dsi_dcs_enter_sleep_mode(dsi); + if (ret < 0) { + ctx->accum_err = ret; + dev_err(dev, "sending DCS ENTER_SLEEP_MODE failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_enter_sleep_mode_multi); + +/** + * mipi_dsi_dcs_exit_sleep_mode_multi() - send DCS EXIT_SLEEP_MODE packet + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_exit_sleep_mode() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_exit_sleep_mode_multi(struct mipi_dsi_multi_context *ctx) +{ + struct mipi_dsi_device *dsi = ctx->dsi; + struct device *dev = &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret = mipi_dsi_dcs_exit_sleep_mode(dsi); + if (ret < 0) { + ctx->accum_err = ret; + dev_err(dev, "sending DCS EXIT_SLEEP_MODE failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_exit_sleep_mode_multi); + +/** + * mipi_dsi_dcs_set_display_off_multi() - send DCS SET_DISPLAY_OFF packet + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_set_display_off() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_set_display_off_multi(struct mipi_dsi_multi_context *ctx) +{ + struct mipi_dsi_device *dsi = ctx->dsi; + struct device *dev = &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret = mipi_dsi_dcs_set_display_off(dsi); + if (ret < 0) { + ctx->accum_err = ret; + dev_err(dev, "sending DCS SET_DISPLAY_OFF failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_set_display_off_multi); + +/** + * mipi_dsi_dcs_set_display_on_multi() - send DCS SET_DISPLAY_ON packet + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_set_display_on() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_set_display_on_multi(struct mipi_dsi_multi_context *ctx) +{ + struct mipi_dsi_device *dsi = ctx->dsi; + struct device *dev = &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret = mipi_dsi_dcs_set_display_on(dsi); + if (ret < 0) { + ctx->accum_err = ret; + dev_err(dev, "sending DCS SET_DISPLAY_ON failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_set_display_on_multi); + +/** + * mipi_dsi_dcs_set_tear_on_multi() - send DCS SET_TEAR_ON packet + * @ctx: Context for multiple DSI transactions + * + * Like mipi_dsi_dcs_set_tear_on() but deals with errors in a way that + * makes it convenient to make several calls in a row. + */ +void mipi_dsi_dcs_set_tear_on_multi(struct mipi_dsi_multi_context *ctx, + enum mipi_dsi_dcs_tear_mode mode) +{ + struct mipi_dsi_device *dsi = ctx->dsi; + struct device *dev = &dsi->dev; + ssize_t ret; + + if (ctx->accum_err) + return; + + ret = mipi_dsi_dcs_set_tear_on(dsi, mode); + if (ret < 0) { + ctx->accum_err = ret; + dev_err(dev, "sending DCS SET_TEAR_ON failed: %d\n", + ctx->accum_err); + } +} +EXPORT_SYMBOL(mipi_dsi_dcs_set_tear_on_multi); + static int mipi_dsi_drv_probe(struct device *dev) { struct mipi_dsi_driver *drv = to_mipi_dsi_driver(dev->driver); diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 5e9cad541bd6..b74a89b40f21 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -275,6 +275,13 @@ int mipi_dsi_compression_mode_ext(struct mipi_dsi_device *dsi, bool enable, int mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi, const struct drm_dsc_picture_parameter_set *pps); +void mipi_dsi_compression_mode_ext_multi(struct mipi_dsi_multi_context *ctx, + bool enable, + enum mipi_dsi_compression_algo algo, + unsigned int pps_selector); +void mipi_dsi_picture_parameter_set_multi(struct mipi_dsi_multi_context *ctx, + const struct drm_dsc_picture_parameter_set *pps); + ssize_t mipi_dsi_generic_write(struct mipi_dsi_device *dsi, const void *payload, size_t size); int mipi_dsi_generic_write_chatty(struct mipi_dsi_device *dsi, @@ -338,6 +345,18 @@ int mipi_dsi_dcs_set_display_brightness_large(struct mipi_dsi_device *dsi, int mipi_dsi_dcs_get_display_brightness_large(struct mipi_dsi_device *dsi, u16 *brightness); +void mipi_dsi_dcs_nop_multi(struct mipi_dsi_multi_context *ctx); +void mipi_dsi_dcs_enter_sleep_mode_multi(struct mipi_dsi_multi_context *ctx); +void mipi_dsi_dcs_exit_sleep_mode_multi(struct mipi_dsi_multi_context *ctx); +void mipi_dsi_dcs_set_display_off_multi(struct mipi_dsi_multi_context *ctx); +void mipi_dsi_dcs_set_display_on_multi(struct mipi_dsi_multi_context *ctx); +void mipi_dsi_dcs_set_tear_on_multi(struct mipi_dsi_multi_context *ctx, + enum mipi_dsi_dcs_tear_mode mode); + +#define mipi_dsi_msleep(ctx, delay) \ + if (!ctx.accum_err) \ + msleep(delay) \ + /** * mipi_dsi_generic_write_seq - transmit data using a generic write packet * From patchwork Thu May 9 22:37:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13660480 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 87BB5C25B77 for ; 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Thu, 09 May 2024 15:37:37 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-521f38d32f1sm457974e87.181.2024.05.09.15.37.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 May 2024 15:37:37 -0700 (PDT) From: Dmitry Baryshkov Date: Fri, 10 May 2024 01:37:35 +0300 Subject: [PATCH RFC 2/7] drm/panel: boe-tv101wum-nl6: use wrapped MIPI DCS functions MIME-Version: 1.0 Message-Id: <20240510-dsi-panels-upd-api-v1-2-317c78a0dcc8@linaro.org> References: <20240510-dsi-panels-upd-api-v1-0-317c78a0dcc8@linaro.org> In-Reply-To: <20240510-dsi-panels-upd-api-v1-0-317c78a0dcc8@linaro.org> To: Douglas Anderson , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Sumit Semwal , Caleb Connolly , Marijn Suijten , Vinod Koul Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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Signed-off-by: Dmitry Baryshkov Reviewed-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 73 ++++++++------------------ 1 file changed, 21 insertions(+), 52 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index aab60cec0603..456c1a5a2110 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -448,22 +448,16 @@ static int boe_tv110c9m_init(struct boe_panel *boe) mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x00); mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x13); mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x03, 0x96, 0x1a, 0x04, 0x04); - if (ctx.accum_err) - return ctx.accum_err; - msleep(100); + mipi_dsi_msleep(&ctx, 100); mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); - if (ctx.accum_err) - return ctx.accum_err; - msleep(200); + mipi_dsi_msleep(&ctx, 200); mipi_dsi_dcs_write_seq_multi(&ctx, 0x29); - if (ctx.accum_err) - return ctx.accum_err; - msleep(100); + mipi_dsi_msleep(&ctx, 100); return 0; }; @@ -893,22 +887,16 @@ static int inx_hj110iz_init(struct boe_panel *boe) mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x01); mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x00); mipi_dsi_dcs_write_seq_multi(&ctx, 0x3b, 0x03, 0xae, 0x1a, 0x04, 0x04); - if (ctx.accum_err) - return ctx.accum_err; - msleep(100); + mipi_dsi_msleep(&ctx, 100); mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); - if (ctx.accum_err) - return ctx.accum_err; - msleep(200); + mipi_dsi_msleep(&ctx, 200); mipi_dsi_dcs_write_seq_multi(&ctx, 0x29); - if (ctx.accum_err) - return ctx.accum_err; - msleep(100); + mipi_dsi_msleep(&ctx, 100); return 0; }; @@ -1207,10 +1195,8 @@ static int boe_init(struct boe_panel *boe) mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x08); mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x04); mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x68); - if (ctx.accum_err) - return ctx.accum_err; - msleep(150); + mipi_dsi_msleep(&ctx, 150); return 0; }; @@ -1222,16 +1208,12 @@ static int auo_kd101n80_45na_init(struct boe_panel *boe) msleep(24); mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); - if (ctx.accum_err) - return ctx.accum_err; - msleep(120); + mipi_dsi_msleep(&ctx, 120); mipi_dsi_dcs_write_seq_multi(&ctx, 0x29); - if (ctx.accum_err) - return ctx.accum_err; - msleep(120); + mipi_dsi_msleep(&ctx, 120); return 0; }; @@ -1283,10 +1265,8 @@ static int auo_b101uan08_3_init(struct boe_panel *boe) mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x4f); mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0x41); mipi_dsi_dcs_write_seq_multi(&ctx, 0xe7, 0x41); - if (ctx.accum_err) - return ctx.accum_err; - msleep(150); + mipi_dsi_msleep(&ctx, 150); return 0; }; @@ -1385,16 +1365,12 @@ static int starry_qfh032011_53g_init(struct boe_panel *boe) mipi_dsi_dcs_write_seq_multi(&ctx, 0xe1, 0x23); mipi_dsi_dcs_write_seq_multi(&ctx, 0xe2, 0x07); mipi_dsi_dcs_write_seq_multi(&ctx, 0X11); - if (ctx.accum_err) - return ctx.accum_err; - msleep(120); + mipi_dsi_msleep(&ctx, 120); mipi_dsi_dcs_write_seq_multi(&ctx, 0X29); - if (ctx.accum_err) - return ctx.accum_err; - msleep(80); + mipi_dsi_msleep(&ctx, 80); return 0; }; @@ -1490,13 +1466,12 @@ static int starry_himax83102_j02_init(struct boe_panel *boe) mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x4f); mipi_dsi_dcs_write_seq_multi(&ctx, 0xe9, 0x3f); mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); - if (ctx.accum_err) - return ctx.accum_err; - msleep(120); + mipi_dsi_dcs_exit_sleep_mode_multi(&ctx); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x29); + mipi_dsi_msleep(&ctx, 120); + + mipi_dsi_dcs_set_display_on_multi(&ctx); return ctx.accum_err; }; @@ -1508,20 +1483,14 @@ static inline struct boe_panel *to_boe_panel(struct drm_panel *panel) static int boe_panel_enter_sleep_mode(struct boe_panel *boe) { - struct mipi_dsi_device *dsi = boe->dsi; - int ret; - - dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; + struct mipi_dsi_multi_context ctx = { .dsi = boe->dsi }; - ret = mipi_dsi_dcs_set_display_off(dsi); - if (ret < 0) - return ret; + boe->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; 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Signed-off-by: Dmitry Baryshkov Reviewed-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-ilitek-ili9882t.c | 30 +++++++++------------------ 1 file changed, 10 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c index 58fc1d799371..e7a74d5443b0 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9882t.c @@ -402,19 +402,15 @@ static int starry_ili9882t_init(struct ili9882t *ili) mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0x22); ili9882t_switch_page(&ctx, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_EXIT_SLEEP_MODE); - if (ctx.accum_err) - return ctx.accum_err; + mipi_dsi_dcs_exit_sleep_mode_multi(&ctx); - msleep(120); + mipi_dsi_msleep(&ctx, 120); - mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_SET_DISPLAY_ON); - if (ctx.accum_err) - return ctx.accum_err; + mipi_dsi_dcs_set_display_on_multi(&ctx); - msleep(20); + mipi_dsi_msleep(&ctx, 20); - return 0; + return ctx.accum_err; }; static inline struct ili9882t *to_ili9882t(struct drm_panel *panel) @@ -424,20 +420,14 @@ static inline struct ili9882t *to_ili9882t(struct drm_panel *panel) static int ili9882t_enter_sleep_mode(struct ili9882t *ili) { - struct mipi_dsi_device *dsi = ili->dsi; - int ret; - - dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; + struct mipi_dsi_multi_context ctx = { .dsi = ili->dsi }; - ret = mipi_dsi_dcs_set_display_off(dsi); - if (ret < 0) - return ret; + ili->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; - ret = mipi_dsi_dcs_enter_sleep_mode(dsi); - if (ret < 0) - return ret; + mipi_dsi_dcs_set_display_off_multi(&ctx); + mipi_dsi_dcs_enter_sleep_mode_multi(&ctx); - return 0; + return ctx.accum_err; } static int ili9882t_disable(struct drm_panel *panel) From patchwork Thu May 9 22:37:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13660479 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C14B7C25B74 for ; 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a=openpgp-sha256; l=1349; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=/ICGqi9rxo6d+dzzW1CgRoe58bcq3pT7pDZm1a8aL8Y=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmPVAv+hJcCRRz/1N4z/5nZnoSCFPmnaflwApji eYhLOpmvgCJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZj1QLwAKCRCLPIo+Aiko 1QBmB/kBfZNnW8LsfL5YALIrGr1vlDsGY/TMulRiyB3ma/rYpTdqKUWu2IcP/mVYN5f8PoptNqR zmmQx3yamiNeQSO2YVPk8YA99zhDUhm+NFbaDQXYLqgjLyVesZZxyGO4/jB9oWLwMQ97S+WV+SI SNKHeE1Bry/mghLEjJE+r76Br3C019t5P57GDJ5aNZoREBMDi5WpR/4D9TS4ToMTsql0/nLAWMN OtX894c98lOz+uz6VHWIkaDRywhOKJUBIVDyMxSiYkxQOmr3n2aTrGV9/cnbbzUJVprWsCc0aKP LO3pRkNP3pg/29EV/4A+hsP44tCYINaYPPKK0K5vOEemn9NP X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Remove conditional code and use mipi_dsi_dcs_nop_multi() wrapper to simplify driver code. Signed-off-by: Dmitry Baryshkov Reviewed-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-innolux-p079zca.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-innolux-p079zca.c b/drivers/gpu/drm/panel/panel-innolux-p079zca.c index ade8bf7491ee..0691a27a0daa 100644 --- a/drivers/gpu/drm/panel/panel-innolux-p079zca.c +++ b/drivers/gpu/drm/panel/panel-innolux-p079zca.c @@ -224,21 +224,14 @@ static const struct drm_display_mode innolux_p097pfg_mode = { static void innolux_panel_write_multi(struct mipi_dsi_multi_context *ctx, const void *payload, size_t size) { - struct mipi_dsi_device *dsi = ctx->dsi; - struct device *dev = &dsi->dev; - mipi_dsi_generic_write_multi(ctx, payload, size); - if (ctx->accum_err) - return; /* * Included by random guessing, because without this * (or at least, some delay), the panel sometimes * didn't appear to pick up the command sequence. */ - ctx->accum_err = mipi_dsi_dcs_nop(ctx->dsi); - if (ctx->accum_err) - dev_err(dev, "failed to send DCS nop: %d\n", ctx->accum_err); + mipi_dsi_dcs_nop_multi(ctx); } #define innolux_panel_init_cmd_multi(ctx, seq...) \ From patchwork Thu May 9 22:37:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13660478 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 13AC3C10F1A for ; Thu, 9 May 2024 22:37:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 82D8C10F697; Thu, 9 May 2024 22:37:42 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="syj2PS9l"; dkim-atps=neutral Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) by gabe.freedesktop.org (Postfix) with ESMTPS id 86D4010F569 for ; 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Thu, 09 May 2024 15:37:39 -0700 (PDT) From: Dmitry Baryshkov Date: Fri, 10 May 2024 01:37:38 +0300 Subject: [PATCH RFC 5/7] drm/panel: novatek-nt36672e: use wrapped MIPI DCS functions MIME-Version: 1.0 Message-Id: <20240510-dsi-panels-upd-api-v1-5-317c78a0dcc8@linaro.org> References: <20240510-dsi-panels-upd-api-v1-0-317c78a0dcc8@linaro.org> In-Reply-To: <20240510-dsi-panels-upd-api-v1-0-317c78a0dcc8@linaro.org> To: Douglas Anderson , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Daniel Vetter , Neil Armstrong , Jessica Zhang , Sam Ravnborg , Sumit Semwal , Caleb Connolly , Marijn Suijten , Vinod Koul Cc: dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=33067; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=19zx/qwcigAhIYqmKy1s852n2d4kEuylkHN2kcUSurk=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ5ptgL7mqZat2fFcvY+9xVM9HZbd6z6xN1grf9eOCtPLX H9/5eV0MhqzMDByMciKKbL4FLRMjdmUHPZhx9R6mEGsTCBTGLg4BWAidXns/xO+GSRcF19TGadV n7To6YUFZ1d6/F/+a+7bR+n6nQ6N9/iWfvnNEZuz9flPF2UN2+vVPbs/87danpiY9rieqbAkaHf 6v+IbxwKUPlsKdjevWdbQ97qDbUv8vifs1mIW81m+SqR5n56jqi67ue+2s4fw2/SwRyv9pWR2xm r6RctGPp0UKf5SYKP7Yre0mrM5D0tkucsZawJ4fsYqNdTNtFse9+KtNtOi2DyFek6eqHPt8h2mG WJfXzlcLfmw6J7o3TbWbS2LAjcoiUzj7r+cmMv1NDnG8WJ+5+bMdP0ohW47P9Zb06cyWhn7r2Tb fFCtL/Fiw9Mg/tXX9l3crM8z49r6GTJ7Qg3MtRe+uzkDAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Remove conditional code and always use mipi_dsi_dcs_*multi() wrappers to simplify driver's init/exit code. This also includes passing context to the init_sequence() function instead of passing the DSI device. Signed-off-by: Dmitry Baryshkov Reviewed-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-novatek-nt36672e.c | 587 ++++++++++++------------- 1 file changed, 281 insertions(+), 306 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672e.c b/drivers/gpu/drm/panel/panel-novatek-nt36672e.c index 9ce8df455232..f190285d75a1 100644 --- a/drivers/gpu/drm/panel/panel-novatek-nt36672e.c +++ b/drivers/gpu/drm/panel/panel-novatek-nt36672e.c @@ -33,7 +33,7 @@ struct panel_desc { enum mipi_dsi_pixel_format format; unsigned int lanes; const char *panel_name; - int (*init_sequence)(struct mipi_dsi_device *dsi); + void (*init_sequence)(struct mipi_dsi_multi_context *ctx); }; struct nt36672e_panel { @@ -49,297 +49,293 @@ static inline struct nt36672e_panel *to_nt36672e_panel(struct drm_panel *panel) return container_of(panel, struct nt36672e_panel, panel); } -static int nt36672e_1080x2408_60hz_init(struct mipi_dsi_device *dsi) +static void nt36672e_1080x2408_60hz_init(struct mipi_dsi_multi_context *ctx) { - struct mipi_dsi_multi_context ctx = { .dsi = dsi }; - - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xc1, 0x89, 0x28, 0x00, 0x08, 0x00, 0xaa, 0x02, + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0xc0, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0xc1, 0x89, 0x28, 0x00, 0x08, 0x00, 0xaa, 0x02, 0x0e, 0x00, 0x2b, 0x00, 0x07, 0x0d, 0xb7, 0x0c, 0xb7); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xc2, 0x1b, 0xa0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x20); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x66); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x38); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2f, 0x83); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x69, 0x91); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x95, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x96, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf2, 0x64); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf3, 0x54); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf4, 0x64); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf5, 0x54); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf6, 0x64); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf7, 0x54); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf8, 0x64); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf9, 0x54); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x24); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x0c); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x1d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x2f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x2e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0x2d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0b, 0x2c); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x11, 0x17); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x12, 0x13); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x13, 0x15); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x14); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0x16); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x17, 0x18); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x1d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x2f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x2e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x22, 0x2d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x23, 0x2c); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x17); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0x13); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2b, 0x15); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2f, 0x14); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x16); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x31, 0x18); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x32, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x1f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x36, 0x1f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x4d, 0x14); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x4e, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x4f, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x71, 0x30); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x79, 0x11); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7a, 0x82); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7b, 0x8f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7d, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x80, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x81, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x82, 0x13); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0x31); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x85, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x86, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x87, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x90, 0x13); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x92, 0x31); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x93, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x94, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x95, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9c, 0xf4); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9d, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa0, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa2, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa3, 0x02); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa4, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa5, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xc0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xc9, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xd9, 0x80); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xe9, 0x02); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x25); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x18, 0x22); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0xe4); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x66, 0xd8); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x68, 0x50); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x69, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6b, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0x0d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6e, 0x48); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x72, 0x41); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x73, 0x4a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x74, 0xd0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x77, 0x62); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x79, 0x7e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7d, 0x03); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7e, 0x15); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7f, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0x4d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xcf, 0x80); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xd6, 0x80); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xd7, 0x80); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xef, 0x20); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xf0, 0x84); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x26); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x81, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x83, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0x03); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x85, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x86, 0x03); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x87, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x88, 0x05); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8a, 0x1a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8b, 0x11); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8c, 0x24); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8e, 0x42); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8f, 0x11); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x90, 0x11); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x91, 0x11); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9a, 0x80); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9b, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9c, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9d, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x9e, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x27); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x68); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x81); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x21, 0x6a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x25, 0x81); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x26, 0x94); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6e, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6f, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x70, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x71, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x72, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x75, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x76, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x77, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7d, 0x09); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7e, 0x67); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x80, 0x23); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x82, 0x09); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x83, 0x67); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x88, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x89, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa5, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa6, 0x23); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xa7, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x02); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xe6, 0xd3); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xeb, 0x03); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xec, 0x28); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x2a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x91); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x20); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x50); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0a, 0x70); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0c, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x11, 0xe0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x15, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x16, 0xa4); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x19, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1a, 0x78); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1b, 0x23); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1d, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1e, 0x3e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x1f, 0x3e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x20, 0x3e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x28, 0xfd); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x29, 0x12); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2a, 0xe1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x2d, 0x0a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x30, 0x49); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x33, 0x96); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x34, 0xff); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x35, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x36, 0xde); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x37, 0xf9); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x38, 0x45); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x39, 0xd9); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x3a, 0x49); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x4a, 0xf0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7a, 0x09); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7b, 0x40); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7f, 0xf0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x83, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x84, 0xa4); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x87, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x88, 0x78); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x89, 0x23); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8b, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8c, 0x7d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8d, 0x7d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x8e, 0x7d); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x20); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00, 0x00, 0x00, 0x17, 0x00, 0x49, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xc2, 0x1b, 0xa0); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x20); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x66); + mipi_dsi_dcs_write_seq_multi(ctx, 0x06, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0x07, 0x38); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2f, 0x83); + mipi_dsi_dcs_write_seq_multi(ctx, 0x69, 0x91); + mipi_dsi_dcs_write_seq_multi(ctx, 0x95, 0xd1); + mipi_dsi_dcs_write_seq_multi(ctx, 0x96, 0xd1); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf2, 0x64); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf3, 0x54); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf4, 0x64); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf5, 0x54); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf6, 0x64); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf7, 0x54); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf8, 0x64); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf9, 0x54); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x24); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x03, 0x0c); + mipi_dsi_dcs_write_seq_multi(ctx, 0x05, 0x1d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x08, 0x2f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x09, 0x2e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0a, 0x2d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0b, 0x2c); + mipi_dsi_dcs_write_seq_multi(ctx, 0x11, 0x17); + mipi_dsi_dcs_write_seq_multi(ctx, 0x12, 0x13); + mipi_dsi_dcs_write_seq_multi(ctx, 0x13, 0x15); + mipi_dsi_dcs_write_seq_multi(ctx, 0x15, 0x14); + mipi_dsi_dcs_write_seq_multi(ctx, 0x16, 0x16); + mipi_dsi_dcs_write_seq_multi(ctx, 0x17, 0x18); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1b, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1d, 0x1d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x20, 0x2f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x2e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x22, 0x2d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x23, 0x2c); + mipi_dsi_dcs_write_seq_multi(ctx, 0x29, 0x17); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2a, 0x13); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2b, 0x15); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2f, 0x14); + mipi_dsi_dcs_write_seq_multi(ctx, 0x30, 0x16); + mipi_dsi_dcs_write_seq_multi(ctx, 0x31, 0x18); + mipi_dsi_dcs_write_seq_multi(ctx, 0x32, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x34, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0x35, 0x1f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x36, 0x1f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x4d, 0x14); + mipi_dsi_dcs_write_seq_multi(ctx, 0x4e, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x4f, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x53, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x71, 0x30); + mipi_dsi_dcs_write_seq_multi(ctx, 0x79, 0x11); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7a, 0x82); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7b, 0x8f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7d, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x80, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x81, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x82, 0x13); + mipi_dsi_dcs_write_seq_multi(ctx, 0x84, 0x31); + mipi_dsi_dcs_write_seq_multi(ctx, 0x85, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x86, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x87, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x90, 0x13); + mipi_dsi_dcs_write_seq_multi(ctx, 0x92, 0x31); + mipi_dsi_dcs_write_seq_multi(ctx, 0x93, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x94, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x95, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9c, 0xf4); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9d, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa0, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa2, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa3, 0x02); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa4, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa5, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0xc6, 0xc0); + mipi_dsi_dcs_write_seq_multi(ctx, 0xc9, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0xd9, 0x80); + mipi_dsi_dcs_write_seq_multi(ctx, 0xe9, 0x02); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x25); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x18, 0x22); + mipi_dsi_dcs_write_seq_multi(ctx, 0x19, 0xe4); + mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0x66, 0xd8); + mipi_dsi_dcs_write_seq_multi(ctx, 0x68, 0x50); + mipi_dsi_dcs_write_seq_multi(ctx, 0x69, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6b, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6d, 0x0d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6e, 0x48); + mipi_dsi_dcs_write_seq_multi(ctx, 0x72, 0x41); + mipi_dsi_dcs_write_seq_multi(ctx, 0x73, 0x4a); + mipi_dsi_dcs_write_seq_multi(ctx, 0x74, 0xd0); + mipi_dsi_dcs_write_seq_multi(ctx, 0x77, 0x62); + mipi_dsi_dcs_write_seq_multi(ctx, 0x79, 0x7e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7d, 0x03); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7e, 0x15); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7f, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x84, 0x4d); + mipi_dsi_dcs_write_seq_multi(ctx, 0xcf, 0x80); + mipi_dsi_dcs_write_seq_multi(ctx, 0xd6, 0x80); + mipi_dsi_dcs_write_seq_multi(ctx, 0xd7, 0x80); + mipi_dsi_dcs_write_seq_multi(ctx, 0xef, 0x20); + mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x84); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x26); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x81, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x83, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x84, 0x03); + mipi_dsi_dcs_write_seq_multi(ctx, 0x85, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x86, 0x03); + mipi_dsi_dcs_write_seq_multi(ctx, 0x87, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x88, 0x05); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8a, 0x1a); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8b, 0x11); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8c, 0x24); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8e, 0x42); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8f, 0x11); + mipi_dsi_dcs_write_seq_multi(ctx, 0x90, 0x11); + mipi_dsi_dcs_write_seq_multi(ctx, 0x91, 0x11); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9a, 0x80); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9b, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9c, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9d, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x9e, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x27); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x68); + mipi_dsi_dcs_write_seq_multi(ctx, 0x20, 0x81); + mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x6a); + mipi_dsi_dcs_write_seq_multi(ctx, 0x25, 0x81); + mipi_dsi_dcs_write_seq_multi(ctx, 0x26, 0x94); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6e, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6f, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x70, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x71, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x72, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x75, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x76, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x77, 0x00); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7d, 0x09); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7e, 0x67); + mipi_dsi_dcs_write_seq_multi(ctx, 0x80, 0x23); + mipi_dsi_dcs_write_seq_multi(ctx, 0x82, 0x09); + mipi_dsi_dcs_write_seq_multi(ctx, 0x83, 0x67); + mipi_dsi_dcs_write_seq_multi(ctx, 0x88, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x89, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa5, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa6, 0x23); + mipi_dsi_dcs_write_seq_multi(ctx, 0xa7, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0xb6, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0xe5, 0x02); + mipi_dsi_dcs_write_seq_multi(ctx, 0xe6, 0xd3); + mipi_dsi_dcs_write_seq_multi(ctx, 0xeb, 0x03); + mipi_dsi_dcs_write_seq_multi(ctx, 0xec, 0x28); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x2a); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x00, 0x91); + mipi_dsi_dcs_write_seq_multi(ctx, 0x03, 0x20); + mipi_dsi_dcs_write_seq_multi(ctx, 0x07, 0x50); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0a, 0x70); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0c, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0d, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0x0f, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x11, 0xe0); + mipi_dsi_dcs_write_seq_multi(ctx, 0x15, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x16, 0xa4); + mipi_dsi_dcs_write_seq_multi(ctx, 0x19, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1a, 0x78); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1b, 0x23); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1d, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1e, 0x3e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x1f, 0x3e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x20, 0x3e); + mipi_dsi_dcs_write_seq_multi(ctx, 0x28, 0xfd); + mipi_dsi_dcs_write_seq_multi(ctx, 0x29, 0x12); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2a, 0xe1); + mipi_dsi_dcs_write_seq_multi(ctx, 0x2d, 0x0a); + mipi_dsi_dcs_write_seq_multi(ctx, 0x30, 0x49); + mipi_dsi_dcs_write_seq_multi(ctx, 0x33, 0x96); + mipi_dsi_dcs_write_seq_multi(ctx, 0x34, 0xff); + mipi_dsi_dcs_write_seq_multi(ctx, 0x35, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0x36, 0xde); + mipi_dsi_dcs_write_seq_multi(ctx, 0x37, 0xf9); + mipi_dsi_dcs_write_seq_multi(ctx, 0x38, 0x45); + mipi_dsi_dcs_write_seq_multi(ctx, 0x39, 0xd9); + mipi_dsi_dcs_write_seq_multi(ctx, 0x3a, 0x49); + mipi_dsi_dcs_write_seq_multi(ctx, 0x4a, 0xf0); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7a, 0x09); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7b, 0x40); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7f, 0xf0); + mipi_dsi_dcs_write_seq_multi(ctx, 0x83, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x84, 0xa4); + mipi_dsi_dcs_write_seq_multi(ctx, 0x87, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x88, 0x78); + mipi_dsi_dcs_write_seq_multi(ctx, 0x89, 0x23); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8b, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8c, 0x7d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8d, 0x7d); + mipi_dsi_dcs_write_seq_multi(ctx, 0x8e, 0x7d); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x20); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00, 0x00, 0x00, 0x17, 0x00, 0x49, 0x00, 0x6a, 0x00, 0x89, 0x00, 0x9f, 0x00, 0xb6, 0x00, 0xc8); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00, 0xd9, 0x01, 0x10, 0x01, 0x3a, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb1, 0x00, 0xd9, 0x01, 0x10, 0x01, 0x3a, 0x01, 0x7a, 0x01, 0xa9, 0x01, 0xf2, 0x02, 0x2d, 0x02, 0x2e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02, 0x64, 0x02, 0xa3, 0x02, 0xca, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb2, 0x02, 0x64, 0x02, 0xa3, 0x02, 0xca, 0x03, 0x00, 0x03, 0x1e, 0x03, 0x4a, 0x03, 0x59, 0x03, 0x6a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xab, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb3, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xab, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x51, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x51, 0x00, 0x71, 0x00, 0x90, 0x00, 0xa7, 0x00, 0xbf, 0x00, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x00, 0xe2, 0x01, 0x1a, 0x01, 0x43, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb5, 0x00, 0xe2, 0x01, 0x1a, 0x01, 0x43, 0x01, 0x83, 0x01, 0xb2, 0x01, 0xfa, 0x02, 0x34, 0x02, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x02, 0x6b, 0x02, 0xa8, 0x02, 0xd0, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb6, 0x02, 0x6b, 0x02, 0xa8, 0x02, 0xd0, 0x03, 0x03, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5b, 0x03, 0x6b); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x03, 0x7e, 0x03, 0x94, 0x03, 0xac, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb7, 0x03, 0x7e, 0x03, 0x94, 0x03, 0xac, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x51, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x51, 0x00, 0x72, 0x00, 0x92, 0x00, 0xa8, 0x00, 0xbf, 0x00, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x00, 0xe2, 0x01, 0x18, 0x01, 0x42, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb9, 0x00, 0xe2, 0x01, 0x18, 0x01, 0x42, 0x01, 0x81, 0x01, 0xaf, 0x01, 0xf5, 0x02, 0x2f, 0x02, 0x31); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x02, 0x68, 0x02, 0xa6, 0x02, 0xcd, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xba, 0x02, 0x68, 0x02, 0xa6, 0x02, 0xcd, 0x03, 0x01, 0x03, 0x1f, 0x03, 0x4a, 0x03, 0x59, 0x03, 0x6a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xab, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xbb, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xab, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x21); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0x00, 0x00, 0x00, 0x17, 0x00, 0x49, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x21); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00, 0x00, 0x00, 0x17, 0x00, 0x49, 0x00, 0x6a, 0x00, 0x89, 0x00, 0x9f, 0x00, 0xb6, 0x00, 0xc8); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x00, 0xd9, 0x01, 0x10, 0x01, 0x3a, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb1, 0x00, 0xd9, 0x01, 0x10, 0x01, 0x3a, 0x01, 0x7a, 0x01, 0xa9, 0x01, 0xf2, 0x02, 0x2d, 0x02, 0x2e); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x02, 0x64, 0x02, 0xa3, 0x02, 0xca, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb2, 0x02, 0x64, 0x02, 0xa3, 0x02, 0xca, 0x03, 0x00, 0x03, 0x1e, 0x03, 0x4a, 0x03, 0x59, 0x03, 0x6a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb3, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xab, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb3, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xab, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x51, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb4, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x51, 0x00, 0x71, 0x00, 0x90, 0x00, 0xa7, 0x00, 0xbf, 0x00, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x00, 0xe2, 0x01, 0x1a, 0x01, 0x43, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb5, 0x00, 0xe2, 0x01, 0x1a, 0x01, 0x43, 0x01, 0x83, 0x01, 0xb2, 0x01, 0xfa, 0x02, 0x34, 0x02, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x02, 0x6b, 0x02, 0xa8, 0x02, 0xd0, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb6, 0x02, 0x6b, 0x02, 0xa8, 0x02, 0xd0, 0x03, 0x03, 0x03, 0x21, 0x03, 0x4d, 0x03, 0x5b, 0x03, 0x6b); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb7, 0x03, 0x7e, 0x03, 0x94, 0x03, 0xac, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb7, 0x03, 0x7e, 0x03, 0x94, 0x03, 0xac, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x51, 0x00, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb8, 0x00, 0x00, 0x00, 0x1b, 0x00, 0x51, 0x00, 0x72, 0x00, 0x92, 0x00, 0xa8, 0x00, 0xbf, 0x00, 0xd1); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0x00, 0xe2, 0x01, 0x18, 0x01, 0x42, 0x01, + mipi_dsi_dcs_write_seq_multi(ctx, 0xb9, 0x00, 0xe2, 0x01, 0x18, 0x01, 0x42, 0x01, 0x81, 0x01, 0xaf, 0x01, 0xf5, 0x02, 0x2f, 0x02, 0x31); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xba, 0x02, 0x68, 0x02, 0xa6, 0x02, 0xcd, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xba, 0x02, 0x68, 0x02, 0xa6, 0x02, 0xcd, 0x03, 0x01, 0x03, 0x1f, 0x03, 0x4a, 0x03, 0x59, 0x03, 0x6a); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xbb, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xab, 0x03, + mipi_dsi_dcs_write_seq_multi(ctx, 0xbb, 0x03, 0x7d, 0x03, 0x93, 0x03, 0xab, 0x03, 0xc8, 0x03, 0xec, 0x03, 0xfe, 0x00, 0x00); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x2c); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x61, 0x1f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x62, 0x1f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x7e, 0x03); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6a, 0x14); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6b, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6c, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x6d, 0x36); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x54, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x04); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x56, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x58, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x59, 0x0f); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0xf0); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x5a, 0x00); - - mipi_dsi_dcs_write_seq_multi(&ctx, 0xff, 0x10); - mipi_dsi_dcs_write_seq_multi(&ctx, 0xfb, 0x01); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x51, 0xff); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x24); - mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x01); - - return ctx.accum_err; + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x2c); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x61, 0x1f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x62, 0x1f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x7e, 0x03); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6a, 0x14); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6b, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6c, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x6d, 0x36); + mipi_dsi_dcs_write_seq_multi(ctx, 0x53, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x54, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x55, 0x04); + mipi_dsi_dcs_write_seq_multi(ctx, 0x56, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x58, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0x59, 0x0f); + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0xf0); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x5a, 0x00); + + mipi_dsi_dcs_write_seq_multi(ctx, 0xff, 0x10); + mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); + mipi_dsi_dcs_write_seq_multi(ctx, 0x51, 0xff); + mipi_dsi_dcs_write_seq_multi(ctx, 0x53, 0x24); + mipi_dsi_dcs_write_seq_multi(ctx, 0x55, 0x01); } static int nt36672e_power_on(struct nt36672e_panel *ctx) @@ -381,61 +377,40 @@ static int nt36672e_power_off(struct nt36672e_panel *ctx) return ret; } -static int nt36672e_on(struct nt36672e_panel *ctx) +static int nt36672e_on(struct nt36672e_panel *panel) { - struct mipi_dsi_device *dsi = ctx->dsi; - const struct panel_desc *desc = ctx->desc; - int ret = 0; + struct mipi_dsi_multi_context ctx = { .dsi = panel->dsi }; + struct mipi_dsi_device *dsi = panel->dsi; + const struct panel_desc *desc = panel->desc; dsi->mode_flags |= MIPI_DSI_MODE_LPM; - if (desc->init_sequence) { - ret = desc->init_sequence(dsi); - if (ret < 0) { - dev_err(&dsi->dev, "panel init sequence failed: %d\n", ret); - return ret; - } - } + if (desc->init_sequence) + desc->init_sequence(&ctx); - ret = mipi_dsi_dcs_exit_sleep_mode(dsi); - if (ret < 0) { - dev_err(&dsi->dev, "Failed to exit sleep mode: %d\n", ret); - return ret; - } - msleep(120); + mipi_dsi_dcs_exit_sleep_mode_multi(&ctx); + mipi_dsi_msleep(&ctx, 120); - ret = mipi_dsi_dcs_set_display_on(dsi); - if (ret < 0) { - dev_err(&dsi->dev, "Failed to set display on: %d\n", ret); - return ret; - } - msleep(100); + mipi_dsi_dcs_set_display_on_multi(&ctx); - return 0; + mipi_dsi_msleep(&ctx, 100); + + return ctx.accum_err; } -static int nt36672e_off(struct nt36672e_panel *ctx) +static int nt36672e_off(struct nt36672e_panel *panel) { - struct mipi_dsi_device *dsi = ctx->dsi; - int ret = 0; + struct mipi_dsi_multi_context ctx = { .dsi = panel->dsi }; - dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; + panel->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; - ret = mipi_dsi_dcs_set_display_off(dsi); - if (ret < 0) { - dev_err(&dsi->dev, "Failed to set display off: %d\n", ret); - return ret; - } - msleep(20); + mipi_dsi_dcs_set_display_off_multi(&ctx); + mipi_dsi_msleep(&ctx, 20); - ret = mipi_dsi_dcs_enter_sleep_mode(dsi); - if (ret < 0) { - dev_err(&dsi->dev, "Failed to enter sleep mode: %d\n", ret); - return ret; - } - msleep(60); + mipi_dsi_dcs_enter_sleep_mode_multi(&ctx); + mipi_dsi_msleep(&ctx, 60); - return 0; + return ctx.accum_err; } static int nt36672e_panel_prepare(struct drm_panel *panel) From patchwork Thu May 9 22:37:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13660482 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1330AC25B74 for ; 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l=2829; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=0hHShducaAcMM1humQX/WthNAOeANb5d92F25xx+Ojw=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmPVAv7uOuDHmzIgnZl/hgCLHI0ZGC3YAQ6chPy Lo2F9poo2qJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZj1QLwAKCRCLPIo+Aiko 1X4zCACLyiMXdslsIcAFwHjM5jLM9yNm8VCGKPBgQsAj+QXVcpr+yNuaAhwp3y5hy5dQc+ZmzUL xCK65hUPV2jIWvhcGahKYiHJCVmjtLxMAU5mYO2YTCnBnSqgvLrKNuDFSbhbRK+Pk+5Vy3Dio86 ea1ttyRr4DaTFvL3eEpTEWSbP4S3xrDwP++NQvpqh3R9Zu67Ik8pV2b65uKQcxgtHiImdo3rrEA l8k356tA62lWznZWLTrMQHIla//i71FW9KQXHOmO0Cc0XnjU0ahapJPh1pe++Crht0oWU9z9pnM 5fOf5xjkP3d//Wqc1GxiyIsAbZF081LHg+Q2d+Z+GwoYwpKZ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add missing error handling for the mipi_dsi_ functions that actually return error code instead of silently ignoring it. Fixes: 069a6c0e94f9 ("drm: panel: Add LG sw43408 panel driver") Signed-off-by: Dmitry Baryshkov Reviewed-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-lg-sw43408.c | 33 ++++++++++++++++++++++++++------ 1 file changed, 27 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/panel/panel-lg-sw43408.c index 2b3a73696dce..67a98ac508f8 100644 --- a/drivers/gpu/drm/panel/panel-lg-sw43408.c +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -62,16 +62,25 @@ static int sw43408_program(struct drm_panel *panel) { struct sw43408_panel *ctx = to_panel_info(panel); struct drm_dsc_picture_parameter_set pps; + int ret; mipi_dsi_dcs_write_seq(ctx->link, MIPI_DCS_SET_GAMMA_CURVE, 0x02); - mipi_dsi_dcs_set_tear_on(ctx->link, MIPI_DSI_DCS_TEAR_MODE_VBLANK); + ret = mipi_dsi_dcs_set_tear_on(ctx->link, MIPI_DSI_DCS_TEAR_MODE_VBLANK); + if (ret < 0) { + dev_err(panel->dev, "Failed to set tearing: %d\n", ret); + return ret; + } mipi_dsi_dcs_write_seq(ctx->link, 0x53, 0x0c, 0x30); mipi_dsi_dcs_write_seq(ctx->link, 0x55, 0x00, 0x70, 0xdf, 0x00, 0x70, 0xdf); mipi_dsi_dcs_write_seq(ctx->link, 0xf7, 0x01, 0x49, 0x0c); - mipi_dsi_dcs_exit_sleep_mode(ctx->link); + ret = mipi_dsi_dcs_exit_sleep_mode(ctx->link); + if (ret < 0) { + dev_err(panel->dev, "Failed to exit sleep mode: %d\n", ret); + return ret; + } msleep(135); @@ -97,14 +106,22 @@ static int sw43408_program(struct drm_panel *panel) mipi_dsi_dcs_write_seq(ctx->link, 0x55, 0x04, 0x61, 0xdb, 0x04, 0x70, 0xdb); mipi_dsi_dcs_write_seq(ctx->link, 0xb0, 0xca); - mipi_dsi_dcs_set_display_on(ctx->link); + ret = mipi_dsi_dcs_set_display_on(ctx->link); + if (ret < 0) { + dev_err(panel->dev, "Failed to set display on: %d\n", ret); + return ret; + } msleep(50); ctx->link->mode_flags &= ~MIPI_DSI_MODE_LPM; drm_dsc_pps_payload_pack(&pps, ctx->link->dsc); - mipi_dsi_picture_parameter_set(ctx->link, &pps); + ret = mipi_dsi_picture_parameter_set(ctx->link, &pps); + if (ret < 0) { + dev_err(panel->dev, "Failed to set PPS: %d\n", ret); + return ret; + } ctx->link->mode_flags |= MIPI_DSI_MODE_LPM; @@ -113,8 +130,12 @@ static int sw43408_program(struct drm_panel *panel) * PPS 1 if pps_identifier is 0 * PPS 2 if pps_identifier is 1 */ - mipi_dsi_compression_mode_ext(ctx->link, true, - MIPI_DSI_COMPRESSION_DSC, 1); + ret = mipi_dsi_compression_mode_ext(ctx->link, true, + MIPI_DSI_COMPRESSION_DSC, 1); + if (ret < 0) { + dev_err(panel->dev, "Failed to set compression mode: %d\n", ret); + return ret; + } return 0; } From patchwork Thu May 9 22:37:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13660481 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 04D0FC10F1A for ; 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a=openpgp-sha256; l=5760; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=GUWCnr41TB+Guk2h1/zSROPDGudIEU9m291d3/Tj7jk=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmPVAvVHEpsHtQ0Di+uIOFvItselZiMK+9r+UUI k5OzkP5BZSJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZj1QLwAKCRCLPIo+Aiko 1Q3LB/9UnKKgdFuiCU5XHDbX1us37+pggofnVIlW3X8wgOEa4mWSE/6EpOUFQ2lzlJtqOZhs9jN XAwNM2NpoWTDGpXVFo5yOeHuRKKLPxVrjCr5C1DSPtnVqjEIn/tNYhAkRkA+r/rhHFS8KC8SL9i DIOibWPdbZmUfQybcPMc1IT7xP65iKfVbHo00p3VdDODEFC41reHt3GP6FeYnCT3KTQQsSMaBo0 cW704hv6ADVO6lAqo95JjqZizVkt6YBuDuGyOI2kuLEzOza3qcWH1z+eIMNQPbgJ3FxihDg57Gr WoYpZp4zDFXGsnXHCgW6qDEK58pAHGDm8h1UxN+aRTsVSr8a X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use newer mipi_dsi_*_multi() functions in order to simplify and cleanup panel's prepare() and unprepare() functions. Signed-off-by: Dmitry Baryshkov Reviewed-by: Douglas Anderson --- drivers/gpu/drm/panel/panel-lg-sw43408.c | 95 +++++++++++++------------------- 1 file changed, 37 insertions(+), 58 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-lg-sw43408.c b/drivers/gpu/drm/panel/panel-lg-sw43408.c index 67a98ac508f8..f3dcc39670ea 100644 --- a/drivers/gpu/drm/panel/panel-lg-sw43408.c +++ b/drivers/gpu/drm/panel/panel-lg-sw43408.c @@ -40,104 +40,83 @@ static inline struct sw43408_panel *to_panel_info(struct drm_panel *panel) static int sw43408_unprepare(struct drm_panel *panel) { - struct sw43408_panel *ctx = to_panel_info(panel); + struct sw43408_panel *sw43408 = to_panel_info(panel); + struct mipi_dsi_multi_context ctx = { .dsi = sw43408->link }; int ret; - ret = mipi_dsi_dcs_set_display_off(ctx->link); - if (ret < 0) - dev_err(panel->dev, "set_display_off cmd failed ret = %d\n", ret); + mipi_dsi_dcs_set_display_off_multi(&ctx); - ret = mipi_dsi_dcs_enter_sleep_mode(ctx->link); - if (ret < 0) - dev_err(panel->dev, "enter_sleep cmd failed ret = %d\n", ret); + mipi_dsi_dcs_enter_sleep_mode_multi(&ctx); - msleep(100); + mipi_dsi_msleep(&ctx, 100); - gpiod_set_value(ctx->reset_gpio, 1); + gpiod_set_value(sw43408->reset_gpio, 1); + + ret = regulator_bulk_disable(ARRAY_SIZE(sw43408->supplies), sw43408->supplies); - return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); + return ret ? : ctx.accum_err; } static int sw43408_program(struct drm_panel *panel) { - struct sw43408_panel *ctx = to_panel_info(panel); + struct sw43408_panel *sw43408 = to_panel_info(panel); + struct mipi_dsi_multi_context ctx = { .dsi = sw43408->link }; struct drm_dsc_picture_parameter_set pps; - int ret; - mipi_dsi_dcs_write_seq(ctx->link, MIPI_DCS_SET_GAMMA_CURVE, 0x02); + mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_SET_GAMMA_CURVE, 0x02); - ret = mipi_dsi_dcs_set_tear_on(ctx->link, MIPI_DSI_DCS_TEAR_MODE_VBLANK); - if (ret < 0) { - dev_err(panel->dev, "Failed to set tearing: %d\n", ret); - return ret; - } + mipi_dsi_dcs_set_tear_on_multi(&ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK); - mipi_dsi_dcs_write_seq(ctx->link, 0x53, 0x0c, 0x30); - mipi_dsi_dcs_write_seq(ctx->link, 0x55, 0x00, 0x70, 0xdf, 0x00, 0x70, 0xdf); - mipi_dsi_dcs_write_seq(ctx->link, 0xf7, 0x01, 0x49, 0x0c); + mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x0c, 0x30); + mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x00, 0x70, 0xdf, 0x00, 0x70, 0xdf); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xf7, 0x01, 0x49, 0x0c); - ret = mipi_dsi_dcs_exit_sleep_mode(ctx->link); - if (ret < 0) { - dev_err(panel->dev, "Failed to exit sleep mode: %d\n", ret); - return ret; - } + mipi_dsi_dcs_exit_sleep_mode_multi(&ctx); - msleep(135); + mipi_dsi_msleep(&ctx, 135); /* COMPRESSION_MODE moved after setting the PPS */ - mipi_dsi_dcs_write_seq(ctx->link, 0xb0, 0xac); - mipi_dsi_dcs_write_seq(ctx->link, 0xe5, + mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0xac); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, 0x00, 0x3a, 0x00, 0x3a, 0x00, 0x0e, 0x10); - mipi_dsi_dcs_write_seq(ctx->link, 0xb5, + mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, 0x75, 0x60, 0x2d, 0x5d, 0x80, 0x00, 0x0a, 0x0b, 0x00, 0x05, 0x0b, 0x00, 0x80, 0x0d, 0x0e, 0x40, 0x00, 0x0c, 0x00, 0x16, 0x00, 0xb8, 0x00, 0x80, 0x0d, 0x0e, 0x40, 0x00, 0x0c, 0x00, 0x16, 0x00, 0xb8, 0x00, 0x81, 0x00, 0x03, 0x03, 0x03, 0x01, 0x01); - msleep(85); - mipi_dsi_dcs_write_seq(ctx->link, 0xcd, + mipi_dsi_msleep(&ctx, 85); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, 0x00, 0x00, 0x00, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x16, 0x16); - mipi_dsi_dcs_write_seq(ctx->link, 0xcb, 0x80, 0x5c, 0x07, 0x03, 0x28); - mipi_dsi_dcs_write_seq(ctx->link, 0xc0, 0x02, 0x02, 0x0f); - mipi_dsi_dcs_write_seq(ctx->link, 0x55, 0x04, 0x61, 0xdb, 0x04, 0x70, 0xdb); - mipi_dsi_dcs_write_seq(ctx->link, 0xb0, 0xca); - - ret = mipi_dsi_dcs_set_display_on(ctx->link); - if (ret < 0) { - dev_err(panel->dev, "Failed to set display on: %d\n", ret); - return ret; - } + mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x80, 0x5c, 0x07, 0x03, 0x28); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x02, 0x02, 0x0f); + mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x04, 0x61, 0xdb, 0x04, 0x70, 0xdb); + mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0xca); - msleep(50); + mipi_dsi_dcs_set_display_on_multi(&ctx); - ctx->link->mode_flags &= ~MIPI_DSI_MODE_LPM; + mipi_dsi_msleep(&ctx, 50); - drm_dsc_pps_payload_pack(&pps, ctx->link->dsc); - ret = mipi_dsi_picture_parameter_set(ctx->link, &pps); - if (ret < 0) { - dev_err(panel->dev, "Failed to set PPS: %d\n", ret); - return ret; - } + sw43408->link->mode_flags &= ~MIPI_DSI_MODE_LPM; + + drm_dsc_pps_payload_pack(&pps, sw43408->link->dsc); - ctx->link->mode_flags |= MIPI_DSI_MODE_LPM; + mipi_dsi_picture_parameter_set_multi(&ctx, &pps); + + sw43408->link->mode_flags |= MIPI_DSI_MODE_LPM; /* * This panel uses PPS selectors with offset: * PPS 1 if pps_identifier is 0 * PPS 2 if pps_identifier is 1 */ - ret = mipi_dsi_compression_mode_ext(ctx->link, true, + mipi_dsi_compression_mode_ext_multi(&ctx, true, MIPI_DSI_COMPRESSION_DSC, 1); - if (ret < 0) { - dev_err(panel->dev, "Failed to set compression mode: %d\n", ret); - return ret; - } - - return 0; + return ctx.accum_err; } static int sw43408_prepare(struct drm_panel *panel)