From patchwork Sat May 11 15:30:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aradhya Bhatia X-Patchwork-Id: 13662416 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4177BC25B4F for ; Sat, 11 May 2024 15:55:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C6C5A10E087; Sat, 11 May 2024 15:55:15 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="B0oG7SBz"; dkim-atps=neutral Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7B6FC10E087 for ; Sat, 11 May 2024 15:55:14 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 44BFUsiL014460; Sat, 11 May 2024 10:30:54 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1715441454; bh=rTTLXewRMxGRuVDb1qnoAQIUWX9dew+c+9tpW5wzk78=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=B0oG7SBz+v35Te5KAiaNyOQiFGuJp9B1yIpJOIoXaCwdWj1vEUPjYk5iGdUiSGfcM Wcvs6amqo66AvQgNRPyP3lIRFApNpngx+UIrEmopyFfVGFC4O5+Gh1S3n9nSdOGVhe UfLy7Iie+Qez+ao+PBcMOGnLpUByuq64R6BryiHI= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 44BFUsOk032982 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 11 May 2024 10:30:54 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sat, 11 May 2024 10:30:54 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 11 May 2024 10:30:54 -0500 Received: from localhost (uda0496377.dhcp.ti.com [172.24.227.31]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44BFUr1f043147; Sat, 11 May 2024 10:30:54 -0500 From: Aradhya Bhatia To: Tomi Valkeinen , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Jyri Sarha , Thomas Zimmermann , David Airlie , Daniel Vetter CC: DRI Development List , Linux Kernel List , Sam Ravnborg , Thierry Reding , Kieran Bingham , Boris Brezillon , Nishanth Menon , Vignesh Raghavendra , Praneeth Bajjuri , Udit Kumar , Devarsh Thakkar , Jayesh Choudhary , Jai Luthra , Aradhya Bhatia Subject: [PATCH 1/7] drm/tidss: Add CRTC mode_fixup Date: Sat, 11 May 2024 21:00:45 +0530 Message-ID: <20240511153051.1355825-2-a-bhatia1@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240511153051.1355825-1-a-bhatia1@ti.com> References: <20240511153051.1355825-1-a-bhatia1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add support for mode_fixup for the tidss CRTC. Some bridges like the cdns-dsi consume the crtc_* timing parameters for programming the blanking values. Allow for the normal timing parameters to get copied to crtc_* timing params. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/tidss/tidss_crtc.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/tidss/tidss_crtc.c b/drivers/gpu/drm/tidss/tidss_crtc.c index 94f8e3178df5..797ef53d9ad2 100644 --- a/drivers/gpu/drm/tidss/tidss_crtc.c +++ b/drivers/gpu/drm/tidss/tidss_crtc.c @@ -309,12 +309,23 @@ enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc, return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode); } +static +bool tidss_crtc_mode_fixup(struct drm_crtc *crtc, + const struct drm_display_mode *mode, + struct drm_display_mode *adjusted_mode) +{ + drm_mode_set_crtcinfo(adjusted_mode, 0); + + return true; +} + static const struct drm_crtc_helper_funcs tidss_crtc_helper_funcs = { .atomic_check = tidss_crtc_atomic_check, .atomic_flush = tidss_crtc_atomic_flush, .atomic_enable = tidss_crtc_atomic_enable, .atomic_disable = tidss_crtc_atomic_disable, + .mode_fixup = tidss_crtc_mode_fixup, .mode_valid = tidss_crtc_mode_valid, }; From patchwork Sat May 11 15:30:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aradhya Bhatia X-Patchwork-Id: 13662414 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7781EC04FFE for ; Sat, 11 May 2024 15:45:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9E67210E1D0; Sat, 11 May 2024 15:45:41 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="f3nmc0DO"; dkim-atps=neutral X-Greylist: delayed 858 seconds by postgrey-1.36 at gabe; Sat, 11 May 2024 15:45:40 UTC Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by gabe.freedesktop.org (Postfix) with ESMTPS id 55B0910E1D0 for ; Sat, 11 May 2024 15:45:40 +0000 (UTC) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 44BFUu7V123386; Sat, 11 May 2024 10:30:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1715441456; bh=JVCLeYkjk+2KS5dCU/Zbfc6/YUsDSBMlJ8VlBcQesC0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=f3nmc0DOghCfOp0p27C5xx2bPHIyFs7SgOaVH8JlLDu8NiFoIuNk/zV7jnWuqH4WS sO5Q7z6GUHV+BjPLlm4k8161Te75QRdBPS46rVhucbX3MCgoBqftoJvkngZmkX7BiD AdA4vb4SLE2kL1G1ieAFWJzTH8b+9DuJWh2KTfGU= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 44BFUuO4033001 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 11 May 2024 10:30:56 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sat, 11 May 2024 10:30:55 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 11 May 2024 10:30:55 -0500 Received: from localhost (uda0496377.dhcp.ti.com [172.24.227.31]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44BFUtpU043186; Sat, 11 May 2024 10:30:55 -0500 From: Aradhya Bhatia To: Tomi Valkeinen , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Jyri Sarha , Thomas Zimmermann , David Airlie , Daniel Vetter CC: DRI Development List , Linux Kernel List , Sam Ravnborg , Thierry Reding , Kieran Bingham , Boris Brezillon , Nishanth Menon , Vignesh Raghavendra , Praneeth Bajjuri , Udit Kumar , Devarsh Thakkar , Jayesh Choudhary , Jai Luthra , Aradhya Bhatia Subject: [PATCH 2/7] drm/bridge: cdns-dsi: Fix minor bugs Date: Sat, 11 May 2024 21:00:46 +0530 Message-ID: <20240511153051.1355825-3-a-bhatia1@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240511153051.1355825-1-a-bhatia1@ti.com> References: <20240511153051.1355825-1-a-bhatia1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Update the Phy initialized state to "not initialized" when the driver (and the hardware by extension) gets suspended. This will allow the Phy to get initialized again after resume. Fix the OF node that gets passed to find the next available bridge in the display pipeline. Fix the order of DSI Link and DSI Phy inits. The link init needs to happen before the Phy is initialized, so the Phy can lock on the incoming PLL reference clock. If this doesn't happen, the Phy cannot lock (until DSI Link is init later on). This causes a warning dump during the kernel boot. Allow the D-Phy config checks to use mode->clock instead of mode->crtc_clock during mode_valid checks, like everywhere else in the driver. Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c index 7457d38622b0..557b037bbc67 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c @@ -574,7 +574,7 @@ static int cdns_dsi_check_conf(struct cdns_dsi *dsi, if (ret) return ret; - phy_mipi_dphy_get_default_config(mode->crtc_clock * 1000, + phy_mipi_dphy_get_default_config((mode_valid_check ? mode->clock : mode->crtc_clock) * 1000, mipi_dsi_pixel_format_to_bpp(output->dev->format), nlanes, phy_cfg); @@ -775,8 +775,8 @@ static void cdns_dsi_bridge_enable(struct drm_bridge *bridge) WARN_ON_ONCE(cdns_dsi_check_conf(dsi, mode, &dsi_cfg, false)); - cdns_dsi_hs_init(dsi); cdns_dsi_init_link(dsi); + cdns_dsi_hs_init(dsi); writel(HBP_LEN(dsi_cfg.hbp) | HSA_LEN(dsi_cfg.hsa), dsi->regs + VID_HSIZE1); @@ -952,7 +952,7 @@ static int cdns_dsi_attach(struct mipi_dsi_host *host, bridge = drm_panel_bridge_add_typed(panel, DRM_MODE_CONNECTOR_DSI); } else { - bridge = of_drm_find_bridge(dev->dev.of_node); + bridge = of_drm_find_bridge(np); if (!bridge) bridge = ERR_PTR(-EINVAL); } @@ -1153,6 +1153,7 @@ static int __maybe_unused cdns_dsi_suspend(struct device *dev) clk_disable_unprepare(dsi->dsi_p_clk); reset_control_assert(dsi->dsi_p_rst); dsi->link_initialized = false; + dsi->phy_initialized = false; return 0; } From patchwork Sat May 11 15:30:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aradhya Bhatia X-Patchwork-Id: 13662411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0FF79C25B4F for ; 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Sat, 11 May 2024 10:30:57 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sat, 11 May 2024 10:30:57 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 11 May 2024 10:30:57 -0500 Received: from localhost (uda0496377.dhcp.ti.com [172.24.227.31]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44BFUut8043225; Sat, 11 May 2024 10:30:57 -0500 From: Aradhya Bhatia To: Tomi Valkeinen , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Jyri Sarha , Thomas Zimmermann , David Airlie , Daniel Vetter CC: DRI Development List , Linux Kernel List , Sam Ravnborg , Thierry Reding , Kieran Bingham , Boris Brezillon , Nishanth Menon , Vignesh Raghavendra , Praneeth Bajjuri , Udit Kumar , Devarsh Thakkar , Jayesh Choudhary , Jai Luthra , Aradhya Bhatia Subject: [PATCH 3/7] drm/bridge: cdns-dsi: Wait for Clk and Data Lanes to be ready Date: Sat, 11 May 2024 21:00:47 +0530 Message-ID: <20240511153051.1355825-4-a-bhatia1@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240511153051.1355825-1-a-bhatia1@ti.com> References: <20240511153051.1355825-1-a-bhatia1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Once the DSI Link and DSI Phy are initialized, the code needs to wait for Clk and Data Lanes to be ready, before continuing configuration. This is in accordance with the DSI Start-up procedure, found in the Technical Reference Manual of Texas Instrument's J721E SoC[0] which houses this DSI TX controller. If the previous bridge (or crtc/encoder) are configured pre-maturely, the input signal FIFO gets corrupt. This introduces a color-shift on the display. Allow the driver to wait for the clk and data lanes to get ready during DSI enable. Fixes: e19233955d9e ("drm/bridge: Add Cadence DSI driver") Signed-off-by: Aradhya Bhatia Tested-by: Dominik Haller --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c index 557b037bbc67..05d2f4cc50da 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c @@ -761,7 +761,7 @@ static void cdns_dsi_bridge_enable(struct drm_bridge *bridge) struct phy_configure_opts_mipi_dphy *phy_cfg = &output->phy_opts.mipi_dphy; unsigned long tx_byte_period; struct cdns_dsi_cfg dsi_cfg; - u32 tmp, reg_wakeup, div; + u32 tmp, reg_wakeup, div, status; int nlanes; if (WARN_ON(pm_runtime_get_sync(dsi->base.dev) < 0)) @@ -778,6 +778,17 @@ static void cdns_dsi_bridge_enable(struct drm_bridge *bridge) cdns_dsi_init_link(dsi); cdns_dsi_hs_init(dsi); + /* + * Now that the DSI Link and DSI Phy are initialized, + * wait for the CLK and Data Lanes to be ready. + */ + tmp = CLK_LANE_RDY; + for (int i = 0; i < nlanes; i++) + tmp |= DATA_LANE_RDY(i); + + WARN_ON_ONCE(readl_poll_timeout(dsi->regs + MCTL_MAIN_STS, status, + status & tmp, 100, 0)); + writel(HBP_LEN(dsi_cfg.hbp) | HSA_LEN(dsi_cfg.hsa), dsi->regs + VID_HSIZE1); writel(HFP_LEN(dsi_cfg.hfp) | HACT_LEN(dsi_cfg.hact), From patchwork Sat May 11 15:30:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aradhya Bhatia X-Patchwork-Id: 13662426 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 63F8EC04FFE for ; Sat, 11 May 2024 15:58:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CC00310E1E9; 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Sat, 11 May 2024 10:30:59 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sat, 11 May 2024 10:30:58 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 11 May 2024 10:30:58 -0500 Received: from localhost (uda0496377.dhcp.ti.com [172.24.227.31]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44BFUw2S043270; Sat, 11 May 2024 10:30:58 -0500 From: Aradhya Bhatia To: Tomi Valkeinen , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Jyri Sarha , Thomas Zimmermann , David Airlie , Daniel Vetter CC: DRI Development List , Linux Kernel List , Sam Ravnborg , Thierry Reding , Kieran Bingham , Boris Brezillon , Nishanth Menon , Vignesh Raghavendra , Praneeth Bajjuri , Udit Kumar , Devarsh Thakkar , Jayesh Choudhary , Jai Luthra , Aradhya Bhatia Subject: [PATCH 4/7] drm/bridge: cdns-dsi: Reset the DCS write FIFO Date: Sat, 11 May 2024 21:00:48 +0530 Message-ID: <20240511153051.1355825-5-a-bhatia1@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240511153051.1355825-1-a-bhatia1@ti.com> References: <20240511153051.1355825-1-a-bhatia1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Allow the DCS Write FIFO in the cdns-dsi controller to reset before any DCS packet is transmitted to the DSI sink device. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c index 05d2f4cc50da..87fdd07ca0bc 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c @@ -1037,6 +1037,9 @@ static ssize_t cdns_dsi_transfer(struct mipi_dsi_host *host, cdns_dsi_init_link(dsi); + /* Reset the DCS Write FIFO */ + writel(0x00, dsi->regs + DIRECT_CMD_FIFO_RST); + ret = mipi_dsi_create_packet(&packet, msg); if (ret) goto out; From patchwork Sat May 11 15:30:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aradhya Bhatia X-Patchwork-Id: 13662417 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EBF7DC04FFE for ; Sat, 11 May 2024 15:55:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8508610E0C9; Sat, 11 May 2024 15:55:17 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="Gw29m6D2"; dkim-atps=neutral Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by gabe.freedesktop.org (Postfix) with ESMTPS id C2C0010E0C9 for ; Sat, 11 May 2024 15:55:14 +0000 (UTC) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 44BFV09f014469; Sat, 11 May 2024 10:31:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1715441460; bh=fk0R74ejNAtWO6vhDM0NFCaBa9DRbhEs2Wo/6bUX1hc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Gw29m6D2u+PMlzQE3AhtqF2y3G7biUiGhTgqSNX7tg1SYvGTJX/Eq8PqmxvREOFzu xE05EjfnPCKQE7bbLzYWm1JqMQQZsVyhRfYtfNii3FMi86uiMfLS3KSiYRonhbRArE 6H+a+dZkV3qx4gXnwk9GlHKhvVGoYsWUTYedteoA= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 44BFV0LP098507 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 11 May 2024 10:31:00 -0500 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sat, 11 May 2024 10:31:00 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 11 May 2024 10:31:00 -0500 Received: from localhost (uda0496377.dhcp.ti.com [172.24.227.31]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44BFUxUA074866; Sat, 11 May 2024 10:31:00 -0500 From: Aradhya Bhatia To: Tomi Valkeinen , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Jyri Sarha , Thomas Zimmermann , David Airlie , Daniel Vetter CC: DRI Development List , Linux Kernel List , Sam Ravnborg , Thierry Reding , Kieran Bingham , Boris Brezillon , Nishanth Menon , Vignesh Raghavendra , Praneeth Bajjuri , Udit Kumar , Devarsh Thakkar , Jayesh Choudhary , Jai Luthra , Aradhya Bhatia Subject: [PATCH 5/7] drm/bridge: cdns-dsi: Support atomic bridge APIs Date: Sat, 11 May 2024 21:00:49 +0530 Message-ID: <20240511153051.1355825-6-a-bhatia1@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240511153051.1355825-1-a-bhatia1@ti.com> References: <20240511153051.1355825-1-a-bhatia1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Change the existing (and deparacated) bridge hooks, to the bridge atomic APIs. Add drm helpers for duplicate_state, destroy_state, and bridge_reset bridge hooks. Further add support for the input format negotiation hook. Signed-off-by: Aradhya Bhatia --- .../gpu/drm/bridge/cadence/cdns-dsi-core.c | 70 ++++++++++++++++--- 1 file changed, 62 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c index 87fdd07ca0bc..c7519d18e94f 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -655,7 +656,8 @@ cdns_dsi_bridge_mode_valid(struct drm_bridge *bridge, return MODE_OK; } -static void cdns_dsi_bridge_disable(struct drm_bridge *bridge) +static void cdns_dsi_bridge_atomic_disable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge); struct cdns_dsi *dsi = input_to_dsi(input); @@ -675,7 +677,8 @@ static void cdns_dsi_bridge_disable(struct drm_bridge *bridge) pm_runtime_put(dsi->base.dev); } -static void cdns_dsi_bridge_post_disable(struct drm_bridge *bridge) +static void cdns_dsi_bridge_post_disable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge); struct cdns_dsi *dsi = input_to_dsi(input); @@ -752,7 +755,8 @@ static void cdns_dsi_init_link(struct cdns_dsi *dsi) dsi->link_initialized = true; } -static void cdns_dsi_bridge_enable(struct drm_bridge *bridge) +static void cdns_dsi_bridge_atomic_enable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge); struct cdns_dsi *dsi = input_to_dsi(input); @@ -903,7 +907,8 @@ static void cdns_dsi_bridge_enable(struct drm_bridge *bridge) writel(tmp, dsi->regs + MCTL_MAIN_EN); } -static void cdns_dsi_bridge_pre_enable(struct drm_bridge *bridge) +static void cdns_dsi_bridge_pre_enable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge); struct cdns_dsi *dsi = input_to_dsi(input); @@ -915,13 +920,62 @@ static void cdns_dsi_bridge_pre_enable(struct drm_bridge *bridge) cdns_dsi_hs_init(dsi); } +static u32 *cdns_dsi_bridge_get_input_bus_fmts(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state, + u32 output_fmt, + unsigned int *num_input_fmts) +{ + struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge); + struct cdns_dsi *dsi = input_to_dsi(input); + struct cdns_dsi_output *output = &dsi->output; + u32 *input_fmts; + + *num_input_fmts = 0; + + input_fmts = kzalloc(sizeof(*input_fmts), GFP_KERNEL); + if (!input_fmts) + return NULL; + + switch (output->dev->format) { + case MIPI_DSI_FMT_RGB888: + input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24; + break; + + case MIPI_DSI_FMT_RGB666: + input_fmts[0] = MEDIA_BUS_FMT_RGB666_1X24_CPADHI; + break; + + case MIPI_DSI_FMT_RGB666_PACKED: + input_fmts[0] = MEDIA_BUS_FMT_RGB666_1X18; + break; + + case MIPI_DSI_FMT_RGB565: + input_fmts[0] = MEDIA_BUS_FMT_RGB565_1X16; + break; + + default: + /* Unsupported DSI Format */ + return NULL; + } + + *num_input_fmts = 1; + + return input_fmts; +} + static const struct drm_bridge_funcs cdns_dsi_bridge_funcs = { .attach = cdns_dsi_bridge_attach, .mode_valid = cdns_dsi_bridge_mode_valid, - .disable = cdns_dsi_bridge_disable, - .pre_enable = cdns_dsi_bridge_pre_enable, - .enable = cdns_dsi_bridge_enable, - .post_disable = cdns_dsi_bridge_post_disable, + .atomic_disable = cdns_dsi_bridge_atomic_disable, + .atomic_pre_enable = cdns_dsi_bridge_atomic_pre_enable, + .atomic_enable = cdns_dsi_bridge_atomic_enable, + .atomic_post_disable = cdns_dsi_bridge_atomic_post_disable, + .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, + .atomic_reset = drm_atomic_helper_bridge_reset, + .atomic_get_input_bus_fmts = cdns_dsi_bridge_get_input_bus_fmts, }; static int cdns_dsi_attach(struct mipi_dsi_host *host, From patchwork Sat May 11 15:30:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aradhya Bhatia X-Patchwork-Id: 13662413 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F0153C04FFE for ; Sat, 11 May 2024 15:39:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A31B210E204; Sat, 11 May 2024 15:39:40 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="c5J30rpG"; dkim-atps=neutral Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1328710E1D0 for ; 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Sat, 11 May 2024 10:31:01 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 11 May 2024 10:31:01 -0500 Received: from localhost (uda0496377.dhcp.ti.com [172.24.227.31]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44BFV0AO043328; Sat, 11 May 2024 10:31:01 -0500 From: Aradhya Bhatia To: Tomi Valkeinen , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Jyri Sarha , Thomas Zimmermann , David Airlie , Daniel Vetter CC: DRI Development List , Linux Kernel List , Sam Ravnborg , Thierry Reding , Kieran Bingham , Boris Brezillon , Nishanth Menon , Vignesh Raghavendra , Praneeth Bajjuri , Udit Kumar , Devarsh Thakkar , Jayesh Choudhary , Jai Luthra , Aradhya Bhatia Subject: [PATCH 6/7] drm/bridge: Introduce early_enable and late disable Date: Sat, 11 May 2024 21:00:50 +0530 Message-ID: <20240511153051.1355825-7-a-bhatia1@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240511153051.1355825-1-a-bhatia1@ti.com> References: <20240511153051.1355825-1-a-bhatia1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" With the existing pre_enable and enable function hooks, the order of enable of display elements looks as follows, crtc_enable -> bridge[n]_pre_enable -> ... -> bridge[1]_pre_enable -> encoder_enable -> bridge[1]_enable -> ... -> bridge[n]_enable and vice versa for the disable. Some bridges need to be up and running before and after their source gets enabled and has run. In some case, that source is a display unit, controlled as part of &drm_crtc. For those bridges, add support for early_enable and late_disable function hooks. Signed-off-by: Aradhya Bhatia --- drivers/gpu/drm/drm_atomic_helper.c | 67 +++++++++++++++++++++++ drivers/gpu/drm/drm_bridge.c | 84 +++++++++++++++++++++++++++++ include/drm/drm_bridge.h | 73 +++++++++++++++++++++++++ 3 files changed, 224 insertions(+) diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c index fb97b51b38f1..396bb83e4296 100644 --- a/drivers/gpu/drm/drm_atomic_helper.c +++ b/drivers/gpu/drm/drm_atomic_helper.c @@ -1234,6 +1234,49 @@ disable_outputs(struct drm_device *dev, struct drm_atomic_state *old_state) if (ret == 0) drm_crtc_vblank_put(crtc); } + + for_each_oldnew_connector_in_state(old_state, connector, old_conn_state, + new_conn_state, i) { + struct drm_encoder *encoder; + struct drm_bridge *bridge; + + /* + * Shut down everything that's in the changeset and currently + * still on. So need to check the old, saved state. + */ + if (!old_conn_state->crtc) + continue; + + old_crtc_state = drm_atomic_get_old_crtc_state(old_state, old_conn_state->crtc); + + if (new_conn_state->crtc) + new_crtc_state = drm_atomic_get_new_crtc_state(old_state, + new_conn_state->crtc); + else + new_crtc_state = NULL; + + if (!crtc_needs_disable(old_crtc_state, new_crtc_state) || + !drm_atomic_crtc_needs_modeset(old_conn_state->crtc->state)) + continue; + + encoder = old_conn_state->best_encoder; + + /* We shouldn't get this far if we didn't previously have + * an encoder.. but WARN_ON() rather than explode. + */ + if (WARN_ON(!encoder)) + continue; + + drm_dbg_atomic(dev, "disabling [ENCODER:%d:%s]\n", + encoder->base.id, encoder->name); + + /* + * Each encoder has at most one connector (since we always steal + * it away), so we won't call disable hooks twice. + */ + bridge = drm_bridge_chain_get_first_bridge(encoder); + drm_atomic_bridge_chain_late_disable(bridge, old_state); + } } /** @@ -1469,6 +1512,30 @@ void drm_atomic_helper_commit_modeset_enables(struct drm_device *dev, struct drm_connector_state *new_conn_state; int i; + for_each_new_connector_in_state(old_state, connector, new_conn_state, i) { + struct drm_encoder *encoder; + struct drm_bridge *bridge; + + if (!new_conn_state->best_encoder) + continue; + + if (!new_conn_state->crtc->state->active || + !drm_atomic_crtc_needs_modeset(new_conn_state->crtc->state)) + continue; + + encoder = new_conn_state->best_encoder; + + drm_dbg_atomic(dev, "enabling [ENCODER:%d:%s]\n", + encoder->base.id, encoder->name); + + /* + * Each encoder has at most one connector (since we always steal + * it away), so we won't call enable hooks twice. + */ + bridge = drm_bridge_chain_get_first_bridge(encoder); + drm_atomic_bridge_chain_early_enable(bridge, old_state); + } + for_each_oldnew_crtc_in_state(old_state, crtc, old_crtc_state, new_crtc_state, i) { const struct drm_crtc_helper_funcs *funcs; diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c index 28abe9aa99ca..b9070f6b3554 100644 --- a/drivers/gpu/drm/drm_bridge.c +++ b/drivers/gpu/drm/drm_bridge.c @@ -623,6 +623,50 @@ void drm_atomic_bridge_chain_disable(struct drm_bridge *bridge, } EXPORT_SYMBOL(drm_atomic_bridge_chain_disable); +/** + * drm_atomic_bridge_chain_late_disable - disables all bridges in the encoder + * chain after crtc is disabled. + * @bridge: bridge control structure + * @old_state: old atomic state + * + * Calls &drm_bridge_funcs.atomic_late_disable (falls back on + * &drm_bridge_funcs.late_disable) op for all the bridges in the + * encoder chain, starting from the last bridge to the first. These are called + * after calling &drm_crtc_helper_funcs.atomic_disable. + * + * Note: the bridge passed should be the one closest to the encoder + */ +void drm_atomic_bridge_chain_late_disable(struct drm_bridge *bridge, + struct drm_atomic_state *old_state) +{ + struct drm_encoder *encoder; + struct drm_bridge *iter; + + if (!bridge) + return; + + encoder = bridge->encoder; + list_for_each_entry_reverse(iter, &encoder->bridge_chain, chain_node) { + if (iter->funcs->atomic_late_disable) { + struct drm_bridge_state *old_bridge_state; + + old_bridge_state = + drm_atomic_get_old_bridge_state(old_state, + iter); + if (WARN_ON(!old_bridge_state)) + return; + + iter->funcs->atomic_late_disable(iter, old_bridge_state); + } else if (iter->funcs->late_disable) { + iter->funcs->late_disable(iter); + } + + if (iter == bridge) + break; + } +} +EXPORT_SYMBOL(drm_atomic_bridge_chain_late_disable); + static void drm_atomic_bridge_call_post_disable(struct drm_bridge *bridge, struct drm_atomic_state *old_state) { @@ -728,6 +772,46 @@ void drm_atomic_bridge_chain_post_disable(struct drm_bridge *bridge, } EXPORT_SYMBOL(drm_atomic_bridge_chain_post_disable); +/** + * drm_atomic_bridge_chain_early_enable - enables all bridges in the encoder + * chain before it's crtc is enabled + * @bridge: bridge control structure + * @old_state: old atomic state + * + * Calls &drm_bridge_funcs.atomic_early_enable (falls back on + * &drm_bridge_funcs.early_enable) op for all the bridges in the + * encoder chain, starting from the first bridge to the last. These are called + * before even the &drm_crtc_helper_funcs.atomic_enable is called. + * + * Note: the bridge passed should be the one closest to the encoder. + */ +void drm_atomic_bridge_chain_early_enable(struct drm_bridge *bridge, + struct drm_atomic_state *old_state) +{ + struct drm_encoder *encoder; + + if (!bridge) + return; + + encoder = bridge->encoder; + list_for_each_entry_from(bridge, &encoder->bridge_chain, chain_node) { + if (bridge->funcs->atomic_early_enable) { + struct drm_bridge_state *old_bridge_state; + + old_bridge_state = + drm_atomic_get_old_bridge_state(old_state, + bridge); + if (WARN_ON(!old_bridge_state)) + return; + + bridge->funcs->atomic_early_enable(bridge, old_bridge_state); + } else if (bridge->funcs->early_enable) { + bridge->funcs->early_enable(bridge); + } + } +} +EXPORT_SYMBOL(drm_atomic_bridge_chain_early_enable); + static void drm_atomic_bridge_call_pre_enable(struct drm_bridge *bridge, struct drm_atomic_state *old_state) { diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge.h index 4baca0d9107b..40f93230abb2 100644 --- a/include/drm/drm_bridge.h +++ b/include/drm/drm_bridge.h @@ -206,6 +206,20 @@ struct drm_bridge_funcs { */ void (*post_disable)(struct drm_bridge *bridge); + /** + * @late_disable: + * + * This callback should disable the bridge. It is called right after the + * preceding element in the display pipe is disabled. If the preceding + * element is a bridge this means it's called after that bridge's + * @atomic_post_disable. If the preceding element is a &drm_crtc it's + * called right after the crtc's &drm_crtc_helper_funcs.atomic_disable + * hook. + * + * The @late_disable callback is optional. + */ + void (*late_disable)(struct drm_bridge *bridge); + /** * @mode_set: * @@ -235,6 +249,26 @@ struct drm_bridge_funcs { void (*mode_set)(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode); + + /** + * @early_enable: + * + * This callback should enable the bridge. It is called right before + * the preceding element in the display pipe is enabled. If the + * preceding element is a bridge this means it's called before that + * bridge's @early_enable. If the preceding element is a &drm_crtc it's + * called right before the crtc's &drm_crtc_helper_funcs.atomic_enable + * hook. + * + * The display pipe (i.e. clocks and timing signals) feeding this bridge + * will not yet be running when this callback is called. The bridge can + * enable the display link feeding the next bridge in the chain (if + * there is one) when this callback is called. + * + * The @early_enable callback is optional. + */ + void (*early_enable)(struct drm_bridge *bridge); + /** * @pre_enable: * @@ -285,6 +319,26 @@ struct drm_bridge_funcs { */ void (*enable)(struct drm_bridge *bridge); + /** + * @atomic_early_enable: + * + * This callback should enable the bridge. It is called right before + * the preceding element in the display pipe is enabled. If the + * preceding element is a bridge this means it's called before that + * bridge's @atomic_early_enable. If the preceding element is a + * &drm_crtc it's called right before the crtc's + * &drm_crtc_helper_funcs.atomic_enable hook. + * + * The display pipe (i.e. clocks and timing signals) feeding this bridge + * will not yet be running when this callback is called. The bridge can + * enable the display link feeding the next bridge in the chain (if + * there is one) when this callback is called. + * + * The @early_enable callback is optional. + */ + void (*atomic_early_enable)(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state); + /** * @atomic_pre_enable: * @@ -361,6 +415,21 @@ struct drm_bridge_funcs { void (*atomic_post_disable)(struct drm_bridge *bridge, struct drm_bridge_state *old_bridge_state); + /** + * @atomic_late_disable: + * + * This callback should disable the bridge. It is called right after the + * preceding element in the display pipe is disabled. If the preceding + * element is a bridge this means it's called after that bridge's + * @atomic_late_disable. If the preceding element is a &drm_crtc it's + * called right after the crtc's &drm_crtc_helper_funcs.atomic_disable + * hook. + * + * The @atomic_late_disable callback is optional. + */ + void (*atomic_late_disable)(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state); + /** * @atomic_duplicate_state: * @@ -873,6 +942,10 @@ void drm_atomic_bridge_chain_disable(struct drm_bridge *bridge, struct drm_atomic_state *state); void drm_atomic_bridge_chain_post_disable(struct drm_bridge *bridge, struct drm_atomic_state *state); +void drm_atomic_bridge_chain_late_disable(struct drm_bridge *bridge, + struct drm_atomic_state *state); +void drm_atomic_bridge_chain_early_enable(struct drm_bridge *bridge, + struct drm_atomic_state *state); void drm_atomic_bridge_chain_pre_enable(struct drm_bridge *bridge, struct drm_atomic_state *state); void drm_atomic_bridge_chain_enable(struct drm_bridge *bridge, From patchwork Sat May 11 15:30:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aradhya Bhatia X-Patchwork-Id: 13662427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 89311C04FFE for ; Sat, 11 May 2024 15:58:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A07EA10E1F6; Sat, 11 May 2024 15:58:54 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="SFhIkyUX"; dkim-atps=neutral Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2971710E1E9 for ; Sat, 11 May 2024 15:58:50 +0000 (UTC) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 44BFV45V005155; Sat, 11 May 2024 10:31:04 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1715441464; bh=ozwCR1H0ki9FJHXenTL7Gc8Qqb4D9tSdsATJFtrjixA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=SFhIkyUXWcq5UhPlZoExQnxXigK2/1A3Meuo3tVq+MSLExleEzlPBGc+56Gd/3PMs eFZ44OHdP7aYWqLsYx89us+zdIQNZCKnIWqTmu/TKlAFpnEKKGgJ9URSjP3QLQwP/4 7Ahl+UVdAMBkoHGgYAbkg71aFrOgT7of6qL/vPyA= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 44BFV34U098599 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sat, 11 May 2024 10:31:04 -0500 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Sat, 11 May 2024 10:31:03 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Sat, 11 May 2024 10:31:03 -0500 Received: from localhost (uda0496377.dhcp.ti.com [172.24.227.31]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44BFV2Ph043490; Sat, 11 May 2024 10:31:02 -0500 From: Aradhya Bhatia To: Tomi Valkeinen , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Jyri Sarha , Thomas Zimmermann , David Airlie , Daniel Vetter CC: DRI Development List , Linux Kernel List , Sam Ravnborg , Thierry Reding , Kieran Bingham , Boris Brezillon , Nishanth Menon , Vignesh Raghavendra , Praneeth Bajjuri , Udit Kumar , Devarsh Thakkar , Jayesh Choudhary , Jai Luthra , Aradhya Bhatia Subject: [PATCH 7/7] drm/bridge: cdns-dsi: Implement early_enable and late_disable Date: Sat, 11 May 2024 21:00:51 +0530 Message-ID: <20240511153051.1355825-8-a-bhatia1@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240511153051.1355825-1-a-bhatia1@ti.com> References: <20240511153051.1355825-1-a-bhatia1@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The cdsn-dsi controller requires that it be turned on completely before the input DPI's source has begun streaming. Since tidss's videoport starts streaming via crtc enable hooks, we need cdns-dsi to be up and running before that. Hence, use the early_enable and late_disable hooks to get pass the color issues. Signed-off-by: Aradhya Bhatia --- .../gpu/drm/bridge/cadence/cdns-dsi-core.c | 36 ++++--------------- 1 file changed, 6 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c index c7519d18e94f..53fa20720089 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-dsi-core.c @@ -656,8 +656,8 @@ cdns_dsi_bridge_mode_valid(struct drm_bridge *bridge, return MODE_OK; } -static void cdns_dsi_bridge_atomic_disable(struct drm_bridge *bridge, - struct drm_bridge_state *old_bridge_state) +static void cdns_dsi_bridge_atomic_late_disable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge); struct cdns_dsi *dsi = input_to_dsi(input); @@ -677,15 +677,6 @@ static void cdns_dsi_bridge_atomic_disable(struct drm_bridge *bridge, pm_runtime_put(dsi->base.dev); } -static void cdns_dsi_bridge_post_disable(struct drm_bridge *bridge, - struct drm_bridge_state *old_bridge_state) -{ - struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge); - struct cdns_dsi *dsi = input_to_dsi(input); - - pm_runtime_put(dsi->base.dev); -} - static void cdns_dsi_hs_init(struct cdns_dsi *dsi) { struct cdns_dsi_output *output = &dsi->output; @@ -755,8 +746,8 @@ static void cdns_dsi_init_link(struct cdns_dsi *dsi) dsi->link_initialized = true; } -static void cdns_dsi_bridge_atomic_enable(struct drm_bridge *bridge, - struct drm_bridge_state *old_bridge_state) +static void cdns_dsi_bridge_atomic_early_enable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) { struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge); struct cdns_dsi *dsi = input_to_dsi(input); @@ -907,19 +898,6 @@ static void cdns_dsi_bridge_atomic_enable(struct drm_bridge *bridge, writel(tmp, dsi->regs + MCTL_MAIN_EN); } -static void cdns_dsi_bridge_pre_enable(struct drm_bridge *bridge, - struct drm_bridge_state *old_bridge_state) -{ - struct cdns_dsi_input *input = bridge_to_cdns_dsi_input(bridge); - struct cdns_dsi *dsi = input_to_dsi(input); - - if (WARN_ON(pm_runtime_get_sync(dsi->base.dev) < 0)) - return; - - cdns_dsi_init_link(dsi); - cdns_dsi_hs_init(dsi); -} - static u32 *cdns_dsi_bridge_get_input_bus_fmts(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, @@ -968,10 +946,8 @@ static u32 *cdns_dsi_bridge_get_input_bus_fmts(struct drm_bridge *bridge, static const struct drm_bridge_funcs cdns_dsi_bridge_funcs = { .attach = cdns_dsi_bridge_attach, .mode_valid = cdns_dsi_bridge_mode_valid, - .atomic_disable = cdns_dsi_bridge_atomic_disable, - .atomic_pre_enable = cdns_dsi_bridge_atomic_pre_enable, - .atomic_enable = cdns_dsi_bridge_atomic_enable, - .atomic_post_disable = cdns_dsi_bridge_atomic_post_disable, + .atomic_early_enable = cdns_dsi_bridge_atomic_early_enable, + .atomic_late_disable = cdns_dsi_bridge_atomic_late_disable, .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, .atomic_reset = drm_atomic_helper_bridge_reset,