From patchwork Tue May 28 09:39:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhavya Kapoor X-Patchwork-Id: 13676380 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10561C25B78 for ; Tue, 28 May 2024 09:39:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=nbF91iDCh+Su+4iPDNZtQtYSDTwlwrcEjxjzKZg/y0E=; b=ZXXy/oscyML/zZ tDgIpsbZ9NOBbU7xuwueSMuq1cKhlRvJQ+dHqCQkkJM6bF7DJXYsS4KKLEKi/5T9Jywntn41XSuDQ mlzNhcbvs+P2u726BXhMiRBJhtsed2g8BzJ18bD/maFtyJebPewNGT0aGPgwJRmg7u6Walx+iBogr +Q3NphGI/tfvf2kC8WTqkokgJEOX0RtrC0rgc2q+Iht7LIxrZoP3P4/4BYWFKpeu4I3f+ww/5ovXB Tu5KGMWqiqOF9Y79nwkiaDRfqFmMWuOi2USwC6cov9KrJP8q1uInJNvC4to8PVz3hAyLX1vpfPCUL Psd2qkPIa4zvOV+H9vyQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sBtIk-000000004Sh-1Iyj; Tue, 28 May 2024 09:39:26 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sBtIh-000000004S7-2KAM for linux-arm-kernel@lists.infradead.org; Tue, 28 May 2024 09:39:25 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 44S9dDjY031689; Tue, 28 May 2024 04:39:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1716889153; bh=focKs81VgYdLLbkCANUI0lOf4MSxv0z3hdKvDtcsNZg=; h=From:To:CC:Subject:Date; b=roJyxgCEvJTO54W6LjMli6Huo5/o+jMMSsfWnA4rs31KoHpmHNvBujhCgUBAeMZLt UETkw5VwB0FcJoy9z6/t2lUZLWp2I517YdlMuEmwqJ/i/Jj/gWemOECG8dqr+M71fO k0IsxHujTXKRg3tj9tOydZ7P6lUnuRDUJdDKRaN0= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 44S9dDwb100659 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 28 May 2024 04:39:13 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 28 May 2024 04:39:12 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 28 May 2024 04:39:12 -0500 Received: from localhost (a0498981-hp-z2-tower-g5-workstation.dhcp.ti.com [10.24.68.216]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 44S9dBS6040351; Tue, 28 May 2024 04:39:12 -0500 From: Bhavya Kapoor To: , CC: , , , , , , , Subject: [PATCH] arm64: dts: ti: k3-j722s-evm: Enable main_uart5 Date: Tue, 28 May 2024 15:09:11 +0530 Message-ID: <20240528093911.47786-1-b-kapoor@ti.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240528_023923_696922_11DE3156 X-CRM114-Status: GOOD ( 10.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org main_uart5 node defined in the SoC dtsi file is incomplete and will not be functional unless it is extended with pinmux information at board integration level. Thus, add pinmux for main_uart5 in the board dts file and enable it to make it functional. Signed-off-by: Bhavya Kapoor --- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index bf3c246d13d1..e3892a6f2fab 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -18,6 +18,7 @@ / { aliases { serial0 = &wkup_uart0; serial2 = &main_uart0; + serial3 = &main_uart5; mmc0 = &sdhci0; mmc1 = &sdhci1; }; @@ -142,6 +143,14 @@ J722S_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (B22) UART0_TXD */ bootph-all; }; + main_uart5_pins_default: main-uart5-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0108, PIN_INPUT, 3) /* (J27) UART5_RXD */ + J722S_IOPAD(0x010c, PIN_OUTPUT, 3) /* (H27) UART5_TXD */ + >; + bootph-all; + }; + vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { pinctrl-single,pins = < J722S_IOPAD(0x0120, PIN_INPUT, 7) /* (F27) MMC2_CMD.GPIO0_70 */ @@ -240,6 +249,13 @@ &main_uart0 { bootph-all; }; +&main_uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&main_uart5_pins_default>; + status = "okay"; + bootph-all; +}; + &mcu_pmx0 { wkup_uart0_pins_default: wkup-uart0-default-pins {