From patchwork Wed May 29 03:16:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Damato X-Patchwork-Id: 13677730 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-oi1-f173.google.com (mail-oi1-f173.google.com [209.85.167.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 103F015B126 for ; Wed, 29 May 2024 03:20:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716952850; cv=none; b=L7GowDJAdKwLyeRRthdwaqeDy1naaW/yPmE1MXpKM/8yvqaJ+/C17QkFOabXO18cGVuOMDyc3IFiKYsiuD+7iQ6rTuZ7UgHFZzFgoq5DwNoHJ8e0DZzPrH1oScknD7o3sTWJhWCNpwE0poSVxJ9Y/3T3qtREnt4u5AxPq+enZY0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716952850; c=relaxed/simple; bh=BVpS8rKD6cvn1sPKzxoaeISlmBMwAbkMpGgmUZ9C45g=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ng3VUu3sHYNuwYrR+HrqwORH7qYj2rqyJnnDfjTgP1GA/qKZZjncelnpInTavNihuKpyeMBhaB2d4qTHKaWYQ47cMJJgWXic5mv60lq12FqOGDXStig+YS8ZxybgATP8kV/ndkEvt876jD0AE3HhMvK23A6rpvrP4KFohd7sToE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=fastly.com; spf=pass smtp.mailfrom=fastly.com; dkim=pass (1024-bit key) header.d=fastly.com header.i=@fastly.com header.b=Dn4myONj; arc=none smtp.client-ip=209.85.167.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=fastly.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fastly.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=fastly.com header.i=@fastly.com header.b="Dn4myONj" Received: by mail-oi1-f173.google.com with SMTP id 5614622812f47-3d1bb1c3b74so903543b6e.2 for ; Tue, 28 May 2024 20:20:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fastly.com; s=google; t=1716952848; x=1717557648; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5WirfrVmj6xSxuzh+j2j6GMDFSD8Lc9FPWQtGaC4uG4=; b=Dn4myONjX3wib2nS25vRddz2OQ9sEn/AFE7s5KC/oiSSncEUrRZTMZnWcxCpYtdn1n G1yCWxRtFWFxWfub+l0qqVsc/VdYClK1o3cR5ItSU8Qc8hXxs8V9GbUfIOuTJeKt47U6 sTqkMTCqH/qrtphC/10aU9YCLX+z0qusLaU58= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1716952848; x=1717557648; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5WirfrVmj6xSxuzh+j2j6GMDFSD8Lc9FPWQtGaC4uG4=; b=dIJMotdfiQB8xuGynJnJGM2zTI2B7gb6kX5C20qpbHp2BPgp0c8f81kqkYHGslLqw7 Ezg2nWz+ab8r5lig33SIth248PYp9ddhtekV+S+ban6U0+RmbwTqAXerz2ophQClNl3Y 7erThWM841izabsasG0LP4sIsOWERjVkLqGXZsDMwLYtU5xWcbhJ4no+Wj6st+zfRLgG nSHFX+tgyfIGa+n4wDUoA4f0yNHlDUdiNEGsDCT93vKtMGNkxPhR9Lg/P6OAsLeXIf6c 023pXQADYWG8OlKD2NjpvJzA2A+KQxt+u6yOluVP6nCx/c3q5BtzAoVbMQMpHfgqNy4j kqFA== X-Forwarded-Encrypted: i=1; AJvYcCWlBN+uJQGynOPNRioO+stiU9VwYgIH83RGCtdkb1dWUr4EW6+K5+0mS6t0xWdRn+mi1GdcGWQPMDmWz3+aGwfYav/GqGXM X-Gm-Message-State: AOJu0YxRGy55BeQa5HaNzXQ0MA0kuzqv/K99slwXQWezJmJ0SVr2hfMk KWGwZFoxaaFhYerJmXWFYZA4K6A8Wc6hjPxQsYckE5o9a3fZdX+esJ+QStkFtgE= X-Google-Smtp-Source: AGHT+IHH9sy0SpZ3yb1feGf+fkpJAxcwJ0SYOomfUNtQqmdNd7SYvKLISg1dP1EawRO3hGcKzr9hBg== X-Received: by 2002:a05:6808:13c3:b0:3c9:92f3:d519 with SMTP id 5614622812f47-3d1a6019c51mr17456943b6e.4.1716952847979; Tue, 28 May 2024 20:20:47 -0700 (PDT) Received: from localhost.localdomain ([2620:11a:c019:0:65e:3115:2f58:c5fd]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-6f8fbd3ea03sm7156766b3a.39.2024.05.28.20.20.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 May 2024 20:20:47 -0700 (PDT) From: Joe Damato To: linux-kernel@vger.kernel.org, netdev@vger.kernel.org Cc: nalramli@fastly.com, Joe Damato , Saeed Mahameed , Tariq Toukan , Leon Romanovsky , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , linux-rdma@vger.kernel.org (open list:MELLANOX MLX5 core VPI driver) Subject: [RFC net-next v3 1/2] net/mlx5e: Add helpers to calculate txq and ch idx Date: Wed, 29 May 2024 03:16:26 +0000 Message-Id: <20240529031628.324117-2-jdamato@fastly.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240529031628.324117-1-jdamato@fastly.com> References: <20240529031628.324117-1-jdamato@fastly.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Add two helpers to: 1. Compute the txq_ix given a channel and a tc offset (tc_to_txq_ix). 2. Compute the channel index and tc offset given a txq_ix (txq_ix_to_chtc_ix). The first helper, tc_to_txq_ix, is used in place of the mathematical expressionin mlx5e_open_sqs when txq_ix values are computed. The second helper, txq_ix_to_chtc_ix, will be used in a following patch. Signed-off-by: Joe Damato Reviewed-by: Jacob Keller --- .../net/ethernet/mellanox/mlx5/core/en_main.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index b758bc72ac36..ce15805ad55a 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -2312,6 +2312,22 @@ static int mlx5e_txq_get_qos_node_hw_id(struct mlx5e_params *params, int txq_ix, return 0; } +static inline int tc_to_txq_ix(struct mlx5e_channel *c, + struct mlx5e_params *params, + int tc) +{ + return c->ix + tc * params->num_channels; +} + +static inline void txq_ix_to_chtc_ix(struct mlx5e_params *params, int txq_ix, + int *ch_ix, int *tc_ix) +{ + if (params->num_channels) { + *ch_ix = txq_ix % params->num_channels; + *tc_ix = txq_ix / params->num_channels; + } +} + static int mlx5e_open_sqs(struct mlx5e_channel *c, struct mlx5e_params *params, struct mlx5e_channel_param *cparam) @@ -2319,7 +2335,7 @@ static int mlx5e_open_sqs(struct mlx5e_channel *c, int err, tc; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran , linux-rdma@vger.kernel.org (open list:MELLANOX MLX5 core VPI driver) Subject: [RFC net-next v3 2/2] net/mlx5e: Add per queue netdev-genl stats Date: Wed, 29 May 2024 03:16:27 +0000 Message-Id: <20240529031628.324117-3-jdamato@fastly.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240529031628.324117-1-jdamato@fastly.com> References: <20240529031628.324117-1-jdamato@fastly.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org X-Patchwork-State: RFC Add functions to support the netdev-genl per queue stats API. ./cli.py --spec netlink/specs/netdev.yaml \ --dump qstats-get --json '{"scope": "queue"}' ...snip {'ifindex': 7, 'queue-id': 62, 'queue-type': 'rx', 'rx-alloc-fail': 0, 'rx-bytes': 105965251, 'rx-packets': 179790}, {'ifindex': 7, 'queue-id': 0, 'queue-type': 'tx', 'tx-bytes': 9402665, 'tx-packets': 17551}, ...snip Also tested with the script tools/testing/selftests/drivers/net/stats.py in several scenarios to ensure stats tallying was correct: - on boot (default queue counts) - adjusting queue count up or down (ethtool -L eth0 combined ...) - adding mqprio TCs Signed-off-by: Joe Damato Reviewed-by: Jacob Keller --- .../net/ethernet/mellanox/mlx5/core/en_main.c | 132 ++++++++++++++++++ 1 file changed, 132 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index ce15805ad55a..515c16a88a6c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -39,6 +39,7 @@ #include #include #include +#include #include #include #include @@ -5293,6 +5294,136 @@ static bool mlx5e_tunnel_any_tx_proto_supported(struct mlx5_core_dev *mdev) return (mlx5_vxlan_allowed(mdev->vxlan) || mlx5_geneve_tx_allowed(mdev)); } +static void mlx5e_get_queue_stats_rx(struct net_device *dev, int i, + struct netdev_queue_stats_rx *stats) +{ + struct mlx5e_priv *priv = netdev_priv(dev); + struct mlx5e_channel_stats *channel_stats; + struct mlx5e_rq_stats *xskrq_stats; + struct mlx5e_rq_stats *rq_stats; + + if (mlx5e_is_uplink_rep(priv)) + return; + + channel_stats = priv->channel_stats[i]; + xskrq_stats = &channel_stats->xskrq; + rq_stats = &channel_stats->rq; + + stats->packets = rq_stats->packets + xskrq_stats->packets; + stats->bytes = rq_stats->bytes + xskrq_stats->bytes; + stats->alloc_fail = rq_stats->buff_alloc_err + + xskrq_stats->buff_alloc_err; +} + +static void mlx5e_get_queue_stats_tx(struct net_device *dev, int i, + struct netdev_queue_stats_tx *stats) +{ + struct mlx5e_priv *priv = netdev_priv(dev); + struct mlx5e_channel_stats *channel_stats; + struct mlx5e_sq_stats *sq_stats; + int ch_ix, tc_ix; + + mutex_lock(&priv->state_lock); + txq_ix_to_chtc_ix(&priv->channels.params, i, &ch_ix, &tc_ix); + mutex_unlock(&priv->state_lock); + + channel_stats = priv->channel_stats[ch_ix]; + sq_stats = &channel_stats->sq[tc_ix]; + + stats->packets = sq_stats->packets; + stats->bytes = sq_stats->bytes; +} + +static void mlx5e_get_base_stats(struct net_device *dev, + struct netdev_queue_stats_rx *rx, + struct netdev_queue_stats_tx *tx) +{ + struct mlx5e_priv *priv = netdev_priv(dev); + int i, j; + + if (!mlx5e_is_uplink_rep(priv)) { + rx->packets = 0; + rx->bytes = 0; + rx->alloc_fail = 0; + + /* compute stats for deactivated RX queues + * + * if priv->channels.num == 0 the device is down, so compute + * stats for every queue. + * + * otherwise, compute only the queues which have been deactivated. + */ + mutex_lock(&priv->state_lock); + if (priv->channels.num == 0) + i = 0; + else + i = priv->channels.params.num_channels; + mutex_unlock(&priv->state_lock); + + for (; i < priv->stats_nch; i++) { + struct netdev_queue_stats_rx rx_i = {0}; + + mlx5e_get_queue_stats_rx(dev, i, &rx_i); + + rx->packets += rx_i.packets; + rx->bytes += rx_i.bytes; + rx->alloc_fail += rx_i.alloc_fail; + } + + if (priv->rx_ptp_opened) { + struct mlx5e_rq_stats *rq_stats = &priv->ptp_stats.rq; + + rx->packets += rq_stats->packets; + rx->bytes += rq_stats->bytes; + } + } + + tx->packets = 0; + tx->bytes = 0; + + mutex_lock(&priv->state_lock); + for (i = 0; i < priv->stats_nch; i++) { + struct mlx5e_channel_stats *channel_stats = priv->channel_stats[i]; + + /* while iterating through all channels [0, stats_nch], there + * are two cases to handle: + * + * 1. the channel is available, so sum only the unavailable TCs + * [mlx5e_get_dcb_num_tc, max_opened_tc). + * + * 2. the channel is unavailable, so sum all TCs [0, max_opened_tc). + */ + if (i < priv->channels.params.num_channels) { + j = mlx5e_get_dcb_num_tc(&priv->channels.params); + } else { + j = 0; + } + + for (; j < priv->max_opened_tc; j++) { + struct mlx5e_sq_stats *sq_stats = &channel_stats->sq[j]; + + tx->packets += sq_stats->packets; + tx->bytes += sq_stats->bytes; + } + } + mutex_unlock(&priv->state_lock); + + if (priv->tx_ptp_opened) { + for (j = 0; j < priv->max_opened_tc; j++) { + struct mlx5e_sq_stats *sq_stats = &priv->ptp_stats.sq[j]; + + tx->packets += sq_stats->packets; + tx->bytes += sq_stats->bytes; + } + } +} + +static const struct netdev_stat_ops mlx5e_stat_ops = { + .get_queue_stats_rx = mlx5e_get_queue_stats_rx, + .get_queue_stats_tx = mlx5e_get_queue_stats_tx, + .get_base_stats = mlx5e_get_base_stats, +}; + static void mlx5e_build_nic_netdev(struct net_device *netdev) { struct mlx5e_priv *priv = netdev_priv(netdev); @@ -5310,6 +5441,7 @@ static void mlx5e_build_nic_netdev(struct net_device *netdev) netdev->watchdog_timeo = 15 * HZ; + netdev->stat_ops = &mlx5e_stat_ops; netdev->ethtool_ops = &mlx5e_ethtool_ops; netdev->vlan_features |= NETIF_F_SG;