From patchwork Wed May 29 14:09:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13678976 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BFF731CA9E; Wed, 29 May 2024 14:09:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991781; cv=none; b=DnHeLf7VQ0bdZmLX94fjiW4vdTwRsXgwtl6eWrLniRM3cLN/pCQj+9VASA0UMMr49G0bFY4zrNqBXsY1HP2BRDsg7/9wFr8SUSr39vEhpCit2YiFvubJM3CNMwv2RKYAdzWfZBiYYjY8WJFE8HqFJ2HdeyvDzGVFqK79u44fywE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991781; c=relaxed/simple; bh=6RKhsjylzAiRwIo2wwjLgww6LdH42VeDcjmrpc0rXsc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ug9Ky95xfYdg11ckbFke8mLJ16kRuNRJVsQdqIawA313XlvIWwKyGHSaAJ/OkZvEdV5u542P3GDS1V+mHOCIyql8SZC0UdNvcRk7Tqpz4tUs7ILqmJEG2Qdqchp/2NWa/mbJfGyggfVdPUhkzpBT+Ftoycth6wxUJKARaEipYiw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=p0IsSdNg; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="p0IsSdNg" Received: by mail.gandi.net (Postfix) with ESMTPSA id C09E340003; Wed, 29 May 2024 14:09:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1716991776; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7W8ecLudPpFqSbJRrJMLaE+hJjxzBDOvmHDTYNwekL0=; b=p0IsSdNgW2U11l1ihWyP+asGoPBxFTkFCURBWvXZVSTU1Ijxyx+EG3b0RaAWff+tnFe4NJ PGyFMZ/HAGfrNiSGZMr2rmg8oyZyUePFGQYK2vGYuRPFCYor/Wmkp0+2UcOqg+iUm/Cc3N MBPbMYLh04CSY0hVeGXjYWfbsIKhbS7aHmWMg47UpGCJx0YsrxeHzyV6GXhhQMUoVRanUE GVRTb966fFwAZzcbkzrcB8hKujx0rabAThxA3u5IZRr1shTMnN1l+fY0ESzsZ1YGSE1v7o a4figyPqPm9LbE0CnTap9EgxMGdRgZD7fhfWIqhD0aLwqa5GsCfp5wQhewZJZw== From: Kory Maincent Date: Wed, 29 May 2024 16:09:28 +0200 Subject: [PATCH 1/8] net: pse-pd: Use EOPNOTSUPP error code instead of ENOTSUPP Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240529-feature_poe_power_cap-v1-1-0c4b1d5953b8@bootlin.com> References: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> In-Reply-To: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com From: "Kory Maincent (Dent Project)" ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP as reported by checkpatch script. Signed-off-by: Kory Maincent Reviewed-by: Andrew Lunn --- include/linux/pse-pd/pse.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 6d07c95dabb9..6eec24ffa866 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -167,14 +167,14 @@ static inline int pse_ethtool_get_status(struct pse_control *psec, struct netlink_ext_ack *extack, struct pse_control_status *status) { - return -ENOTSUPP; + return -EOPNOTSUPP; } static inline int pse_ethtool_set_config(struct pse_control *psec, struct netlink_ext_ack *extack, const struct pse_control_config *config) { - return -ENOTSUPP; + return -EOPNOTSUPP; } static inline bool pse_has_podl(struct pse_control *psec) From patchwork Wed May 29 14:09:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13678977 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C99961CAB9; Wed, 29 May 2024 14:09:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991781; cv=none; b=dJGqS+CrcNTLuEc6DornNfZmSwJrBYnNLj25EqvQ6JmrPZuXk2i2omw683+6R159TgpAoDMSIwpFNrIh5HXhcSBiWPqyrFqNT1N2VG3D60VLghr6WPTbxFdA+V3TN7ryufG6W1M9O0Bq0tJGHf+aJOkS6oFX+zzITGMRJAB0k6w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991781; c=relaxed/simple; bh=EE8hcs+isT5TXVZKbPFgdGRhLAGqQ6f253Jfi78I8/A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WO946fXh9N57anzBpVj5au/3azwETwxU+e5xfSJz5+mj924AP0OQTr1el4ZmMnL+Ta375Jb+uxiY7uMbX+PbxWFtPESC/NhsmODnl5i/1UwBxicd3Nm16APnAMT5k97sF3D2Q4O7CKhAF6C/xhX3kGeeUgQ3Jr0Ory51eBFYCoI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=WWLuLCz0; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="WWLuLCz0" Received: by mail.gandi.net (Postfix) with ESMTPSA id 65A714000E; Wed, 29 May 2024 14:09:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1716991776; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OSF0k4DneQQluljDXoTkiwEr3edARiAPThUUTe0SImA=; b=WWLuLCz0Xa10/FR8s25LxI6k5i7/YpOV8db5n4HMf65ACyucNecthkor/85hSpjLaj71SW fQIF8AkBAmzrxwoijTSQbs7JbAW+0cMZ3yq1xAHjUkTa40SpL0CupRHjqEYjgiLWDRfl4D TocOnsv3inQYEBOC44gfLrdIcuAD6qITdXsjZwEAXFFQ0n4LJ6aUJglIKV12JvL45kEu1Y aeYTu0SnCRFxtgpZBulBn1LrYtfuSUBi/HjD4CUoGs/G5N8iBjeVoLK3i6bbUEsThD/6iZ Wmo83i9kh/jyOmQ/5qImIrBU1M95cpnYDfQtEqP8W/fgLRIMizMY6TO82DwyBw== From: Kory Maincent Date: Wed, 29 May 2024 16:09:29 +0200 Subject: [PATCH 2/8] net: ethtool: pse-pd: Expand C33 PSE status with class, power and status message Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240529-feature_poe_power_cap-v1-2-0c4b1d5953b8@bootlin.com> References: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> In-Reply-To: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" This update expands the status information provided by ethtool for PSE c33. It includes details such as the detected class, current power delivered, and a detailed status message. Signed-off-by: Kory Maincent --- include/linux/pse-pd/pse.h | 8 ++++++++ include/uapi/linux/ethtool_netlink.h | 3 +++ net/ethtool/pse-pd.c | 22 ++++++++++++++++++++++ 3 files changed, 33 insertions(+) diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 6eec24ffa866..04219ca20d60 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -36,12 +36,20 @@ struct pse_control_config { * functions. IEEE 802.3-2022 30.9.1.1.2 aPSEAdminState * @c33_pw_status: power detection status of the PSE. * IEEE 802.3-2022 30.9.1.1.5 aPSEPowerDetectionStatus: + * @c33_pw_class: detected class of a powered PD + * IEEE 802.3-2022 30.9.1.1.8 aPSEPowerClassification + * @c33_actual_pw: power currently delivered by the PSE in mW + * IEEE 802.3-2022 30.9.1.1.23 aPSEActualPower + * @c33_pw_status_msg: detailed power detection status of the PSE */ struct pse_control_status { enum ethtool_podl_pse_admin_state podl_admin_state; enum ethtool_podl_pse_pw_d_status podl_pw_status; enum ethtool_c33_pse_admin_state c33_admin_state; enum ethtool_c33_pse_pw_d_status c33_pw_status; + u32 c33_pw_class; + u32 c33_actual_pw; + const char *c33_pw_status_msg; }; /** diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h index b49b804b9495..c3f288b737e6 100644 --- a/include/uapi/linux/ethtool_netlink.h +++ b/include/uapi/linux/ethtool_netlink.h @@ -915,6 +915,9 @@ enum { ETHTOOL_A_C33_PSE_ADMIN_STATE, /* u32 */ ETHTOOL_A_C33_PSE_ADMIN_CONTROL, /* u32 */ ETHTOOL_A_C33_PSE_PW_D_STATUS, /* u32 */ + ETHTOOL_A_C33_PSE_PW_STATUS_MSG, /* binary */ + ETHTOOL_A_C33_PSE_PW_CLASS, /* u32 */ + ETHTOOL_A_C33_PSE_ACTUAL_PW, /* u32 */ /* add new constants above here */ __ETHTOOL_A_PSE_CNT, diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index 2c981d443f27..faddc14efbea 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -86,6 +86,13 @@ static int pse_reply_size(const struct ethnl_req_info *req_base, len += nla_total_size(sizeof(u32)); /* _C33_PSE_ADMIN_STATE */ if (st->c33_pw_status > 0) len += nla_total_size(sizeof(u32)); /* _C33_PSE_PW_D_STATUS */ + if (st->c33_pw_class > 0) + len += nla_total_size(sizeof(u32)); /* _C33_PSE_PW_CLASS */ + if (st->c33_actual_pw > 0) + len += nla_total_size(sizeof(u32)); /* _C33_PSE_ACTUAL_PW */ + if (st->c33_pw_status_msg) + /* _C33_PSE_PW_STATUS_MSG */ + len += nla_total_size(strlen(st->c33_pw_status_msg) + 1); return len; } @@ -117,6 +124,21 @@ static int pse_fill_reply(struct sk_buff *skb, st->c33_pw_status)) return -EMSGSIZE; + if (st->c33_pw_class > 0 && + nla_put_u32(skb, ETHTOOL_A_C33_PSE_PW_CLASS, + st->c33_pw_class)) + return -EMSGSIZE; + + if (st->c33_actual_pw > 0 && + nla_put_u32(skb, ETHTOOL_A_C33_PSE_ACTUAL_PW, + st->c33_actual_pw)) + return -EMSGSIZE; + + if (st->c33_pw_status_msg && + nla_put_string(skb, ETHTOOL_A_C33_PSE_PW_STATUS_MSG, + st->c33_pw_status_msg)) + return -EMSGSIZE; + return 0; } From patchwork Wed May 29 14:09:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13678979 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BFFA61CAB0; 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arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="V3JjvTv6" Received: by mail.gandi.net (Postfix) with ESMTPSA id 0240340002; Wed, 29 May 2024 14:09:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1716991777; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7MP3SXUKiRdFIc55Wy63iB6MDo+HEoEyyYvRE69gtp8=; b=V3JjvTv6Nb5o6Uq/QUVBL0gPT5hnZ6K/vJn989qJSL3R4VL2efBS7fS+6AfBs8JzJB8wAW KkLr6l+xI4mpWjojtMd5yEmmHxB1ySNTmO7NjO0wNJJr2SJHYGxsQYgDsS20qmnfrzZXkk j8CtYMJWyLj9qzSHiaDDEgYFSdfv13HC4g917tIJdJAdAm/H6d8YB8ZTFX2i12Ye4ckwUh 12esfODE0QzTGB+mk/gnx7MZlX42PE098f9h8VfQWKZX4+IGq3fHWL4ZpWm/h2u3pEnVTX dZvX6Jj200KpDSPLg7iPwWRvL7U8KZNT//l5rehRVxnbljcEXqJPwCDYM4yNEg== From: Kory Maincent Date: Wed, 29 May 2024 16:09:30 +0200 Subject: [PATCH 3/8] netlink: specs: Expand the PSE netlink command with C33 new features Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240529-feature_poe_power_cap-v1-3-0c4b1d5953b8@bootlin.com> References: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> In-Reply-To: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com From: "Kory Maincent (Dent Project)" Expand the c33 PSE attributes with PSE class, status message and power consumption. ./ynl/cli.py --spec netlink/specs/ethtool.yaml --no-schema --do pse-get --json '{"header":{"dev-name":"eth0"}}' {'c33-pse-actual-pw': 1800, 'c33-pse-admin-state': 3, 'c33-pse-pw-class': 4, 'c33-pse-pw-d-status': 4, 'c33-pse-pw-status-msg': b'2P Port delivering IEEE.\x00', 'header': {'dev-index': 4, 'dev-name': 'eth0'}} Signed-off-by: Kory Maincent --- Documentation/netlink/specs/ethtool.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml index 00dc61358be8..bb51c293435d 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -922,6 +922,18 @@ attribute-sets: name: c33-pse-pw-d-status type: u32 name-prefix: ethtool-a- + - + name: c33-pse-pw-status-msg + type: binary + name-prefix: ethtool-a- + - + name: c33-pse-pw-class + type: u32 + name-prefix: ethtool-a- + - + name: c33-pse-actual-pw + type: u32 + name-prefix: ethtool-a- - name: rss attributes: @@ -1611,6 +1623,9 @@ operations: - c33-pse-admin-state - c33-pse-admin-control - c33-pse-pw-d-status + - c33-pse-pw-status-msg + - c33-pse-pw-class + - c33-pse-actual-pw dump: *pse-get-op - name: pse-set From patchwork Wed May 29 14:09:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13678978 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF5FC1CD0C; Wed, 29 May 2024 14:09:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991781; cv=none; b=bD9Pyk8Max9HjPrVCeHTgJNKTaLmaMoVITKQogISo0rh6MO6E3OIRDGGlXqXXbTA7Bu2Vcrpdx25HqolcIzPHWvmG3W2REil5TzfBaBYXPHrVav7/9BwZ7gqT5gerYfzvc4ApIhRg0TpN37hjK1PU5ZQYDf9s7rlr69fFx/WBCo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991781; c=relaxed/simple; bh=+Hf1nunZ4FXWiATNo1UOBxXtdIk0xjt6aEwheQxGSlg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=m/ibCgWhDrKb3RH8aI88VmT/zY4piUZODuCNmPAEI6SA9vLQCjE+UpPIMze2ol74zhyzuczj3qKG9FqDQrtmWuC/gWN2C0udhjxtmjKbrV6wTp4oqFoPJaE0KIVxExZlqB6Ow9YNqTtexb3hGO10bIoPfMXA0taU7INat8tGplg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=DkRlJjnV; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="DkRlJjnV" Received: by mail.gandi.net (Postfix) with ESMTPSA id 93CC140005; Wed, 29 May 2024 14:09:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1716991778; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NbiDNqiPauaD/1z/h6ohPFLO5GmM0lX9SctZdlgqRs8=; b=DkRlJjnVsHuESEZCbicVgpFOqLHrX8J7jGRIryc0hJ+/OIHxVgMhzh2+72z6oxHrY+W13m oaaxMhxlpuHXPy29z36aa28hHt0n+nGpQZEw6bhyolOUXvvyv2afve1re5GGpw3jSBcuPQ VimGT0/JtQdjMwq/zRc34RH8Xccq0smNSNUZVEV9tC9QZyLfUKYFtRA7VPY6oC/Cusl4dc 4qKJqNSrRIPV/8eIrbad9jihiKrUkut4PSMQ5fOpDQW6XVVkEI1t44VtG7lBvKMcLXg/8G UR8HJp/RStBBGQ/7B9T3XjJUfaJyqK5qamUJ3KvfjBTZqF3GCugEuWkk10ebkw== From: Kory Maincent Date: Wed, 29 May 2024 16:09:31 +0200 Subject: [PATCH 4/8] net: pse-pd: pd692x0: Expand ethtool status message Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240529-feature_poe_power_cap-v1-4-0c4b1d5953b8@bootlin.com> References: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> In-Reply-To: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" This update expands pd692x0_ethtool_get_status() callback with newly introduced details such as the detected class, current power delivered, and a detailed status message. Signed-off-by: Kory Maincent --- drivers/net/pse-pd/pd692x0.c | 96 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 96 insertions(+) diff --git a/drivers/net/pse-pd/pd692x0.c b/drivers/net/pse-pd/pd692x0.c index 6488b941703c..017a8efc43c4 100644 --- a/drivers/net/pse-pd/pd692x0.c +++ b/drivers/net/pse-pd/pd692x0.c @@ -73,6 +73,7 @@ enum { PD692X0_MSG_SET_PORT_PARAM, PD692X0_MSG_GET_PORT_STATUS, PD692X0_MSG_DOWNLOAD_CMD, + PD692X0_MSG_GET_PORT_CLASS, /* add new message above here */ PD692X0_MSG_CNT @@ -149,6 +150,12 @@ static const struct pd692x0_msg pd692x0_msg_template_list[PD692X0_MSG_CNT] = { .data = {0x16, 0x16, 0x99, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e}, }, + [PD692X0_MSG_GET_PORT_CLASS] = { + .key = PD692X0_KEY_REQ, + .sub = {0x05, 0xc4}, + .data = {0x4e, 0x4e, 0x4e, 0x4e, + 0x4e, 0x4e, 0x4e, 0x4e}, + }, }; static u8 pd692x0_build_msg(struct pd692x0_msg *msg, u8 echo) @@ -435,6 +442,79 @@ static int pd692x0_pi_is_enabled(struct pse_controller_dev *pcdev, int id) } } +struct pd692x0_status_msg { + int id; + const char msg[63]; +}; + +static const struct pd692x0_status_msg pd692x0_status_msg_list[] = { + {.id = 0x06, .msg = "Port is off: Main supply voltage is high."}, + {.id = 0x07, .msg = "Port is off: Main supply voltage is low."}, + {.id = 0x08, .msg = "Port is off: Disable all ports pin is active."}, + {.id = 0x0C, .msg = "Port is off: Non-existing port number."}, + {.id = 0x11, .msg = "Port is yet undefined."}, + {.id = 0x12, .msg = "Port is off: Internal hardware fault."}, + {.id = 0x1A, .msg = "Port is off: User setting."}, + {.id = 0x1B, .msg = "Port is off: Detection is in process."}, + {.id = 0x1C, .msg = "Port is off: Non-802.3AF/AT powered device."}, + {.id = 0x1E, .msg = "Port is off: Underload state."}, + {.id = 0x1F, .msg = "Port is off: Overload state."}, + {.id = 0x20, .msg = "Port is off: Power budget exceeded."}, + {.id = 0x21, .msg = "Port is off: Internal hardware routing error."}, + {.id = 0x22, .msg = "Port is off: Configuration change."}, + {.id = 0x24, .msg = "Port is off: Voltage injection into the port."}, + {.id = 0x25, .msg = "Port is off: Improper Capacitor Detection"}, + {.id = 0x26, .msg = "Port is off: Discharged load."}, + {.id = 0x34, .msg = "Port is off: Short condition."}, + {.id = 0x35, .msg = "Port is off: Over temperature at the port."}, + {.id = 0x36, .msg = "Port is off: Device is too hot."}, + {.id = 0x37, .msg = "Unknown device port status."}, + {.id = 0x3C, .msg = "Power Management-Static."}, + {.id = 0x3D, .msg = "Power Management-Static\u2014OVL."}, + {.id = 0x41, .msg = "Power denied: Hardware power limit."}, + {.id = 0x43, .msg = "Port is off: Class error."}, + {.id = 0x44, .msg = "Port turn off during Host crash."}, + {.id = 0x45, .msg = "Delivered power port was forced to be shut down at host crash."}, + {.id = 0x46, .msg = "An enabled port was forced to be shut down at Host crash."}, + {.id = 0x47, .msg = "Force Power Crash Error."}, + {.id = 0x48, .msg = "Port is off: Recovery UDL."}, + {.id = 0x49, .msg = "Port is off: Recovery PG Event."}, + {.id = 0x4A, .msg = "Port is off: Recovery OVL."}, + {.id = 0x4B, .msg = "Port is off: Recovery SC."}, + {.id = 0x4C, .msg = "Port is off: Recovery Voltage injection."}, + {.id = 0x80, .msg = "2P Port delivering non-IEEE."}, + {.id = 0x81, .msg = "2P Port delivering IEEE."}, + {.id = 0x82, .msg = "4P Port that deliver only 2 Pair non-IEEE."}, + {.id = 0x83, .msg = "4P Port delivering 2P non-IEEE."}, + {.id = 0x84, .msg = "4P Port delivering 4P non-IEEE."}, + {.id = 0x85, .msg = "4P Port delivering 2P IEEE SSPD."}, + {.id = 0x86, .msg = "4P Port delivering 4P IEEE SSPD."}, + {.id = 0x87, .msg = "4P Port delivering 2P IEEE DSPD in the first phase."}, + {.id = 0x88, .msg = "4P Port delivering 2P IEEE DSPD."}, + {.id = 0x89, .msg = "4P Port delivering 4P IEEE DSPD."}, + {.id = 0x90, .msg = "Force Power BT 2P."}, + {.id = 0x91, .msg = "Force Power BT 4P."}, + {.id = 0xA0, .msg = "Force Power BT error."}, + {.id = 0xA7, .msg = "Connection Check error."}, + {.id = 0xA8, .msg = "Open Port is not connected."}, + { /* sentinel */ } +}; + +static const char *pd692x0_get_status_msg(int id) +{ + const struct pd692x0_status_msg *msg_list; + + msg_list = pd692x0_status_msg_list; + while (msg_list->id) { + if (msg_list->id == id) + return msg_list->msg; + + msg_list++; + } + + return NULL; +} + static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, unsigned long id, struct netlink_ext_ack *extack, @@ -442,6 +522,7 @@ static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, { struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); struct pd692x0_msg msg, buf = {0}; + u32 class; int ret; ret = pd692x0_fw_unavailable(priv); @@ -471,6 +552,21 @@ static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, priv->admin_state[id] = status->c33_admin_state; + status->c33_pw_status_msg = pd692x0_get_status_msg(buf.sub[0]); + + status->c33_actual_pw = (buf.data[0] << 4 | buf.data[1]) * 100; + + memset(&buf, 0, sizeof(buf)); + msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_CLASS]; + msg.sub[2] = id; + ret = pd692x0_sendrecv_msg(priv, &msg, &buf); + if (ret < 0) + return ret; + + class = buf.data[3] >> 4; + if (class <= 8) + status->c33_pw_class = class; + return 0; } From patchwork Wed May 29 14:09:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13678980 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 52F2A1CD2C; Wed, 29 May 2024 14:09:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991782; cv=none; b=kVmYATvU0fJhqMkXVZU7tkJ+/w3qZCo8sAN6OyElnB3kk+LtkjonnQ9rxk7nFl5jMN9J0fkkMewBeGemGsQ3cY96KNz6Y3Tn/qex3vgnpklvukXGQUo2qD6WRMpuKrB3SpN1WqF3YCq8v+l7Icxj0mxbdAA5Dk2w/LUN92zVLvc= ARC-Message-Signature: i=1; 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Wed, 29 May 2024 14:09:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1716991778; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8HbELY3z7SEgeb5R/cvgER6KpGBkVV6b13kO0dOX4GY=; b=pju2ZMmY3aKdyJ1BJz1GZxv0dSwHVQHS32QePbxxXpsXkEGxtcqP2v9rbgirfZ0L2j35GU ylATByEOsPf/X7J20VvUSIgsVu91HiIKR5H3Q5f6eiV7M+/tqmgrjVUwK5UuUbO7P9pzPB 83zsrVtHkAOl9a3p2XdEWOGkGmfF4gxYS1TeLKmbEppMdqAB2d05zm8pKR/zJl8U4cj9Sf DsrtskCGfrN5mxIiqD+oU/1TdWLO2nZBzmjWJW3bMQKkJuQQsPiDVXShb9p773QzkUAWw/ v1VHXFWt7+0S0jwZZSOc5sCJIvYpbTBh8RrxfapYBwZhaEwGwMHkdN9t76eIcg== From: Kory Maincent Date: Wed, 29 May 2024 16:09:32 +0200 Subject: [PATCH 5/8] net: pse-pd: Add new power limit get and set c33 features Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240529-feature_poe_power_cap-v1-5-0c4b1d5953b8@bootlin.com> References: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> In-Reply-To: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" This patch add a way to get and set the power limit of a PSE PI. For that it uses regulator API callbacks wrapper like get_voltage() and get/set_current_limit() as power is simply V * I. We used mW unit as defined by the IEEE 802.3-2022 standards. set_current_limit() uses the voltage return by get_voltage() and the desired power limit to calculate the current limit. get_voltage() callback is then mandatory to set the power limit. get_current_limit() callback is by default looking at a driver callback and fallback to extracting the current limit from _pse_ethtool_get_status() if the driver does not set its callback. We prefer let the user the choice because ethtool_get_status return much more information than the current limit. Signed-off-by: Kory Maincent --- drivers/net/pse-pd/pse_core.c | 169 +++++++++++++++++++++++++++++++++++++++--- include/linux/pse-pd/pse.h | 36 +++++++++ 2 files changed, 194 insertions(+), 11 deletions(-) diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 795ab264eaf2..d0f92e225cef 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -265,10 +265,110 @@ static int pse_pi_disable(struct regulator_dev *rdev) return ret; } +static int _pse_pi_get_voltage(struct regulator_dev *rdev) +{ + struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); + const struct pse_controller_ops *ops; + int id, ret; + + ops = pcdev->ops; + if (!ops->pi_get_voltage) + return -EOPNOTSUPP; + + id = rdev_get_id(rdev); + ret = ops->pi_get_voltage(pcdev, id); + if (ret > 0) + ret *= 1000; + + return ret; +} + +static int pse_pi_get_voltage(struct regulator_dev *rdev) +{ + struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); + int ret; + + mutex_lock(&pcdev->lock); + ret = _pse_pi_get_voltage(rdev); + mutex_unlock(&pcdev->lock); + + return ret; +} + +static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev, + int id, + struct netlink_ext_ack *extack, + struct pse_control_status *status); + +static int pse_pi_get_current_limit(struct regulator_dev *rdev) +{ + struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); + const struct pse_controller_ops *ops; + struct netlink_ext_ack extack = {}; + struct pse_control_status st = {}; + int id, mV, ret; + + ops = pcdev->ops; + id = rdev_get_id(rdev); + mutex_lock(&pcdev->lock); + if (ops->pi_get_current_limit) { + ret = ops->pi_get_current_limit(pcdev, id); + goto out; + } + + /* If pi_get_current_limit() callback not populated get voltage + * from pi_get_voltage() and power limit from ethtool_get_status() + * to calculate current limit. + */ + ret = _pse_pi_get_voltage(rdev); + if (!ret) { + dev_err(pcdev->dev, "Voltage null\n"); + ret = -ERANGE; + goto out; + } + if (ret < 0) + goto out; + mV = ret; + + ret = _pse_ethtool_get_status(pcdev, id, &extack, &st); + if (ret) + goto out; + + if (st.c33_pw_limit) + /* mA = mW * 1000 / mV */ + ret = st.c33_pw_limit * 1000 / mV; + +out: + mutex_unlock(&pcdev->lock); + return ret; +} + +static int pse_pi_set_current_limit(struct regulator_dev *rdev, int min_uA, + int max_uA) +{ + struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); + const struct pse_controller_ops *ops; + int id, ret; + + ops = pcdev->ops; + if (!ops->pi_set_current_limit) + return -EOPNOTSUPP; + + id = rdev_get_id(rdev); + mutex_lock(&pcdev->lock); + ret = ops->pi_set_current_limit(pcdev, id, max_uA / 1000); + mutex_unlock(&pcdev->lock); + + return ret; +} + static const struct regulator_ops pse_pi_ops = { .is_enabled = pse_pi_is_enabled, .enable = pse_pi_enable, .disable = pse_pi_disable, + .get_voltage = pse_pi_get_voltage, + .get_current_limit = pse_pi_get_current_limit, + .set_current_limit = pse_pi_set_current_limit, }; static int @@ -298,7 +398,9 @@ devm_pse_pi_regulator_register(struct pse_controller_dev *pcdev, rdesc->ops = &pse_pi_ops; rdesc->owner = pcdev->owner; - rinit_data->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS; + rinit_data->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS | + REGULATOR_CHANGE_CURRENT; + rinit_data->constraints.max_uA = MAX_PI_CURRENT * 1000; rinit_data->supply_regulator = "vpwr"; rconfig.dev = pcdev->dev; @@ -626,6 +728,23 @@ struct pse_control *of_pse_control_get(struct device_node *node) } EXPORT_SYMBOL_GPL(of_pse_control_get); +static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev, + int id, + struct netlink_ext_ack *extack, + struct pse_control_status *status) +{ + const struct pse_controller_ops *ops; + + ops = pcdev->ops; + if (!ops->ethtool_get_status) { + NL_SET_ERR_MSG(extack, + "PSE driver does not support status report"); + return -EOPNOTSUPP; + } + + return ops->ethtool_get_status(pcdev, id, extack, status); +} + /** * pse_ethtool_get_status - get status of PSE control * @psec: PSE control pointer @@ -638,19 +757,10 @@ int pse_ethtool_get_status(struct pse_control *psec, struct netlink_ext_ack *extack, struct pse_control_status *status) { - const struct pse_controller_ops *ops; int err; - ops = psec->pcdev->ops; - - if (!ops->ethtool_get_status) { - NL_SET_ERR_MSG(extack, - "PSE driver does not support status report"); - return -EOPNOTSUPP; - } - mutex_lock(&psec->pcdev->lock); - err = ops->ethtool_get_status(psec->pcdev, psec->id, extack, status); + err = _pse_ethtool_get_status(psec->pcdev, psec->id, extack, status); mutex_unlock(&psec->pcdev->lock); return err; @@ -732,6 +842,43 @@ int pse_ethtool_set_config(struct pse_control *psec, } EXPORT_SYMBOL_GPL(pse_ethtool_set_config); +/** + * pse_ethtool_set_pw_limit - set PSE control power limit + * @psec: PSE control pointer + * @extack: extack for reporting useful error messages + * @pw_limit: power limit value in mW + * + * Return: 0 on success and failure value on error + */ +int pse_ethtool_set_pw_limit(struct pse_control *psec, + struct netlink_ext_ack *extack, + const unsigned int pw_limit) +{ + int uV, mA, ret; + + ret = regulator_get_voltage(psec->ps); + if (!ret) { + NL_SET_ERR_MSG(extack, + "Can't read current voltage"); + return ret; + } + if (ret < 0) { + NL_SET_ERR_MSG(extack, + "Error reading current voltage"); + return ret; + } + uV = ret; + + /* mA = mW * 1000 / ( uV / 1000) + * mA precision is sufficient for PSE, and mW is the power unit + * used in IEEE 802.3-2022 145 standard. + */ + mA = pw_limit * 1000 / (uV / 1000); + + return regulator_set_current_limit(psec->ps, 0, mA * 1000); +} +EXPORT_SYMBOL_GPL(pse_ethtool_set_pw_limit); + bool pse_has_podl(struct pse_control *psec) { return psec->pcdev->types & ETHTOOL_PSE_PODL; diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 04219ca20d60..241b43c65137 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -9,6 +9,9 @@ #include #include +/* Maximum current in mA according to IEEE 802.3-2022 Table 145-1 */ +#define MAX_PI_CURRENT 1920 + struct phy_device; struct pse_controller_dev; @@ -41,6 +44,7 @@ struct pse_control_config { * @c33_actual_pw: power currently delivered by the PSE in mW * IEEE 802.3-2022 30.9.1.1.23 aPSEActualPower * @c33_pw_status_msg: detailed power detection status of the PSE + * @c33_pw_limit: power limit of the PSE */ struct pse_control_status { enum ethtool_podl_pse_admin_state podl_admin_state; @@ -50,6 +54,7 @@ struct pse_control_status { u32 c33_pw_class; u32 c33_actual_pw; const char *c33_pw_status_msg; + u32 c33_pw_limit; }; /** @@ -61,6 +66,14 @@ struct pse_control_status { * May also return negative errno. * @pi_enable: Configure the PSE PI as enabled. * @pi_disable: Configure the PSE PI as disabled. + * @pi_get_voltage: Return voltage similarly to get_voltage regulator + * callback but in mV unit. + * @pi_get_current_limit: Get the configured current limit similarly to + * get_current_limit regulator callback but in mA + * unit. + * @pi_set_current_limit: Configure the current limit similarly to + * set_current_limit regulator callback but in mA + * unit. */ struct pse_controller_ops { int (*ethtool_get_status)(struct pse_controller_dev *pcdev, @@ -70,6 +83,11 @@ struct pse_controller_ops { int (*pi_is_enabled)(struct pse_controller_dev *pcdev, int id); int (*pi_enable)(struct pse_controller_dev *pcdev, int id); int (*pi_disable)(struct pse_controller_dev *pcdev, int id); + int (*pi_get_voltage)(struct pse_controller_dev *pcdev, int id); + int (*pi_get_current_limit)(struct pse_controller_dev *pcdev, + int id); + int (*pi_set_current_limit)(struct pse_controller_dev *pcdev, + int id, int max_mA); }; struct module; @@ -156,6 +174,11 @@ int pse_ethtool_get_status(struct pse_control *psec, int pse_ethtool_set_config(struct pse_control *psec, struct netlink_ext_ack *extack, const struct pse_control_config *config); +int pse_ethtool_set_pw_limit(struct pse_control *psec, + struct netlink_ext_ack *extack, + const unsigned int pw_limit); +int pse_ethtool_get_pw_limit(struct pse_control *psec, + struct netlink_ext_ack *extack); bool pse_has_podl(struct pse_control *psec); bool pse_has_c33(struct pse_control *psec); @@ -185,6 +208,19 @@ static inline int pse_ethtool_set_config(struct pse_control *psec, return -EOPNOTSUPP; } +static inline int pse_ethtool_set_pw_limit(struct pse_control *psec, + struct netlink_ext_ack *extack, + const unsigned int pw_limit) +{ + return -EOPNOTSUPP; +} + +static inline int pse_ethtool_get_pw_limit(struct pse_control *psec, + struct netlink_ext_ack *extack) +{ + return -EOPNOTSUPP; +} + static inline bool pse_has_podl(struct pse_control *psec) { return false; From patchwork Wed May 29 14:09:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13678981 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F01931CFB5; Wed, 29 May 2024 14:09:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991783; cv=none; b=HJJEbS0ntqW+4aKE97PLqHI1r33HhB8wqRgCLl/emAAH8Dw10SKbACCt2+5T+CsD60KYMtjxP3qttNg9AzU2LgQ7hLrdy/XTuDDinIEuHV7XAk/gCIKD3fStCo/7m5dd2HkkjIDRylfTIuSWTXAOROIpS2PkAe6sBoZRcOpfnZ0= ARC-Message-Signature: i=1; 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Wed, 29 May 2024 14:09:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1716991779; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RdbAf4AZmBj8LGreTkVusq+gcYY3lWgvN4pmFdEVT5w=; b=CXF87g4RvkxS+wBmXl79iN6BpD3sWkvE/8jYz9Iin7ThYTODW5C9Bc7zcvaswR1sx1UgVt r0HkmmKBuNYvuOPRGrp5fMGizahqc1m9D4thbPH5tcfey8pUEmaIDr0rj3xXRnQfhrkuIU mMAABQvCQOhCQfrCOL9LIW/tW1RvS2+bt7t69IWufFkKp845l8qwpSIe6Mr3xFuWeLvrrJ 5ljhRp5fy3ALX4BySR7TKTL7P6kGn0dNtjlbQ/yCBAUpGS8JxOnSkVaF2q8BofJ5pZSrX+ Q5hOgE8b8y6uqNuXq0QbVSNCSezBBr0XmySmzf+qI76OuzlbDHOrb5Nr5Jk+tg== From: Kory Maincent Date: Wed, 29 May 2024 16:09:33 +0200 Subject: [PATCH 6/8] net: ethtool: Add new power limit get and set features Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240529-feature_poe_power_cap-v1-6-0c4b1d5953b8@bootlin.com> References: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> In-Reply-To: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" This patch expands the status information provided by ethtool for PSE c33 with power limit. It also adds a call to pse_ethtool_set_pw_limit() to configure the PSE control power limit. Signed-off-by: Kory Maincent --- include/uapi/linux/ethtool_netlink.h | 1 + net/ethtool/pse-pd.c | 41 ++++++++++++++++++++++++++++++------ 2 files changed, 35 insertions(+), 7 deletions(-) diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h index c3f288b737e6..2b8c76278b9f 100644 --- a/include/uapi/linux/ethtool_netlink.h +++ b/include/uapi/linux/ethtool_netlink.h @@ -918,6 +918,7 @@ enum { ETHTOOL_A_C33_PSE_PW_STATUS_MSG, /* binary */ ETHTOOL_A_C33_PSE_PW_CLASS, /* u32 */ ETHTOOL_A_C33_PSE_ACTUAL_PW, /* u32 */ + ETHTOOL_A_C33_PSE_PW_LIMIT, /* u32 */ /* add new constants above here */ __ETHTOOL_A_PSE_CNT, diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index faddc14efbea..dbd75eeae4eb 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -93,6 +93,8 @@ static int pse_reply_size(const struct ethnl_req_info *req_base, if (st->c33_pw_status_msg) /* _C33_PSE_PW_STATUS_MSG */ len += nla_total_size(strlen(st->c33_pw_status_msg) + 1); + if (st->c33_pw_limit > 0) + len += nla_total_size(sizeof(u32)); /* _C33_PSE_PW_LIMIT */ return len; } @@ -139,6 +141,11 @@ static int pse_fill_reply(struct sk_buff *skb, st->c33_pw_status_msg)) return -EMSGSIZE; + if (st->c33_pw_limit > 0 && + nla_put_u32(skb, ETHTOOL_A_C33_PSE_PW_LIMIT, + st->c33_pw_limit)) + return -EMSGSIZE; + return 0; } @@ -152,6 +159,7 @@ const struct nla_policy ethnl_pse_set_policy[ETHTOOL_A_PSE_MAX + 1] = { [ETHTOOL_A_C33_PSE_ADMIN_CONTROL] = NLA_POLICY_RANGE(NLA_U32, ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED, ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED), + [ETHTOOL_A_C33_PSE_PW_LIMIT] = { .type = NLA_U32 }, }; static int @@ -194,19 +202,38 @@ static int ethnl_set_pse(struct ethnl_req_info *req_info, struct genl_info *info) { struct net_device *dev = req_info->dev; - struct pse_control_config config = {}; struct nlattr **tb = info->attrs; struct phy_device *phydev; + int ret = 0; phydev = dev->phydev; + + if (tb[ETHTOOL_A_C33_PSE_PW_LIMIT]) { + unsigned int pw_limit = nla_get_u32(tb[ETHTOOL_A_C33_PSE_PW_LIMIT]); + + ret = pse_ethtool_set_pw_limit(phydev->psec, info->extack, + pw_limit); + if (ret) + return ret; + } + /* These values are already validated by the ethnl_pse_set_policy */ - if (pse_has_podl(phydev->psec)) - config.podl_admin_control = nla_get_u32(tb[ETHTOOL_A_PODL_PSE_ADMIN_CONTROL]); - if (pse_has_c33(phydev->psec)) - config.c33_admin_control = nla_get_u32(tb[ETHTOOL_A_C33_PSE_ADMIN_CONTROL]); + if (tb[ETHTOOL_A_PODL_PSE_ADMIN_CONTROL] || + tb[ETHTOOL_A_C33_PSE_ADMIN_CONTROL]) { + struct pse_control_config config = {}; + + if (pse_has_podl(phydev->psec)) + config.podl_admin_control = nla_get_u32(tb[ETHTOOL_A_PODL_PSE_ADMIN_CONTROL]); + if (pse_has_c33(phydev->psec)) + config.c33_admin_control = nla_get_u32(tb[ETHTOOL_A_C33_PSE_ADMIN_CONTROL]); + + ret = pse_ethtool_set_config(phydev->psec, info->extack, + &config); + if (ret) + return ret; + } - /* Return errno directly - PSE has no notification */ - return pse_ethtool_set_config(phydev->psec, info->extack, &config); + return ret; } const struct ethnl_request_ops ethnl_pse_request_ops = { From patchwork Wed May 29 14:09:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13678982 Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9BDD01CFBD; Wed, 29 May 2024 14:09:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991783; cv=none; b=n6wssLWy6s8XRnryQU1TROhgC50T1XNVE7Tlu+6+103CUZOn2tH8o7i5Op+JJVAjdKywVnE2xge9zpkTYKaxbfbmcPu8w5uL81Wb8ZaHymt7MZiYMovcLxfMnrOKzFtgCjndC6d4s6zG2PRhpmguhBiWOkYJC6UnuuuFvdTlN+4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991783; c=relaxed/simple; bh=2f/QLHGzuJUZ6zQvnX/Y4xjvJXn719xlzn0VYbhQgrA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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bh=HxIoAfqFX0T8wOLhLA9A2kck0mXlzlBcVMqS+3gO9GE=; b=ouBbH0FScl/DZnMpHD0sZqHtBM13Qz58++oJ4wGAkr5LHsXqEM8flO6eVFXhhG4zX1ddpb RUSxLR03XlPC6k53S4CPlJXTLqzLT75KfMtzd+pt2QkbKTqSHdVAl9lch9L9i7ser9vPUJ m+smJPHLhr/fNvbPAXix6ADUhFVM19xRxOEKRZOrBoBu/7sRKwr2+8rHYSnkSNY12OzJ16 DII0C9IeveLaN0l0LS/s1cZ60krd+zMSURdDtrJnClwrELtEKBffGTJjvCjL7UsQ+OqMw5 NWuUx8pFXECAcfxv0BKeDMa1B1ga75y7LHbYIYK9HvtvyDkivcnwRHuUmJsypw== From: Kory Maincent Date: Wed, 29 May 2024 16:09:34 +0200 Subject: [PATCH 7/8] netlink: specs: Expand the PSE netlink command with C33 pw-limit attributes Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240529-feature_poe_power_cap-v1-7-0c4b1d5953b8@bootlin.com> References: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> In-Reply-To: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com From: "Kory Maincent (Dent Project)" Expand the c33 PSE attributes with power limit to be able to set and get the PSE Power Interface power limit. ./ynl/cli.py --spec netlink/specs/ethtool.yaml --no-schema --do pse-get --json '{"header":{"dev-name":"eth2"}}' {'c33-pse-actual-pw': 400, 'c33-pse-admin-state': 3, 'c33-pse-pw-class': 3, 'c33-pse-pw-d-status': 4, 'c33-pse-pw-limit': 17900, 'c33-pse-pw-status-msg': b'2P Port delivering IEEE.\x00', 'header': {'dev-index': 6, 'dev-name': 'eth2'}} ./ynl/cli.py --spec netlink/specs/ethtool.yaml --no-schema --do pse-set --json '{"header":{"dev-name":"eth2"}, "c33-pse-pw-limit":19000}' None Signed-off-by: Kory Maincent --- Documentation/netlink/specs/ethtool.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml index bb51c293435d..40c679bddd99 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -934,6 +934,10 @@ attribute-sets: name: c33-pse-actual-pw type: u32 name-prefix: ethtool-a- + - + name: c33-pse-pw-limit + type: u32 + name-prefix: ethtool-a- - name: rss attributes: @@ -1626,6 +1630,7 @@ operations: - c33-pse-pw-status-msg - c33-pse-pw-class - c33-pse-actual-pw + - c33-pse-pw-limit dump: *pse-get-op - name: pse-set From patchwork Wed May 29 14:09:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13678983 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 11B691F5F6; Wed, 29 May 2024 14:09:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991784; cv=none; b=Y7lH7rlTtrLUictwe9t5EXKlzcb9pnL+P3vKPG1etmHguBRMkTu3mncLaCdtBlRocxLtRJki2AnNS3WaTAMvv/RyzAySaq01HsHxsmiS/HtCrL78qiT+56Kz1h5LylwRjh1SgZPMyWpWiilGwHZemeDnIhBvuwIPRlO74wb049M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716991784; c=relaxed/simple; bh=dWt0+KRRjy3rE0jXtXtL3sGVHSL4Kd130bmGWzBJSmM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=WBIGatPrKOBA9AMIFmswGypukLafKSxCSc4YtDArAgQRPxl/WcBi5ZpKV7qfYNou5TvBHpxbPyIS8QfFv4pdt9xMkKGzwEmeaIk9ki/zTR/htKPFXcMiHE/ZheKyEdhHVD1sXZhxwQZbry1Tmvj5OGVgtnd+qwA24nOmvKbW4ko= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=pxNLvIe2; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="pxNLvIe2" Received: by mail.gandi.net (Postfix) with ESMTPSA id 073D340013; Wed, 29 May 2024 14:09:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1716991780; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yZO88xtC56xKY5roWDT00Bzj+hSNHbnhaJYEU2ZQZkU=; b=pxNLvIe21tffg/oFOoys88UPUTrlyvebJGg5iC1mvNYGmW0qDXDboWhgwJfCzLtkR0pdkQ 931ajtT2yIHqdSWkvH2pny6XHApLA2JUAOADPdklgGiDQ06G2ZaJxX2xwKFZpWAY+xrRCE QpLvez7RhJpIbdYZge6R8Xl6lEr6XgBxeI2IJ42ez5iVfBE5nQGEPkETdJsZKIT3dYCUkf xI8rXFbuadccSTik017gn642Ije5YCxDr4+fWpISDhgjfQEYwmKXDAox11gr0dkclZUdzx AEedK/9STOS87zgLMHd3xYjBBp3pUOAn1K220THTyUXuF1uPRaU7H3RJt/l7ig== From: Kory Maincent Date: Wed, 29 May 2024 16:09:35 +0200 Subject: [PATCH 8/8] net: pse-pd: pd692x0: Enhance with new current limit and voltage read callbacks Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240529-feature_poe_power_cap-v1-8-0c4b1d5953b8@bootlin.com> References: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> In-Reply-To: <20240529-feature_poe_power_cap-v1-0-0c4b1d5953b8@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" This patch expands PSE callbacks with newly introduced pi_get/set_current_limit() and pi_get_voltage() callback. The only way to set ps692x0 port power limit is by configure the power class plus a small power supplement which maximum depends on each class. Signed-off-by: Kory Maincent --- drivers/net/pse-pd/pd692x0.c | 167 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 165 insertions(+), 2 deletions(-) diff --git a/drivers/net/pse-pd/pd692x0.c b/drivers/net/pse-pd/pd692x0.c index 017a8efc43c4..c5fd4964d7bd 100644 --- a/drivers/net/pse-pd/pd692x0.c +++ b/drivers/net/pse-pd/pd692x0.c @@ -74,6 +74,8 @@ enum { PD692X0_MSG_GET_PORT_STATUS, PD692X0_MSG_DOWNLOAD_CMD, PD692X0_MSG_GET_PORT_CLASS, + PD692X0_MSG_GET_PORT_MEAS, + PD692X0_MSG_GET_PORT_PARAM, /* add new message above here */ PD692X0_MSG_CNT @@ -135,7 +137,7 @@ static const struct pd692x0_msg pd692x0_msg_template_list[PD692X0_MSG_CNT] = { [PD692X0_MSG_SET_PORT_PARAM] = { .key = PD692X0_KEY_CMD, .sub = {0x05, 0xc0}, - .data = { 0, 0xff, 0xff, 0xff, + .data = { 0xf, 0xff, 0xff, 0xff, 0x4e, 0x4e, 0x4e, 0x4e}, }, [PD692X0_MSG_GET_PORT_STATUS] = { @@ -156,6 +158,18 @@ static const struct pd692x0_msg pd692x0_msg_template_list[PD692X0_MSG_CNT] = { .data = {0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e}, }, + [PD692X0_MSG_GET_PORT_MEAS] = { + .key = PD692X0_KEY_REQ, + .sub = {0x05, 0xc5}, + .data = {0x4e, 0x4e, 0x4e, 0x4e, + 0x4e, 0x4e, 0x4e, 0x4e}, + }, + [PD692X0_MSG_GET_PORT_PARAM] = { + .key = PD692X0_KEY_REQ, + .sub = {0x05, 0xc0}, + .data = {0x4e, 0x4e, 0x4e, 0x4e, + 0x4e, 0x4e, 0x4e, 0x4e}, + }, }; static u8 pd692x0_build_msg(struct pd692x0_msg *msg, u8 echo) @@ -515,6 +529,68 @@ static const char *pd692x0_get_status_msg(int id) return NULL; } +struct pd692x0_class_pw { + int class; + int class_cfg_value; + int class_pw; + int max_added_class_pw; +}; + +/* 4/2 pairs class configuration power table in compliance mode. + * Need to be arranged in ascending order of power support. + */ +static const struct pd692x0_class_pw pd692x0_class_pw_table[] = { + {.class = 3, .class_cfg_value = 0x3, .class_pw = 15000, .max_added_class_pw = 3100}, + {.class = 4, .class_cfg_value = 0x2, .class_pw = 30000, .max_added_class_pw = 8000}, + {.class = 6, .class_cfg_value = 0x1, .class_pw = 60000, .max_added_class_pw = 5000}, + {.class = 8, .class_cfg_value = 0x0, .class_pw = 90000, .max_added_class_pw = 7500}, + { /* sentinel */ } +}; + +static int pd692x0_pi_get_pw_from_table(int op_mode, int added_pw) +{ + const struct pd692x0_class_pw *pw_table; + + pw_table = pd692x0_class_pw_table; + while (pw_table->class) { + if (pw_table->class_cfg_value == op_mode) + return pw_table->class_pw + added_pw * 100; + + pw_table++; + } + + return -ERANGE; +} + +static int pd692x0_pi_set_pw_from_table(struct pd692x0_msg *msg, int pw) +{ + const struct pd692x0_class_pw *pw_table; + + pw_table = pd692x0_class_pw_table; + while (pw_table->class) { + if (pw <= (pw_table->class_pw + pw_table->max_added_class_pw)) { + int added_pw; + + msg->data[2] = pw_table->class_cfg_value; + added_pw = (pw - pw_table->class_pw) / 100; + if (added_pw > 0) + msg->data[3] = added_pw; + else + msg->data[3] = 0; + + return 0; + } + + pw_table++; + } + + /* Set max power ie. last line of pd692x0_class_pw_table */ + pw_table--; + msg->data[2] = pw_table->class_cfg_value; + msg->data[3] = pw_table->max_added_class_pw; + return 0; +} + static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, unsigned long id, struct netlink_ext_ack *extack, @@ -553,9 +629,20 @@ static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, priv->admin_state[id] = status->c33_admin_state; status->c33_pw_status_msg = pd692x0_get_status_msg(buf.sub[0]); - status->c33_actual_pw = (buf.data[0] << 4 | buf.data[1]) * 100; + msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_PARAM]; + msg.sub[2] = id; + memset(&buf, 0, sizeof(buf)); + ret = pd692x0_sendrecv_msg(priv, &msg, &buf); + if (ret < 0) + return ret; + + ret = pd692x0_pi_get_pw_from_table(buf.data[0], buf.data[1]); + if (ret < 0) + return ret; + status->c33_pw_limit = ret; + memset(&buf, 0, sizeof(buf)); msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_CLASS]; msg.sub[2] = id; @@ -845,12 +932,88 @@ static int pd692x0_setup_pi_matrix(struct pse_controller_dev *pcdev) return ret; } +static int pd692x0_pi_get_voltage(struct pse_controller_dev *pcdev, int id) +{ + struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); + struct pd692x0_msg msg, buf = {0}; + int ret; + + ret = pd692x0_fw_unavailable(priv); + if (ret) + return ret; + + msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_MEAS]; + msg.sub[2] = id; + ret = pd692x0_sendrecv_msg(priv, &msg, &buf); + if (ret < 0) + return ret; + + /* Convert 0.1V unit to mV */ + return (buf.sub[0] << 8 | buf.sub[1]) * 100; +} + +static int pd692x0_pi_get_current_limit(struct pse_controller_dev *pcdev, + int id) +{ + struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); + struct pd692x0_msg msg, buf = {0}; + int mW, mV, mA, ret; + + msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_PARAM]; + msg.sub[2] = id; + ret = pd692x0_sendrecv_msg(priv, &msg, &buf); + if (ret < 0) + return ret; + + ret = pd692x0_pi_get_pw_from_table(buf.data[2], buf.data[3]); + if (ret < 0) + return ret; + mW = ret; + + ret = pd692x0_pi_get_voltage(pcdev, id); + if (ret < 0) + return ret; + mV = ret; + + mA = mW * 1000 / mV; + return mA; +} + +static int pd692x0_pi_set_current_limit(struct pse_controller_dev *pcdev, + int id, int max_mA) +{ + struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); + struct pd692x0_msg msg, buf = {0}; + int mV, ret; + + ret = pd692x0_fw_unavailable(priv); + if (ret) + return ret; + + /* If */ + if (max_mA == MAX_PI_CURRENT) + return 0; + + ret = pd692x0_pi_get_voltage(pcdev, id); + if (ret < 0) + return ret; + mV = ret; + + msg = pd692x0_msg_template_list[PD692X0_MSG_SET_PORT_PARAM]; + msg.sub[2] = id; + pd692x0_pi_set_pw_from_table(&msg, mV * max_mA / 1000); + return pd692x0_sendrecv_msg(priv, &msg, &buf); +} + static const struct pse_controller_ops pd692x0_ops = { .setup_pi_matrix = pd692x0_setup_pi_matrix, .ethtool_get_status = pd692x0_ethtool_get_status, .pi_enable = pd692x0_pi_enable, .pi_disable = pd692x0_pi_disable, .pi_is_enabled = pd692x0_pi_is_enabled, + .pi_get_voltage = pd692x0_pi_get_voltage, + .pi_get_current_limit = pd692x0_pi_get_current_limit, + .pi_set_current_limit = pd692x0_pi_set_current_limit, }; #define PD692X0_FW_LINE_MAX_SZ 0xff