From patchwork Fri May 31 20:39:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13682158 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1CA2C25B75 for ; Fri, 31 May 2024 20:41:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3A6D110E421; Fri, 31 May 2024 20:41:53 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.b="xLXVn37e"; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by gabe.freedesktop.org (Postfix) with ESMTPS id A7AF510E392 for ; Fri, 31 May 2024 20:41:51 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id CA31B87DDF; Fri, 31 May 2024 22:41:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1717188110; bh=nv95Eo37oufyhQlWoRt2AuPuPi5j39leE657Q4bar1M=; h=From:To:Cc:Subject:Date:From; b=xLXVn37eURbWtHFL/MY8gorhBGAapnky324ehTrFV/yKU8nrEpR1lFC/2faN/grJB i+BNT0OCaap28w5vAvKMkw1Yng2ZmWB7BcyzQIyh+HzEO94P5e0CLJuDFdTi8VkgO9 H5OdmkO0T4GE5acb7bSyeBwXrOKT3iTLbt9fYLBC0q/irHIxqSxyIs+myfQawROxzT HVhLXmDkId+4SK0P9KUalGvegTB75gjJHmpDO9nUUdptHza2nUtwfOciIV0E7tamoB oJsd7Uhb1B2hAWbaXlfzohnmKK6W9T+5Q7SwvrUBbNGaOBwWRIvEeD+iQNTIpIU6b5 I0DJ16d4HJSmw== From: Marek Vasut To: dri-devel@lists.freedesktop.org Cc: Marek Vasut , Andrzej Hajda , Daniel Vetter , David Airlie , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Lucas Stach , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Robert Foss , Thomas Zimmermann , kernel@dh-electronics.com Subject: [PATCH 1/6] drm/bridge: tc358767: Split tc_pxl_pll_en() into parameter calculation and enablement Date: Fri, 31 May 2024 22:39:47 +0200 Message-ID: <20240531204130.277800-1-marex@denx.de> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Split tc_pxl_pll_en() into tc_pxl_pll_calc() which does only Pixel PLL parameter calculation and tc_pxl_pll_en() which calls tc_pxl_pll_calc() and then configures the Pixel PLL register. This is a preparatory patch for further rework, where tc_pxl_pll_calc() will also be used to find out the exact clock frequency generated by the Pixel PLL. This frequency will be used as adjusted_mode clock frequency and passed down the display pipeline to obtain exactly this frequency on input into this bridge. The precise input frequency that matches the Pixel PLL frequency is important for this bridge, as if the frequencies do not match, the bridge does suffer VFIFO overruns or underruns. Signed-off-by: Marek Vasut --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Lucas Stach Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Neil Armstrong Cc: Robert Foss Cc: Thomas Zimmermann Cc: dri-devel@lists.freedesktop.org Cc: kernel@dh-electronics.com --- drivers/gpu/drm/bridge/tc358767.c | 32 ++++++++++++++++++++++++------- 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 029002938a5e8..45af31414ce48 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -580,9 +580,9 @@ static int tc_pllupdate(struct tc_data *tc, unsigned int pllctrl) return 0; } -static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) +static int tc_pxl_pll_calc(struct tc_data *tc, u32 refclk, u32 pixelclock, + int *out_best_pixelclock, u32 *out_pxl_pllparam) { - int ret; int i_pre, best_pre = 1; int i_post, best_post = 1; int div, best_div = 1; @@ -678,11 +678,6 @@ static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) if (best_mul == 128) best_mul = 0; - /* Power up PLL and switch to bypass */ - ret = regmap_write(tc->regmap, PXL_PLLCTRL, PLLBYP | PLLEN); - if (ret) - return ret; - pxl_pllparam = vco_hi << 24; /* For PLL VCO >= 300 MHz = 1 */ pxl_pllparam |= ext_div[best_pre] << 20; /* External Pre-divider */ pxl_pllparam |= ext_div[best_post] << 16; /* External Post-divider */ @@ -690,6 +685,29 @@ static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) pxl_pllparam |= best_div << 8; /* Divider for PLL RefClk */ pxl_pllparam |= best_mul; /* Multiplier for PLL */ + if (out_best_pixelclock) + *out_best_pixelclock = best_pixelclock; + + if (out_pxl_pllparam) + *out_pxl_pllparam = pxl_pllparam; + + return 0; +} + +static int tc_pxl_pll_en(struct tc_data *tc, u32 refclk, u32 pixelclock) +{ + u32 pxl_pllparam = 0; + int ret; + + ret = tc_pxl_pll_calc(tc, refclk, pixelclock, NULL, &pxl_pllparam); + if (ret) + return ret; + + /* Power up PLL and switch to bypass */ + ret = regmap_write(tc->regmap, PXL_PLLCTRL, PLLBYP | PLLEN); + if (ret) + return ret; + ret = regmap_write(tc->regmap, PXL_PLLPARAM, pxl_pllparam); if (ret) return ret; From patchwork Fri May 31 20:39:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13682159 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E892C25B75 for ; Fri, 31 May 2024 20:41:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C559F10E42E; Fri, 31 May 2024 20:41:53 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.b="RJY377Eg"; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by gabe.freedesktop.org (Postfix) with ESMTPS id 48AAD10E421 for ; Fri, 31 May 2024 20:41:52 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 770AD881BC; Fri, 31 May 2024 22:41:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1717188111; bh=+sBTqEEqsnc8N3sMpMOiTiz3bc8F9bN0TjO513t8oAo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RJY377EghQwEDWqXkgz5iHWRolsAiZe08qZZO6JFHjhGJcOl/ZNN74/41AQ8At/Ej LVazOYiJjdhageaNrz0opGLv/a8Ypf5Kh+4NjpPGaWawFvxoGz1f8ah4dR9MZjAiCo cz7wy9uGUakV9ETH3e+M8lEIlYhLE3jMBUNSmXTrznZBb5dfe7vFQZW8/Q2l8CzAPA DUTw/lXrvsgWJ6C+O3y/ykFiYmhcdtMVGT7hQTFgOZ9vKJ2mZA/PTv1BcVTeBbg3uF 4fbWAv5VM/Xrf07HH4Jfa+uFgYX3nfH3sS2dukG47jAqOqzO1qi04DPmv3bVTeYX+s 7tCK/oR9W48Vg== From: Marek Vasut To: dri-devel@lists.freedesktop.org Cc: Marek Vasut , Andrzej Hajda , Daniel Vetter , David Airlie , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Lucas Stach , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Robert Foss , Thomas Zimmermann , kernel@dh-electronics.com Subject: [PATCH 2/6] drm/bridge: tc358767: Use tc_pxl_pll_calc() to correct adjusted_mode clock Date: Fri, 31 May 2024 22:39:48 +0200 Message-ID: <20240531204130.277800-2-marex@denx.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240531204130.277800-1-marex@denx.de> References: <20240531204130.277800-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Use tc_pxl_pll_calc() to find out the exact clock frequency generated by the Pixel PLL. Use the Pixel PLL frequency as adjusted_mode clock frequency and pass it down the display pipeline to obtain exactly this frequency on input into this bridge. The precise input frequency that matches the Pixel PLL frequency is important for this bridge, as if the frequencies do not match, the bridge does suffer VFIFO overruns or underruns. Signed-off-by: Marek Vasut --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Lucas Stach Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Neil Armstrong Cc: Robert Foss Cc: Thomas Zimmermann Cc: dri-devel@lists.freedesktop.org Cc: kernel@dh-electronics.com --- drivers/gpu/drm/bridge/tc358767.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 45af31414ce48..252cc08dcc4a8 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -1619,6 +1619,18 @@ static int tc_dpi_atomic_check(struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) { + struct tc_data *tc = bridge_to_tc(bridge); + int adjusted_clock = 0; + int ret; + + ret = tc_pxl_pll_calc(tc, clk_get_rate(tc->refclk), + crtc_state->adjusted_mode.clock * 1000, + &adjusted_clock, NULL); + if (ret) + return ret; + + crtc_state->adjusted_mode.clock = adjusted_clock / 1000; + /* DSI->DPI interface clock limitation: upto 100 MHz */ if (crtc_state->adjusted_mode.clock > 100000) return -EINVAL; @@ -1631,6 +1643,18 @@ static int tc_edp_atomic_check(struct drm_bridge *bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) { + struct tc_data *tc = bridge_to_tc(bridge); + int adjusted_clock = 0; + int ret; + + ret = tc_pxl_pll_calc(tc, clk_get_rate(tc->refclk), + crtc_state->adjusted_mode.clock * 1000, + &adjusted_clock, NULL); + if (ret) + return ret; + + crtc_state->adjusted_mode.clock = adjusted_clock / 1000; + /* DPI->(e)DP interface clock limitation: upto 154 MHz */ if (crtc_state->adjusted_mode.clock > 154000) return -EINVAL; From patchwork Fri May 31 20:39:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13682160 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3CA9C25B75 for ; Fri, 31 May 2024 20:42:04 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DE3B910E392; Fri, 31 May 2024 20:42:03 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.b="dIuQnx8D"; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2FC7F10E392 for ; Fri, 31 May 2024 20:41:53 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 1BBDC882F0; Fri, 31 May 2024 22:41:51 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1717188111; bh=ZLFdrayrHJA7P/8if3qv/SGu0dqXxXXr/PLMwdnvSmw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dIuQnx8DBeebE9zSxOLQ24S2dzwlhxFz6+WBFUfxXg7NO2fkyb80S3Fv7bzkgo9Ry OOHycpDSDRLPjImEebX5qzxmPknS2GlgMleDWxRr5jMr3kdPwlr1c+YtAzDiP+YVn2 WsHE42ZzKJy1ndT99AuChXP0ZZIn+rert2/Kdb35gz4w+C9a2GNDFoqfpDR8b8TS+Z lSc1iyg3Jpw/3L3k8LXV6Q600WAQz32akM6nYnFSGp6RQbeNGcEQ94ENnVCZwndmj5 PHw/kdo4alDM15oThWCiffpJPanebg8PA7M6g0dUe7qw0CckbQhb+E9xDoadTLgRys 8m8Hh5Tlmhvxg== From: Marek Vasut To: dri-devel@lists.freedesktop.org Cc: Marek Vasut , Andrzej Hajda , Daniel Vetter , David Airlie , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Lucas Stach , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Robert Foss , Thomas Zimmermann , kernel@dh-electronics.com Subject: [PATCH 3/6] drm/bridge: tc358767: Drop line_pixel_subtract Date: Fri, 31 May 2024 22:39:49 +0200 Message-ID: <20240531204130.277800-3-marex@denx.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240531204130.277800-1-marex@denx.de> References: <20240531204130.277800-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This line_pixel_subtract is no longer needed now that the bridge can request and obtain specific pixel clock on input to the bridge, with clock frequency that matches the Pixel PLL frequency. The line_pixel_subtract is now always 0, so drop it entirely. The line_pixel_subtract was not reliable as it never worked when the Pixel PLL and input clock were off just so that the required amount of pixels to subtract would not be whole integer. Signed-off-by: Marek Vasut --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Lucas Stach Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Neil Armstrong Cc: Robert Foss Cc: Thomas Zimmermann Cc: dri-devel@lists.freedesktop.org Cc: kernel@dh-electronics.com --- drivers/gpu/drm/bridge/tc358767.c | 16 +--------------- 1 file changed, 1 insertion(+), 15 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 252cc08dcc4a8..f16728256991a 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -382,9 +382,6 @@ struct tc_data { /* HPD pin number (0 or 1) or -ENODEV */ int hpd_pin; - - /* Number of pixels to subtract from a line due to pixel clock delta */ - u32 line_pixel_subtract; }; static inline struct tc_data *aux_to_tc(struct drm_dp_aux *a) @@ -661,11 +658,7 @@ static int tc_pxl_pll_calc(struct tc_data *tc, u32 refclk, u32 pixelclock, return -EINVAL; } - tc->line_pixel_subtract = tc->mode.htotal - - DIV_ROUND_UP(tc->mode.htotal * (u64)best_pixelclock, (u64)pixelclock); - - dev_dbg(tc->dev, "PLL: got %d, delta %d (subtract %d px)\n", best_pixelclock, - best_delta, tc->line_pixel_subtract); + dev_dbg(tc->dev, "PLL: got %d, delta %d\n", best_pixelclock, best_delta); dev_dbg(tc->dev, "PLL: %d / %d / %d * %d / %d\n", refclk, ext_div[best_pre], best_div, best_mul, ext_div[best_post]); @@ -909,13 +902,6 @@ static int tc_set_common_video_mode(struct tc_data *tc, upper_margin, lower_margin, vsync_len); dev_dbg(tc->dev, "total: %dx%d\n", mode->htotal, mode->vtotal); - if (right_margin > tc->line_pixel_subtract) { - right_margin -= tc->line_pixel_subtract; - } else { - dev_err(tc->dev, "Bridge pixel clock too slow for mode\n"); - right_margin = 0; - } - /* * LCD Ctl Frame Size * datasheet is not clear of vsdelay in case of DPI From patchwork Fri May 31 20:39:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13682163 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B0C63C27C4F for ; Fri, 31 May 2024 20:42:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E8B9D10E4BD; Fri, 31 May 2024 20:42:07 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.b="b4PeMGBo"; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by gabe.freedesktop.org (Postfix) with ESMTPS id D11D910E491 for ; Fri, 31 May 2024 20:41:53 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id AFEA68831F; Fri, 31 May 2024 22:41:51 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1717188112; bh=gLrKCnK8FgpqnjtOsr2ptjUInBih2IH1ySBWh4U3mF8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=b4PeMGBo5qwS8cUC/Z+UagJQyunhWbaliKq4rUFpbLJQeo0MxtujBrm+8vh2YuYlt sYbca8DcdMq4mFr72QZHkzEqPoELglz0agy05j0jgWjHxJiJT5Y5LZuGG72kRKzMiz pIVgeECicrgnmufHOZO4zYljlq97qZyy1oZdI//nCcDumYhzCDWuqEw/BqiOV+dD7Y TSTZVrDEpf3VAE77K2kTUE4h31JCW8C//tHfv8iLuREEyXMpR/mP7PjyMcMQq0/XgL C4ZfPL2Fs+SHrmhVVtgDG8X5tkc0GhTX7+qtSde5JVMV2ZGccYMrhYgpjdkEcwwW5v YCvNuYnJ9aCvg== From: Marek Vasut To: dri-devel@lists.freedesktop.org Cc: Marek Vasut , Andrzej Hajda , Daniel Vetter , David Airlie , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Lucas Stach , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Robert Foss , Thomas Zimmermann , kernel@dh-electronics.com Subject: [PATCH 4/6] drm/bridge: tc358767: Disable MIPI_DSI_CLOCK_NON_CONTINUOUS Date: Fri, 31 May 2024 22:39:50 +0200 Message-ID: <20240531204130.277800-4-marex@denx.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240531204130.277800-1-marex@denx.de> References: <20240531204130.277800-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The MIPI_DSI_CLOCK_NON_CONTINUOUS causes visible artifacts in high resolution modes, disable it. Namely, in DSI->DP mode 1920x1200 24 bpp 59.95 Hz, with DSI bus at maximum 1 Gbps per lane setting, the image contains jittering empty lines. Signed-off-by: Marek Vasut --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Lucas Stach Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Neil Armstrong Cc: Robert Foss Cc: Thomas Zimmermann Cc: dri-devel@lists.freedesktop.org Cc: kernel@dh-electronics.com --- drivers/gpu/drm/bridge/tc358767.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index f16728256991a..926921a8d29d7 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -2303,7 +2303,7 @@ static int tc_mipi_dsi_host_attach(struct tc_data *tc) dsi->lanes = dsi_lanes; dsi->format = MIPI_DSI_FMT_RGB888; dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | - MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS; + MIPI_DSI_MODE_LPM; ret = devm_mipi_dsi_attach(dev, dsi); if (ret < 0) { From patchwork Fri May 31 20:39:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13682162 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4716AC25B75 for ; Fri, 31 May 2024 20:42:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D2A8210E4B1; Fri, 31 May 2024 20:42:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.b="JEJracLN"; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by gabe.freedesktop.org (Postfix) with ESMTPS id AEA7210E392 for ; Fri, 31 May 2024 20:41:54 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 9F557885AF; Fri, 31 May 2024 22:41:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1717188113; bh=jNUfw6DlnFWdbcRDy4dDKSjnwpkNiZThBi4HC3hIy/M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JEJracLNr7/s4bjYdow/L677zOsPcSn7AsRrvH36Q0flf343/SG1zp3jxv9YiEZDI Z9z/DGBP3WWvRVOMifYUAXPsFSyx0fBMsp8TZq84KdrikGX/TH0dL/qYcpQqRzait7 HoaQd38Rys6ixVd62zhK4+9gGgVUAQupEbCmrpSL0urF07cEcKmUrpON0ngYpV9/Xz xbVTpgERrtH/vFTcw0JnCM22n1h8KX+qlr4D9cKRPQiG5oQ3EilWhs2vzDSaoGVVZf UovGKh52T27x7EoEYp9s8xRftpB2CLQGh7+cx/TzH2HuknVKRPwXpAzt10gEoE21eo AAfHbpgEFpf2Q== From: Marek Vasut To: dri-devel@lists.freedesktop.org Cc: Marek Vasut , Andrzej Hajda , Daniel Vetter , David Airlie , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Lucas Stach , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Robert Foss , Thomas Zimmermann , kernel@dh-electronics.com Subject: [PATCH 5/6] drm/bridge: tc358767: Set LSCLK divider for SYSCLK to 1 Date: Fri, 31 May 2024 22:39:51 +0200 Message-ID: <20240531204130.277800-5-marex@denx.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240531204130.277800-1-marex@denx.de> References: <20240531204130.277800-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The only information in the datasheet regarding this divider is a note in SYS_PLLPARAM register documentation which states that when LSCLK is 270 MHz, LSCLK_DIV should be 1. What should LSCLK_DIV be set to when LSCLK is 162 MHz (for DP 1.62G mode) is unclear, but empirical test confirms using LSCLK_DIV 1 has no adverse effects either. In the worst case, the internal TC358767 clock would run faster. Signed-off-by: Marek Vasut --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Lucas Stach Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Neil Armstrong Cc: Robert Foss Cc: Thomas Zimmermann Cc: dri-devel@lists.freedesktop.org Cc: kernel@dh-electronics.com --- drivers/gpu/drm/bridge/tc358767.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 926921a8d29d7..156297131a6cc 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -738,7 +738,7 @@ static int tc_stream_clock_calc(struct tc_data *tc) static int tc_set_syspllparam(struct tc_data *tc) { unsigned long rate; - u32 pllparam = SYSCLK_SEL_LSCLK | LSCLK_DIV_2; + u32 pllparam = SYSCLK_SEL_LSCLK | LSCLK_DIV_1; rate = clk_get_rate(tc->refclk); switch (rate) { From patchwork Fri May 31 20:39:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 13682161 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 13AF4C27C4F for ; Fri, 31 May 2024 20:42:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4885010E491; Fri, 31 May 2024 20:42:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=denx.de header.i=@denx.de header.b="DTGp6yVB"; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4F1ED10E491 for ; Fri, 31 May 2024 20:41:55 +0000 (UTC) Received: from tr.lan (ip-86-49-120-218.bb.vodafone.cz [86.49.120.218]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: marex@denx.de) by phobos.denx.de (Postfix) with ESMTPSA id 600E4885FE; Fri, 31 May 2024 22:41:53 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de; s=phobos-20191101; t=1717188113; bh=W0Vk0hPMwOfXp99Kdm4cJaYsHLcUnjk5AgCJWYm6XOI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DTGp6yVB5WxmQ1uTqnb5+JeRx6xEEHNh6+LcpejIti/9bwoWBED5ECBJW82ZvFbT4 y86H6UBVX4FhPRIpdI4tCNie5dpVXN9UWB1W0LHKUhCT3kOEVAFxkzUNGrK8SflXT7 pVAfSY8Z5ApK/5dXGpgM14eyKy5e3OKd/J1Et9SP2oJKxTMr45cw36UR63n1ly4N85 mqJN6VxbxH/hcIToXMzcewc+s1G4tnqBzZ+fEea5ujQ0SS7M+F+R1drYBu1eW29ROh iYx6oDi303upqhWpAvhuRvTClqKhNeiLCpdeK7FsMrdrSOOZUr9AdCv74eThz4cXkm hN6T3uiFNG3oA== From: Marek Vasut To: dri-devel@lists.freedesktop.org Cc: Marek Vasut , Andrzej Hajda , Daniel Vetter , David Airlie , Jernej Skrabec , Jonas Karlman , Laurent Pinchart , Lucas Stach , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Robert Foss , Thomas Zimmermann , kernel@dh-electronics.com Subject: [PATCH 6/6] Revert "drm/bridge: tc358767: Set default CLRSIPO count" Date: Fri, 31 May 2024 22:39:52 +0200 Message-ID: <20240531204130.277800-6-marex@denx.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240531204130.277800-1-marex@denx.de> References: <20240531204130.277800-1-marex@denx.de> MIME-Version: 1.0 X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This reverts commit 01338bb82fed40a6a234c2b36a92367c8671adf0. With clock improvements in place, this seems to be no longer necessary. Set the CLRSIPO to default setting recommended by manufacturer. Signed-off-by: Marek Vasut --- Cc: Andrzej Hajda Cc: Daniel Vetter Cc: David Airlie Cc: Jernej Skrabec Cc: Jonas Karlman Cc: Laurent Pinchart Cc: Lucas Stach Cc: Maarten Lankhorst Cc: Maxime Ripard Cc: Neil Armstrong Cc: Robert Foss Cc: Thomas Zimmermann Cc: dri-devel@lists.freedesktop.org Cc: kernel@dh-electronics.com --- drivers/gpu/drm/bridge/tc358767.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c index 156297131a6cc..1243918320a7d 100644 --- a/drivers/gpu/drm/bridge/tc358767.c +++ b/drivers/gpu/drm/bridge/tc358767.c @@ -1356,10 +1356,10 @@ static int tc_dsi_rx_enable(struct tc_data *tc) u32 value; int ret; - regmap_write(tc->regmap, PPI_D0S_CLRSIPOCOUNT, 25); - regmap_write(tc->regmap, PPI_D1S_CLRSIPOCOUNT, 25); - regmap_write(tc->regmap, PPI_D2S_CLRSIPOCOUNT, 25); - regmap_write(tc->regmap, PPI_D3S_CLRSIPOCOUNT, 25); + regmap_write(tc->regmap, PPI_D0S_CLRSIPOCOUNT, 5); + regmap_write(tc->regmap, PPI_D1S_CLRSIPOCOUNT, 5); + regmap_write(tc->regmap, PPI_D2S_CLRSIPOCOUNT, 5); + regmap_write(tc->regmap, PPI_D3S_CLRSIPOCOUNT, 5); regmap_write(tc->regmap, PPI_D0S_ATMR, 0); regmap_write(tc->regmap, PPI_D1S_ATMR, 0); regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE);