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Mon, 3 Jun 2024 11:14:08 +0000 (GMT) Subject: [PATCH 1/6] KVM: PPC: Book3S HV: Fix the set_one_reg for MMCR3 From: Shivaprasad G Bhat To: kvm@vger.kernel.org, linux-doc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: pbonzini@redhat.com, naveen.n.rao@linux.ibm.com, christophe.leroy@csgroup.eu, corbet@lwn.net, mpe@ellerman.id.au, namhyung@kernel.org, npiggin@gmail.com, pbonzini@redhat.com, sbhat@linux.ibm.com, jniethe5@gmail.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org Date: Mon, 03 Jun 2024 11:14:08 +0000 Message-ID: <171741324316.6631.12096363054516478201.stgit@linux.ibm.com> In-Reply-To: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> References: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> User-Agent: StGit/1.5 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: I1Iy_x7ZUjLQN5WvK5f79UIhS0FAfUTH X-Proofpoint-GUID: U7vnU9bxyMciEwx4D-NZ-RkJCOgzNa9u X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-06-03_07,2024-05-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 mlxlogscore=637 phishscore=0 adultscore=0 clxscore=1015 spamscore=0 suspectscore=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406030094 The kvmppc_set_one_reg_hv() wrongly get() the value instead of set() for MMCR3. Fix the same. Fixes: 5752fe0b811b ("KVM: PPC: Book3S HV: Save/restore new PMU registers") Signed-off-by: Shivaprasad G Bhat Reviewed-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index daaf7faf21a5..a4f34f94c86f 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c @@ -2540,7 +2540,7 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, vcpu->arch.mmcrs = set_reg_val(id, *val); break; case KVM_REG_PPC_MMCR3: - *val = get_reg_val(id, vcpu->arch.mmcr[3]); + kvmppc_set_mmcr_hv(vcpu, 3, set_reg_val(id, *val)); break; case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: i = id - KVM_REG_PPC_PMC1; From patchwork Mon Jun 3 11:14:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shivaprasad G Bhat X-Patchwork-Id: 13683640 Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38BFE84A40; Mon, 3 Jun 2024 11:14:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.156.1 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717413281; cv=none; b=B8IUYnAcpbSe3tiyc8WD/8S9ZlgGE0AsRqcP4xptK+vz9PavW+Y5doTOuyAqYYTQafhxi/f9kl6VlXF+mYcwILlisEOTGkVOtrHv3847nVyfZuX5BIZ8FsUlD/D5lGinxRNoN9qG2rOdbYYPWlbpsLxEhqJYv1syI74PGkY1OV0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717413281; c=relaxed/simple; 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Mon, 3 Jun 2024 11:14:19 +0000 (GMT) Subject: [PATCH 2/6] KVM: PPC: Book3S HV: Fix the get_one_reg of SDAR From: Shivaprasad G Bhat To: kvm@vger.kernel.org, linux-doc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: pbonzini@redhat.com, naveen.n.rao@linux.ibm.com, christophe.leroy@csgroup.eu, corbet@lwn.net, mpe@ellerman.id.au, namhyung@kernel.org, npiggin@gmail.com, pbonzini@redhat.com, sbhat@linux.ibm.com, jniethe5@gmail.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org Date: Mon, 03 Jun 2024 11:14:18 +0000 Message-ID: <171741325608.6631.15015853676135060467.stgit@linux.ibm.com> In-Reply-To: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> References: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> User-Agent: StGit/1.5 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: -ocXsgruZ9h7C1bKm5gSJuRhVrh5RNX2 X-Proofpoint-GUID: IlD5_8AP2ZCl8-ECo0PvIZsM9bEoLvVT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-06-03_07,2024-05-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 mlxscore=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 mlxlogscore=620 clxscore=1015 spamscore=0 malwarescore=0 adultscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406030094 The kvmppc_get_one_reg_hv() for SDAR is wrongly getting the SIAR instead of SDAR, possibly a paste error emanating from the previous refactoring. Patch fixes the wrong get_one_reg() for the same. Fixes: ebc88ea7a6ad ("KVM: PPC: Book3S HV: Use accessors for VCPU registers") Signed-off-by: Shivaprasad G Bhat Reviewed-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index a4f34f94c86f..b576781d58d5 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c @@ -2305,7 +2305,7 @@ static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, *val = get_reg_val(id, kvmppc_get_siar_hv(vcpu)); break; case KVM_REG_PPC_SDAR: - *val = get_reg_val(id, kvmppc_get_siar_hv(vcpu)); + *val = get_reg_val(id, kvmppc_get_sdar_hv(vcpu)); break; case KVM_REG_PPC_SIER: *val = get_reg_val(id, kvmppc_get_sier_hv(vcpu, 0)); From patchwork Mon Jun 3 11:14:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shivaprasad G Bhat X-Patchwork-Id: 13683641 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5556384A23; 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Mon, 3 Jun 2024 11:14:35 GMT Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B30CC20063; Mon, 3 Jun 2024 11:14:33 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AC3F32004E; Mon, 3 Jun 2024 11:14:31 +0000 (GMT) Received: from [172.17.0.2] (unknown [9.3.101.175]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 3 Jun 2024 11:14:31 +0000 (GMT) Subject: [PATCH 3/6] KVM: PPC: Book3S HV nestedv2: Keep nested guest DEXCR in sync From: Shivaprasad G Bhat To: kvm@vger.kernel.org, linux-doc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: pbonzini@redhat.com, naveen.n.rao@linux.ibm.com, christophe.leroy@csgroup.eu, corbet@lwn.net, mpe@ellerman.id.au, namhyung@kernel.org, npiggin@gmail.com, pbonzini@redhat.com, sbhat@linux.ibm.com, jniethe5@gmail.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org Date: Mon, 03 Jun 2024 11:14:31 +0000 Message-ID: <171741326679.6631.5332298610543769487.stgit@linux.ibm.com> In-Reply-To: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> References: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> User-Agent: StGit/1.5 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: OQjbPXLNv_X-59ZS1fr02P3KAhwHSyVm X-Proofpoint-ORIG-GUID: h1XlCMRvDjI1MKkjK_LIQx5ML529FP1O X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-06-03_07,2024-05-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 mlxlogscore=833 lowpriorityscore=0 phishscore=0 suspectscore=0 bulkscore=0 adultscore=0 spamscore=0 clxscore=1015 impostorscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406030094 The nestedv2 APIs has the guest state element defined for DEXCR for the save-restore with L0. However, its ignored in the code. The patch takes care of this for the DEXCR GSID. Signed-off-by: Shivaprasad G Bhat Reviewed-by: Nicholas Piggin --- arch/powerpc/include/asm/kvm_host.h | 1 + arch/powerpc/kvm/book3s_hv.h | 1 + arch/powerpc/kvm/book3s_hv_nestedv2.c | 6 ++++++ 3 files changed, 8 insertions(+) diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h index 8abac532146e..1e2fdcbecffd 100644 --- a/arch/powerpc/include/asm/kvm_host.h +++ b/arch/powerpc/include/asm/kvm_host.h @@ -599,6 +599,7 @@ struct kvm_vcpu_arch { ulong dawrx0; ulong dawr1; ulong dawrx1; + ulong dexcr; ulong ciabr; ulong cfar; ulong ppr; diff --git a/arch/powerpc/kvm/book3s_hv.h b/arch/powerpc/kvm/book3s_hv.h index 47b2c815641e..7b0fd282fe95 100644 --- a/arch/powerpc/kvm/book3s_hv.h +++ b/arch/powerpc/kvm/book3s_hv.h @@ -116,6 +116,7 @@ KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawr0, 64, KVMPPC_GSID_DAWR0) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawr1, 64, KVMPPC_GSID_DAWR1) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawrx0, 64, KVMPPC_GSID_DAWRX0) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawrx1, 64, KVMPPC_GSID_DAWRX1) +KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dexcr, 64, KVMPPC_GSID_DEXCR) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ciabr, 64, KVMPPC_GSID_CIABR) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(wort, 64, KVMPPC_GSID_WORT) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ppr, 64, KVMPPC_GSID_PPR) diff --git a/arch/powerpc/kvm/book3s_hv_nestedv2.c b/arch/powerpc/kvm/book3s_hv_nestedv2.c index 1091f7a83b25..d207a6d936ff 100644 --- a/arch/powerpc/kvm/book3s_hv_nestedv2.c +++ b/arch/powerpc/kvm/book3s_hv_nestedv2.c @@ -193,6 +193,9 @@ static int gs_msg_ops_vcpu_fill_info(struct kvmppc_gs_buff *gsb, case KVMPPC_GSID_DAWRX1: rc = kvmppc_gse_put_u32(gsb, iden, vcpu->arch.dawrx1); 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Mon, 3 Jun 2024 11:14:49 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4069F20067; Mon, 3 Jun 2024 11:14:47 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 308F42004E; Mon, 3 Jun 2024 11:14:45 +0000 (GMT) Received: from [172.17.0.2] (unknown [9.3.101.175]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 3 Jun 2024 11:14:45 +0000 (GMT) Subject: [PATCH 4/6] KVM: PPC: Book3S HV: Add one-reg interface for DEXCR register From: Shivaprasad G Bhat To: kvm@vger.kernel.org, linux-doc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: pbonzini@redhat.com, naveen.n.rao@linux.ibm.com, christophe.leroy@csgroup.eu, corbet@lwn.net, mpe@ellerman.id.au, namhyung@kernel.org, npiggin@gmail.com, pbonzini@redhat.com, sbhat@linux.ibm.com, jniethe5@gmail.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org Date: Mon, 03 Jun 2024 11:14:44 +0000 Message-ID: <171741327891.6631.10339033341166150910.stgit@linux.ibm.com> In-Reply-To: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> References: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> User-Agent: StGit/1.5 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 879TKBnXgQhaFYIU84f2SOq75_EMCTg_ X-Proofpoint-ORIG-GUID: qxq_pOFfdTbTw6Aa2193Vw_aayTuzrgk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-06-03_07,2024-05-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 mlxlogscore=655 lowpriorityscore=0 phishscore=0 suspectscore=0 bulkscore=0 adultscore=0 spamscore=0 clxscore=1015 impostorscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406030094 The patch adds a one-reg register identifier which can be used to read and set the DEXCR for the guest during enter/exit with KVM_REG_PPC_DEXCR. The specific SPR KVM API documentation too updated. Signed-off-by: Shivaprasad G Bhat Reviewed-by: Nicholas Piggin --- Documentation/virt/kvm/api.rst | 1 + arch/powerpc/include/uapi/asm/kvm.h | 1 + arch/powerpc/kvm/book3s_hv.c | 6 ++++++ tools/arch/powerpc/include/uapi/asm/kvm.h | 1 + 4 files changed, 9 insertions(+) diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index a71d91978d9e..81077c654281 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -2441,6 +2441,7 @@ registers, find a list below: PPC KVM_REG_PPC_PTCR 64 PPC KVM_REG_PPC_DAWR1 64 PPC KVM_REG_PPC_DAWRX1 64 + PPC KVM_REG_PPC_DEXCR 64 PPC KVM_REG_PPC_TM_GPR0 64 ... PPC KVM_REG_PPC_TM_GPR31 64 diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h index 1691297a766a..fcb947f65667 100644 --- a/arch/powerpc/include/uapi/asm/kvm.h +++ b/arch/powerpc/include/uapi/asm/kvm.h @@ -645,6 +645,7 @@ struct kvm_ppc_cpu_char { #define KVM_REG_PPC_SIER3 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc3) #define KVM_REG_PPC_DAWR1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4) #define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5) +#define KVM_REG_PPC_DEXCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6) /* Transactional Memory checkpointed state: * This is all GPRs, all VSX regs and a subset of SPRs diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index b576781d58d5..1294c6839d37 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c @@ -2349,6 +2349,9 @@ static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, case KVM_REG_PPC_DAWRX1: *val = get_reg_val(id, kvmppc_get_dawrx1_hv(vcpu)); break; + case KVM_REG_PPC_DEXCR: + *val = get_reg_val(id, kvmppc_get_dexcr_hv(vcpu)); + break; case KVM_REG_PPC_CIABR: *val = get_reg_val(id, kvmppc_get_ciabr_hv(vcpu)); break; @@ -2592,6 +2595,9 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, case KVM_REG_PPC_DAWRX1: kvmppc_set_dawrx1_hv(vcpu, set_reg_val(id, *val) & ~DAWRX_HYP); break; + case KVM_REG_PPC_DEXCR: + kvmppc_set_dexcr_hv(vcpu, set_reg_val(id, *val)); + break; case KVM_REG_PPC_CIABR: kvmppc_set_ciabr_hv(vcpu, set_reg_val(id, *val)); /* Don't allow setting breakpoints in hypervisor code */ diff --git a/tools/arch/powerpc/include/uapi/asm/kvm.h b/tools/arch/powerpc/include/uapi/asm/kvm.h index 1691297a766a..fcb947f65667 100644 --- a/tools/arch/powerpc/include/uapi/asm/kvm.h +++ b/tools/arch/powerpc/include/uapi/asm/kvm.h @@ -645,6 +645,7 @@ struct kvm_ppc_cpu_char { #define KVM_REG_PPC_SIER3 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc3) #define KVM_REG_PPC_DAWR1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4) #define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5) +#define KVM_REG_PPC_DEXCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6) /* Transactional Memory checkpointed state: * This is all GPRs, all VSX regs and a subset of SPRs From patchwork Mon Jun 3 11:14:56 2024 Content-Type: text/plain; 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Mon, 3 Jun 2024 11:14:56 +0000 (GMT) Subject: [PATCH 5/6] KVM: PPC: Book3S HV nestedv2: Keep nested guest HASHKEYR in sync From: Shivaprasad G Bhat To: kvm@vger.kernel.org, linux-doc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: pbonzini@redhat.com, naveen.n.rao@linux.ibm.com, christophe.leroy@csgroup.eu, corbet@lwn.net, mpe@ellerman.id.au, namhyung@kernel.org, npiggin@gmail.com, pbonzini@redhat.com, sbhat@linux.ibm.com, jniethe5@gmail.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org Date: Mon, 03 Jun 2024 11:14:56 +0000 Message-ID: <171741329242.6631.7779344904083076707.stgit@linux.ibm.com> In-Reply-To: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> References: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> User-Agent: StGit/1.5 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: H_ZzZBDSju26zUOZ3p2esprufX10lzcY X-Proofpoint-GUID: Nq2OE4tmRmRaJxRMsslWzyhQ59SmElri X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-06-03_07,2024-05-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 suspectscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 priorityscore=1501 mlxlogscore=833 clxscore=1015 adultscore=0 mlxscore=0 spamscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406030094 The nestedv2 APIs has the guest state element defined for HASHKEYR for the save-restore with L0. However, its ignored in the code. The patch takes care of this for the HASHKEYR GSID. Signed-off-by: Shivaprasad G Bhat Reviewed-by: Nicholas Piggin --- arch/powerpc/include/asm/kvm_host.h | 1 + arch/powerpc/kvm/book3s_hv.h | 1 + arch/powerpc/kvm/book3s_hv_nestedv2.c | 6 ++++++ 3 files changed, 8 insertions(+) diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h index 1e2fdcbecffd..a0cd9dbf534f 100644 --- a/arch/powerpc/include/asm/kvm_host.h +++ b/arch/powerpc/include/asm/kvm_host.h @@ -600,6 +600,7 @@ struct kvm_vcpu_arch { ulong dawr1; ulong dawrx1; ulong dexcr; + ulong hashkeyr; ulong ciabr; ulong cfar; ulong ppr; diff --git a/arch/powerpc/kvm/book3s_hv.h b/arch/powerpc/kvm/book3s_hv.h index 7b0fd282fe95..c073fdfa7dc4 100644 --- a/arch/powerpc/kvm/book3s_hv.h +++ b/arch/powerpc/kvm/book3s_hv.h @@ -117,6 +117,7 @@ KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawr1, 64, KVMPPC_GSID_DAWR1) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawrx0, 64, KVMPPC_GSID_DAWRX0) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dawrx1, 64, KVMPPC_GSID_DAWRX1) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(dexcr, 64, KVMPPC_GSID_DEXCR) +KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(hashkeyr, 64, KVMPPC_GSID_HASHKEYR) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ciabr, 64, KVMPPC_GSID_CIABR) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(wort, 64, KVMPPC_GSID_WORT) KVMPPC_BOOK3S_HV_VCPU_ACCESSOR(ppr, 64, KVMPPC_GSID_PPR) diff --git a/arch/powerpc/kvm/book3s_hv_nestedv2.c b/arch/powerpc/kvm/book3s_hv_nestedv2.c index d207a6d936ff..bbff933f2ccc 100644 --- a/arch/powerpc/kvm/book3s_hv_nestedv2.c +++ b/arch/powerpc/kvm/book3s_hv_nestedv2.c @@ -196,6 +196,9 @@ static int gs_msg_ops_vcpu_fill_info(struct kvmppc_gs_buff *gsb, case KVMPPC_GSID_DEXCR: rc = kvmppc_gse_put_u64(gsb, iden, vcpu->arch.dexcr); break; + case KVMPPC_GSID_HASHKEYR: + rc = kvmppc_gse_put_u64(gsb, iden, vcpu->arch.hashkeyr); + break; case KVMPPC_GSID_CIABR: rc = kvmppc_gse_put_u64(gsb, iden, vcpu->arch.ciabr); break; @@ -447,6 +450,9 @@ static int gs_msg_ops_vcpu_refresh_info(struct kvmppc_gs_msg *gsm, case KVMPPC_GSID_DEXCR: vcpu->arch.dexcr = kvmppc_gse_get_u64(gse); break; + case KVMPPC_GSID_HASHKEYR: + vcpu->arch.hashkeyr = kvmppc_gse_get_u64(gse); + break; case KVMPPC_GSID_CIABR: vcpu->arch.ciabr = kvmppc_gse_get_u64(gse); break; From patchwork Mon Jun 3 11:15:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shivaprasad G Bhat X-Patchwork-Id: 13683644 Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2F45D824B7; Mon, 3 Jun 2024 11:15:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 3 Jun 2024 11:15:13 GMT Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 75F0D2005A; Mon, 3 Jun 2024 11:15:11 +0000 (GMT) Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 540FC20063; Mon, 3 Jun 2024 11:15:09 +0000 (GMT) Received: from [172.17.0.2] (unknown [9.3.101.175]) by smtpav07.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 3 Jun 2024 11:15:09 +0000 (GMT) Subject: [PATCH 6/6] KVM: PPC: Book3S HV: Add one-reg interface for HASHKEYR register From: Shivaprasad G Bhat To: kvm@vger.kernel.org, linux-doc@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: pbonzini@redhat.com, naveen.n.rao@linux.ibm.com, christophe.leroy@csgroup.eu, corbet@lwn.net, mpe@ellerman.id.au, namhyung@kernel.org, npiggin@gmail.com, pbonzini@redhat.com, sbhat@linux.ibm.com, jniethe5@gmail.com, atrajeev@linux.vnet.ibm.com, linux-kernel@vger.kernel.org Date: Mon, 03 Jun 2024 11:15:08 +0000 Message-ID: <171741330411.6631.10739157625274499060.stgit@linux.ibm.com> In-Reply-To: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> References: <171741323521.6631.11242552089199677395.stgit@linux.ibm.com> User-Agent: StGit/1.5 Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 68JkJxxICiLPUA3bCEbfjicCU0X1byGH X-Proofpoint-ORIG-GUID: BW3v26K-pv9usNapJah6wXNG0H35-Gcx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.12.28.16 definitions=2024-06-03_07,2024-05-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 bulkscore=0 mlxscore=0 phishscore=0 lowpriorityscore=0 adultscore=0 impostorscore=0 priorityscore=1501 spamscore=0 suspectscore=0 mlxlogscore=654 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406030094 The patch adds a one-reg register identifier which can be used to read and set the virtual HASHKEYR for the guest during enter/exit with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API documentation too updated. Signed-off-by: Shivaprasad G Bhat Reviewed-by: Nicholas Piggin --- Documentation/virt/kvm/api.rst | 1 + arch/powerpc/include/uapi/asm/kvm.h | 1 + arch/powerpc/kvm/book3s_hv.c | 6 ++++++ tools/arch/powerpc/include/uapi/asm/kvm.h | 1 + 4 files changed, 9 insertions(+) diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 81077c654281..0c22cb4196d8 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -2439,6 +2439,7 @@ registers, find a list below: PPC KVM_REG_PPC_PSSCR 64 PPC KVM_REG_PPC_DEC_EXPIRY 64 PPC KVM_REG_PPC_PTCR 64 + PPC KVM_REG_PPC_HASHKEYR 64 PPC KVM_REG_PPC_DAWR1 64 PPC KVM_REG_PPC_DAWRX1 64 PPC KVM_REG_PPC_DEXCR 64 diff --git a/arch/powerpc/include/uapi/asm/kvm.h b/arch/powerpc/include/uapi/asm/kvm.h index fcb947f65667..23a0af739c78 100644 --- a/arch/powerpc/include/uapi/asm/kvm.h +++ b/arch/powerpc/include/uapi/asm/kvm.h @@ -646,6 +646,7 @@ struct kvm_ppc_cpu_char { #define KVM_REG_PPC_DAWR1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4) #define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5) #define KVM_REG_PPC_DEXCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6) +#define KVM_REG_PPC_HASHKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc7) /* Transactional Memory checkpointed state: * This is all GPRs, all VSX regs and a subset of SPRs diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index 1294c6839d37..ccc9564c5a31 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c @@ -2352,6 +2352,9 @@ static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, case KVM_REG_PPC_DEXCR: *val = get_reg_val(id, kvmppc_get_dexcr_hv(vcpu)); break; + case KVM_REG_PPC_HASHKEYR: + *val = get_reg_val(id, kvmppc_get_hashkeyr_hv(vcpu)); + break; case KVM_REG_PPC_CIABR: *val = get_reg_val(id, kvmppc_get_ciabr_hv(vcpu)); break; @@ -2598,6 +2601,9 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, case KVM_REG_PPC_DEXCR: kvmppc_set_dexcr_hv(vcpu, set_reg_val(id, *val)); break; + case KVM_REG_PPC_HASHKEYR: + kvmppc_set_hashkeyr_hv(vcpu, set_reg_val(id, *val)); + break; case KVM_REG_PPC_CIABR: kvmppc_set_ciabr_hv(vcpu, set_reg_val(id, *val)); /* Don't allow setting breakpoints in hypervisor code */ diff --git a/tools/arch/powerpc/include/uapi/asm/kvm.h b/tools/arch/powerpc/include/uapi/asm/kvm.h index fcb947f65667..23a0af739c78 100644 --- a/tools/arch/powerpc/include/uapi/asm/kvm.h +++ b/tools/arch/powerpc/include/uapi/asm/kvm.h @@ -646,6 +646,7 @@ struct kvm_ppc_cpu_char { #define KVM_REG_PPC_DAWR1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc4) #define KVM_REG_PPC_DAWRX1 (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc5) #define KVM_REG_PPC_DEXCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc6) +#define KVM_REG_PPC_HASHKEYR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xc7) /* Transactional Memory checkpointed state: * This is all GPRs, all VSX regs and a subset of SPRs