From patchwork Tue Jun 4 13:20:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Noralf_Tr=C3=B8nnes_via_B4_Relay?= X-Patchwork-Id: 13685288 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6C93C27C50 for ; Tue, 4 Jun 2024 13:20:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 724F410E47E; Tue, 4 Jun 2024 13:20:43 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="lF3zsjgy"; dkim-atps=neutral Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by gabe.freedesktop.org (Postfix) with ESMTPS id A482210E47D for ; Tue, 4 Jun 2024 13:20:40 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id AFFC66126E; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 5B1C4C4AF07; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717507239; bh=gNH7o0uB5n2M8ruKL+VTu1X79iL62sffpOhlGco74wk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=lF3zsjgyNq3gSnvep4BOrsvmrD6Ciil09eOiGWQSIbnNsZmWUHAsVif78Rsc0wAbH PS4b6hx5VzaetAbTonVxZDn3D5B5S8Vk7cQv8a3E5Xk8D5JT0ZcykMqD6blWj9dIcg WsMctZ79nY6nySZ6FA7htiLxiTkD8cG4h67ELgUb1aiEzpru20PLlazOY3UzXBYZsh 1m2K5rN/HoCVUpYzLWDreh80eNMBWa3l1+KCoHRybqRw0tdlHDzW/fGaxo5oGpIPJn CTJ7b3AVzyj/xDu7jLP+ZZ0PpFyW3kfD9imt9fK9D+ddY5SGKyOaet6mdL8m8ryifV nI/0/wtRT9deA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 457CCC27C54; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) From: =?utf-8?q?Noralf_Tr=C3=B8nnes_via_B4_Relay?= Date: Tue, 04 Jun 2024 15:20:28 +0200 Subject: [PATCH v4 1/5] dt-bindings: display: panel: mipi-dbi-spi: Add a pixel format property MIME-Version: 1.0 Message-Id: <20240604-panel-mipi-dbi-rgb666-v4-1-d7c2bcb9b78d@tronnes.org> References: <20240604-panel-mipi-dbi-rgb666-v4-0-d7c2bcb9b78d@tronnes.org> In-Reply-To: <20240604-panel-mipi-dbi-rgb666-v4-0-d7c2bcb9b78d@tronnes.org> To: Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kamlesh Gurudasani , Tommaso Merciai , =?utf-8?q?Noralf_T?= =?utf-8?q?r=C3=B8nnes?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717507238; l=4065; i=noralf@tronnes.org; s=20221122; h=from:subject:message-id; bh=rqNvjdSCUsjKcYeeCETT/jnXy2Sa85ePgrIqrhCdz9A=; b=8RyH+Vlx1RLU0NK/IPBgiuqHK1odUfyyTolCr7c8Q6wh3GsmXnXNhF0ZToE7LVM4QTnByCbnp B0dODZ0CpEkCWVRRZ8Z7dV6fH+d4ogYdbZx6aSaXW9MWVtL5dRRaepv X-Developer-Key: i=noralf@tronnes.org; a=ed25519; pk=0o9is4iddvvlrY3yON5SVtAbgPnVs0LfQsjfqR2Hvz8= X-Endpoint-Received: by B4 Relay for noralf@tronnes.org/20221122 with auth_id=8 X-Original-From: =?utf-8?q?Noralf_Tr=C3=B8nnes?= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: noralf@tronnes.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Noralf Trønnes The MIPI DBI 2.0 specification (2005) lists only two pixel formats for the Type C Interface (SPI) and that is 3-bits/pixel RGB111 with 2 options for bit layout. For Type A and B (parallel) the following formats are listed: RGB332, RGB444, RGB565, RGB666 and RGB888 (some have 2 options for the bit layout). Many MIPI DBI compatible controllers support all interface types on the same chip and often the manufacturers have chosen to provide support for the Type A/B interface pixel formats also on the Type C interface. Some chips provide many pixel formats with optional bit layouts over SPI, but the most common by far are RGB565 and RGB666. So even if the specification doesn't list these formats for the Type C interface, the industry has chosen to include them. The MIPI DCS specification lists the standard commands that can be sent over the MIPI DBI interface. The set_address_mode (36h) command has one bit in the parameter that controls RGB/BGR order: This bit controls the RGB data latching order transferred from the peripheral’s frame memory to the display device. This means that each supported RGB format also has a BGR variant. Based on this rationale document the following pixel formats describing the bit layout going over the wire: - RGB111 (option 1): x2r1g1b1r1g1b1 (2 pixels per byte) - BGR111 (option 1): x2b1g1r1b1g1r1 (2 pixels per byte) - RGB111 (option 2): x1r1g1b1x1r1g1b1 (2 pixels per byte) - BGR111 (option 2): x1b1g1r1x1b1g1r1 (2 pixels per byte) - RGB565: r5g6b5 (2 bytes) - BGR565: b5g6r5 (2 bytes) - RGB666: r6x2g6x2b6x2 (3 bytes) - BGR666: b6x2g6x2r6x2 (3 bytes) (x: don't care) v2: - Use 'default: r5g6b5' (Rob) Reviewed-by: Rob Herring (Arm) Signed-off-by: Noralf Trønnes --- .../bindings/display/panel/panel-mipi-dbi-spi.yaml | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml index e808215cb39e..8994549b4bff 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml @@ -50,6 +50,12 @@ description: | | Command or data | || + The standard defines one pixel format for type C: RGB111. The industry + however has decided to provide the type A/B interface pixel formats also on + the Type C interface and most common among these are RGB565 and RGB666. + The MIPI DCS command set_address_mode (36h) has one bit that controls RGB/BGR + order. This gives each supported RGB format a BGR variant. + The panel resolution is specified using the panel-timing node properties hactive (width) and vactive (height). The other mandatory panel-timing properties should be set to zero except clock-frequency which can be @@ -90,6 +96,28 @@ properties: spi-3wire: true + format: + description: > + Pixel format in bit order as going on the wire: + * `x2r1g1b1r1g1b1` - RGB111, 2 pixels per byte + * `x2b1g1r1b1g1r1` - BGR111, 2 pixels per byte + * `x1r1g1b1x1r1g1b1` - RGB111, 2 pixels per byte + * `x1b1g1r1x1b1g1r1` - BGR111, 2 pixels per byte + * `r5g6b5` - RGB565, 2 bytes + * `b5g6r5` - BGR565, 2 bytes + * `r6x2g6x2b6x2` - RGB666, 3 bytes + * `b6x2g6x2r6x2` - BGR666, 3 bytes + enum: + - x2r1g1b1r1g1b1 + - x2b1g1r1b1g1r1 + - x1r1g1b1x1r1g1b1 + - x1b1g1r1x1b1g1r1 + - r5g6b5 + - b5g6r5 + - r6x2g6x2b6x2 + - b6x2g6x2r6x2 + default: r5g6b5 + required: - compatible - reg @@ -116,6 +144,8 @@ examples: reset-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>; write-only; + format = "r5g6b5"; + backlight = <&backlight>; width-mm = <35>; From patchwork Tue Jun 4 13:20:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Noralf_Tr=C3=B8nnes_via_B4_Relay?= X-Patchwork-Id: 13685290 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 154C0C27C54 for ; Tue, 4 Jun 2024 13:20:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 88F4810E47F; Tue, 4 Jun 2024 13:20:45 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="GXqdQSuu"; dkim-atps=neutral Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by gabe.freedesktop.org (Postfix) with ESMTPS id AEC1E10E47E for ; Tue, 4 Jun 2024 13:20:40 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 0727761275; Tue, 4 Jun 2024 13:20:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 6DC88C2BBFC; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717507239; bh=N3w6VXVS+EVH7xZ8rObQF9eEO7/6WFtvK9O9QSTgDNU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=GXqdQSuu+JOyaTTF9WS1veULjleQlvb8Lw65PZynfgC66NwAH1IO1vuERES9Z2oJV nAZ7+mzc2FvFVHHXZKkE1A3gxXKTTBwpQPlobfpwEqM7hcSoDkSZLKQiuFYYUg0AWi nVJO4jE3KxQDLig/Gn6Y4rOs2bqbpnUvZ4D6XEUzBVDhuAFWylj6DstCnmFDODIMWE UTzUrOmmmwNpxbBA/evpmI8h3xxgnpwmQm0wMQRlMATprYINTY+K8EKQWldgV9cwz0 0mq5tca8Z9PP3LZ4/Nc/+fxjCG7qZHFOAuOmXAV+k11lYoHBuA/W6LlKuAOaCpx/OB WXMUKuBYjTa6w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5781CC25B78; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) From: =?utf-8?q?Noralf_Tr=C3=B8nnes_via_B4_Relay?= Date: Tue, 04 Jun 2024 15:20:29 +0200 Subject: [PATCH v4 2/5] drm/mipi-dbi: Remove mipi_dbi_machine_little_endian() MIME-Version: 1.0 Message-Id: <20240604-panel-mipi-dbi-rgb666-v4-2-d7c2bcb9b78d@tronnes.org> References: <20240604-panel-mipi-dbi-rgb666-v4-0-d7c2bcb9b78d@tronnes.org> In-Reply-To: <20240604-panel-mipi-dbi-rgb666-v4-0-d7c2bcb9b78d@tronnes.org> To: Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kamlesh Gurudasani , Tommaso Merciai , =?utf-8?q?Noralf_T?= =?utf-8?q?r=C3=B8nnes?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717507238; l=4066; i=noralf@tronnes.org; s=20221122; h=from:subject:message-id; bh=4acPc99PSUglSQ3liBG5HOqnFUMSYy99oBGEC9q+oxw=; b=Nn18Kqvi/QU6LQDCqfVZITLBB7traPlOIVAjC/4usZuiYlDssZaiOk/FUkYW+UfEm1PvvZCdg zSFpYwCDluOB6ckP5P9hKEclXCFo5IX+kLltAW+cQ49kOD+U3tNlJt8 X-Developer-Key: i=noralf@tronnes.org; a=ed25519; pk=0o9is4iddvvlrY3yON5SVtAbgPnVs0LfQsjfqR2Hvz8= X-Endpoint-Received: by B4 Relay for noralf@tronnes.org/20221122 with auth_id=8 X-Original-From: =?utf-8?q?Noralf_Tr=C3=B8nnes?= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: noralf@tronnes.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Noralf Trønnes mipi_dbi_machine_little_endian() should really have been called mipi_dbi_framebuffer_little_endian() because that's the function it performs. When I added support for these SPI displays I thought that the framebuffers on big endian machines were also big endian, but I have later learned that this is not the case. There's a bit in the fourcc code that controls this: DRM_FORMAT_BIG_ENDIAN. Just remove the function to avoid confusion. We can add big endian support later should the need arise and we have hardware to test on. Instead of just amending the docs, expand it to explain the endianness handling. Reviewed-by: Dmitry Baryshkov Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/drm_mipi_dbi.c | 35 +++++++++++++++++++---------------- 1 file changed, 19 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c index daac649aabdb..fa8aba6dc81c 100644 --- a/drivers/gpu/drm/drm_mipi_dbi.c +++ b/drivers/gpu/drm/drm_mipi_dbi.c @@ -824,15 +824,6 @@ u32 mipi_dbi_spi_cmd_max_speed(struct spi_device *spi, size_t len) } EXPORT_SYMBOL(mipi_dbi_spi_cmd_max_speed); -static bool mipi_dbi_machine_little_endian(void) -{ -#if defined(__LITTLE_ENDIAN) - return true; -#else - return false; -#endif -} - /* * MIPI DBI Type C Option 1 * @@ -855,7 +846,7 @@ static int mipi_dbi_spi1e_transfer(struct mipi_dbi *dbi, int dc, const void *buf, size_t len, unsigned int bpw) { - bool swap_bytes = (bpw == 16 && mipi_dbi_machine_little_endian()); + bool swap_bytes = (bpw == 16); size_t chunk, max_chunk = dbi->tx_buf9_len; struct spi_device *spi = dbi->spi; struct spi_transfer tr = { @@ -1004,7 +995,7 @@ static int mipi_dbi_spi1_transfer(struct mipi_dbi *dbi, int dc, size_t chunk = min(len, max_chunk); unsigned int i; - if (bpw == 16 && mipi_dbi_machine_little_endian()) { + if (bpw == 16) { for (i = 0; i < (chunk * 2); i += 2) { dst16[i] = *src16 >> 8; dst16[i + 1] = *src16++ & 0xFF; @@ -1218,11 +1209,23 @@ static int mipi_dbi_typec3_command(struct mipi_dbi *dbi, u8 *cmd, * If @dc is set, a Type C Option 3 interface is assumed, if not * Type C Option 1. * - * If the SPI master driver doesn't support the necessary bits per word, - * the following transformation is used: + * If the command is %MIPI_DCS_WRITE_MEMORY_START and the pixel format is RGB565, endianness has + * to be taken into account. The MIPI DBI serial interface is big endian and framebuffers are + * assumed stored in memory as little endian (%DRM_FORMAT_BIG_ENDIAN is not supported). * - * - 9-bit: reorder buffer as 9x 8-bit words, padded with no-op command. - * - 16-bit: if big endian send as 8-bit, if little endian swap bytes + * This is how endianness is handled: + * + * Option 1 (D/C as a bit): The buffer is sent on the wire byte by byte so the 16-bit buffer is + * byteswapped before transfer. + * + * Option 3 (D/C as a gpio): If the SPI controller supports 16 bits per word the buffer can be + * sent as-is. If not the caller is responsible for swapping the bytes + * before calling mipi_dbi_command_buf() and the buffer is sent 8 bpw. + * + * This handling is optimised for %DRM_FORMAT_RGB565 framebuffers. + * + * If the interface is Option 1 and the SPI controller doesn't support 9 bits per word, + * the buffer is sent as 9x 8-bit words, padded with MIPI DCS no-op commands if necessary. * * Returns: * Zero on success, negative error code on failure. @@ -1257,7 +1260,7 @@ int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi, if (dc) { dbi->command = mipi_dbi_typec3_command; dbi->dc = dc; - if (mipi_dbi_machine_little_endian() && !spi_is_bpw_supported(spi, 16)) + if (!spi_is_bpw_supported(spi, 16)) dbi->swap_bytes = true; } else { dbi->command = mipi_dbi_typec1_command; From patchwork Tue Jun 4 13:20:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Noralf_Tr=C3=B8nnes_via_B4_Relay?= X-Patchwork-Id: 13685291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6544C41513 for ; Tue, 4 Jun 2024 13:20:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CD1AD10E482; Tue, 4 Jun 2024 13:20:45 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="Dl/BmPMI"; dkim-atps=neutral Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by gabe.freedesktop.org (Postfix) with ESMTPS id DF8BA10E47F for ; Tue, 4 Jun 2024 13:20:40 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 38D786129B; Tue, 4 Jun 2024 13:20:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 7AACDC4AF08; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717507239; bh=MOWZAwgoq9deQWVd/HKA2U6UFAXJnTWhKChG7nX2LNs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Dl/BmPMIUQxsH17b3Fsp/u59iHP/n1454A/Z7j8xe6dxIHusodNS70vZoYbYwUSkC IqtgTDWYcdcb3nqa8ETSlrGqL2hMvz9bZDPwLtuWQtUkW5uAd597f0WGbBdunJ2Lb1 ycoSoUbORL3dY9YnstuSHOVEIjjtWyJUmdawbfD+UgMl9uN8DpElvEDO4w6d5TLtRn tXv6jy6wvNd/B28PRrjx5VsclYorhPqLKR/WsFvBn5rz9ZpiIUmtuyA4a9rAUnQQNF 6fdMpTFGlwF2yngiYlvbeH8DvuciZ7v0Aev3tTL3Y9mGT1Sg4KrjChTT03RakABTZi DqYaIC7He/KQA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 690DBC27C5E; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) From: =?utf-8?q?Noralf_Tr=C3=B8nnes_via_B4_Relay?= Date: Tue, 04 Jun 2024 15:20:30 +0200 Subject: [PATCH v4 3/5] drm/mipi-dbi: Make bits per word configurable for pixel transfers MIME-Version: 1.0 Message-Id: <20240604-panel-mipi-dbi-rgb666-v4-3-d7c2bcb9b78d@tronnes.org> References: <20240604-panel-mipi-dbi-rgb666-v4-0-d7c2bcb9b78d@tronnes.org> In-Reply-To: <20240604-panel-mipi-dbi-rgb666-v4-0-d7c2bcb9b78d@tronnes.org> To: Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kamlesh Gurudasani , Tommaso Merciai , =?utf-8?q?Noralf_T?= =?utf-8?q?r=C3=B8nnes?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717507238; l=3211; i=noralf@tronnes.org; s=20221122; h=from:subject:message-id; bh=rVzHuDjtn7Xw6fi36k+F3W4cyneNuZNHvALA/j7EnHQ=; b=5nLeRwMyrPxLtwlCGeWGNzmg1KQ7Y/QYi8B+PZGKSkc3S8X28UXh2jCdm0E2Ie+Tk9XQtDmHL 4bjsy1k9XQtAmh7aGbcncI/9pvSw4VKyUtf7o2Ru4TJ3HngqRqMKwHH X-Developer-Key: i=noralf@tronnes.org; a=ed25519; pk=0o9is4iddvvlrY3yON5SVtAbgPnVs0LfQsjfqR2Hvz8= X-Endpoint-Received: by B4 Relay for noralf@tronnes.org/20221122 with auth_id=8 X-Original-From: =?utf-8?q?Noralf_Tr=C3=B8nnes?= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: noralf@tronnes.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Noralf Trønnes MIPI DCS write/set commands have 8 bit parameters except for the write_memory commands where it depends on the pixel format. drm_mipi_dbi does currently only support RGB565 which is 16-bit and it has to make sure that the pixels enters the SPI bus in big endian format since the MIPI DBI spec doesn't have support for little endian. drm_mipi_dbi is optimized for DBI interface option 3 which means that the 16-bit bytes are swapped by the upper layer if the SPI bus does not support 16 bits per word, signified by the swap_bytes member. In order to support both 16-bit and 24-bit pixel transfers we need a way to tell the DBI command layer the format of the buffer. Add a write_memory_bpw member that the upper layer can use to tell how many bits per word to use for the SPI transfer. v4: - Expand the commit message (Dmitry) Signed-off-by: Noralf Trønnes Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/drm_mipi_dbi.c | 14 ++++++++++---- include/drm/drm_mipi_dbi.h | 5 +++++ 2 files changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c index fa8aba6dc81c..77f8a828d6e0 100644 --- a/drivers/gpu/drm/drm_mipi_dbi.c +++ b/drivers/gpu/drm/drm_mipi_dbi.c @@ -1079,7 +1079,7 @@ static int mipi_dbi_typec1_command_read(struct mipi_dbi *dbi, u8 *cmd, static int mipi_dbi_typec1_command(struct mipi_dbi *dbi, u8 *cmd, u8 *parameters, size_t num) { - unsigned int bpw = (*cmd == MIPI_DCS_WRITE_MEMORY_START) ? 16 : 8; + unsigned int bpw = 8; int ret; if (mipi_dbi_command_is_read(dbi, *cmd)) @@ -1091,6 +1091,9 @@ static int mipi_dbi_typec1_command(struct mipi_dbi *dbi, u8 *cmd, if (ret || !num) return ret; + if (*cmd == MIPI_DCS_WRITE_MEMORY_START) + bpw = dbi->write_memory_bpw; + return mipi_dbi_spi1_transfer(dbi, 1, parameters, num, bpw); } @@ -1184,8 +1187,8 @@ static int mipi_dbi_typec3_command(struct mipi_dbi *dbi, u8 *cmd, if (ret || !num) return ret; - if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !dbi->swap_bytes) - bpw = 16; + if (*cmd == MIPI_DCS_WRITE_MEMORY_START) + bpw = dbi->write_memory_bpw; spi_bus_lock(spi->controller); gpiod_set_value_cansleep(dbi->dc, 1); @@ -1256,12 +1259,15 @@ int mipi_dbi_spi_init(struct spi_device *spi, struct mipi_dbi *dbi, dbi->spi = spi; dbi->read_commands = mipi_dbi_dcs_read_commands; + dbi->write_memory_bpw = 16; if (dc) { dbi->command = mipi_dbi_typec3_command; dbi->dc = dc; - if (!spi_is_bpw_supported(spi, 16)) + if (!spi_is_bpw_supported(spi, 16)) { + dbi->write_memory_bpw = 8; dbi->swap_bytes = true; + } } else { dbi->command = mipi_dbi_typec1_command; dbi->tx_buf9_len = SZ_16K; diff --git a/include/drm/drm_mipi_dbi.h b/include/drm/drm_mipi_dbi.h index e8e0f8d39f3a..b36596efdcc3 100644 --- a/include/drm/drm_mipi_dbi.h +++ b/include/drm/drm_mipi_dbi.h @@ -56,6 +56,11 @@ struct mipi_dbi { */ struct spi_device *spi; + /** + * @write_memory_bpw: Bits per word used on a MIPI_DCS_WRITE_MEMORY_START transfer + */ + unsigned int write_memory_bpw; + /** * @dc: Optional D/C gpio. */ From patchwork Tue Jun 4 13:20:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Noralf_Tr=C3=B8nnes_via_B4_Relay?= X-Patchwork-Id: 13685289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D1D1C25B78 for ; Tue, 4 Jun 2024 13:20:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A287910E481; Tue, 4 Jun 2024 13:20:44 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="uVwz2L8P"; dkim-atps=neutral Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by gabe.freedesktop.org (Postfix) with ESMTPS id F04DA10E481 for ; Tue, 4 Jun 2024 13:20:40 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 51E3A61255; Tue, 4 Jun 2024 13:20:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 80570C4AF10; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717507239; bh=8YntGuIrO4BZZ0ZxPUzDTcK33MQ+uAf5uTa92b0BriM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=uVwz2L8PAAFNRD66YajtALxH2YS6DgRiCGIlHvcUyVSGSU+djK3R39o4UBqp3lMZM GGlqHy7OxX9+3m5jzhRjlaCa0ifAwufd/FDkcp0PM9sYqL7rvjWjBUuuWT8+TvOQ5+ v3GpD1QpthmPVlavGRKjj49aWoRMzOm+77wja/W0/s8ZQvDLFC/0iyckNnmsXHW2ha IRPHjTFSeeXpJy7ETubAr08Newfjd6gaZHRZHFBgjHgnB12boSsU0vHfVyyS/+Y1tH x5QTrHzOLFS3xq8fF8218FbzrrG7QJ5Lcv1myB/5Wwz7mqPG0qDtEkRDFmJECvI0+E lxELxnPYWJ1NA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76C08C27C55; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) From: =?utf-8?q?Noralf_Tr=C3=B8nnes_via_B4_Relay?= Date: Tue, 04 Jun 2024 15:20:31 +0200 Subject: [PATCH v4 4/5] drm/mipi-dbi: Add support for DRM_FORMAT_RGB888 MIME-Version: 1.0 Message-Id: <20240604-panel-mipi-dbi-rgb666-v4-4-d7c2bcb9b78d@tronnes.org> References: <20240604-panel-mipi-dbi-rgb666-v4-0-d7c2bcb9b78d@tronnes.org> In-Reply-To: <20240604-panel-mipi-dbi-rgb666-v4-0-d7c2bcb9b78d@tronnes.org> To: Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kamlesh Gurudasani , Tommaso Merciai , =?utf-8?q?Noralf_T?= =?utf-8?q?r=C3=B8nnes?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717507238; l=5029; i=noralf@tronnes.org; s=20221122; h=from:subject:message-id; bh=9oZ/CTA5q4N/L6mVFGvQ1ZFxA3+wT85GeDr61IpDHdc=; b=xNPf0SbhGVTKNX198jZcKZ8gVKMHL9msGR0tSDwyPoZbCchdoCxtcPOELMj4s2Plu3j9DNT1A SI8r8v8PzymCFA+8N4hw3hClRgtDKZRVMbu7ti4yqmdMGkTYU2lADuc X-Developer-Key: i=noralf@tronnes.org; a=ed25519; pk=0o9is4iddvvlrY3yON5SVtAbgPnVs0LfQsjfqR2Hvz8= X-Endpoint-Received: by B4 Relay for noralf@tronnes.org/20221122 with auth_id=8 X-Original-From: =?utf-8?q?Noralf_Tr=C3=B8nnes?= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: noralf@tronnes.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Noralf Trønnes DRM_FORMAT_RGB888 is 24 bits per pixel and it would be natural to send it on the SPI bus using a 24 bits per word transfer. The problem with this is that not all SPI controllers support 24 bpw. Since DRM_FORMAT_RGB888 is stored in memory as little endian and the SPI bus is big endian we use 8 bpw to always get the same pixel format on the bus: b8g8r8. The MIPI DCS specification lists the standard commands that can be sent over the MIPI DBI interface. The set_address_mode (36h) command has one bit in the parameter that controls RGB/BGR order. This means that the controller can be configured to receive the pixel as BGR. RGB888 is rarely supported on these controllers but RGB666 is very common. All datasheets I have seen do at least support the pixel format option where each color is sent as one byte and the 6 MSB's are used. All this put together means that we can send each pixel as b8g8r8 and an RGB666 capable controller sees this as b6x2g6x2r6x2. v4: - s/emulation_format/pixel_format/ (Dmitry) Signed-off-by: Noralf Trønnes Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/drm_mipi_dbi.c | 29 +++++++++++++++++++++++++---- include/drm/drm_mipi_dbi.h | 5 +++++ 2 files changed, 30 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c index 77f8a828d6e0..1661190c29a2 100644 --- a/drivers/gpu/drm/drm_mipi_dbi.c +++ b/drivers/gpu/drm/drm_mipi_dbi.c @@ -206,6 +206,7 @@ int mipi_dbi_buf_copy(void *dst, struct iosys_map *src, struct drm_framebuffer * struct drm_rect *clip, bool swap, struct drm_format_conv_state *fmtcnv_state) { + struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev); struct drm_gem_object *gem = drm_gem_fb_get_obj(fb, 0); struct iosys_map dst_map = IOSYS_MAP_INIT_VADDR(dst); int ret; @@ -222,8 +223,18 @@ int mipi_dbi_buf_copy(void *dst, struct iosys_map *src, struct drm_framebuffer * else drm_fb_memcpy(&dst_map, NULL, src, fb, clip); break; + case DRM_FORMAT_RGB888: + drm_fb_memcpy(&dst_map, NULL, src, fb, clip); + break; case DRM_FORMAT_XRGB8888: - drm_fb_xrgb8888_to_rgb565(&dst_map, NULL, src, fb, clip, fmtcnv_state, swap); + switch (dbidev->pixel_format) { + case DRM_FORMAT_RGB565: + drm_fb_xrgb8888_to_rgb565(&dst_map, NULL, src, fb, clip, fmtcnv_state, swap); + break; + case DRM_FORMAT_RGB888: + drm_fb_xrgb8888_to_rgb888(&dst_map, NULL, src, fb, clip, fmtcnv_state); + break; + } break; default: drm_err_once(fb->dev, "Format is not supported: %p4cc\n", @@ -260,9 +271,11 @@ static void mipi_dbi_fb_dirty(struct iosys_map *src, struct drm_framebuffer *fb, struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev); unsigned int height = rect->y2 - rect->y1; unsigned int width = rect->x2 - rect->x1; + const struct drm_format_info *dst_format; struct mipi_dbi *dbi = &dbidev->dbi; bool swap = dbi->swap_bytes; int ret = 0; + size_t len; bool full; void *tr; @@ -283,8 +296,13 @@ static void mipi_dbi_fb_dirty(struct iosys_map *src, struct drm_framebuffer *fb, mipi_dbi_set_window_address(dbidev, rect->x1, rect->x2 - 1, rect->y1, rect->y2 - 1); - ret = mipi_dbi_command_buf(dbi, MIPI_DCS_WRITE_MEMORY_START, tr, - width * height * 2); + if (fb->format->format == DRM_FORMAT_XRGB8888) + dst_format = drm_format_info(dbidev->pixel_format); + else + dst_format = fb->format; + len = drm_format_info_min_pitch(dst_format, 0, width) * height; + + ret = mipi_dbi_command_buf(dbi, MIPI_DCS_WRITE_MEMORY_START, tr, len); err_msg: if (ret) drm_err_once(fb->dev, "Failed to update display %d\n", ret); @@ -572,7 +590,7 @@ static const uint32_t mipi_dbi_formats[] = { * has one fixed &drm_display_mode which is rotated according to @rotation. * This mode is used to set the mode config min/max width/height properties. * - * Use mipi_dbi_dev_init() if you don't need custom formats. + * Use mipi_dbi_dev_init() if you want native RGB565 and emulated XRGB8888 format. * * Note: * Some of the helper functions expects RGB565 to be the default format and the @@ -631,6 +649,9 @@ int mipi_dbi_dev_init_with_formats(struct mipi_dbi_dev *dbidev, drm->mode_config.min_height = dbidev->mode.vdisplay; drm->mode_config.max_height = dbidev->mode.vdisplay; dbidev->rotation = rotation; + dbidev->pixel_format = formats[0]; + if (formats[0] == DRM_FORMAT_RGB888) + dbidev->dbi.write_memory_bpw = 8; DRM_DEBUG_KMS("rotation = %u\n", rotation); diff --git a/include/drm/drm_mipi_dbi.h b/include/drm/drm_mipi_dbi.h index b36596efdcc3..f45f9612c0bc 100644 --- a/include/drm/drm_mipi_dbi.h +++ b/include/drm/drm_mipi_dbi.h @@ -101,6 +101,11 @@ struct mipi_dbi_dev { */ struct drm_display_mode mode; + /** + * @pixel_format: Native pixel format (DRM_FORMAT\_\*) + */ + u32 pixel_format; + /** * @tx_buf: Buffer used for transfer (copy clip rect area) */ From patchwork Tue Jun 4 13:20:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Noralf_Tr=C3=B8nnes_via_B4_Relay?= X-Patchwork-Id: 13685287 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ED1E8C25B78 for ; Tue, 4 Jun 2024 13:20:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0A92E10E47D; Tue, 4 Jun 2024 13:20:43 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="b3/2MSNl"; dkim-atps=neutral Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1512410E482 for ; Tue, 4 Jun 2024 13:20:41 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 64D11612CE; Tue, 4 Jun 2024 13:20:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 94F3EC4AF14; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717507239; bh=DC5EZsEx+rBT/MPOOSxJY0nl4J0fot6cQcgzpc29Qek=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=b3/2MSNllqyZt/ndR9uLIfWcxQ8T0TOWCiiRcdfxwn5B8TRzecc3bGGUcrOHw1Q1P gQg9WfEQqHxJ5leWGZ52rFz3OVyOwe3095J7ohU0QqJZs6Ec08wiHctp1KnAH/3OCa EA0Z9Nhy5DaeDq5cMV3qNTNDa/nHs177Augg+MMbvpM/tac/rY54O2S1qePc+tPx7V UE7zdbelk1KpcFgVbQiRzVIdVlqXAFJiozPP72eHbn/wxjoWENwPmcBFc4C7MVJBWa OmVUv2JsodaRlVg0lCus039+SCBYmWV95TVSiCDm1JyuY7kXZo2RMa3S0DJHMqNNUn cRNTezlxMchcg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C89EC25B78; Tue, 4 Jun 2024 13:20:39 +0000 (UTC) From: =?utf-8?q?Noralf_Tr=C3=B8nnes_via_B4_Relay?= Date: Tue, 04 Jun 2024 15:20:32 +0200 Subject: [PATCH v4 5/5] drm/tiny: panel-mipi-dbi: Support the pixel format property MIME-Version: 1.0 Message-Id: <20240604-panel-mipi-dbi-rgb666-v4-5-d7c2bcb9b78d@tronnes.org> References: <20240604-panel-mipi-dbi-rgb666-v4-0-d7c2bcb9b78d@tronnes.org> In-Reply-To: <20240604-panel-mipi-dbi-rgb666-v4-0-d7c2bcb9b78d@tronnes.org> To: Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , Dmitry Baryshkov Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kamlesh Gurudasani , Tommaso Merciai , =?utf-8?q?Noralf_T?= =?utf-8?q?r=C3=B8nnes?= X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717507238; l=2983; i=noralf@tronnes.org; s=20221122; h=from:subject:message-id; bh=NSd8WCcz3mEyAmd3gnS4mEuzeD9kKvKEnfrPdQSMiME=; b=QvW48LB0GjDH9HPC/0Wul41Y4uUWFArhOzcr2VcGbC9AKxHRLwJohaihMp/Uj0HpB3kw71GIh b+h1Tzn7380CdwyT3RcIDhiVoGjvR+At1vUxRDodcKEtokdw7R/1GiT X-Developer-Key: i=noralf@tronnes.org; a=ed25519; pk=0o9is4iddvvlrY3yON5SVtAbgPnVs0LfQsjfqR2Hvz8= X-Endpoint-Received: by B4 Relay for noralf@tronnes.org/20221122 with auth_id=8 X-Original-From: =?utf-8?q?Noralf_Tr=C3=B8nnes?= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: noralf@tronnes.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Noralf Trønnes Add support for these pixel format property values: - r5g6b5, RGB565 - b6x2g6x2r6x2, BGR666 BGR666 is presented to userspace as RGB888. The 2 LSB in each color are discarded by the controller. The pixel is sent on the wire using 8 bits per word (little endian) so the controller sees it as BGR. RGB565 is the default if the property is not present. Reviewed-by: Neil Armstrong Signed-off-by: Noralf Trønnes --- drivers/gpu/drm/tiny/panel-mipi-dbi.c | 55 ++++++++++++++++++++++++++++++++++- 1 file changed, 54 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/tiny/panel-mipi-dbi.c b/drivers/gpu/drm/tiny/panel-mipi-dbi.c index f80a141fcf36..f3aa2abce314 100644 --- a/drivers/gpu/drm/tiny/panel-mipi-dbi.c +++ b/drivers/gpu/drm/tiny/panel-mipi-dbi.c @@ -26,6 +26,49 @@ #include