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([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b2ff9dsm9091509b3a.212.2024.06.05.14.57.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:57:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Ilya Leoshkevich Subject: [PATCH v2 01/10] target/s390x: Change help_goto_direct to work on displacements Date: Wed, 5 Jun 2024 14:57:30 -0700 Message-Id: <20240605215739.4758-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605215739.4758-1-richard.henderson@linaro.org> References: <20240605215739.4758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org In preparation for CF_PCREL, reduce reliance on absolute values. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index c81e035dea..f25ae02a4e 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -1073,13 +1073,15 @@ struct DisasInsn { /* ====================================================================== */ /* Miscellaneous helpers, used by several operations. */ -static DisasJumpType help_goto_direct(DisasContext *s, uint64_t dest) +static DisasJumpType help_goto_direct(DisasContext *s, int64_t disp) { + uint64_t dest = s->base.pc_next + disp; + update_cc_op(s); per_breaking_event(s); per_branch(s, tcg_constant_i64(dest)); - if (dest == s->pc_tmp) { + if (disp == s->ilen) { return DISAS_NEXT; } if (use_goto_tb(s, dest)) { @@ -1105,7 +1107,8 @@ static DisasJumpType help_goto_indirect(DisasContext *s, TCGv_i64 dest) static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, bool is_imm, int imm, TCGv_i64 cdest) { - uint64_t dest = s->base.pc_next + (int64_t)imm * 2; + int64_t disp = (int64_t)imm * 2; + uint64_t dest = s->base.pc_next + disp; TCGLabel *lab; /* Take care of the special cases first. */ @@ -1120,7 +1123,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, if (c->cond == TCG_COND_ALWAYS || (dest == s->pc_tmp && !(s->base.tb->flags & FLAG_MASK_PER_BRANCH))) { - return help_goto_direct(s, dest); + return help_goto_direct(s, disp); } } else { if (!cdest) { From patchwork Wed Jun 5 21:57:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13687580 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B7B82C27C55 for ; Wed, 5 Jun 2024 21:59:10 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sEydf-0001hk-HH; Wed, 05 Jun 2024 17:57:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sEyde-0001hD-9N for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:46 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sEydc-0003pf-G9 for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:46 -0400 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-703ed15b273so255033b3a.1 for ; Wed, 05 Jun 2024 14:57:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717624663; x=1718229463; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JhUXFhxALhRCHAx9BQm8y0zAn9EGdu513/wa3HnMCCc=; b=aogdC3sK0z3VUyKVvtNXPyh/i1kjhqfJwoTzvxslEFdMv3AgfWAqa+BP9l6BaZY39o 3lltglJjNGMRBQTF/F/gP1Ikwij15/qJyqZcnX2iB8muOh6a2lsVnY4shaM/TtbQ0h2Y qJ03af3ZNPonQuo6dk75UjjfolCYRMwS+H24mH9yIW6oRO22nJom3Nm7JfHCTZvFCdmw xL0W4b1t6q0h63v/SSnp5hFW7/HTXTEwbFxxTriHQhrTVczfxc4GkW+RJoJU2QuSBlUl //p4MapXI9x4oC3Zbw7fzQ+4T0YCTC/PWAKvnFKJ7P3uptDeodDr4lUlYGL/kG3jg7O6 r7zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717624663; x=1718229463; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JhUXFhxALhRCHAx9BQm8y0zAn9EGdu513/wa3HnMCCc=; b=tPysFby38D1j6s/VtArN/PvOq6b7qMHhUz0y3ikMSShLXuUIj43sVRBB1YyOAON5C0 sJ5Q4fH2+6LreNjzB1c+bQcRmbTYPQ9GON0f4c21HOqFqbkQXKkNcZUrEZcib6cJF+AL pC+m1B4kl64tGeEh4sDaz3/rwBSZtuuRE32fApWthnCy/iLufsNxg56S/URAFYw4XMLA DnT0Z3/77On4TabUkhKIdW934ZuZ1YTjeNE21ReEj/g0HpttZoFXfvPYXfbiQJIjQMZF A2KIPSXzr/Hirc5dOjqkz4xqUyVNJuBdcoWx+IlhMGnlpuljiX8lN8PG7a0p/bKRe8lP D3Bw== X-Gm-Message-State: AOJu0YzfS4gLWNhyVrLaHj+jEKR2a2BaifkGmwI5olWl/91WMAyv3RFZ ny0D64ifKmxgfQs8t6nbjol/c/JGswMU4sJuXWjKp5JvHGDR7trI11G3RBjhqbvjDxQ4f1btgqn s X-Google-Smtp-Source: AGHT+IFdAdxzm74sB0nyzk4nfPBBtDCFhydAJekbgEXn+lJeEFejh3iSsWvYiIpo+zAPZDjziWMXAA== X-Received: by 2002:a05:6a20:d80d:b0:1af:881c:e924 with SMTP id adf61e73a8af0-1b2b763736fmr4494091637.62.1717624662965; Wed, 05 Jun 2024 14:57:42 -0700 (PDT) Received: from stoup.. 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Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index f25ae02a4e..bd4ad33802 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -167,6 +167,11 @@ static uint64_t inline_branch_hit[CC_OP_MAX]; static uint64_t inline_branch_miss[CC_OP_MAX]; #endif +static void gen_psw_addr_disp(DisasContext *s, TCGv_i64 dest, int64_t disp) +{ + tcg_gen_movi_i64(dest, s->base.pc_next + disp); +} + static void pc_to_link_info(TCGv_i64 out, DisasContext *s, uint64_t pc) { if (s->base.tb->flags & FLAG_MASK_32) { @@ -337,8 +342,7 @@ static void store_freg32_i64(int reg, TCGv_i64 v) static void update_psw_addr(DisasContext *s) { - /* psw.addr */ - tcg_gen_movi_i64(psw_addr, s->base.pc_next); + gen_psw_addr_disp(s, psw_addr, 0); } static void per_branch(DisasContext *s, TCGv_i64 dest) @@ -352,7 +356,7 @@ static void per_branch(DisasContext *s, TCGv_i64 dest) static void per_breaking_event(DisasContext *s) { - tcg_gen_movi_i64(gbea, s->base.pc_next); + gen_psw_addr_disp(s, gbea, 0); } static void update_cc_op(DisasContext *s) @@ -1086,11 +1090,11 @@ static DisasJumpType help_goto_direct(DisasContext *s, int64_t disp) } if (use_goto_tb(s, dest)) { tcg_gen_goto_tb(0); - tcg_gen_movi_i64(psw_addr, dest); + gen_psw_addr_disp(s, psw_addr, disp); tcg_gen_exit_tb(s->base.tb, 0); return DISAS_NORETURN; } else { - tcg_gen_movi_i64(psw_addr, dest); + gen_psw_addr_disp(s, psw_addr, disp); return DISAS_PC_CC_UPDATED; } } @@ -1121,7 +1125,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, * still need a conditional call to helper_per_branch. */ if (c->cond == TCG_COND_ALWAYS - || (dest == s->pc_tmp && + || (disp == s->ilen && !(s->base.tb->flags & FLAG_MASK_PER_BRANCH))) { return help_goto_direct(s, disp); } @@ -1154,7 +1158,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, /* Branch taken. */ per_breaking_event(s); if (is_imm) { - tcg_gen_movi_i64(psw_addr, dest); + gen_psw_addr_disp(s, psw_addr, disp); } else { tcg_gen_mov_i64(psw_addr, cdest); } @@ -1170,7 +1174,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, gen_set_label(lab); /* Branch not taken. */ - tcg_gen_movi_i64(psw_addr, s->pc_tmp); + gen_psw_addr_disp(s, psw_addr, s->ilen); if (use_goto_tb(s, s->pc_tmp)) { tcg_gen_goto_tb(1); tcg_gen_exit_tb(s->base.tb, 1); @@ -5758,7 +5762,8 @@ static TCGv gen_ri2(DisasContext *s) disas_jdest(s, i2, is_imm, imm, ri2); if (is_imm) { - ri2 = tcg_constant_i64(s->base.pc_next + (int64_t)imm * 2); + ri2 = tcg_temp_new_i64(); + gen_psw_addr_disp(s, ri2, (int64_t)imm * 2); } return ri2; @@ -6367,7 +6372,7 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) s->base.is_jmp = DISAS_PC_CC_UPDATED; /* fall through */ case DISAS_NEXT: - tcg_gen_movi_i64(psw_addr, s->pc_tmp); + gen_psw_addr_disp(s, psw_addr, s->ilen); break; default: break; From patchwork Wed Jun 5 21:57:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13687579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F9DFC25B76 for ; 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([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b2ff9dsm9091509b3a.212.2024.06.05.14.57.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:57:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Ilya Leoshkevich , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 03/10] target/s390x: Remove pc argument to pc_to_link_into Date: Wed, 5 Jun 2024 14:57:32 -0700 Message-Id: <20240605215739.4758-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605215739.4758-1-richard.henderson@linaro.org> References: <20240605215739.4758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org All callers pass s->pc_tmp. Reviewed-by: Ilya Leoshkevich Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index bd4ad33802..14162769a9 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -172,8 +172,10 @@ static void gen_psw_addr_disp(DisasContext *s, TCGv_i64 dest, int64_t disp) tcg_gen_movi_i64(dest, s->base.pc_next + disp); } -static void pc_to_link_info(TCGv_i64 out, DisasContext *s, uint64_t pc) +static void pc_to_link_info(TCGv_i64 out, DisasContext *s) { + uint64_t pc = s->pc_tmp; + if (s->base.tb->flags & FLAG_MASK_32) { if (s->base.tb->flags & FLAG_MASK_64) { tcg_gen_movi_i64(out, pc); @@ -1404,7 +1406,7 @@ static DisasJumpType op_ni(DisasContext *s, DisasOps *o) static DisasJumpType op_bas(DisasContext *s, DisasOps *o) { - pc_to_link_info(o->out, s, s->pc_tmp); + pc_to_link_info(o->out, s); if (o->in2) { return help_goto_indirect(s, o->in2); } else { @@ -1417,7 +1419,7 @@ static void save_link_info(DisasContext *s, DisasOps *o) TCGv_i64 t; if (s->base.tb->flags & (FLAG_MASK_32 | FLAG_MASK_64)) { - pc_to_link_info(o->out, s, s->pc_tmp); + pc_to_link_info(o->out, s); return; } gen_op_calc_cc(s); @@ -1474,7 +1476,7 @@ static DisasJumpType op_basi(DisasContext *s, DisasOps *o) bool is_imm; int imm; - pc_to_link_info(o->out, s, s->pc_tmp); + pc_to_link_info(o->out, s); disas_jdest(s, i2, is_imm, imm, o->in2); disas_jcc(s, &c, 0xf); From patchwork Wed Jun 5 21:57:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13687581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 19F87C25B76 for ; Wed, 5 Jun 2024 21:59:29 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sEydh-0001jT-1Y; Wed, 05 Jun 2024 17:57:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sEydf-0001iN-Pe for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:47 -0400 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sEyde-0003qA-8W for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:47 -0400 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-70257104b4dso253716b3a.1 for ; Wed, 05 Jun 2024 14:57:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717624665; x=1718229465; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sQiUj0T/PhZH9aPIOQew7TG39LwQbDZ+11m+rsBXajM=; b=oMrCbql95Zslbf7bsPALssQkGmWWNudO74PCupFeVJOMZhupvAXWfYhLX0mgVbTKsS f17w3JTNwypsXjbzOzqy6dZ9Xs7DzIoBUpicK8KGZUaH0z5zfmO86YlecM+XhJYQLpbs 3oDE7h7ze2CAIeGNs8F1SrsAFoQqOGdfm02VQdULHfDD0yZpi4inZUYtic2CoH2qLGa5 EjJTLzHzOcOuNyYpAomSTO1pXFWdYNXFGjH+RNdCjTjUEdAhOII+R6wrB9Qs4gJdo/Hx xEJGFWX/tYu32ma0ih1/3LyZMsPsAx6S58Oh239pJqg4oqa5n4c8DYyCgzIvrtcUDBW5 DClQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717624665; x=1718229465; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sQiUj0T/PhZH9aPIOQew7TG39LwQbDZ+11m+rsBXajM=; b=WYGKNeXgqNo7EPpGqA9qeWA480uOangs0AOTKx9QyGblsQ10L4LUV6XFUvETodiQf5 z+Oht7dluI1Wj+4ir69IJfEGWamg69yGBDpuFCg4q6k2X1sm+pRmdqOx3oOBkh8A6r8V giGRJYv0ktgWmIisLESKec+HQRQkCVxyeZqdN6hk7OJ6hHJaiHFL096C4g1TVJmY+jrt 2NO/DhTgPUaNiZxuoe2egRWWIIMCY6slW0FFImzyWR9lHU/PXIW/GvdEbb77GEdkzZaG gcwnrLzy2oGzIgamDZkvqh5dy00e1UC8UaVHDzQTledzd1u3iNjG1KX40wOhe4LSJNFM znaA== X-Gm-Message-State: AOJu0YxqwHVPlISZtvmQlFZjPrA8JzgY7Pv5fuJ+oBlKY/E0PMlFwnnJ FjtSXsGF32CcmKY7zpBm0AnXh5pdBY93yaEe2TZM4JUGnXL8Q2abcNzQfp8cCCtYauQgAHO5tvH h X-Google-Smtp-Source: AGHT+IHnwQjcgEJ00oZB0L3k0U1PJo/RiYi3wbrNoRsAhkQtkAVzcIVjO9ilftLdz1YXTo+CWZ1+jQ== X-Received: by 2002:a05:6a21:3996:b0:1af:cd4a:1e1d with SMTP id adf61e73a8af0-1b2b70ff62dmr5062678637.40.1717624664972; Wed, 05 Jun 2024 14:57:44 -0700 (PDT) Received: from stoup.. ([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b2ff9dsm9091509b3a.212.2024.06.05.14.57.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:57:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Ilya Leoshkevich Subject: [PATCH v2 04/10] target/s390x: Use gen_psw_addr_disp in pc_to_link_info Date: Wed, 5 Jun 2024 14:57:33 -0700 Message-Id: <20240605215739.4758-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605215739.4758-1-richard.henderson@linaro.org> References: <20240605215739.4758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This is slightly more complicated than a straight displacement for 31 and 24-bit modes. Dont bother with a cant-happen assert. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 14162769a9..2d611da8af 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -174,17 +174,19 @@ static void gen_psw_addr_disp(DisasContext *s, TCGv_i64 dest, int64_t disp) static void pc_to_link_info(TCGv_i64 out, DisasContext *s) { - uint64_t pc = s->pc_tmp; + TCGv_i64 tmp; - if (s->base.tb->flags & FLAG_MASK_32) { - if (s->base.tb->flags & FLAG_MASK_64) { - tcg_gen_movi_i64(out, pc); - return; - } - pc |= 0x80000000; + if (s->base.tb->flags & FLAG_MASK_64) { + gen_psw_addr_disp(s, out, s->ilen); + return; } - assert(!(s->base.tb->flags & FLAG_MASK_64)); - tcg_gen_deposit_i64(out, out, tcg_constant_i64(pc), 0, 32); + + tmp = tcg_temp_new_i64(); + gen_psw_addr_disp(s, tmp, s->ilen); + if (s->base.tb->flags & FLAG_MASK_32) { + tcg_gen_ori_i64(tmp, tmp, 0x80000000); + } + tcg_gen_deposit_i64(out, out, tmp, 0, 32); } static TCGv_i64 psw_addr; From patchwork Wed Jun 5 21:57:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13687585 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 38731C27C65 for ; Wed, 5 Jun 2024 21:59:41 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sEydh-0001kC-Sb; Wed, 05 Jun 2024 17:57:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sEydg-0001jR-TF for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:48 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sEydf-0003qZ-Cj for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:48 -0400 Received: by mail-pf1-x430.google.com with SMTP id d2e1a72fcca58-702508bf0a9so240124b3a.0 for ; Wed, 05 Jun 2024 14:57:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717624666; x=1718229466; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=s+cDoZ/Z/Fl9ZwgY0g7zYp6SY7qoD7tDcn18rcDzdj8=; b=LXr/qzz02fbLrothqC9lFHllvvJb3QK6oXL3d1ClwhqgL0QqsmI/F11YzR/n0W3k5f nu0sZpKYcKOqmTYhGfFufhNlRdkQIt0en+H5rELzr4DrbAiqozvH8VQBvCzbfn4r4BZQ 8aoWSBTIkME+/l4tJyRPYhaf67mLDbF+IrVXCMtdETO9YRyIPvU+CaFwKtC5Vmp9DQmR GJ14QImyCJi1F7AeJ8vSJ3fR9ivZ1JkzvYDbfjz+d2vMJbQa6nl/oXzsI651qhs/540e qNcoHoKT3D0hzgdrlE12nFCk4MZVtsN2n6pWQ/PgWhBKkwrCXmEnCYuDVAFfN03rU2kj PCcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717624666; x=1718229466; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=s+cDoZ/Z/Fl9ZwgY0g7zYp6SY7qoD7tDcn18rcDzdj8=; b=E4jrF5AsqM0ZzYot98KAyoG+3PFr2uZMB49zoQc+pnLAyvG/UsBSVRftgV4IfqIXCX YCFNLMlx0h8Rae5BMFKfzE21YuveoaH0dGnpiN3IcnVIiQtty8secoDtM1yeCXvM61zK c4XjWQDYLORHtTmVCTW07MehLWEmaXKv2De9LysN+UG+SsC3Wq+1HFLRH3cxVusBRfts c4bj1LYAfzSqlKunQOsIWV1Ur8+udNgYQtCerzrZv34teSxUsvHLVvtAqT/2GRqIgunx sPbJdoL5DiStsdedPp1fSvwrBwWyQzWd67SOHC2hlVEx+zNyJXvitMlEPoMBzSTNFEH0 wQ7g== X-Gm-Message-State: AOJu0YxP1NsOniSUYadOygGb8XQKTL0SuA+VODONX99i8l4BenmVLdGm iUafcdP+ET/9mTVtHxXMdVOhL2yEFKj1kF03dklSVlwJiP3MMi3fHiTknc3iBRxyIteZByxVx42 a X-Google-Smtp-Source: AGHT+IHe5RE+EwKTf6Ecni7Cr62sPe4PVsz/dZeyL58kcIPc3ScHUkjtxTHoZkX/fkFYGhQu1JSbZw== X-Received: by 2002:a05:6a20:1015:b0:1b2:844a:eade with SMTP id adf61e73a8af0-1b2b71930c6mr3419358637.62.1717624665961; Wed, 05 Jun 2024 14:57:45 -0700 (PDT) Received: from stoup.. ([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b2ff9dsm9091509b3a.212.2024.06.05.14.57.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:57:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Ilya Leoshkevich , =?utf-8?q?P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 05/10] target/s390x: Use gen_psw_addr_disp in save_link_info Date: Wed, 5 Jun 2024 14:57:34 -0700 Message-Id: <20240605215739.4758-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605215739.4758-1-richard.henderson@linaro.org> References: <20240605215739.4758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Trivial but non-mechanical conversion away from pc_tmp. Reviewed-by: Ilya Leoshkevich Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 2d611da8af..2654c85a8e 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -1425,9 +1425,11 @@ static void save_link_info(DisasContext *s, DisasOps *o) return; } gen_op_calc_cc(s); - tcg_gen_andi_i64(o->out, o->out, 0xffffffff00000000ull); - tcg_gen_ori_i64(o->out, o->out, ((s->ilen / 2) << 30) | s->pc_tmp); t = tcg_temp_new_i64(); + tcg_gen_andi_i64(o->out, o->out, 0xffffffff00000000ull); + gen_psw_addr_disp(s, t, s->ilen); + tcg_gen_or_i64(o->out, o->out, t); + tcg_gen_ori_i64(o->out, o->out, (s->ilen / 2) << 30); tcg_gen_shri_i64(t, psw_mask, 16); tcg_gen_andi_i64(t, t, 0x0f000000); tcg_gen_or_i64(o->out, o->out, t); From patchwork Wed Jun 5 21:57:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13687582 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64E9FC27C55 for ; Wed, 5 Jun 2024 21:59:38 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sEydj-0001la-Ot; Wed, 05 Jun 2024 17:57:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sEydh-0001kE-St for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:49 -0400 Received: from mail-pf1-x42d.google.com ([2607:f8b0:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sEydg-0003r6-9c for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:49 -0400 Received: by mail-pf1-x42d.google.com with SMTP id d2e1a72fcca58-7024791a950so993844b3a.0 for ; Wed, 05 Jun 2024 14:57:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717624667; x=1718229467; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WqJiYcxvLTtBfrkGq1JS6zQ0ORon0JfeSUXl0F2Pjw0=; b=IJjguOA+wV76QeGHf1bPQswLwsRlKjCgXnCZGMcpbUmDxjkVDekFZvkEUynDcRt6Ah O1GXkEf+cOt0FoWvEEDD7a7e0pW+1otDUEqYdzCTZbv7VKdYKBrHKI3er3Ub/MqpANqQ nIOTPd7jpKss7OsMmwe+l1hR77QkoU40Q9yF8JSCeYegmNc72P6j1UUsgdg9P80pgyG7 bUeN8zyO6ynkQSA17QGm7zhfnVncgfJ9Cz0B2J5vmo3+RaGF/TeXqmQrbyYsfYYoy2x/ n4o+NRcPpUcMPlP6nc0FcOzuUIZq1Puzvv03QIVXOVLVLmFjXC+C4cXrt/nkrscqkta7 aXjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717624667; x=1718229467; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WqJiYcxvLTtBfrkGq1JS6zQ0ORon0JfeSUXl0F2Pjw0=; b=sUyyonhCfI1i+wA4Hb97yUyWYj5MsbzwfwKCNkE5zTgrPbAe7v7PdRpibH08I6TPCw R/CYJBbxRczA3aKbVkGI1XtplzVs85GmFWUOD6ngm7s1W5C7Ed5N9v42dMgvB9rTfpOM mIOImaC8Q8E/9EHOCl5aRQWz68vYPcgxg+68q7t7pzQOAd8/kpK9hMbNy23CCs74f61X dxg+1RjIHa24oBS5bAkpeP/OLV92XVK7txyJL9DlX6OPnvVQRJ6Ndxj7luPVhvcAD6f5 djoGBjdmgZzFjyuYdEr93e8QDO6UfDsP/cuNoEbBJ8rRbnWzGlkcIN0XYj6Mfa027NPV P/TA== X-Gm-Message-State: AOJu0YxdvwfP4iOjPLDU0EaQeS/kaH8dIoOwqNGKLLYq82cwu6cjipLJ Y8VmhxOFOrHR7WGPUsy0RCHSoEyBSLYN98EjOsV1nIL31c+QZ+Qh+6KjzX4OYa+HCzYgeNLOjO+ J X-Google-Smtp-Source: AGHT+IEU/n0+Cd/+x13+8albmCF6ZvlsR+3nUdVjH2KEtjQ+w4jU7vlY46HSJ9HQRvLGLho1kzN+vA== X-Received: by 2002:a05:6a00:6611:b0:702:454a:f543 with SMTP id d2e1a72fcca58-703f83ce2f4mr1043707b3a.0.1717624666963; Wed, 05 Jun 2024 14:57:46 -0700 (PDT) Received: from stoup.. ([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b2ff9dsm9091509b3a.212.2024.06.05.14.57.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:57:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org Subject: [PATCH v2 06/10] target/s390x: Use deposit in save_link_info Date: Wed, 5 Jun 2024 14:57:35 -0700 Message-Id: <20240605215739.4758-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605215739.4758-1-richard.henderson@linaro.org> References: <20240605215739.4758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace manual masking and oring with deposits. Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 32 ++++++++++++++++++++------------ 1 file changed, 20 insertions(+), 12 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 2654c85a8e..0f0688424f 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -1418,24 +1418,32 @@ static DisasJumpType op_bas(DisasContext *s, DisasOps *o) static void save_link_info(DisasContext *s, DisasOps *o) { - TCGv_i64 t; + TCGv_i64 t1, t2; if (s->base.tb->flags & (FLAG_MASK_32 | FLAG_MASK_64)) { pc_to_link_info(o->out, s); return; } + gen_op_calc_cc(s); - t = tcg_temp_new_i64(); - tcg_gen_andi_i64(o->out, o->out, 0xffffffff00000000ull); - gen_psw_addr_disp(s, t, s->ilen); - tcg_gen_or_i64(o->out, o->out, t); - tcg_gen_ori_i64(o->out, o->out, (s->ilen / 2) << 30); - tcg_gen_shri_i64(t, psw_mask, 16); - tcg_gen_andi_i64(t, t, 0x0f000000); - tcg_gen_or_i64(o->out, o->out, t); - tcg_gen_extu_i32_i64(t, cc_op); - tcg_gen_shli_i64(t, t, 28); - tcg_gen_or_i64(o->out, o->out, t); + t1 = tcg_temp_new_i64(); + t2 = tcg_temp_new_i64(); + + /* Shift program mask into place, garbage outside of [27:24]. */ + tcg_gen_shri_i64(t1, psw_mask, 16); + /* Deposit pc to replace garbage bits below program mask. */ + gen_psw_addr_disp(s, t2, s->ilen); + tcg_gen_deposit_i64(t1, t1, t2, 0, 24); + /* + * Deposit cc to replace garbage bits above program mask. + * Note that cc is in [0-3], thus [63:30] are set to zero. + */ + tcg_gen_extu_i32_i64(t2, cc_op); + tcg_gen_deposit_i64(t1, t1, t2, 28, 64 - 28); + /* Install ilen. */ + tcg_gen_ori_i64(t1, t1, (s->ilen / 2) << 30); + + tcg_gen_deposit_i64(o->out, o->out, t1, 0, 32); } static DisasJumpType op_bal(DisasContext *s, DisasOps *o) From patchwork Wed Jun 5 21:57:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13687576 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5E0F4C25B76 for ; Wed, 5 Jun 2024 21:58:36 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sEydk-0001mC-FJ; Wed, 05 Jun 2024 17:57:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sEydj-0001lI-4b for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:51 -0400 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sEydh-0003rV-DC for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:50 -0400 Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-6ff6fe215c6so235915b3a.3 for ; Wed, 05 Jun 2024 14:57:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717624668; x=1718229468; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jd2ISjYQWsrbk5WgCP4+tpczbqrOBDh2pjdAAZ3A5n0=; b=N7ykA1uPaEUrbp73sXw8wmOOvqFAKpTgu8xu2vxRVHRSZqDRzh3+XdsEbA9O+bM3oA 7gMGlN/DTRma0sM680GhAo8nEgR88aZe3vzrtC/FzO0YBuu7iGPdXtcB2vuTEXyfTchU jVOkgIEXW783Le+k7LjWV5rHy1gWRedA6Q48esHfrc0naUICYRcr9WMfnpPCkYQM4/VZ kuF1UESuMAWNnNKgmJec1fGBYtWsaM27fv5rZGHjRaFc0R12bGSQdNcDPt2WB8ZcCQoJ ywSARYIULZo25WEfPE1yJ1rd3aOG6a0M42MZ7M7vvc6il93GzWYC5tsbHmv/gA+mk2zR yjkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717624668; x=1718229468; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jd2ISjYQWsrbk5WgCP4+tpczbqrOBDh2pjdAAZ3A5n0=; b=pGhh/H695njxZYOoz48ZMD5OIOK+plQHiO9cOCuYkhy2I1KbzoRt2FGaLgbRCtdhmG 1Z0ujRddiD8JU/TAHpqwFuv9E7mO7zzdGHShsUvEJrUiXMNb4orbb2ZjrRuaZp9KI8ih PPpTYBFJCU1/PzvzxbCLqrTYaiizLofmT9UNJIFXOz1zs/JslQ9df8taU1hC55KYTRpz XX088LNzGEEso72WlXcxqzN5XuFXJh6uxiB8MWigUC5uDwNRlQ1Qeuyz5Pe56eoJLlYn 7lif5Tg6d1AOz3YkJoO9/RzvCgbqTT6JNeXa1KAOkfqSHU4Je/Soma1DlZsiSF++fStR V57w== X-Gm-Message-State: AOJu0Yw7+x2Mcw4Rbg4Io/HjM7ptgTBHpCd7IkmVlL3B9rvrtiU12pss UY/PF1d/u5XOjIpSFj2Atz+QRkVmn8sL2STIGu/IkPcsj1sb4lfnQawrNj4u3hfjLx5U57SXFa4 N X-Google-Smtp-Source: AGHT+IEVhq+t+UGBaxBkZiYbrYyzboXhtsnCZUcdE/sNU+MjbnImO7Jt8FIbe1quoDXOrxoHuLt7FQ== X-Received: by 2002:a05:6a21:27a8:b0:1b0:3301:337e with SMTP id adf61e73a8af0-1b2b7629136mr3491595637.59.1717624667989; Wed, 05 Jun 2024 14:57:47 -0700 (PDT) Received: from stoup.. ([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b2ff9dsm9091509b3a.212.2024.06.05.14.57.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:57:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Ilya Leoshkevich Subject: [PATCH v2 07/10] target/s390x: Use gen_psw_addr_disp in op_sam Date: Wed, 5 Jun 2024 14:57:36 -0700 Message-Id: <20240605215739.4758-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605215739.4758-1-richard.henderson@linaro.org> References: <20240605215739.4758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::434; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Complicated because we may now require a runtime jump. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 39 +++++++++++++++++++++++++----------- 1 file changed, 27 insertions(+), 12 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 0f0688424f..bce9a0aeb0 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -3805,7 +3805,7 @@ static DisasJumpType op_sacf(DisasContext *s, DisasOps *o) static DisasJumpType op_sam(DisasContext *s, DisasOps *o) { int sam = s->insn->data; - TCGv_i64 tsam; + TCGLabel *fault = NULL; uint64_t mask; switch (sam) { @@ -3820,20 +3820,35 @@ static DisasJumpType op_sam(DisasContext *s, DisasOps *o) break; } - /* Bizarre but true, we check the address of the current insn for the - specification exception, not the next to be executed. Thus the PoO - documents that Bad Things Happen two bytes before the end. */ - if (s->base.pc_next & ~mask) { - gen_program_exception(s, PGM_SPECIFICATION); - return DISAS_NORETURN; - } - s->pc_tmp &= mask; + /* + * Bizarre but true, we check the address of the current insn for the + * specification exception, not the next to be executed. Thus the PoO + * documents that Bad Things Happen two bytes before the end. + */ + if (mask != -1) { + TCGv_i64 t = tcg_temp_new_i64(); + fault = gen_new_label(); - tsam = tcg_constant_i64(sam); - tcg_gen_deposit_i64(psw_mask, psw_mask, tsam, 31, 2); + gen_psw_addr_disp(s, t, 0); + tcg_gen_andi_i64(t, t, ~mask); + tcg_gen_brcondi_i64(TCG_COND_NE, t, 0, fault); + } + + update_cc_op(s); + + tcg_gen_deposit_i64(psw_mask, psw_mask, tcg_constant_i64(sam), 31, 2); + + gen_psw_addr_disp(s, psw_addr, s->ilen); + tcg_gen_andi_i64(psw_addr, psw_addr, mask); /* Always exit the TB, since we (may have) changed execution mode. */ - return DISAS_TOO_MANY; + tcg_gen_lookup_and_goto_ptr(); + + if (mask != -1) { + gen_set_label(fault); + gen_program_exception(s, PGM_SPECIFICATION); + } + return DISAS_NORETURN; } static DisasJumpType op_sar(DisasContext *s, DisasOps *o) From patchwork Wed Jun 5 21:57:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13687578 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3ED2C25B76 for ; Wed, 5 Jun 2024 21:59:02 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sEydm-0001nq-2o; Wed, 05 Jun 2024 17:57:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sEydk-0001lj-2i for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:52 -0400 Received: from mail-pf1-x435.google.com ([2607:f8b0:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sEydi-0003rs-C8 for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:51 -0400 Received: by mail-pf1-x435.google.com with SMTP id d2e1a72fcca58-70259bdcf7cso261741b3a.0 for ; Wed, 05 Jun 2024 14:57:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717624669; x=1718229469; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=RIX7XK6plrFAu/60k76Lx8FovOSuygKS6nD5tM+w8JA=; b=U8yR0Adygoz+2OMobodqDy5ytuqB2BGur3yRNwmQgXIRi714uroQmLQFN7gdKxDRsv MJuJmWgPQdB9Zb12nJGS35ie2tn6GW6qzeZSVv8BlLMDr+5JGDGjrPo7bDG7MJhD0yJM WGf7V/OW9kDWZWcaBhqZRCTEByI1CCVNmqLos62i9b8P+eCQx2oXlBqIOxOKjyv3XeZ1 ZsVe4pgxbVPU6r2yGZv1WoX1Am3S8dSzdClPRdJmSO3r/NFB40cfdDSiOVoDvmSp52UJ bLzilRFux2KV739TCRsc0JJBuiuXXVgLPAHGEpBbmZCo0q0v1ZSGCFVBGiAwyiNyd7vM 5sgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717624669; x=1718229469; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=RIX7XK6plrFAu/60k76Lx8FovOSuygKS6nD5tM+w8JA=; b=DjUiS9BsvsXw2423gtV2sftvtdmeSkGqY9vE4wvTAGiLbBTZgMwwkLcN9JfZN1ZVs5 4Zv46yOw9hShmHNENMVcdPXFMNnDyzTMQemoSUBKIYW/E79wSf+SIeJGqvruzjueoIIK Un8C34J7Fjy0gCmEnR0kjQ0Wrp35oPOOkmrc0HA5JtKOdpAnpxrElkqyRKn8i7OzKjvi k8kVq8NAvIzA14SJ06EDlWwmVsuZ6XUP4byh0JXdWH59zif2Ujxi+i70+8NCjb58dVdK /PpOOe1BhdyPjMHzDV1XDs+iLZ09C0mS0a+8NmX1oB+v3nKB2sc0T8DrtWBh4VlTLGdG vF5A== X-Gm-Message-State: AOJu0Yyp2a+JNY6neOVvUNLPiJbcdO+fKQCd/gZb+Jb5fqL5+ft7edez dtuLACo+XckZ0UIbQ33ODO7wlypcAR71GnYA1pD60jpjY9ZkxnqgOVsAqlDYPEUHqqYPnRRh8Z+ o X-Google-Smtp-Source: AGHT+IFDKqvo633jd2Otu+yNCu3Fhy2DmRQ9ZPRKHsdH+ANd/eZ6QKU8dKsfU7o8EywQZA16m99mIA== X-Received: by 2002:a05:6a00:1146:b0:6f3:ea67:48c3 with SMTP id d2e1a72fcca58-703e56d308amr4297696b3a.0.1717624668814; Wed, 05 Jun 2024 14:57:48 -0700 (PDT) Received: from stoup.. ([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b2ff9dsm9091509b3a.212.2024.06.05.14.57.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:57:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Ilya Leoshkevich Subject: [PATCH v2 08/10] target/s390x: Use ilen instead in branches Date: Wed, 5 Jun 2024 14:57:37 -0700 Message-Id: <20240605215739.4758-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605215739.4758-1-richard.henderson@linaro.org> References: <20240605215739.4758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Remove the remaining uses of pc_tmp, and remove the variable. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 28 ++++++++-------------------- 1 file changed, 8 insertions(+), 20 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index bce9a0aeb0..3014cbea4f 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -141,12 +141,6 @@ struct DisasContext { const DisasInsn *insn; DisasFields fields; uint64_t ex_value; - /* - * During translate_one(), pc_tmp is used to determine the instruction - * to be executed after base.pc_next - e.g. next sequential instruction - * or a branch target. - */ - uint64_t pc_tmp; uint32_t ilen; enum cc_op cc_op; bool exit_to_mainloop; @@ -344,11 +338,6 @@ static void store_freg32_i64(int reg, TCGv_i64 v) tcg_gen_st32_i64(v, tcg_env, freg32_offset(reg)); } -static void update_psw_addr(DisasContext *s) -{ - gen_psw_addr_disp(s, psw_addr, 0); -} - static void per_branch(DisasContext *s, TCGv_i64 dest) { #ifndef CONFIG_USER_ONLY @@ -420,7 +409,7 @@ static void gen_program_exception(DisasContext *s, int code) offsetof(CPUS390XState, int_pgm_ilen)); /* update the psw */ - update_psw_addr(s); + gen_psw_addr_disp(s, psw_addr, 0); /* Save off cc. */ update_cc_op(s); @@ -1179,7 +1168,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, /* Branch not taken. */ gen_psw_addr_disp(s, psw_addr, s->ilen); - if (use_goto_tb(s, s->pc_tmp)) { + if (use_goto_tb(s, s->base.pc_next + s->ilen)) { tcg_gen_goto_tb(1); tcg_gen_exit_tb(s->base.tb, 1); return DISAS_NORETURN; @@ -2361,7 +2350,7 @@ static DisasJumpType op_ex(DisasContext *s, DisasOps *o) return DISAS_NORETURN; } - update_psw_addr(s); + gen_psw_addr_disp(s, psw_addr, 0); update_cc_op(s); if (r1 == 0) { @@ -3085,7 +3074,7 @@ static DisasJumpType op_lpd(DisasContext *s, DisasOps *o) /* In a parallel context, stop the world and single step. */ if (tb_cflags(s->base.tb) & CF_PARALLEL) { - update_psw_addr(s); + gen_psw_addr_disp(s, psw_addr, 0); update_cc_op(s); gen_exception(EXCP_ATOMIC); return DISAS_NORETURN; @@ -4379,7 +4368,7 @@ static DisasJumpType op_stura(DisasContext *s, DisasOps *o) if (s->base.tb->flags & FLAG_MASK_PER_STORE_REAL) { update_cc_op(s); - update_psw_addr(s); + gen_psw_addr_disp(s, psw_addr, 0); gen_helper_per_store_real(tcg_env, tcg_constant_i32(s->ilen)); return DISAS_NORETURN; } @@ -4611,7 +4600,7 @@ static DisasJumpType op_svc(DisasContext *s, DisasOps *o) { TCGv_i32 t; - update_psw_addr(s); + gen_psw_addr_disp(s, psw_addr, 0); update_cc_op(s); t = tcg_constant_i32(get_field(s, i1) & 0xff); @@ -6193,7 +6182,6 @@ static const DisasInsn *extract_insn(CPUS390XState *env, DisasContext *s) g_assert_not_reached(); } } - s->pc_tmp = s->base.pc_next + ilen; s->ilen = ilen; /* We can't actually determine the insn format until we've looked up @@ -6413,7 +6401,7 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) out: /* Advance to the next instruction. */ - s->base.pc_next = s->pc_tmp; + s->base.pc_next += s->ilen; return ret; } @@ -6475,7 +6463,7 @@ static void s390x_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) case DISAS_NORETURN: break; case DISAS_TOO_MANY: - update_psw_addr(dc); + gen_psw_addr_disp(dc, psw_addr, 0); /* FALLTHRU */ case DISAS_PC_UPDATED: /* Next TB starts off with CC_OP_DYNAMIC, so make sure the From patchwork Wed Jun 5 21:57:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13687583 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2E4BC27C6D for ; Wed, 5 Jun 2024 21:59:40 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sEydn-0001of-IX; Wed, 05 Jun 2024 17:57:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sEydl-0001mw-2z for qemu-devel@nongnu.org; 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([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b2ff9dsm9091509b3a.212.2024.06.05.14.57.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:57:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Ilya Leoshkevich Subject: [PATCH v2 09/10] target/s390x: Assert masking of psw.addr in cpu_get_tb_cpu_state Date: Wed, 5 Jun 2024 14:57:38 -0700 Message-Id: <20240605215739.4758-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605215739.4758-1-richard.henderson@linaro.org> References: <20240605215739.4758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org When changing modes via SAM, we raise a specification exception if the new PC is out of range. The masking in s390x_tr_init_disas_context was too late to be correct, but may be removed. Add a debugging assert in cpu_get_tb_cpu_state. Reviewed-by: Ilya Leoshkevich Signed-off-by: Richard Henderson --- target/s390x/cpu.c | 6 ++++++ target/s390x/tcg/translate.c | 6 +----- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 2bbeaca36e..c786767bd1 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -358,6 +358,12 @@ void cpu_get_tb_cpu_state(CPUS390XState *env, vaddr *pc, flags |= FLAG_MASK_VECTOR; } *pflags = flags; + + if (!(flags & FLAG_MASK_32)) { + tcg_debug_assert(*pc <= 0x00ffffff); + } else if (!(flags & FLAG_MASK_64)) { + tcg_debug_assert(*pc <= 0x7fffffff); + } } static const TCGCPUOps s390_tcg_ops = { diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 3014cbea4f..0ee14484d0 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -6409,11 +6409,7 @@ static void s390x_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc = container_of(dcbase, DisasContext, base); - /* 31-bit mode */ - if (!(dc->base.tb->flags & FLAG_MASK_64)) { - dc->base.pc_first &= 0x7fffffff; - dc->base.pc_next = dc->base.pc_first; - } + /* Note cpu_get_tb_cpu_state asserts PC is masked for the mode. */ dc->cc_op = CC_OP_DYNAMIC; dc->ex_value = dc->base.tb->cs_base; From patchwork Wed Jun 5 21:57:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13687586 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 47A8FC25B76 for ; Wed, 5 Jun 2024 21:59:49 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sEydn-0001om-Vg; Wed, 05 Jun 2024 17:57:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sEydm-0001oD-7C for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:54 -0400 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sEydk-0003se-1O for qemu-devel@nongnu.org; Wed, 05 Jun 2024 17:57:53 -0400 Received: by mail-pf1-x430.google.com with SMTP id d2e1a72fcca58-7025cb09553so226020b3a.3 for ; Wed, 05 Jun 2024 14:57:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717624671; x=1718229471; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LRuvGrqklc35nzRDLd0HrPdmqm1+emdl+BYV+uq1dAc=; b=HzLxhWhZQVXxxgu7JJr9R0XVwvssL2uzFRqRdC2PU5FhBG8JmeDekwzcJCy/YmriqG WV4lWc7f0Kr54XtbaGhx68zH7kreMOv6y1XvqiWi8xr0QX96kORPVuj6WpSnNNWOig6c jWyK5HTZmbLQNS6e08/n3CU7vHAMX+26IdbtvIk/TEBpB8GJnUksFBBQSUINDAf21zEO E2THfZn4o5iJ4WOO7a5ba4uD0qU1VAzPD2PB2f1s2cyWFJEp299QxKGNXzj9zdonwqnj pCZPeztCZWRnPuvnm3n8vOiFIBaOelWh04QhEEBryRskfJArnT2vBpWjJ+R4G/3R4V4I 4kQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717624671; x=1718229471; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LRuvGrqklc35nzRDLd0HrPdmqm1+emdl+BYV+uq1dAc=; b=DS5BoZSOLt4r9p7k1H46bWS010hquY/ZAb3zzrvzS+0rYtU7aDxoJ1tXqTIN9DWK2n aIAqhweIqW2je6p7gJ/oZ9mcQXK3h9k8cFLnWf1wsxW+O2LAKmQDCmv/Pc1X5gNafQ/A RUXpQTFi98CMJFn4qtKMR94nC2a7DV1/xKlkT0Aw+ioad8IJCI0zxvyJrondpcehJr0z 3BLaseO+cm6S4fV9y4gzX26U5Fz/B4qFOfzpMPnBTmO4PKWZp9hqZngXgbFFxmyRzpx/ BTb92ZjvC6lpjX0LZwD0i+PuTHFvjxAWyIY3DTXvNIOl4NztTIZirmAFXoHoepEKDYKe lO/Q== X-Gm-Message-State: AOJu0YzFZaxwBmKW5GNNPogr53aldzLxDksGbNKT4ajcrk259NMgTbP+ 596jlFi89vFGivcWcc1Ca/IJeXW8n5jCHciw6lgvNyUQAmJcrDbgR84XPd+G7liA7jV0YXW7QjJ B X-Google-Smtp-Source: AGHT+IGAvJtLaEroWLFRohRF83/+MUK+sNOWMrs1nDO/I1qhfyzNlcOR+JqLhLUIwq0uiN6VMNz8Tw== X-Received: by 2002:a05:6a20:430f:b0:1af:dae8:5ea2 with SMTP id adf61e73a8af0-1b2b710b40fmr4629477637.48.1717624670756; Wed, 05 Jun 2024 14:57:50 -0700 (PDT) Received: from stoup.. ([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70242b2ff9dsm9091509b3a.212.2024.06.05.14.57.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 14:57:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org Subject: [PATCH v2 10/10] target/s390x: Enable CF_PCREL Date: Wed, 5 Jun 2024 14:57:39 -0700 Message-Id: <20240605215739.4758-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605215739.4758-1-richard.henderson@linaro.org> References: <20240605215739.4758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Pierrick Bouvier --- target/s390x/cpu.c | 17 +++++++++ target/s390x/tcg/translate.c | 71 +++++++++++++++++++++++------------- 2 files changed, 62 insertions(+), 26 deletions(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index c786767bd1..9f03190c35 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -39,6 +39,7 @@ #include "sysemu/reset.h" #endif #include "hw/s390x/cpu-topology.h" +#include "exec/translation-block.h" #define CR0_RESET 0xE0UL #define CR14_RESET 0xC2000000UL; @@ -111,6 +112,16 @@ uint64_t s390_cpu_get_psw_mask(CPUS390XState *env) return r; } +static void s390_cpu_synchronize_from_tb(CPUState *cs, + const TranslationBlock *tb) +{ + /* The program counter is always up to date with CF_PCREL. */ + if (!(tb_cflags(tb) & CF_PCREL)) { + CPUS390XState *env = cpu_env(cs); + env->psw.addr = tb->pc; + } +} + static void s390_cpu_set_pc(CPUState *cs, vaddr value) { S390CPU *cpu = S390_CPU(cs); @@ -246,6 +257,11 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) S390CPUClass *scc = S390_CPU_GET_CLASS(dev); Error *err = NULL; +#if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) + /* Use pc-relative instructions in system-mode */ + cs->tcg_cflags |= CF_PCREL; +#endif + /* the model has to be realized before qemu_init_vcpu() due to kvm */ s390_realize_cpu_model(cs, &err); if (err) { @@ -368,6 +384,7 @@ void cpu_get_tb_cpu_state(CPUS390XState *env, vaddr *pc, static const TCGCPUOps s390_tcg_ops = { .initialize = s390x_translate_init, + .synchronize_from_tb = s390_cpu_synchronize_from_tb, .restore_state_to_opc = s390x_restore_state_to_opc, #ifdef CONFIG_USER_ONLY diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 0ee14484d0..6961ad7c67 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -139,6 +139,7 @@ struct DisasFields { struct DisasContext { DisasContextBase base; const DisasInsn *insn; + target_ulong pc_save; DisasFields fields; uint64_t ex_value; uint32_t ilen; @@ -161,28 +162,6 @@ static uint64_t inline_branch_hit[CC_OP_MAX]; static uint64_t inline_branch_miss[CC_OP_MAX]; #endif -static void gen_psw_addr_disp(DisasContext *s, TCGv_i64 dest, int64_t disp) -{ - tcg_gen_movi_i64(dest, s->base.pc_next + disp); -} - -static void pc_to_link_info(TCGv_i64 out, DisasContext *s) -{ - TCGv_i64 tmp; - - if (s->base.tb->flags & FLAG_MASK_64) { - gen_psw_addr_disp(s, out, s->ilen); - return; - } - - tmp = tcg_temp_new_i64(); - gen_psw_addr_disp(s, tmp, s->ilen); - if (s->base.tb->flags & FLAG_MASK_32) { - tcg_gen_ori_i64(tmp, tmp, 0x80000000); - } - tcg_gen_deposit_i64(out, out, tmp, 0, 32); -} - static TCGv_i64 psw_addr; static TCGv_i64 psw_mask; static TCGv_i64 gbea; @@ -338,6 +317,34 @@ static void store_freg32_i64(int reg, TCGv_i64 v) tcg_gen_st32_i64(v, tcg_env, freg32_offset(reg)); } +static void gen_psw_addr_disp(DisasContext *s, TCGv_i64 dest, int64_t disp) +{ + assert(s->pc_save != -1); + if (tb_cflags(s->base.tb) & CF_PCREL) { + disp += s->base.pc_next - s->pc_save; + tcg_gen_addi_i64(dest, psw_addr, disp); + } else { + tcg_gen_movi_i64(dest, s->base.pc_next + disp); + } +} + +static void pc_to_link_info(TCGv_i64 out, DisasContext *s) +{ + TCGv_i64 tmp; + + if (s->base.tb->flags & FLAG_MASK_64) { + gen_psw_addr_disp(s, out, s->ilen); + return; + } + + tmp = tcg_temp_new_i64(); + gen_psw_addr_disp(s, tmp, s->ilen); + if (s->base.tb->flags & FLAG_MASK_32) { + tcg_gen_ori_i64(tmp, tmp, 0x80000000); + } + tcg_gen_deposit_i64(out, out, tmp, 0, 32); +} + static void per_branch(DisasContext *s, TCGv_i64 dest) { #ifndef CONFIG_USER_ONLY @@ -1081,13 +1088,13 @@ static DisasJumpType help_goto_direct(DisasContext *s, int64_t disp) if (disp == s->ilen) { return DISAS_NEXT; } + gen_psw_addr_disp(s, psw_addr, disp); if (use_goto_tb(s, dest)) { tcg_gen_goto_tb(0); - gen_psw_addr_disp(s, psw_addr, disp); tcg_gen_exit_tb(s->base.tb, 0); return DISAS_NORETURN; } else { - gen_psw_addr_disp(s, psw_addr, disp); + s->pc_save = dest; return DISAS_PC_CC_UPDATED; } } @@ -1097,6 +1104,7 @@ static DisasJumpType help_goto_indirect(DisasContext *s, TCGv_i64 dest) update_cc_op(s); per_breaking_event(s); tcg_gen_mov_i64(psw_addr, dest); + s->pc_save = -1; per_branch(s, psw_addr); return DISAS_PC_CC_UPDATED; } @@ -1173,6 +1181,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, tcg_gen_exit_tb(s->base.tb, 1); return DISAS_NORETURN; } + s->pc_save = s->base.pc_next + s->ilen; return DISAS_PC_CC_UPDATED; } @@ -2351,6 +2360,7 @@ static DisasJumpType op_ex(DisasContext *s, DisasOps *o) } gen_psw_addr_disp(s, psw_addr, 0); + s->pc_save = s->base.pc_next; update_cc_op(s); if (r1 == 0) { @@ -6411,6 +6421,7 @@ static void s390x_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) /* Note cpu_get_tb_cpu_state asserts PC is masked for the mode. */ + dc->pc_save = dc->base.pc_first; dc->cc_op = CC_OP_DYNAMIC; dc->ex_value = dc->base.tb->cs_base; dc->exit_to_mainloop = dc->ex_value; @@ -6423,9 +6434,13 @@ static void s390x_tr_tb_start(DisasContextBase *db, CPUState *cs) static void s390x_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc = container_of(dcbase, DisasContext, base); + target_ulong pc_arg = dc->base.pc_next; + if (tb_cflags(dc->base.tb) & CF_PCREL) { + pc_arg &= ~TARGET_PAGE_MASK; + } /* Delay the set of ilen until we've read the insn. */ - tcg_gen_insn_start(dc->base.pc_next, dc->cc_op, 0); + tcg_gen_insn_start(pc_arg, dc->cc_op, 0); } static target_ulong get_next_pc(CPUS390XState *env, DisasContext *s, @@ -6517,7 +6532,11 @@ void s390x_restore_state_to_opc(CPUState *cs, CPUS390XState *env = cpu_env(cs); int cc_op = data[1]; - env->psw.addr = data[0]; + if (tb_cflags(tb) & CF_PCREL) { + env->psw.addr = (env->psw.addr & TARGET_PAGE_MASK) | data[0]; + } else { + env->psw.addr = data[0]; + } /* Update the CC opcode if it is not already up-to-date. */ if ((cc_op != CC_OP_DYNAMIC) && (cc_op != CC_OP_STATIC)) {