From patchwork Fri Jun 7 07:30:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13689425 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68D5A225D6; Fri, 7 Jun 2024 07:30:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745441; cv=none; b=Stpz0vvNR86/KkG0K8n/UQ9/abSgDd0nUMQxCC1DWpwvSbONISEqbq66/1TgOqkiJH7L1jlNl2Z5hp6gRaXjtJMw4rVqXRcFyzpC9IStojpWnzE+tzTLEEyQla5EkS13Z9uDyNrUu1r72ahwApADtbCrwSRvWFpugmUFrlLqcEs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745441; c=relaxed/simple; bh=YAjMVZ3ggIgJ5SUYbEnnK+9a9PzdMaGXk8lNx4zAoiE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qndULc2vpNQ2sAQzRL5gnGWbP9kYMDSUE4tL0elILwKH2Azl2ggi/3d2CDspSvgGrNuGQY6AtpqfAXkTuSMw2L1qCcV4YJf5qrh0YAz13o8iyjLblmcNbN/nXSTHFFj2fIPy9MFHXhP+LA6GvrqwjIa0RXtechQovYx9gQWNfhc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=kRuCUUPE; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="kRuCUUPE" Received: by mail.gandi.net (Postfix) with ESMTPSA id 0B6B84000D; Fri, 7 Jun 2024 07:30:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1717745437; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DctDY5wpYKdA8rU+Ryw9aKqZwgCO7G1RtPicZ+uP11I=; b=kRuCUUPEgzsga3OUcOm1MIJUwXeh7c11OGGlDPMr3YEE6fRPvwJW45hYwkiKwpSYtkwXom BXRyHvqsUW4DxMKJeuGVCzGNaF3WXLn2HCkS1FZtAsUX9cJBwq/GMLvG7LWdZSrI+PJ0AP RPg4ZTXpTaGRjfC2R8VLpcMRAtHC1mNsbp5ozDAanMM0SlWI+7aZhgKuh03vwxepxmgmft nLMO9/OK+G4wFxIKI9tPBKBXeiQ5bijm3RMmc7h9HRGIP/uzSDPQp+/mSdw0k1kuzkPQ0C GuCZnaP7CSZmGzcGZrZ0gmUIJ9XsrWnRr9R6c1KsmxsP94M/NeCgPpU/y5onhA== From: Kory Maincent Date: Fri, 07 Jun 2024 09:30:18 +0200 Subject: [PATCH net-next v2 1/8] net: pse-pd: Use EOPNOTSUPP error code instead of ENOTSUPP Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-feature_poe_power_cap-v2-1-c03c2deb83ab@bootlin.com> References: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> In-Reply-To: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent , Andrew Lunn X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP as reported by checkpatch script. Reviewed-by: Andrew Lunn Signed-off-by: Kory Maincent Acked-by: Oleksij Rempel --- include/linux/pse-pd/pse.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 6d07c95dabb9..6eec24ffa866 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -167,14 +167,14 @@ static inline int pse_ethtool_get_status(struct pse_control *psec, struct netlink_ext_ack *extack, struct pse_control_status *status) { - return -ENOTSUPP; + return -EOPNOTSUPP; } static inline int pse_ethtool_set_config(struct pse_control *psec, struct netlink_ext_ack *extack, const struct pse_control_config *config) { - return -ENOTSUPP; + return -EOPNOTSUPP; } static inline bool pse_has_podl(struct pse_control *psec) From patchwork Fri Jun 7 07:30:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13689426 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CE8019D89B; Fri, 7 Jun 2024 07:30:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745442; cv=none; b=rlsDFpsl3UpcVNEtbpEQcnGSEFG0xHsKT2O74cLHvKc8KKCYL33x1hsd3pz2fPyQ9Z/b9Zvg7I1UpLn+l/83aMyg8q4DAjnH9hsJmezpd2S1Igi0UQhOU3mhLoBukSQBxxS1MOJz2vVfTIwLCJnFPCDH09CR+PA6Mne5FO+m1EI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745442; c=relaxed/simple; bh=XA7yXs98tBR+Y72hp0dM3tOORuRzx+vjQf+FlpZQy2g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=awxMWIT/xHGdlxlk9MCRdsv+hIyjNYfUHqc4yvrODFWqsocZjXHjzczpIgh5XtGUswkv4ngF+CglHzF672sRXUqj9Ihy2ZReiIhoCv9K4gO24J6CvXUcFS8fwiuBXLtxSrQceClG5Q4F8uypMqT7N6Hvsz9SNYvhGU7GJa9giuE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=D47WZkx/; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="D47WZkx/" Received: by mail.gandi.net (Postfix) with ESMTPSA id BC32640011; Fri, 7 Jun 2024 07:30:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1717745438; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2VeJW7JHQpWdY0KjL1cAtvzlXlZZ8Tp/iJj/ay+emhQ=; b=D47WZkx/MwCxy0DNinourWkr4Nzke5EvAZ487X6zJtNuoHLvgKO+zbOywNzFwTc0bEgsII K4fAdeB9Q+mIRIjr/gwTg5Np8MCnU44W4+7N9jFFXh28v4P/cIATg91Bo1VeTgh7OBEG4D tQYfiaAVLyR/iZ5Co5vdw8qCy94UlURTfMwiH2z0a9QAYq1XKAeNTJLrXbVj4SpIePfUhB Rtr2gIOQHEI/vA6AHPz9+CXa4NC+iuP9/igbSlJ5Y38yGHcLQBMMQqfGJG4SSS3/vsZ7Mr 9gQWHh1OomVJEIrmKSygIC0ouLSTcBgkINDBaY+97dvMugw+/eYbulYkzuCabw== From: Kory Maincent Date: Fri, 07 Jun 2024 09:30:19 +0200 Subject: [PATCH net-next v2 2/8] net: ethtool: pse-pd: Expand C33 PSE status with class, power and extended state Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-feature_poe_power_cap-v2-2-c03c2deb83ab@bootlin.com> References: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> In-Reply-To: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" This update expands the status information provided by ethtool for PSE c33. It includes details such as the detected class, current power delivered, and extended state information. Signed-off-by: Kory Maincent --- Change in v2: - Move on PSE string error messages to ETHTOOL_LINK_EXT_STATE and ETHTOOL_LINK_EXT_SUBSTATE with fixed enumeration in aim to unify interface diagnostic. --- include/linux/ethtool.h | 11 ++++++++++ include/linux/pse-pd/pse.h | 8 +++++++ include/uapi/linux/ethtool.h | 41 ++++++++++++++++++++++++++++++++++++ include/uapi/linux/ethtool_netlink.h | 4 ++++ net/ethtool/pse-pd.c | 29 ++++++++++++++++++++++++- 5 files changed, 92 insertions(+), 1 deletion(-) diff --git a/include/linux/ethtool.h b/include/linux/ethtool.h index 6fd9107d3cc0..1a0c8d6a22a0 100644 --- a/include/linux/ethtool.h +++ b/include/linux/ethtool.h @@ -1155,4 +1155,15 @@ struct ethtool_forced_speed_map { void ethtool_forced_speed_maps_init(struct ethtool_forced_speed_map *maps, u32 size); + +/* C33 PSE extended state and substate. */ +struct ethtool_c33_pse_ext_state_info { + enum ethtool_c33_pse_ext_state c33_pse_ext_state; + union { + enum ethtool_c33_pse_ext_substate_voltage_issue voltage_issue; + enum ethtool_c33_pse_ext_substate_current_issue current_issue; + enum ethtool_c33_pse_ext_substate_config config; + u32 __c33_pse_ext_substate; + }; +}; #endif /* _LINUX_ETHTOOL_H */ diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 6eec24ffa866..38b9308e5e7a 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -36,12 +36,20 @@ struct pse_control_config { * functions. IEEE 802.3-2022 30.9.1.1.2 aPSEAdminState * @c33_pw_status: power detection status of the PSE. * IEEE 802.3-2022 30.9.1.1.5 aPSEPowerDetectionStatus: + * @c33_pw_class: detected class of a powered PD + * IEEE 802.3-2022 30.9.1.1.8 aPSEPowerClassification + * @c33_actual_pw: power currently delivered by the PSE in mW + * IEEE 802.3-2022 30.9.1.1.23 aPSEActualPower + * @c33_ext_state_info: extended state information of the PSE */ struct pse_control_status { enum ethtool_podl_pse_admin_state podl_admin_state; enum ethtool_podl_pse_pw_d_status podl_pw_status; enum ethtool_c33_pse_admin_state c33_admin_state; enum ethtool_c33_pse_pw_d_status c33_pw_status; + u32 c33_pw_class; + u32 c33_actual_pw; + struct ethtool_c33_pse_ext_state_info c33_ext_state_info; }; /** diff --git a/include/uapi/linux/ethtool.h b/include/uapi/linux/ethtool.h index 8733a3117902..ef65ad4612d2 100644 --- a/include/uapi/linux/ethtool.h +++ b/include/uapi/linux/ethtool.h @@ -752,6 +752,47 @@ enum ethtool_module_power_mode { ETHTOOL_MODULE_POWER_MODE_HIGH, }; +/* C33 PSE extended state */ +enum ethtool_c33_pse_ext_state { + ETHTOOL_C33_PSE_EXT_STATE_UNKNOWN = 1, + ETHTOOL_C33_PSE_EXT_STATE_DETECTION, + ETHTOOL_C33_PSE_EXT_STATE_CLASSIFICATION_FAILURE, + ETHTOOL_C33_PSE_EXT_STATE_HARDWARE_ISSUE, + ETHTOOL_C33_PSE_EXT_STATE_VOLTAGE_ISSUE, + ETHTOOL_C33_PSE_EXT_STATE_CURRENT_ISSUE, + ETHTOOL_C33_PSE_EXT_STATE_POWER_BUDGET_EXCEEDED, + ETHTOOL_C33_PSE_EXT_STATE_CONFIG, + ETHTOOL_C33_PSE_EXT_STATE_TEMP_ISSUE, +}; + +/* More information in addition to ETHTOOL_C33_PSE_EXT_STATE_DETECTION. */ +enum ethtool_c33_pse_ext_substate_detection { + ETHTOOL_C33_PSE_EXT_SUBSTATE_DET_IN_PROGRESS = 1, + ETHTOOL_C33_PSE_EXT_SUBSTATE_DET_FAILURE, +}; + +/* More information in addition to ETHTOOL_C33_PSE_EXT_STATE_VOLTAGE_ISSUE. */ +enum ethtool_c33_pse_ext_substate_voltage_issue { + ETHTOOL_C33_PSE_EXT_SUBSTATE_V_INJECTION = 1, + ETHTOOL_C33_PSE_EXT_SUBSTATE_V_SHORT_DETECTED, + ETHTOOL_C33_PSE_EXT_SUBSTATE_V_OVERVOLTAGE, + ETHTOOL_C33_PSE_EXT_SUBSTATE_V_UNDERVOLTAGE, + ETHTOOL_C33_PSE_EXT_SUBSTATE_V_OPEN, +}; + +/* More information in addition to ETHTOOL_C33_PSE_EXT_STATE_CURRENT_ISSUE. */ +enum ethtool_c33_pse_ext_substate_current_issue { + ETHTOOL_C33_PSE_EXT_SUBSTATE_CRT_OVERLOAD = 1, + ETHTOOL_C33_PSE_EXT_SUBSTATE_CRT_UNDERLOAD, +}; + +/* More information in addition to ETHTOOL_C33_PSE_EXT_STATE_CONFIG. + */ +enum ethtool_c33_pse_ext_substate_config { + ETHTOOL_C33_PSE_EXT_SUBSTATE_CFG_CHANGED = 1, + ETHTOOL_C33_PSE_EXT_SUBSTATE_CFG_UNDEFINED, +}; + /** * enum ethtool_pse_types - Types of PSE controller. * @ETHTOOL_PSE_UNKNOWN: Type of PSE controller is unknown diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h index b49b804b9495..ccbe8294dfd5 100644 --- a/include/uapi/linux/ethtool_netlink.h +++ b/include/uapi/linux/ethtool_netlink.h @@ -915,6 +915,10 @@ enum { ETHTOOL_A_C33_PSE_ADMIN_STATE, /* u32 */ ETHTOOL_A_C33_PSE_ADMIN_CONTROL, /* u32 */ ETHTOOL_A_C33_PSE_PW_D_STATUS, /* u32 */ + ETHTOOL_A_C33_PSE_PW_CLASS, /* u32 */ + ETHTOOL_A_C33_PSE_ACTUAL_PW, /* u32 */ + ETHTOOL_A_C33_PSE_EXT_STATE, /* u8 */ + ETHTOOL_A_C33_PSE_EXT_SUBSTATE, /* u8 */ /* add new constants above here */ __ETHTOOL_A_PSE_CNT, diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index 2c981d443f27..3d74cfe7765b 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -86,7 +86,14 @@ static int pse_reply_size(const struct ethnl_req_info *req_base, len += nla_total_size(sizeof(u32)); /* _C33_PSE_ADMIN_STATE */ if (st->c33_pw_status > 0) len += nla_total_size(sizeof(u32)); /* _C33_PSE_PW_D_STATUS */ - + if (st->c33_pw_class > 0) + len += nla_total_size(sizeof(u32)); /* _C33_PSE_PW_CLASS */ + if (st->c33_actual_pw > 0) + len += nla_total_size(sizeof(u32)); /* _C33_PSE_ACTUAL_PW */ + if (st->c33_ext_state_info.c33_pse_ext_state) + len += nla_total_size(sizeof(u8)); /* _C33_PSE_EXT_STATE */ + if (st->c33_ext_state_info.__c33_pse_ext_substate) + len += nla_total_size(sizeof(u8)); /* _C33_PSE_EXT_SUBSTATE */ return len; } @@ -117,6 +124,26 @@ static int pse_fill_reply(struct sk_buff *skb, st->c33_pw_status)) return -EMSGSIZE; + if (st->c33_pw_class > 0 && + nla_put_u32(skb, ETHTOOL_A_C33_PSE_PW_CLASS, + st->c33_pw_class)) + return -EMSGSIZE; + + if (st->c33_actual_pw > 0 && + nla_put_u32(skb, ETHTOOL_A_C33_PSE_ACTUAL_PW, + st->c33_actual_pw)) + return -EMSGSIZE; + + if (st->c33_ext_state_info.c33_pse_ext_state > 0 && + nla_put_u8(skb, ETHTOOL_A_C33_PSE_EXT_STATE, + st->c33_ext_state_info.c33_pse_ext_state)) + return -EMSGSIZE; + + if (st->c33_ext_state_info.__c33_pse_ext_substate > 0 && + nla_put_u8(skb, ETHTOOL_A_C33_PSE_EXT_SUBSTATE, + st->c33_ext_state_info.__c33_pse_ext_substate)) + return -EMSGSIZE; + return 0; } From patchwork Fri Jun 7 07:30:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13689427 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B103879DC; Fri, 7 Jun 2024 07:30:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745442; cv=none; b=U7kYfXrYgxWmvm/HTTy7LWzvjG+EQQSWanLtPfvdg22apdjsCk0E9IJa6UEKHODk7dywH/cHrZfqlSGKWKbj9mvczPZeXjOWCcliACrWTxmda5Uj/sgksVxxGje57XykkMoixLZfr19hEiymbrMMZznmmeQyUabDLro3pxQS30o= ARC-Message-Signature: i=1; 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Fri, 7 Jun 2024 07:30:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1717745439; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1vU/AedogyJdjRHzhE1ZYEiKhLlkByPwNNkJwKzcRaE=; b=iATodo3gdBUkZ33m29OSqMpgMD0r/ojk2FpbhgAaf0P+Ltpy4srfg0t2JcOsu53wf+4Mju 28PlVvkbVYJQfPcWkW1hnVAw60SaCn0JMknpTKNZkli5vLKGoIWNsg24tsmdk7VZEiqy+0 V0geQUXgVPM5M4FjTRfn/aSZJZHMNFACnysX7iEJKhBXo6x1xxnmQneJi6Wm7ktD7QJ2dt jKsT+d0IKjhP1sf4z4DHytmJM0P0h+HnfcSuL8oOIF0yc/iU6df02MZnnvH+fRnRVeXsV5 WQg4oAsWPj4Pd1g/4x9e+adwC73cLuWlUsyZwjn3rC260z8PLbs5mdPCa8fPdA== From: Kory Maincent Date: Fri, 07 Jun 2024 09:30:20 +0200 Subject: [PATCH net-next v2 3/8] netlink: specs: Expand the PSE netlink command with C33 new features Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-feature_poe_power_cap-v2-3-c03c2deb83ab@bootlin.com> References: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> In-Reply-To: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" Expand the c33 PSE attributes with PSE class, extended state information and power consumption. ./ynl/cli.py --spec netlink/specs/ethtool.yaml --no-schema --do pse-get --json '{"header":{"dev-name":"eth0"}}' {'c33-pse-actual-pw': 1700, 'c33-pse-admin-state': 3, 'c33-pse-pw-class': 4, 'c33-pse-pw-d-status': 4, 'header': {'dev-index': 4, 'dev-name': 'eth0'}} ./ynl/cli.py --spec netlink/specs/ethtool.yaml --no-schema --do pse-get --json '{"header":{"dev-name":"eth0"}}' {'c33-pse-admin-state': 3, 'c33-pse-ext-state': 5, 'c33-pse-ext-substate': 5, 'c33-pse-pw-d-status': 2, 'header': {'dev-index': 4, 'dev-name': 'eth0'}} Signed-off-by: Kory Maincent --- Documentation/netlink/specs/ethtool.yaml | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml index 00dc61358be8..8aa064f2f466 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -922,6 +922,22 @@ attribute-sets: name: c33-pse-pw-d-status type: u32 name-prefix: ethtool-a- + - + name: c33-pse-pw-class + type: u32 + name-prefix: ethtool-a- + - + name: c33-pse-actual-pw + type: u32 + name-prefix: ethtool-a- + - + name: c33-pse-ext-state + type: u8 + name-prefix: ethtool-a- + - + name: c33-pse-ext-substate + type: u8 + name-prefix: ethtool-a- - name: rss attributes: @@ -1611,6 +1627,10 @@ operations: - c33-pse-admin-state - c33-pse-admin-control - c33-pse-pw-d-status + - c33-pse-pw-class + - c33-pse-actual-pw + - c33-pse-ext-state + - c33-pse-ext-substate dump: *pse-get-op - name: pse-set From patchwork Fri Jun 7 07:30:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13689428 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68B5515381B; Fri, 7 Jun 2024 07:30:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745443; cv=none; b=JOz06CzPWBf0YiI8cRi6tZyoAyhcSyiJN69t85v1tx/QiFnVPbFvy6x1XPOom3coSCi4NxryCT63uGCPoiowDXWFjIq755KfD11S23a0yY4RHba6eOgvSgOuXoDCweT6KZHV4a59k2rm9yBowuLWDgrLBXgaE/hu12widCryBvw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745443; c=relaxed/simple; bh=wKMjgK3GIPQQd20gtCcFQwHg9O/bjN2nXRgotur12wc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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bh=PWgiv6Dw2J0CMsQahRN/WS1Vb3ESj1spouLrLT3OBb4=; b=XunuChKwkT8m7BgVIpHDvis4uLT4GlwcWSfBCX1XlW0ZRUjiJyXNGstqZ2Wl8C+VTfBjbQ jCTaz2xXOQx4ZH+Srq98s0t5xbeOw+sRzodKojMQQLlw98cy4ugrraWzrIC9yL1pDHxDqb hYlPANtOOY6ez0LGKmBDwcceXsbje1U/miBpzJtrVPSRjZ1BQU6vz5lESKMnmBGEBsLSqn hpZcZdayfMjW+26v0DxYHB4P+IpkOpf46iG7rpkvBYG7+/rz5Zwr2++/GZarqxeQ/Dbz39 nFbEz/SXexrkXR+N+Lq/t2C4Tq4FYeRgH73Svhi+RsvxQzkfhk5SHi+VSjeRyw== From: Kory Maincent Date: Fri, 07 Jun 2024 09:30:21 +0200 Subject: [PATCH net-next v2 4/8] net: pse-pd: pd692x0: Expand ethtool status message Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-feature_poe_power_cap-v2-4-c03c2deb83ab@bootlin.com> References: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> In-Reply-To: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" This update expands pd692x0_ethtool_get_status() callback with newly introduced details such as the detected class, current power delivered, and extended state information. Signed-off-by: Kory Maincent --- Change in v2: - Move in from string status message to c33_pse_ext_state_info. --- drivers/net/pse-pd/pd692x0.c | 92 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/drivers/net/pse-pd/pd692x0.c b/drivers/net/pse-pd/pd692x0.c index 6488b941703c..6b7367d009d6 100644 --- a/drivers/net/pse-pd/pd692x0.c +++ b/drivers/net/pse-pd/pd692x0.c @@ -73,6 +73,7 @@ enum { PD692X0_MSG_SET_PORT_PARAM, PD692X0_MSG_GET_PORT_STATUS, PD692X0_MSG_DOWNLOAD_CMD, + PD692X0_MSG_GET_PORT_CLASS, /* add new message above here */ PD692X0_MSG_CNT @@ -149,6 +150,12 @@ static const struct pd692x0_msg pd692x0_msg_template_list[PD692X0_MSG_CNT] = { .data = {0x16, 0x16, 0x99, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e}, }, + [PD692X0_MSG_GET_PORT_CLASS] = { + .key = PD692X0_KEY_REQ, + .sub = {0x05, 0xc4}, + .data = {0x4e, 0x4e, 0x4e, 0x4e, + 0x4e, 0x4e, 0x4e, 0x4e}, + }, }; static u8 pd692x0_build_msg(struct pd692x0_msg *msg, u8 echo) @@ -435,6 +442,75 @@ static int pd692x0_pi_is_enabled(struct pse_controller_dev *pcdev, int id) } } +struct pd692x0_pse_ext_state_mapping { + u32 status_code; + enum ethtool_c33_pse_ext_state pse_ext_state; + u8 pse_ext_substate; +}; + +static const struct pd692x0_pse_ext_state_mapping +pd692x0_pse_ext_state_map[] = { + {0x06, ETHTOOL_C33_PSE_EXT_STATE_VOLTAGE_ISSUE, + ETHTOOL_C33_PSE_EXT_SUBSTATE_V_OVERVOLTAGE}, + {0x07, ETHTOOL_C33_PSE_EXT_STATE_VOLTAGE_ISSUE, + ETHTOOL_C33_PSE_EXT_SUBSTATE_V_UNDERVOLTAGE}, + {0x08, ETHTOOL_C33_PSE_EXT_STATE_HARDWARE_ISSUE, 0}, + {0x0C, ETHTOOL_C33_PSE_EXT_STATE_CONFIG, + ETHTOOL_C33_PSE_EXT_SUBSTATE_CFG_UNDEFINED}, + {0x11, ETHTOOL_C33_PSE_EXT_STATE_CONFIG, + ETHTOOL_C33_PSE_EXT_SUBSTATE_CFG_UNDEFINED}, + {0x12, ETHTOOL_C33_PSE_EXT_STATE_HARDWARE_ISSUE, 0}, + {0x1B, ETHTOOL_C33_PSE_EXT_STATE_DETECTION, + ETHTOOL_C33_PSE_EXT_SUBSTATE_DET_IN_PROGRESS}, + {0x1C, ETHTOOL_C33_PSE_EXT_STATE_DETECTION, + ETHTOOL_C33_PSE_EXT_SUBSTATE_DET_FAILURE}, + {0x1E, ETHTOOL_C33_PSE_EXT_STATE_CURRENT_ISSUE, + ETHTOOL_C33_PSE_EXT_SUBSTATE_CRT_UNDERLOAD}, + {0x1F, ETHTOOL_C33_PSE_EXT_STATE_CURRENT_ISSUE, + ETHTOOL_C33_PSE_EXT_SUBSTATE_CRT_OVERLOAD}, + {0x20, ETHTOOL_C33_PSE_EXT_STATE_POWER_BUDGET_EXCEEDED, 0}, + {0x21, ETHTOOL_C33_PSE_EXT_STATE_HARDWARE_ISSUE, 0}, + {0x22, ETHTOOL_C33_PSE_EXT_STATE_CONFIG, + ETHTOOL_C33_PSE_EXT_SUBSTATE_CFG_CHANGED}, + {0x24, ETHTOOL_C33_PSE_EXT_STATE_VOLTAGE_ISSUE, + ETHTOOL_C33_PSE_EXT_SUBSTATE_V_INJECTION}, + {0x25, ETHTOOL_C33_PSE_EXT_STATE_DETECTION, + ETHTOOL_C33_PSE_EXT_SUBSTATE_DET_FAILURE}, + {0x26, ETHTOOL_C33_PSE_EXT_STATE_VOLTAGE_ISSUE, 0}, + {0x34, ETHTOOL_C33_PSE_EXT_STATE_VOLTAGE_ISSUE, + ETHTOOL_C33_PSE_EXT_SUBSTATE_V_SHORT_DETECTED}, + {0x35, ETHTOOL_C33_PSE_EXT_STATE_TEMP_ISSUE, 0}, + {0x36, ETHTOOL_C33_PSE_EXT_STATE_TEMP_ISSUE, 0}, + {0x37, ETHTOOL_C33_PSE_EXT_STATE_UNKNOWN, 0}, + {0x3C, ETHTOOL_C33_PSE_EXT_STATE_POWER_BUDGET_EXCEEDED, 0}, + {0x3D, ETHTOOL_C33_PSE_EXT_STATE_POWER_BUDGET_EXCEEDED, 0}, + {0x41, ETHTOOL_C33_PSE_EXT_STATE_POWER_BUDGET_EXCEEDED, 0}, + {0x43, ETHTOOL_C33_PSE_EXT_STATE_CLASSIFICATION_FAILURE, 0}, + {0xA0, ETHTOOL_C33_PSE_EXT_STATE_HARDWARE_ISSUE, 0}, + {0xA7, ETHTOOL_C33_PSE_EXT_STATE_DETECTION, + ETHTOOL_C33_PSE_EXT_SUBSTATE_DET_FAILURE}, + {0xA8, ETHTOOL_C33_PSE_EXT_STATE_VOLTAGE_ISSUE, + ETHTOOL_C33_PSE_EXT_SUBSTATE_V_OPEN}, + { /* sentinel */ } +}; + +static void +pd692x0_get_ext_state(struct ethtool_c33_pse_ext_state_info *c33_ext_state_info, + u32 status_code) +{ + const struct pd692x0_pse_ext_state_mapping *ext_state_map; + + ext_state_map = pd692x0_pse_ext_state_map; + while (ext_state_map->status_code) { + if (ext_state_map->status_code == status_code) { + c33_ext_state_info->c33_pse_ext_state = ext_state_map->pse_ext_state; + c33_ext_state_info->__c33_pse_ext_substate = ext_state_map->pse_ext_state; + return; + } + ext_state_map++; + } +} + static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, unsigned long id, struct netlink_ext_ack *extack, @@ -442,6 +518,7 @@ static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, { struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); struct pd692x0_msg msg, buf = {0}; + u32 class; int ret; ret = pd692x0_fw_unavailable(priv); @@ -471,6 +548,21 @@ static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, priv->admin_state[id] = status->c33_admin_state; + pd692x0_get_ext_state(&status->c33_ext_state_info, buf.sub[0]); + + status->c33_actual_pw = (buf.data[0] << 4 | buf.data[1]) * 100; + + memset(&buf, 0, sizeof(buf)); + msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_CLASS]; + msg.sub[2] = id; + ret = pd692x0_sendrecv_msg(priv, &msg, &buf); + if (ret < 0) + return ret; + + class = buf.data[3] >> 4; + if (class <= 8) + status->c33_pw_class = class; + return 0; } From patchwork Fri Jun 7 07:30:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13689429 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47F5E1552EF; Fri, 7 Jun 2024 07:30:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="PyfVEk3U" Received: by mail.gandi.net (Postfix) with ESMTPSA id E690940009; Fri, 7 Jun 2024 07:30:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1717745440; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+wBEGqtaq+OZu9K40oURltPWmV587yw0Q9blDuzJ46g=; b=PyfVEk3Uq0kGLvRcE/qsiGagjkhU+UpNKPOGdvApHhh2ykgv0Ddcx35+goHy4OfN6eii3I Hv5lcxJN2vptu2MsJPx8y2+ubuv4vxzvWsN99AItc/tiy9VUqxjZQ+HtFryK6hckxzi9Ci T6aeE6y6h2KiQhtUkgEdvveA7u6noQQ9k8Fz5Xe35ybhxPgQ+lKkKTZh8gQx59TfaWp6/s lpL//MjSuJ1TjSUFFjWCZMFg3HYwBZi0zSiyp9+o4/cxSdWB2RgIWNOohouLYQ5/gSf6JR SOaDpis+pT8icZvVgUFtRH3pQq/Xb7AAiN8iyeBaMf+5ghZCU4R5As5w4UocIg== From: Kory Maincent Date: Fri, 07 Jun 2024 09:30:22 +0200 Subject: [PATCH net-next v2 5/8] net: pse-pd: Add new power limit get and set c33 features Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-feature_poe_power_cap-v2-5-c03c2deb83ab@bootlin.com> References: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> In-Reply-To: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" This patch add a way to get and set the power limit of a PSE PI. For that it uses regulator API callbacks wrapper like get_voltage() and get/set_current_limit() as power is simply V * I. We used mW unit as defined by the IEEE 802.3-2022 standards. set_current_limit() uses the voltage return by get_voltage() and the desired power limit to calculate the current limit. get_voltage() callback is then mandatory to set the power limit. get_current_limit() callback is by default looking at a driver callback and fallback to extracting the current limit from _pse_ethtool_get_status() if the driver does not set its callback. We prefer let the user the choice because ethtool_get_status return much more information than the current limit. Signed-off-by: Kory Maincent --- Change in v2: - Use uA and uV instead of mA and mV to have more precision in the power calculation. Need to use 64bit variables for the calculation. --- drivers/net/pse-pd/pse_core.c | 172 +++++++++++++++++++++++++++++++++++++++--- include/linux/pse-pd/pse.h | 34 +++++++++ 2 files changed, 195 insertions(+), 11 deletions(-) diff --git a/drivers/net/pse-pd/pse_core.c b/drivers/net/pse-pd/pse_core.c index 795ab264eaf2..98da4488a8fe 100644 --- a/drivers/net/pse-pd/pse_core.c +++ b/drivers/net/pse-pd/pse_core.c @@ -265,10 +265,113 @@ static int pse_pi_disable(struct regulator_dev *rdev) return ret; } +static int _pse_pi_get_voltage(struct regulator_dev *rdev) +{ + struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); + const struct pse_controller_ops *ops; + int id; + + ops = pcdev->ops; + if (!ops->pi_get_voltage) + return -EOPNOTSUPP; + + id = rdev_get_id(rdev); + return ops->pi_get_voltage(pcdev, id); +} + +static int pse_pi_get_voltage(struct regulator_dev *rdev) +{ + struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); + int ret; + + mutex_lock(&pcdev->lock); + ret = _pse_pi_get_voltage(rdev); + mutex_unlock(&pcdev->lock); + + return ret; +} + +static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev, + int id, + struct netlink_ext_ack *extack, + struct pse_control_status *status); + +static int pse_pi_get_current_limit(struct regulator_dev *rdev) +{ + struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); + const struct pse_controller_ops *ops; + struct netlink_ext_ack extack = {}; + struct pse_control_status st = {}; + int id, uV, ret; + s64 tmp_64; + + ops = pcdev->ops; + id = rdev_get_id(rdev); + mutex_lock(&pcdev->lock); + if (ops->pi_get_current_limit) { + ret = ops->pi_get_current_limit(pcdev, id); + goto out; + } + + /* If pi_get_current_limit() callback not populated get voltage + * from pi_get_voltage() and power limit from ethtool_get_status() + * to calculate current limit. + */ + ret = _pse_pi_get_voltage(rdev); + if (!ret) { + dev_err(pcdev->dev, "Voltage null\n"); + ret = -ERANGE; + goto out; + } + if (ret < 0) + goto out; + uV = ret; + + ret = _pse_ethtool_get_status(pcdev, id, &extack, &st); + if (ret) + goto out; + + if (!st.c33_pw_limit) { + ret = -ENODATA; + goto out; + } + + tmp_64 = st.c33_pw_limit; + tmp_64 *= 1000000000ull; + /* uA = mW * 1000000000 / uV */ + ret = DIV_ROUND_CLOSEST_ULL(tmp_64, uV); + +out: + mutex_unlock(&pcdev->lock); + return ret; +} + +static int pse_pi_set_current_limit(struct regulator_dev *rdev, int min_uA, + int max_uA) +{ + struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); + const struct pse_controller_ops *ops; + int id, ret; + + ops = pcdev->ops; + if (!ops->pi_set_current_limit) + return -EOPNOTSUPP; + + id = rdev_get_id(rdev); + mutex_lock(&pcdev->lock); + ret = ops->pi_set_current_limit(pcdev, id, max_uA); + mutex_unlock(&pcdev->lock); + + return ret; +} + static const struct regulator_ops pse_pi_ops = { .is_enabled = pse_pi_is_enabled, .enable = pse_pi_enable, .disable = pse_pi_disable, + .get_voltage = pse_pi_get_voltage, + .get_current_limit = pse_pi_get_current_limit, + .set_current_limit = pse_pi_set_current_limit, }; static int @@ -298,7 +401,9 @@ devm_pse_pi_regulator_register(struct pse_controller_dev *pcdev, rdesc->ops = &pse_pi_ops; rdesc->owner = pcdev->owner; - rinit_data->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS; + rinit_data->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS | + REGULATOR_CHANGE_CURRENT; + rinit_data->constraints.max_uA = MAX_PI_CURRENT; rinit_data->supply_regulator = "vpwr"; rconfig.dev = pcdev->dev; @@ -626,6 +731,23 @@ struct pse_control *of_pse_control_get(struct device_node *node) } EXPORT_SYMBOL_GPL(of_pse_control_get); +static int _pse_ethtool_get_status(struct pse_controller_dev *pcdev, + int id, + struct netlink_ext_ack *extack, + struct pse_control_status *status) +{ + const struct pse_controller_ops *ops; + + ops = pcdev->ops; + if (!ops->ethtool_get_status) { + NL_SET_ERR_MSG(extack, + "PSE driver does not support status report"); + return -EOPNOTSUPP; + } + + return ops->ethtool_get_status(pcdev, id, extack, status); +} + /** * pse_ethtool_get_status - get status of PSE control * @psec: PSE control pointer @@ -638,19 +760,10 @@ int pse_ethtool_get_status(struct pse_control *psec, struct netlink_ext_ack *extack, struct pse_control_status *status) { - const struct pse_controller_ops *ops; int err; - ops = psec->pcdev->ops; - - if (!ops->ethtool_get_status) { - NL_SET_ERR_MSG(extack, - "PSE driver does not support status report"); - return -EOPNOTSUPP; - } - mutex_lock(&psec->pcdev->lock); - err = ops->ethtool_get_status(psec->pcdev, psec->id, extack, status); + err = _pse_ethtool_get_status(psec->pcdev, psec->id, extack, status); mutex_unlock(&psec->pcdev->lock); return err; @@ -732,6 +845,43 @@ int pse_ethtool_set_config(struct pse_control *psec, } EXPORT_SYMBOL_GPL(pse_ethtool_set_config); +/** + * pse_ethtool_set_pw_limit - set PSE control power limit + * @psec: PSE control pointer + * @extack: extack for reporting useful error messages + * @pw_limit: power limit value in mW + * + * Return: 0 on success and failure value on error + */ +int pse_ethtool_set_pw_limit(struct pse_control *psec, + struct netlink_ext_ack *extack, + const unsigned int pw_limit) +{ + int uV, uA, ret; + s64 tmp_64; + + ret = regulator_get_voltage(psec->ps); + if (!ret) { + NL_SET_ERR_MSG(extack, + "Can't read current voltage"); + return ret; + } + if (ret < 0) { + NL_SET_ERR_MSG(extack, + "Error reading current voltage"); + return ret; + } + uV = ret; + + tmp_64 = pw_limit; + tmp_64 *= 1000000000ull; + /* uA = mW * 1000000000 / uV */ + uA = DIV_ROUND_CLOSEST_ULL(tmp_64, uV); + + return regulator_set_current_limit(psec->ps, 0, uA); +} +EXPORT_SYMBOL_GPL(pse_ethtool_set_pw_limit); + bool pse_has_podl(struct pse_control *psec) { return psec->pcdev->types & ETHTOOL_PSE_PODL; diff --git a/include/linux/pse-pd/pse.h b/include/linux/pse-pd/pse.h index 38b9308e5e7a..e9a7f0e5e555 100644 --- a/include/linux/pse-pd/pse.h +++ b/include/linux/pse-pd/pse.h @@ -9,6 +9,9 @@ #include #include +/* Maximum current in uA according to IEEE 802.3-2022 Table 145-1 */ +#define MAX_PI_CURRENT 1920000 + struct phy_device; struct pse_controller_dev; @@ -41,6 +44,7 @@ struct pse_control_config { * @c33_actual_pw: power currently delivered by the PSE in mW * IEEE 802.3-2022 30.9.1.1.23 aPSEActualPower * @c33_ext_state_info: extended state information of the PSE + * @c33_pw_limit: power limit of the PSE */ struct pse_control_status { enum ethtool_podl_pse_admin_state podl_admin_state; @@ -50,6 +54,7 @@ struct pse_control_status { u32 c33_pw_class; u32 c33_actual_pw; struct ethtool_c33_pse_ext_state_info c33_ext_state_info; + u32 c33_pw_limit; }; /** @@ -61,6 +66,12 @@ struct pse_control_status { * May also return negative errno. * @pi_enable: Configure the PSE PI as enabled. * @pi_disable: Configure the PSE PI as disabled. + * @pi_get_voltage: Return voltage similarly to get_voltage regulator + * callback. + * @pi_get_current_limit: Get the configured current limit similarly to + * get_current_limit regulator callback. + * @pi_set_current_limit: Configure the current limit similarly to + * set_current_limit regulator callback. */ struct pse_controller_ops { int (*ethtool_get_status)(struct pse_controller_dev *pcdev, @@ -70,6 +81,11 @@ struct pse_controller_ops { int (*pi_is_enabled)(struct pse_controller_dev *pcdev, int id); int (*pi_enable)(struct pse_controller_dev *pcdev, int id); int (*pi_disable)(struct pse_controller_dev *pcdev, int id); + int (*pi_get_voltage)(struct pse_controller_dev *pcdev, int id); + int (*pi_get_current_limit)(struct pse_controller_dev *pcdev, + int id); + int (*pi_set_current_limit)(struct pse_controller_dev *pcdev, + int id, int max_uA); }; struct module; @@ -156,6 +172,11 @@ int pse_ethtool_get_status(struct pse_control *psec, int pse_ethtool_set_config(struct pse_control *psec, struct netlink_ext_ack *extack, const struct pse_control_config *config); +int pse_ethtool_set_pw_limit(struct pse_control *psec, + struct netlink_ext_ack *extack, + const unsigned int pw_limit); +int pse_ethtool_get_pw_limit(struct pse_control *psec, + struct netlink_ext_ack *extack); bool pse_has_podl(struct pse_control *psec); bool pse_has_c33(struct pse_control *psec); @@ -185,6 +206,19 @@ static inline int pse_ethtool_set_config(struct pse_control *psec, return -EOPNOTSUPP; } +static inline int pse_ethtool_set_pw_limit(struct pse_control *psec, + struct netlink_ext_ack *extack, + const unsigned int pw_limit) +{ + return -EOPNOTSUPP; +} + +static inline int pse_ethtool_get_pw_limit(struct pse_control *psec, + struct netlink_ext_ack *extack) +{ + return -EOPNOTSUPP; +} + static inline bool pse_has_podl(struct pse_control *psec) { return false; From patchwork Fri Jun 7 07:30:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13689430 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B04E115530F; Fri, 7 Jun 2024 07:30:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745444; cv=none; b=FdQx/Wc4yIVL6wIV+ZSLrZL/igmNG9Vt9uHK40vjwukLiM6clBQe9hvn+7X4GGzBS+4ENFMb3ILFyQGrS9w2qR9UzhETqpDr/BSfj2Jkr9Sbf1ebZXWvJN+UYikIYt/n7pZJeL+YICAl7d5e3s5QMbQvoomUDDvloOlYc3CJAxQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Fri, 7 Jun 2024 07:30:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1717745441; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gkpOAyKbzUUqntYuBj/ZLM7EdvYb+d5LGE5Tip8ZYTU=; b=W1CJB+yML0dK69BE5uUu0y98k2tcBGUVEhArQLMDYU1NiOIkzhHNZRT+Z1Gphh79IdpYJC rE4/i7nN8qp9o3mWiTzTUclt8gnLV+W5y8bwfEtfr6RjW7PIkancQkdAmpj4AEeHaZym23 NuFDz+0sOxIXRG14ftZJFYX4gIc7iOolKeCPWIKHzT++/6E3Pj8IlXVuND2lNR8DjGcTOR Jfinj+4d6ckoSjgYbIXnMR7zlzfk6j2je6BaAYohRYlNjG2PtLFb7zmJ4s682Ns3NhsDAT ehTe5wJeyTSOhjURZ5EnGy+W+vy0Yfo7G4qhMCeTJW+LQxd3ya9DagNmFJZaWw== From: Kory Maincent Date: Fri, 07 Jun 2024 09:30:23 +0200 Subject: [PATCH net-next v2 6/8] net: ethtool: Add new power limit get and set features Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-feature_poe_power_cap-v2-6-c03c2deb83ab@bootlin.com> References: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> In-Reply-To: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" This patch expands the status information provided by ethtool for PSE c33 with power limit. It also adds a call to pse_ethtool_set_pw_limit() to configure the PSE control power limit. Signed-off-by: Kory Maincent --- include/uapi/linux/ethtool_netlink.h | 1 + net/ethtool/pse-pd.c | 42 ++++++++++++++++++++++++++++++------ 2 files changed, 36 insertions(+), 7 deletions(-) diff --git a/include/uapi/linux/ethtool_netlink.h b/include/uapi/linux/ethtool_netlink.h index ccbe8294dfd5..0a39aae8ccfd 100644 --- a/include/uapi/linux/ethtool_netlink.h +++ b/include/uapi/linux/ethtool_netlink.h @@ -919,6 +919,7 @@ enum { ETHTOOL_A_C33_PSE_ACTUAL_PW, /* u32 */ ETHTOOL_A_C33_PSE_EXT_STATE, /* u8 */ ETHTOOL_A_C33_PSE_EXT_SUBSTATE, /* u8 */ + ETHTOOL_A_C33_PSE_PW_LIMIT, /* u32 */ /* add new constants above here */ __ETHTOOL_A_PSE_CNT, diff --git a/net/ethtool/pse-pd.c b/net/ethtool/pse-pd.c index 3d74cfe7765b..b4462a51c006 100644 --- a/net/ethtool/pse-pd.c +++ b/net/ethtool/pse-pd.c @@ -94,6 +94,9 @@ static int pse_reply_size(const struct ethnl_req_info *req_base, len += nla_total_size(sizeof(u8)); /* _C33_PSE_EXT_STATE */ if (st->c33_ext_state_info.__c33_pse_ext_substate) len += nla_total_size(sizeof(u8)); /* _C33_PSE_EXT_SUBSTATE */ + if (st->c33_pw_limit > 0) + len += nla_total_size(sizeof(u32)); /* _C33_PSE_PW_LIMIT */ + return len; } @@ -144,6 +147,11 @@ static int pse_fill_reply(struct sk_buff *skb, st->c33_ext_state_info.__c33_pse_ext_substate)) return -EMSGSIZE; + if (st->c33_pw_limit > 0 && + nla_put_u32(skb, ETHTOOL_A_C33_PSE_PW_LIMIT, + st->c33_pw_limit)) + return -EMSGSIZE; + return 0; } @@ -157,6 +165,7 @@ const struct nla_policy ethnl_pse_set_policy[ETHTOOL_A_PSE_MAX + 1] = { [ETHTOOL_A_C33_PSE_ADMIN_CONTROL] = NLA_POLICY_RANGE(NLA_U32, ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED, ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED), + [ETHTOOL_A_C33_PSE_PW_LIMIT] = { .type = NLA_U32 }, }; static int @@ -199,19 +208,38 @@ static int ethnl_set_pse(struct ethnl_req_info *req_info, struct genl_info *info) { struct net_device *dev = req_info->dev; - struct pse_control_config config = {}; struct nlattr **tb = info->attrs; struct phy_device *phydev; + int ret = 0; phydev = dev->phydev; + + if (tb[ETHTOOL_A_C33_PSE_PW_LIMIT]) { + unsigned int pw_limit = nla_get_u32(tb[ETHTOOL_A_C33_PSE_PW_LIMIT]); + + ret = pse_ethtool_set_pw_limit(phydev->psec, info->extack, + pw_limit); + if (ret) + return ret; + } + /* These values are already validated by the ethnl_pse_set_policy */ - if (pse_has_podl(phydev->psec)) - config.podl_admin_control = nla_get_u32(tb[ETHTOOL_A_PODL_PSE_ADMIN_CONTROL]); - if (pse_has_c33(phydev->psec)) - config.c33_admin_control = nla_get_u32(tb[ETHTOOL_A_C33_PSE_ADMIN_CONTROL]); + if (tb[ETHTOOL_A_PODL_PSE_ADMIN_CONTROL] || + tb[ETHTOOL_A_C33_PSE_ADMIN_CONTROL]) { + struct pse_control_config config = {}; + + if (pse_has_podl(phydev->psec)) + config.podl_admin_control = nla_get_u32(tb[ETHTOOL_A_PODL_PSE_ADMIN_CONTROL]); + if (pse_has_c33(phydev->psec)) + config.c33_admin_control = nla_get_u32(tb[ETHTOOL_A_C33_PSE_ADMIN_CONTROL]); + + ret = pse_ethtool_set_config(phydev->psec, info->extack, + &config); + if (ret) + return ret; + } - /* Return errno directly - PSE has no notification */ - return pse_ethtool_set_config(phydev->psec, info->extack, &config); + return ret; } const struct ethnl_request_ops ethnl_pse_request_ops = { From patchwork Fri Jun 7 07:30:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13689431 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A50A15534C; Fri, 7 Jun 2024 07:30:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745445; cv=none; b=NiXde4qiH3iU3SoB+QcJpsw+ANTiPLZrO3wAXwOfbwnDzE++Ebp8fX8Sljjglf7oANj/S3WW3RnrDQtxUjyPMYdzyObXZ4vWX6tj6nqrhInCOJkU3Z+VGinV6gD0Qe9jexGAramSslrqCke6wox4elW5+C2gNNjWl9S6sqgkrP0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Fri, 7 Jun 2024 07:30:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1717745441; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ETcQo3/lCpjKaBqd4qw9hp9h/4mN/7uO4H2vg+CP6hs=; b=TzrLoCrAflV9u844zNVt1YqWjGwpLlIqz3LYdcdTH0k+fH+G/WM57A/cw8flZx2CK4Vf2x lOUSZJ3PVDz7DC8f6y2MXFRk5TeYLVOotOPfVIYuh/uH21sPfnCPccbuxjtO5TQYHXCOsb IaxGbll9JdOKzPH2gzWDNtxvvfHkpEhvf/j8eQqW67bmur0SWaIc2RJVkyepjeqfJryb+G Guv/wGmCpmYiu6xv0fCypYe4yhXvgYSkrD5HF55yGCnZ7a6hot0U02ZdsYaeru+jF1bUwE F5kPDZeEdXsc+J3iN527QyAV8+4r0y8wAxCTfP2TBV6vZwm37MGcZr073zUShw== From: Kory Maincent Date: Fri, 07 Jun 2024 09:30:24 +0200 Subject: [PATCH net-next v2 7/8] netlink: specs: Expand the PSE netlink command with C33 pw-limit attributes Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-feature_poe_power_cap-v2-7-c03c2deb83ab@bootlin.com> References: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> In-Reply-To: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" Expand the c33 PSE attributes with power limit to be able to set and get the PSE Power Interface power limit. ./ynl/cli.py --spec netlink/specs/ethtool.yaml --no-schema --do pse-get --json '{"header":{"dev-name":"eth2"}}' {'c33-pse-actual-pw': 1700, 'c33-pse-admin-state': 3, 'c33-pse-pw-class': 4, 'c33-pse-pw-d-status': 4, 'c33-pse-pw-limit': 90000, 'header': {'dev-index': 6, 'dev-name': 'eth2'}} ./ynl/cli.py --spec netlink/specs/ethtool.yaml --no-schema --do pse-set --json '{"header":{"dev-name":"eth2"}, "c33-pse-pw-limit":19000}' None Signed-off-by: Kory Maincent --- Documentation/netlink/specs/ethtool.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/netlink/specs/ethtool.yaml b/Documentation/netlink/specs/ethtool.yaml index 8aa064f2f466..1759b42975ae 100644 --- a/Documentation/netlink/specs/ethtool.yaml +++ b/Documentation/netlink/specs/ethtool.yaml @@ -938,6 +938,10 @@ attribute-sets: name: c33-pse-ext-substate type: u8 name-prefix: ethtool-a- + - + name: c33-pse-pw-limit + type: u32 + name-prefix: ethtool-a- - name: rss attributes: @@ -1631,6 +1635,7 @@ operations: - c33-pse-actual-pw - c33-pse-ext-state - c33-pse-ext-substate + - c33-pse-pw-limit dump: *pse-get-op - name: pse-set From patchwork Fri Jun 7 07:30:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kory Maincent X-Patchwork-Id: 13689432 X-Patchwork-Delegate: kuba@kernel.org Received: from relay2-d.mail.gandi.net (relay2-d.mail.gandi.net [217.70.183.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 029F31553AF; Fri, 7 Jun 2024 07:30:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.194 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745446; cv=none; b=kT5dCIib7vkCEGYJG6Vh43Hus3HJHbMifefGurzA6KPgaAmB+wcQEzeUfqdfpKQZrloKzZ5a4e0mTRBlcc8hzVceB3nlkqDijQTwzpPA9C7YGcY9cwd08h76nplqYG4tDb2tNZ6XcAHSmnXvd0cqhTRQIzEbLoJLRmbsgjQGt/0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717745446; c=relaxed/simple; bh=nclUHiO5gvB5PY2/xvF2HtvGK7qS6AnG7bkx7YUzeGE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RCaehz9SE5yeQTevJ4TgOQ+83mx5UCxN3FJ1IXtJ2m2SxCC7yz1P4CmCdxYG2QVmdRprwNdLrr+i5oowph/yWlITxNUCewF5Pxyw//SG4zth2Yg8Ib4RNc2hawOICVjbi9yF5+7kJzxBlHr0if/0QzBnNZK6XyEpF1cpvWQsjRs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=MT4HxJbg; arc=none smtp.client-ip=217.70.183.194 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="MT4HxJbg" Received: by mail.gandi.net (Postfix) with ESMTPSA id F26444000D; Fri, 7 Jun 2024 07:30:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1717745442; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6ntSTNeXccNfT0VJp5Rsgt/AU8amS/pkFoZRsCOGOeU=; b=MT4HxJbgmzKPOjxmyKZoBBYvTRsWYYqVZW2EYMUK+XwkkbAqlj15r7axMYXJgnz/0dqDPg RPnXwV+3sJzdM45eYumQJ3q/SqYrsvU1XmRMvlmbB8lXonT+RQgik68MxglXisn1vFgHd8 bpPPx+WznI2TnQUteK3oZSUD+ImbQVdlOqhyGhiQOoh47X5/dkTIgKVwGBX35jRF2hwcva m2Av59k3foq6Cn9MHrNkYvJd2IhP8lcIgPID+Xv8aAReL5WjIC/jp3g605xoUpaYbK1qou p7f0wm/XtCJ+4NuD5t4bPqPT2mbZSmx+R8kXNC5IkAq1YUieNHpCZmlDij6f+A== From: Kory Maincent Date: Fri, 07 Jun 2024 09:30:25 +0200 Subject: [PATCH net-next v2 8/8] net: pse-pd: pd692x0: Enhance with new current limit and voltage read callbacks Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-feature_poe_power_cap-v2-8-c03c2deb83ab@bootlin.com> References: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> In-Reply-To: <20240607-feature_poe_power_cap-v2-0-c03c2deb83ab@bootlin.com> To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Donald Hunter , Oleksij Rempel Cc: Thomas Petazzoni , linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Dent Project , kernel@pengutronix.de, Kory Maincent X-Mailer: b4 0.14-dev X-GND-Sasl: kory.maincent@bootlin.com X-Patchwork-Delegate: kuba@kernel.org From: "Kory Maincent (Dent Project)" This patch expands PSE callbacks with newly introduced pi_get/set_current_limit() and pi_get_voltage() callback. The only way to set ps692x0 port power limit is by configure the power class plus a small power supplement which maximum depends on each class. Signed-off-by: Kory Maincent --- Change in v2: - Use uA and uV instead of mA and mV to have more precision in the power calculation. Need to use 64bit variables for the calculation. - Modify the behavior in case of setting the current out of the available ranges. Report an error now. --- drivers/net/pse-pd/pd692x0.c | 193 ++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 191 insertions(+), 2 deletions(-) diff --git a/drivers/net/pse-pd/pd692x0.c b/drivers/net/pse-pd/pd692x0.c index 6b7367d009d6..4425e4ba2cfb 100644 --- a/drivers/net/pse-pd/pd692x0.c +++ b/drivers/net/pse-pd/pd692x0.c @@ -74,6 +74,8 @@ enum { PD692X0_MSG_GET_PORT_STATUS, PD692X0_MSG_DOWNLOAD_CMD, PD692X0_MSG_GET_PORT_CLASS, + PD692X0_MSG_GET_PORT_MEAS, + PD692X0_MSG_GET_PORT_PARAM, /* add new message above here */ PD692X0_MSG_CNT @@ -135,7 +137,7 @@ static const struct pd692x0_msg pd692x0_msg_template_list[PD692X0_MSG_CNT] = { [PD692X0_MSG_SET_PORT_PARAM] = { .key = PD692X0_KEY_CMD, .sub = {0x05, 0xc0}, - .data = { 0, 0xff, 0xff, 0xff, + .data = { 0xf, 0xff, 0xff, 0xff, 0x4e, 0x4e, 0x4e, 0x4e}, }, [PD692X0_MSG_GET_PORT_STATUS] = { @@ -156,6 +158,18 @@ static const struct pd692x0_msg pd692x0_msg_template_list[PD692X0_MSG_CNT] = { .data = {0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e, 0x4e}, }, + [PD692X0_MSG_GET_PORT_MEAS] = { + .key = PD692X0_KEY_REQ, + .sub = {0x05, 0xc5}, + .data = {0x4e, 0x4e, 0x4e, 0x4e, + 0x4e, 0x4e, 0x4e, 0x4e}, + }, + [PD692X0_MSG_GET_PORT_PARAM] = { + .key = PD692X0_KEY_REQ, + .sub = {0x05, 0xc0}, + .data = {0x4e, 0x4e, 0x4e, 0x4e, + 0x4e, 0x4e, 0x4e, 0x4e}, + }, }; static u8 pd692x0_build_msg(struct pd692x0_msg *msg, u8 echo) @@ -511,6 +525,85 @@ pd692x0_get_ext_state(struct ethtool_c33_pse_ext_state_info *c33_ext_state_info, } } +struct pd692x0_class_pw { + int class; + int class_cfg_value; + int class_pw; + int max_added_class_pw; +}; + +/* 4/2 pairs class configuration power table in compliance mode. + * Need to be arranged in ascending order of power support. + */ +static const struct pd692x0_class_pw pd692x0_class_pw_table[] = { + {.class = 3, .class_cfg_value = 0x3, .class_pw = 15000, .max_added_class_pw = 3100}, + {.class = 4, .class_cfg_value = 0x2, .class_pw = 30000, .max_added_class_pw = 8000}, + {.class = 6, .class_cfg_value = 0x1, .class_pw = 60000, .max_added_class_pw = 5000}, + {.class = 8, .class_cfg_value = 0x0, .class_pw = 90000, .max_added_class_pw = 7500}, + { /* sentinel */ } +}; + +static int pd692x0_pi_get_pw_from_table(int op_mode, int added_pw) +{ + const struct pd692x0_class_pw *pw_table; + + pw_table = pd692x0_class_pw_table; + while (pw_table->class) { + if (pw_table->class_cfg_value == op_mode) + return pw_table->class_pw + added_pw * 100; + + pw_table++; + } + + return -ERANGE; +} + +static int pd692x0_pi_set_pw_from_table(struct device *dev, + struct pd692x0_msg *msg, int pw) +{ + const struct pd692x0_class_pw *pw_table; + + pw_table = pd692x0_class_pw_table; + if (pw < pw_table->class_pw) { + dev_err(dev, + "Power limit %dmW not supported. Ranges minimal available: [%d-%d]\n", + pw, + pw_table->class_pw, + pw_table->class_pw + pw_table->max_added_class_pw); + return -ERANGE; + } + + while (pw_table->class) { + if (pw > (pw_table->class_pw + pw_table->max_added_class_pw)) { + pw_table++; + continue; + } + + if (pw < pw_table->class_pw) { + dev_err(dev, + "Power limit %dmW not supported. Ranges availables: [%d-%d] or [%d-%d]\n", + pw, + (pw_table - 1)->class_pw, + (pw_table - 1)->class_pw + (pw_table - 1)->max_added_class_pw, + pw_table->class_pw, + pw_table->class_pw + pw_table->max_added_class_pw); + return -ERANGE; + } + + msg->data[2] = pw_table->class_cfg_value; + msg->data[3] = (pw - pw_table->class_pw) / 100; + return 0; + } + + pw_table--; + dev_warn(dev, + "Power limit %dmW not supported. Set to highest power limit %dmW\n", + pw, pw_table->class_pw + pw_table->max_added_class_pw); + msg->data[2] = pw_table->class_cfg_value; + msg->data[3] = pw_table->max_added_class_pw / 100; + return 0; +} + static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, unsigned long id, struct netlink_ext_ack *extack, @@ -549,9 +642,20 @@ static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, priv->admin_state[id] = status->c33_admin_state; pd692x0_get_ext_state(&status->c33_ext_state_info, buf.sub[0]); - status->c33_actual_pw = (buf.data[0] << 4 | buf.data[1]) * 100; + msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_PARAM]; + msg.sub[2] = id; + memset(&buf, 0, sizeof(buf)); + ret = pd692x0_sendrecv_msg(priv, &msg, &buf); + if (ret < 0) + return ret; + + ret = pd692x0_pi_get_pw_from_table(buf.data[0], buf.data[1]); + if (ret < 0) + return ret; + status->c33_pw_limit = ret; + memset(&buf, 0, sizeof(buf)); msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_CLASS]; msg.sub[2] = id; @@ -841,12 +945,97 @@ static int pd692x0_setup_pi_matrix(struct pse_controller_dev *pcdev) return ret; } +static int pd692x0_pi_get_voltage(struct pse_controller_dev *pcdev, int id) +{ + struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); + struct pd692x0_msg msg, buf = {0}; + int ret; + + ret = pd692x0_fw_unavailable(priv); + if (ret) + return ret; + + msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_MEAS]; + msg.sub[2] = id; + ret = pd692x0_sendrecv_msg(priv, &msg, &buf); + if (ret < 0) + return ret; + + /* Convert 0.1V unit to uV */ + return (buf.sub[0] << 8 | buf.sub[1]) * 100000; +} + +static int pd692x0_pi_get_current_limit(struct pse_controller_dev *pcdev, + int id) +{ + struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); + struct pd692x0_msg msg, buf = {0}; + int mW, uV, uA, ret; + s64 tmp_64; + + msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_PARAM]; + msg.sub[2] = id; + ret = pd692x0_sendrecv_msg(priv, &msg, &buf); + if (ret < 0) + return ret; + + ret = pd692x0_pi_get_pw_from_table(buf.data[2], buf.data[3]); + if (ret < 0) + return ret; + mW = ret; + + ret = pd692x0_pi_get_voltage(pcdev, id); + if (ret < 0) + return ret; + uV = ret; + + tmp_64 = mW; + tmp_64 *= 1000000000ull; + /* uA = mW * 1000000000 / uV */ + uA = DIV_ROUND_CLOSEST_ULL(tmp_64, uV); + return uA; +} + +static int pd692x0_pi_set_current_limit(struct pse_controller_dev *pcdev, + int id, int max_uA) +{ + struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); + struct device *dev = &priv->client->dev; + struct pd692x0_msg msg, buf = {0}; + int uV, ret, mW; + s64 tmp_64; + + ret = pd692x0_fw_unavailable(priv); + if (ret) + return ret; + + ret = pd692x0_pi_get_voltage(pcdev, id); + if (ret < 0) + return ret; + uV = ret; + + msg = pd692x0_msg_template_list[PD692X0_MSG_SET_PORT_PARAM]; + msg.sub[2] = id; + tmp_64 = uV; + tmp_64 *= max_uA; + /* mW = uV * uA / 1000000000 */ + mW = DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000); + ret = pd692x0_pi_set_pw_from_table(dev, &msg, mW); + if (ret) + return ret; + + return pd692x0_sendrecv_msg(priv, &msg, &buf); +} + static const struct pse_controller_ops pd692x0_ops = { .setup_pi_matrix = pd692x0_setup_pi_matrix, .ethtool_get_status = pd692x0_ethtool_get_status, .pi_enable = pd692x0_pi_enable, .pi_disable = pd692x0_pi_disable, .pi_is_enabled = pd692x0_pi_is_enabled, + .pi_get_voltage = pd692x0_pi_get_voltage, + .pi_get_current_limit = pd692x0_pi_get_current_limit, + .pi_set_current_limit = pd692x0_pi_set_current_limit, }; #define PD692X0_FW_LINE_MAX_SZ 0xff