From patchwork Fri Jun 7 14:53:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dumitru Ceclan via B4 Relay X-Patchwork-Id: 13690293 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6FFE419AD4B; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717771989; cv=none; b=n8/Yt3Cv95SEVoEkHPEbgmXceo8KlwOJiGX+yyxCLs+qxkL8LrxFReuOlqRYs9qW54tnXmA+4ptRC+VNrJlOPqrqgbPVuXoXi+UCSqUYm6ppk2AwFEV3rI0EiP1XX3c5rl4VfEw00HgHpKLDhMNFxEd6yhcD0OIiPkA8hReVcqg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717771989; c=relaxed/simple; bh=6kCCkX7oEiTVbrjZ0mC374x6Q9o8/coYWFgv4Qj3ums=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sPJk0uAt/0qePY5pO0ENWJi+Ne5fnQ5h+CFsuvDKIFZD2YGbXC6OTzjSVJ61jYD7E4N6u4aziehJKOF0lhbPn7k1c0zwXr8p0yRKevUKphjpgz4usq+PVXdkBmyCzhthNXXu5Qy2vZKk/9oZPqacP2SCpfs3MV7XN8fuG9DMI2U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZdfKIWSc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZdfKIWSc" Received: by smtp.kernel.org (Postfix) with ESMTPS id 19350C32786; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717771989; bh=6kCCkX7oEiTVbrjZ0mC374x6Q9o8/coYWFgv4Qj3ums=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ZdfKIWScN6EdP6GLiks4/zTf7A/PSp4izvDITUCP1UTQ4JM+nrp1vNujxKQdTS6eY e835xGdDnuDPBXWph3E2HmACrEl87VzDVXewL2f6Fbof0E/FRsR7XCGTeqeNWhQNAa vGtYEATdjAtBPWVhOgrn/ztJm9MWxTOv+2UT49yrxqAcgOgGCjYpkE7wrtFoi6Eyc3 AUguSYd0p61558ivuBmaFv3M3sH+BWE+CWuLU+1QtZb0GGSy62pgQsVJkYn9EiPzih klI33GyiZ2mjqMouOv9Hyt34expk7xUEIYt3Qr7KJPXyjH5WriUOCHRV33mWO/BDmb nAmQJwt33uclA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02C4BC27C6E; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) From: Dumitru Ceclan via B4 Relay Date: Fri, 07 Jun 2024 17:53:07 +0300 Subject: [PATCH v7 1/9] dt-bindings: iio: adc: Add common-mode-channel property Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-ad4111-v7-1-97e3855900a0@analog.com> References: <20240607-ad4111-v7-0-97e3855900a0@analog.com> In-Reply-To: <20240607-ad4111-v7-0-97e3855900a0@analog.com> To: Ceclan Dumitru Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dumitru Ceclan , Conor Dooley X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717771987; l=1665; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=7+gdjeLzhs0nsD3z5zCT8lTNIXL7WwI7n9Ywy4A7eJY=; b=jzqeOuqC5FOT7DWFbPvNyAz0YOCO86yLAdDJzo5WDcgWNJVfcilm0iCrVq+zmPGq4+XP0siyi Tytzh9MbUIpDJZDB95ur5mwwPUgMx2tBtHWdrXuz5JPu1Z0gVYk8gBh X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= X-Endpoint-Received: by B4 Relay for dumitru.ceclan@analog.com/20240313 with auth_id=140 X-Original-From: Dumitru Ceclan Reply-To: dumitru.ceclan@analog.com From: Dumitru Ceclan There are ADCs that are differential but support to measure single-ended signals on the same channels by connecting a constant voltage to the negative input pin. This property allows to properly define a single-ended channel that requires two inputs to be specified. Software can use the presence of this property to mark the channel as not differential. Reviewed-by: Conor Dooley Signed-off-by: Dumitru Ceclan --- Documentation/devicetree/bindings/iio/adc/adc.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adc.yaml b/Documentation/devicetree/bindings/iio/adc/adc.yaml index 0a77592f7388..8e7835cf36fd 100644 --- a/Documentation/devicetree/bindings/iio/adc/adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adc.yaml @@ -46,6 +46,17 @@ properties: differential channels). If this and diff-channels are not present reg shall be used instead. + common-mode-channel: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Some ADCs have differential input pins that can be used to measure + single-ended or pseudo-differential inputs. This property can be used + in addition to single-channel to signal software that this channel is + not differential but still specify two inputs. + + The input pair is specified by setting single-channel to the positive + input pin and common-mode-channel to the negative pin. + settling-time-us: description: Time between enabling the channel and first stable readings. From patchwork Fri Jun 7 14:53:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dumitru Ceclan via B4 Relay X-Patchwork-Id: 13690294 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 843C319AD4E; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717771989; cv=none; b=kdnbM7k3RuZXNl7iprpysSE000k6BtS6toryqRwCQlU43PLBfNF0RvFUIWV+hu9eNHmBmSQiI/DNnaCS+aFMGC9TJIsS95+69wcmh2ivXm451tUs//ruB5ubUIAOUQJIiObroAegRyZQwJbM3/MjuuKX1LPagCXrM0aItd287gU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717771989; c=relaxed/simple; bh=xcuxBrlSws3J8lQ6OqB/YCoAxggGql0QiFdu4jtoQoA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=btah4ejKShJ9SXYGtP4IiCrsXEpq/NBw8luPVU7KtC1v7ZlgqD/zVDaqrVea52HqYKKiAsjCbnFQcZDmlwU9S4XQYF6FrkEN0OHUhtW0ko3zPu5pNE+KWKEdTBHmJjtsELb+FrNT0xOfgx20A9iioJi2haPcrk0pA9LfTds/ckA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=EVQh/KfG; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="EVQh/KfG" Received: by smtp.kernel.org (Postfix) with ESMTPS id 2E5AFC3277B; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717771989; bh=xcuxBrlSws3J8lQ6OqB/YCoAxggGql0QiFdu4jtoQoA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=EVQh/KfG+lUF8UCGi+EGW+0sX/Gn3cDdr8Ig/fTtdQmr+pu5nSQsdcxBBN3xJUYsI sGUpjDF/Dbbr+virNcchVvuCRVzq7hY4nWNPGfN6pmLer/ATJwLTOHwXq981UcRNEo cA+3caq8TsoanvwkvONPhDhwBWltKvDnbqAIfxfBECC9jISB9DsB6OawbT4QVXrhJ8 C16AzB3t1WkKkZbrXCSGX/Umn58HMc1cMBXGncYyew0LtlihTiPo1ZtHZt/i6c3aqe LwmHu02EHljBbsybQ9huNEKFPGKO4MZ2l2CUVyxEnZ90DkOneEVMtJnOxoSaLvdrLA 9YuOJo7D9dFVA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1AD0FC27C6F; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) From: Dumitru Ceclan via B4 Relay Date: Fri, 07 Jun 2024 17:53:08 +0300 Subject: [PATCH v7 2/9] dt-bindings: adc: ad7173: add support for ad411x Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-ad4111-v7-2-97e3855900a0@analog.com> References: <20240607-ad4111-v7-0-97e3855900a0@analog.com> In-Reply-To: <20240607-ad4111-v7-0-97e3855900a0@analog.com> To: Ceclan Dumitru Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dumitru Ceclan , Conor Dooley X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717771987; l=8825; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=p0G0qMDrHbK+iwW+sUbPCXvkkGSNrw1aRc71eyBZ1K4=; b=QFowa7dDbRnk6QIu7dzMTsBbtU3hnjiE+vwXXjNAr4UrpPGlUyH7SFUjPRY/c+Ua5OkuBw21b PJ9uosuS7vnCAhskIRivODdi+aNwNd1dwWldQvTjf9+Rac+O8E0jqiM X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= X-Endpoint-Received: by B4 Relay for dumitru.ceclan@analog.com/20240313 with auth_id=140 X-Original-From: Dumitru Ceclan Reply-To: dumitru.ceclan@analog.com From: Dumitru Ceclan Add support for: AD4111, AD4112, AD4114, AD4115, AD4116. AD411x family ADCs support a VCOM pin. The purpose of this pin is to offer a dedicated common-mode voltage input for single-ended channels. This pin is specified as supporting a differential channel with VIN10 on model AD4116. AD4111/AD4112 support current channels. Support is implemented using single-channel and "adi,current-channel". Reviewed-by: Conor Dooley Signed-off-by: Dumitru Ceclan --- .../devicetree/bindings/iio/adc/adi,ad7173.yaml | 194 ++++++++++++++++++++- 1 file changed, 192 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml index ea6cfcd0aff4..17c5d39cc2c1 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7173.yaml @@ -19,7 +19,18 @@ description: | primarily for measurement of signals close to DC but also delivers outstanding performance with input bandwidths out to ~10kHz. + Analog Devices AD411x ADC's: + The AD411X family encompasses a series of low power, low noise, 24-bit, + sigma-delta analog-to-digital converters that offer a versatile range of + specifications. They integrate an analog front end suitable for processing + fully differential/single-ended and bipolar voltage inputs. + Datasheets for supported chips: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD4112.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD4114.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD4115.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD4116.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-2.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD7172-4.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD7173-8.pdf @@ -31,6 +42,11 @@ description: | properties: compatible: enum: + - adi,ad4111 + - adi,ad4112 + - adi,ad4114 + - adi,ad4115 + - adi,ad4116 - adi,ad7172-2 - adi,ad7172-4 - adi,ad7173-8 @@ -129,10 +145,56 @@ patternProperties: maximum: 15 diff-channels: + description: | + This property is used for defining the inputs of a differential + voltage channel. The first value is the positive input and the second + value is the negative input of the channel. + + Family AD411x supports a dedicated VINCOM voltage input. + To select it set the second channel to 16. + (VIN2, VINCOM) -> diff-channels = <2 16> + + There are special values that can be selected besides the voltage + analog inputs: + 21: REF+ + 22: REF− + + Supported only by AD7172-2, AD7172-4, AD7175-2, AD7175-8, AD7177-2, + must be paired together and can be used to monitor the power supply + of the ADC: + 19: ((AVDD1 − AVSS)/5)+ + 20: ((AVDD1 − AVSS)/5)− + items: minimum: 0 maximum: 31 + single-channel: + description: | + This property is used for defining a current channel or the positive + input of a voltage channel (single-ended or pseudo-differential). + + Models AD4111 and AD4112 support current channels. + Example: (IIN2+, IIN2−) -> single-channel = <2> + To correctly configure a current channel set the "adi,current-channel" + property to true. + + To configure a single-ended/pseudo-differential channel set the + "common-mode-channel" property to the desired negative voltage input. + + When used as a voltage channel, special inputs are valid as well. + minimum: 0 + maximum: 31 + + common-mode-channel: + description: + This property is used for defining the negative input of a + single-ended or pseudo-differential voltage channel. + + Special inputs are valid as well. + minimum: 0 + maximum: 31 + adi,reference-select: description: | Select the reference source to use when converting on @@ -154,9 +216,31 @@ patternProperties: - avdd default: refout-avss + adi,current-channel: + $ref: /schemas/types.yaml#/definitions/flag + description: | + Signal that the selected inputs are current channels. + Only available on AD4111 and AD4112. + required: - reg - - diff-channels + + allOf: + - oneOf: + - required: [single-channel] + properties: + diff-channels: false + - required: [diff-channels] + properties: + single-channel: false + adi,current-channel: false + common-mode-channel: false + + - if: + required: [common-mode-channel] + then: + properties: + adi,current-channel: false required: - compatible @@ -166,7 +250,6 @@ allOf: - $ref: /schemas/spi/spi-peripheral-props.yaml# # Only ad7172-4, ad7173-8 and ad7175-8 support vref2 - # Other models have [0-3] channel registers - if: properties: compatible: @@ -187,6 +270,37 @@ allOf: - vref - refout-avss - avdd + + - if: + properties: + compatible: + contains: + enum: + - adi,ad4114 + - adi,ad4115 + - adi,ad4116 + - adi,ad7173-8 + - adi,ad7175-8 + then: + patternProperties: + "^channel@[0-9a-f]$": + properties: + reg: + maximum: 15 + + - if: + properties: + compatible: + contains: + enum: + - adi,ad7172-2 + - adi,ad7175-2 + - adi,ad7176-2 + - adi,ad7177-2 + then: + patternProperties: + "^channel@[0-9a-f]$": + properties: reg: maximum: 3 @@ -210,6 +324,34 @@ allOf: required: - adi,reference-select + - if: + properties: + compatible: + contains: + enum: + - adi,ad4111 + - adi,ad4112 + - adi,ad4114 + - adi,ad4115 + - adi,ad4116 + then: + properties: + avdd2-supply: false + + - if: + properties: + compatible: + not: + contains: + enum: + - adi,ad4111 + - adi,ad4112 + then: + patternProperties: + "^channel@[0-9a-f]$": + properties: + adi,current-channel: false + - if: anyOf: - required: [clock-names] @@ -221,6 +363,7 @@ allOf: unevaluatedProperties: false examples: + # Example AD7173-8 with external reference connected to REF+/REF-: - | #include #include @@ -277,3 +420,50 @@ examples: }; }; }; + + # Example AD4111 with current channel and single-ended channel: + - | + #include + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad4111"; + reg = <0>; + + #address-cells = <1>; + #size-cells = <0>; + + interrupts = <25 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "rdy"; + interrupt-parent = <&gpio>; + spi-max-frequency = <5000000>; + gpio-controller; + #gpio-cells = <2>; + #clock-cells = <0>; + + channel@0 { + reg = <0>; + bipolar; + diff-channels = <4 5>; + }; + + // Single ended channel VIN2/VINCOM + channel@1 { + reg = <1>; + bipolar; + single-channel = <2>; + common-mode-channel = <16>; + }; + + // Current channel IN2+/IN2- + channel@2 { + reg = <2>; + single-channel = <2>; + adi,current-channel; + }; + }; + }; From patchwork Fri Jun 7 14:53:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dumitru Ceclan via B4 Relay X-Patchwork-Id: 13690295 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91CA01990D8; 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a=ed25519-sha256; t=1717771987; l=5816; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=L9cR6TgpFTXo/pEkA7l2c0LKsp4wR/2/7ocp+j3+FrY=; b=H9GHO1Hr46Dze1nAGn2DyeyGmAqoN00NlZ3/JmlIsmn+4giLZLDguUMnopNta0JLuKhlyKXxA /h6lPWiX8oPD4DElT/01u9r3bW92TC/jVLXWQH1C20bfFVNHNGrWfDT X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= X-Endpoint-Received: by B4 Relay for dumitru.ceclan@analog.com/20240313 with auth_id=140 X-Original-From: Dumitru Ceclan Reply-To: dumitru.ceclan@analog.com From: Dumitru Ceclan Sigma delta ADCs with a sequencer need to disable the previously enabled channel when reading using ad_sigma_delta_single_conversion(). This was done manually in drivers for devices with sequencers. This patch implements handling of single channel disabling after a single conversion. Reviewed-by: Nuno Sa Signed-off-by: Dumitru Ceclan --- drivers/iio/adc/ad7124.c | 14 ++++++++------ drivers/iio/adc/ad7173.c | 11 ++++++----- drivers/iio/adc/ad_sigma_delta.c | 6 ++++++ include/linux/iio/adc/ad_sigma_delta.h | 14 ++++++++++++++ 4 files changed, 34 insertions(+), 11 deletions(-) diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c index e7b1d517d3de..3beed78496c5 100644 --- a/drivers/iio/adc/ad7124.c +++ b/drivers/iio/adc/ad7124.c @@ -555,10 +555,18 @@ static int ad7124_disable_all(struct ad_sigma_delta *sd) return 0; } +static int ad7124_disable_one(struct ad_sigma_delta *sd, unsigned int chan) +{ + struct ad7124_state *st = container_of(sd, struct ad7124_state, sd); + + return ad7124_spi_write_mask(st, AD7124_CHANNEL(chan), AD7124_CHANNEL_EN_MSK, 0, 2); +} + static const struct ad_sigma_delta_info ad7124_sigma_delta_info = { .set_channel = ad7124_set_channel, .append_status = ad7124_append_status, .disable_all = ad7124_disable_all, + .disable_one = ad7124_disable_one, .set_mode = ad7124_set_mode, .has_registers = true, .addr_shift = 0, @@ -582,12 +590,6 @@ static int ad7124_read_raw(struct iio_dev *indio_dev, if (ret < 0) return ret; - /* After the conversion is performed, disable the channel */ - ret = ad_sd_write_reg(&st->sd, AD7124_CHANNEL(chan->address), 2, - st->channels[chan->address].ain | AD7124_CHANNEL_EN(0)); - if (ret < 0) - return ret; - return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: mutex_lock(&st->cfgs_lock); diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 638e2468efbf..f3088e8b4b8b 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -569,10 +569,16 @@ static int ad7173_disable_all(struct ad_sigma_delta *sd) return 0; } +static int ad7173_disable_one(struct ad_sigma_delta *sd, unsigned int chan) +{ + return ad_sd_write_reg(sd, AD7173_REG_CH(chan), 2, 0); +} + static struct ad_sigma_delta_info ad7173_sigma_delta_info = { .set_channel = ad7173_set_channel, .append_status = ad7173_append_status, .disable_all = ad7173_disable_all, + .disable_one = ad7173_disable_one, .set_mode = ad7173_set_mode, .has_registers = true, .addr_shift = 0, @@ -668,11 +674,6 @@ static int ad7173_read_raw(struct iio_dev *indio_dev, if (ret < 0) return ret; - /* disable channel after single conversion */ - ret = ad_sd_write_reg(&st->sd, AD7173_REG_CH(chan->address), 2, 0); - if (ret < 0) - return ret; - return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: if (chan->type == IIO_TEMP) { diff --git a/drivers/iio/adc/ad_sigma_delta.c b/drivers/iio/adc/ad_sigma_delta.c index 97a05f325df7..ec34b3d1336f 100644 --- a/drivers/iio/adc/ad_sigma_delta.c +++ b/drivers/iio/adc/ad_sigma_delta.c @@ -321,6 +321,7 @@ int ad_sigma_delta_single_conversion(struct iio_dev *indio_dev, sigma_delta->keep_cs_asserted = false; ad_sigma_delta_set_mode(sigma_delta, AD_SD_MODE_IDLE); + ad_sigma_delta_disable_one(sigma_delta, chan->address); sigma_delta->bus_locked = false; spi_bus_unlock(sigma_delta->spi->controller); iio_device_release_direct_mode(indio_dev); @@ -671,6 +672,11 @@ int ad_sd_init(struct ad_sigma_delta *sigma_delta, struct iio_dev *indio_dev, dev_err(&spi->dev, "ad_sigma_delta_info lacks disable_all().\n"); return -EINVAL; } + + if (!info->disable_one) { + dev_err(&spi->dev, "ad_sigma_delta_info lacks disable_one().\n"); + return -EINVAL; + } } if (info->irq_line) diff --git a/include/linux/iio/adc/ad_sigma_delta.h b/include/linux/iio/adc/ad_sigma_delta.h index 383614ebd760..f8c1d2505940 100644 --- a/include/linux/iio/adc/ad_sigma_delta.h +++ b/include/linux/iio/adc/ad_sigma_delta.h @@ -37,6 +37,10 @@ struct iio_dev; * @append_status: Will be called to enable status append at the end of the sample, may be NULL. * @set_mode: Will be called to select the current mode, may be NULL. * @disable_all: Will be called to disable all channels, may be NULL. + * @disable_one: Will be called to disable a single channel after + * ad_sigma_delta_single_conversion(), may be NULL. + * Usage of this callback expects iio_chan_spec.address to contain + * the value required for the driver to identify the channel. * @postprocess_sample: Is called for each sampled data word, can be used to * modify or drop the sample data, it, may be NULL. * @has_registers: true if the device has writable and readable registers, false @@ -55,6 +59,7 @@ struct ad_sigma_delta_info { int (*append_status)(struct ad_sigma_delta *, bool append); int (*set_mode)(struct ad_sigma_delta *, enum ad_sigma_delta_mode mode); int (*disable_all)(struct ad_sigma_delta *); + int (*disable_one)(struct ad_sigma_delta *, unsigned int chan); int (*postprocess_sample)(struct ad_sigma_delta *, unsigned int raw_sample); bool has_registers; unsigned int addr_shift; @@ -140,6 +145,15 @@ static inline int ad_sigma_delta_disable_all(struct ad_sigma_delta *sd) return 0; } +static inline int ad_sigma_delta_disable_one(struct ad_sigma_delta *sd, + unsigned int chan) +{ + if (sd->info->disable_one) + return sd->info->disable_one(sd, chan); + + return 0; +} + static inline int ad_sigma_delta_set_mode(struct ad_sigma_delta *sd, unsigned int mode) { From patchwork Fri Jun 7 14:53:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dumitru Ceclan via B4 Relay X-Patchwork-Id: 13690296 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91CEE19AD51; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UlBz+kWo" Received: by smtp.kernel.org (Postfix) with ESMTPS id 4CADFC4AF0B; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717771989; bh=I8QhRMMTY7Sn7kVFggQi6xZH1k/ZS+7ezVgehAwwnKs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=UlBz+kWo3oQQKHeg+0pNi4gz5r9kcUtNoWdIzDPYQ6goI5zT5pCnfGUmJbjiOvtC+ PgQzeDZKTTcSxLdegcqThNiQeVTHW6Z/xRL/ILaZwV4EKoKSHevs+HodLnuvCSdcNE eNkWCs9s4HTKi1xFk9id8aZZJZC0OIiLRiVdUllYq9lVY0nf/08ZO6r3p80qqtnpKU 1q48oajSUmELYtadoRm38oLRd8wMKXDmoIIQKskah4IP/zx/6IgCqzuauQci1Nacqx VzBt9BH+AzDAmxm5NHRgNS3jbhhuQAmTm8Su9QWzrTOvaouQgM2BOFjvAM2J2oyKt2 26DkAG5qoUuNQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43CFDC27C53; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) From: Dumitru Ceclan via B4 Relay Date: Fri, 07 Jun 2024 17:53:10 +0300 Subject: [PATCH v7 4/9] iio: adc: ad7173: refactor channel configuration parsing Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-ad4111-v7-4-97e3855900a0@analog.com> References: <20240607-ad4111-v7-0-97e3855900a0@analog.com> In-Reply-To: <20240607-ad4111-v7-0-97e3855900a0@analog.com> To: Ceclan Dumitru Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dumitru Ceclan , Jonathan Cameron , Nuno Sa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717771987; l=2390; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=Rvmh4+bkvyAlbEsr4U+b9e6sWYI3MMB6i+yP4e+zyrY=; b=IBq8kopTtLvyEHHTyspkkxqwUy3dA/G8NxTRXdAm79DnPT6p+dtOqb+B8H1LoF98lMYxmHk95 NiIqtY+TS9dAccWoZu1HM5OC/ybc+ez3/7N27I5hOvwFXZcmpq5Fe3y X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= X-Endpoint-Received: by B4 Relay for dumitru.ceclan@analog.com/20240313 with auth_id=140 X-Original-From: Dumitru Ceclan Reply-To: dumitru.ceclan@analog.com From: Dumitru Ceclan Move configurations regarding number of channels from *_fw_parse_device_config to *_fw_parse_channel_config. Suggested-by: Jonathan Cameron Link: https://lore.kernel.org/all/20240303162148.3ad91aa2@jic23-huawei/ Reviewed-by: David Lechner Reviewed-by: Nuno Sa Signed-off-by: Dumitru Ceclan --- drivers/iio/adc/ad7173.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index f3088e8b4b8b..8631f218b69e 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -913,7 +913,23 @@ static int ad7173_fw_parse_channel_config(struct iio_dev *indio_dev) struct device *dev = indio_dev->dev.parent; struct iio_chan_spec *chan_arr, *chan; unsigned int ain[2], chan_index = 0; - int ref_sel, ret; + int ref_sel, ret, num_channels; + + num_channels = device_get_child_node_count(dev); + + if (st->info->has_temp) + num_channels++; + + if (num_channels == 0) + return dev_err_probe(dev, -ENODATA, "No channels specified\n"); + + if (num_channels > st->info->num_channels) + return dev_err_probe(dev, -EINVAL, + "Too many channels specified. Maximum is %d, not including temperature channel if supported.\n", + st->info->num_channels); + + indio_dev->num_channels = num_channels; + st->num_channels = num_channels; chan_arr = devm_kcalloc(dev, sizeof(*indio_dev->channels), st->num_channels, GFP_KERNEL); @@ -1008,7 +1024,6 @@ static int ad7173_fw_parse_device_config(struct iio_dev *indio_dev) { struct ad7173_state *st = iio_priv(indio_dev); struct device *dev = indio_dev->dev.parent; - unsigned int num_channels; int ret; st->regulators[0].supply = ad7173_ref_sel_str[AD7173_SETUP_REF_SEL_EXT_REF]; @@ -1067,16 +1082,6 @@ static int ad7173_fw_parse_device_config(struct iio_dev *indio_dev) ad7173_sigma_delta_info.irq_line = ret; - num_channels = device_get_child_node_count(dev); - - if (st->info->has_temp) - num_channels++; - - if (num_channels == 0) - return dev_err_probe(dev, -ENODATA, "No channels specified\n"); - indio_dev->num_channels = num_channels; - st->num_channels = num_channels; - return ad7173_fw_parse_channel_config(indio_dev); } From patchwork Fri Jun 7 14:53:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dumitru Ceclan via B4 Relay X-Patchwork-Id: 13690299 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4E9919FA76; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717771989; cv=none; b=t+NDyTPla3tIWR0NKxhhFyeHGmiarYI41zUtHGjbBu6oX2jF1cchxe0QerA0sgFHYFeWN06hRvB8dmP4OgBGbIu/FZhkMAckKJsLwbfQwZ5R+yDQ7S90WrnPE5kIvDGIaLVsWQMYcBx18+udFKfzeg2zqfoOa8AW7HXFK+6gKEE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717771989; c=relaxed/simple; bh=NVd+zTYMoc6J2OMUcKwaZbTj/+f6TMT5UM+zc8YKt/w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=B07gq3up0jCBPUPnknm+bEj+y8uqgWxmaSM2HEzKqiLCRxflPyOHcfjXsFpHjtaDKiwvDvgF8SK8ynvpVcZPv/8IMPEuiSwlV2P7pSM5EA/vm3jE0nHtwLLDvwzSLty40W9QviO6pAYPxwqy0A/D2EkIiGZVOVnllmP5EgjiEwI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=rUa61FgN; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="rUa61FgN" Received: by smtp.kernel.org (Postfix) with ESMTPS id 5D18CC4AF10; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1717771989; bh=NVd+zTYMoc6J2OMUcKwaZbTj/+f6TMT5UM+zc8YKt/w=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=rUa61FgNv5pJ14/LHxKtXfF8lpAdQrcAT9CN03pg7z8eBT/Vlg5fAlDoLEhtk1CjW vIrUs8q+4ZVykfrOdIG4iC7csGKP5ud+3UtFVU7YN04U5BBN5W/UYAMfxX0XpLMKKR hOSqzCfnI4YAPdPGZPyCKeQSKeTx8FlRHWb4DbzUw/goWHAeaoxpELyNz3YPijL/Gh n+SABBoNxYBwqCT1m05SbTSuvKJ21bWN9bE3cB6RK9hHCR5U3lzmpZHMwclamnkFUh KKR4l5wrmC0p8F5N/7QusRjPyyRWnWYlB3vaaaykaYfU/71ZX8snI4IcGstQwGRtwy YdnjZceYm7g7g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53D7BC27C6E; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) From: Dumitru Ceclan via B4 Relay Date: Fri, 07 Jun 2024 17:53:11 +0300 Subject: [PATCH v7 5/9] iio: adc: ad7173: refactor ain and vref selection Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-ad4111-v7-5-97e3855900a0@analog.com> References: <20240607-ad4111-v7-0-97e3855900a0@analog.com> In-Reply-To: <20240607-ad4111-v7-0-97e3855900a0@analog.com> To: Ceclan Dumitru Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dumitru Ceclan X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717771987; l=3945; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=9f0Vi+E6u2sww3gPlgrOmpy9ZqM0gcSKGN10c+NtFoI=; b=kZtZkxMai7Y0H9SWUiz6HQMYgLCr0SyEjRVTuh8pDX9pkm5FCFEpcE76cK2wjA3TRv5HAYkE8 EJ8JzkNaJ5eDfEcQ8RBEP3QColjL9jMXh6Ot6eWG7v1qCDzB9ipGlhB X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= X-Endpoint-Received: by B4 Relay for dumitru.ceclan@analog.com/20240313 with auth_id=140 X-Original-From: Dumitru Ceclan Reply-To: dumitru.ceclan@analog.com From: Dumitru Ceclan Move validation of analog inputs and reference voltage selection to separate functions to reduce the size of the channel config parsing function and improve readability. Add defines for the number of analog inputs in a channel. Signed-off-by: Dumitru Ceclan Reviewed-by: Nuno Sa --- drivers/iio/adc/ad7173.c | 62 +++++++++++++++++++++++++++++++++--------------- 1 file changed, 43 insertions(+), 19 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 8631f218b69e..1257303b0cf6 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -60,6 +60,7 @@ #define AD7173_CH_SETUP_AINPOS_MASK GENMASK(9, 5) #define AD7173_CH_SETUP_AINNEG_MASK GENMASK(4, 0) +#define AD7173_NO_AINS_PER_CHANNEL 2 #define AD7173_CH_ADDRESS(pos, neg) \ (FIELD_PREP(AD7173_CH_SETUP_AINPOS_MASK, pos) | \ FIELD_PREP(AD7173_CH_SETUP_AINNEG_MASK, neg)) @@ -906,13 +907,48 @@ static int ad7173_register_clk_provider(struct iio_dev *indio_dev) &st->int_clk_hw); } +static int ad7173_validate_voltage_ain_inputs(struct ad7173_state *st, + unsigned int ain0, unsigned int ain1) +{ + struct device *dev = &st->sd.spi->dev; + + if (ain0 >= st->info->num_inputs || + ain1 >= st->info->num_inputs) + return dev_err_probe(dev, -EINVAL, + "Input pin number out of range for pair (%d %d).\n", + ain0, ain1); + + return 0; +} + +static int ad7173_validate_reference(struct ad7173_state *st, int ref_sel) +{ + struct device *dev = &st->sd.spi->dev; + int ret; + + if (ref_sel == AD7173_SETUP_REF_SEL_INT_REF && !st->info->has_int_ref) + return dev_err_probe(dev, -EINVAL, + "Internal reference is not available on current model.\n"); + + if (ref_sel == AD7173_SETUP_REF_SEL_EXT_REF2 && !st->info->has_ref2) + return dev_err_probe(dev, -EINVAL, + "External reference 2 is not available on current model.\n"); + + ret = ad7173_get_ref_voltage_milli(st, ref_sel); + if (ret < 0) + return dev_err_probe(dev, ret, "Cannot use reference %u\n", + ref_sel); + + return 0; +} + static int ad7173_fw_parse_channel_config(struct iio_dev *indio_dev) { struct ad7173_channel *chans_st_arr, *chan_st_priv; struct ad7173_state *st = iio_priv(indio_dev); struct device *dev = indio_dev->dev.parent; struct iio_chan_spec *chan_arr, *chan; - unsigned int ain[2], chan_index = 0; + unsigned int ain[AD7173_NO_AINS_PER_CHANNEL], chan_index = 0; int ref_sel, ret, num_channels; num_channels = device_get_child_node_count(dev); @@ -966,11 +1002,9 @@ static int ad7173_fw_parse_channel_config(struct iio_dev *indio_dev) if (ret) return ret; - if (ain[0] >= st->info->num_inputs || - ain[1] >= st->info->num_inputs) - return dev_err_probe(dev, -EINVAL, - "Input pin number out of range for pair (%d %d).\n", - ain[0], ain[1]); + ret = ad7173_validate_voltage_ain_inputs(st, ain[0], ain[1]); + if (ret) + return ret; ret = fwnode_property_match_property_string(child, "adi,reference-select", @@ -981,19 +1015,9 @@ static int ad7173_fw_parse_channel_config(struct iio_dev *indio_dev) else ref_sel = ret; - if (ref_sel == AD7173_SETUP_REF_SEL_INT_REF && - !st->info->has_int_ref) - return dev_err_probe(dev, -EINVAL, - "Internal reference is not available on current model.\n"); - - if (ref_sel == AD7173_SETUP_REF_SEL_EXT_REF2 && !st->info->has_ref2) - return dev_err_probe(dev, -EINVAL, - "External reference 2 is not available on current model.\n"); - - ret = ad7173_get_ref_voltage_milli(st, ref_sel); - if (ret < 0) - return dev_err_probe(dev, ret, - "Cannot use reference %u\n", ref_sel); + ret = ad7173_validate_reference(st, ref_sel); + if (ret) + return ret; if (ref_sel == AD7173_SETUP_REF_SEL_INT_REF) st->adc_mode |= AD7173_ADC_MODE_REF_EN; From patchwork Fri Jun 7 14:53:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dumitru Ceclan via B4 Relay X-Patchwork-Id: 13690300 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B684C19FA77; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717771989; cv=none; b=H2AyizIe7OkZlwWofTfdaYW5edmGVolgppMRtfWQZVgElNAN2CUoTOQhkjVyewrA5+edyntKUgBwU8wpbs3HSFq1yTbDLsoPofVuvt64Asc5Zkjy3vD7Kr3MC4DcI3+bbSCf2tXWJa9CLskWtr2R8WiQsfEs+OxiGEujmlOArOM= ARC-Message-Signature: i=1; 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b=DS9XdsIZwkCw1QwcAmbxrtN3zTGKBWnUCoidzH3AeFfQnbgTXqz7mWnedtKCMnF79 2dOBreS74RqR1e7mDXKdjyPBKYkBUmjJ/g0+13Ao2b68ibmuu+LtOi+VK/8H88oAWM 9JSvJxFeIPcZxKQyFh/3R35L6+OoXSnRlkY8BkFL41nJwnYSn+RPIiubLEWtVXrXKR GOw5lVfOC5b6LM2L3cFh5UyubIleIJmIIs+qEwBYqNoOHRS2QjJmoZEHZEX4rBzGfx qXASvtftBNeREylB2VfxbT0XzfSPiE4rPc7VtZ4FJC6BYifZSgZZXjkIpx8t4CUYWN DTiLkTaJ8HTVA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 625CFC27C5F; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) From: Dumitru Ceclan via B4 Relay Date: Fri, 07 Jun 2024 17:53:12 +0300 Subject: [PATCH v7 6/9] iio: adc: ad7173: add support for special inputs Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-ad4111-v7-6-97e3855900a0@analog.com> References: <20240607-ad4111-v7-0-97e3855900a0@analog.com> In-Reply-To: <20240607-ad4111-v7-0-97e3855900a0@analog.com> To: Ceclan Dumitru Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dumitru Ceclan X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717771987; l=3699; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=GJSw/btckEmYwTEqWgTcPfwKf/O3c5v2N9fDPcBA2Nw=; b=Frd2TOuIV3m5a1aayw75eQfuNvHk65o1YPjdRSox1WiOUmiK6v/CqYidLry4PHg/2on/WsN+C RB0b+NKspYBDqYJuqQ8JI8zH5k1hnpa7wcu3Jg/UaIXgA5i+JhV9fGQ X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= X-Endpoint-Received: by B4 Relay for dumitru.ceclan@analog.com/20240313 with auth_id=140 X-Original-From: Dumitru Ceclan Reply-To: dumitru.ceclan@analog.com From: Dumitru Ceclan Add support for selecting REF+ and REF- inputs on all models. Add support for selecting ((AVDD1 − AVSS)/5) inputs on supported models. Signed-off-by: Dumitru Ceclan Reviewed-by: Nuno Sa --- drivers/iio/adc/ad7173.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 1257303b0cf6..ca96a9aeec4b 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -66,6 +66,13 @@ FIELD_PREP(AD7173_CH_SETUP_AINNEG_MASK, neg)) #define AD7173_AIN_TEMP_POS 17 #define AD7173_AIN_TEMP_NEG 18 +#define AD7173_AIN_POW_MON_POS 19 +#define AD7173_AIN_POW_MON_NEG 20 +#define AD7173_AIN_REF_POS 21 +#define AD7173_AIN_REF_NEG 22 + +#define AD7173_IS_REF_INPUT(x) ((x) == AD7173_AIN_REF_POS || \ + (x) == AD7173_AIN_REF_NEG) #define AD7172_2_ID 0x00d0 #define AD7175_ID 0x0cd0 @@ -146,6 +153,8 @@ struct ad7173_device_info { unsigned int id; char *name; bool has_temp; + /* ((AVDD1 − AVSS)/5) */ + bool has_pow_supply_monitoring; bool has_input_buf; bool has_int_ref; bool has_ref2; @@ -216,6 +225,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_temp = true, .has_input_buf = true, .has_int_ref = true, + .has_pow_supply_monitoring = true, .clock = 2 * HZ_PER_MHZ, .sinc5_data_rates = ad7173_sinc5_data_rates, .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), @@ -230,6 +240,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_temp = false, .has_input_buf = true, .has_ref2 = true, + .has_pow_supply_monitoring = true, .clock = 2 * HZ_PER_MHZ, .sinc5_data_rates = ad7173_sinc5_data_rates, .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), @@ -259,6 +270,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_temp = true, .has_input_buf = true, .has_int_ref = true, + .has_pow_supply_monitoring = true, .clock = 16 * HZ_PER_MHZ, .sinc5_data_rates = ad7175_sinc5_data_rates, .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), @@ -274,6 +286,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_input_buf = true, .has_int_ref = true, .has_ref2 = true, + .has_pow_supply_monitoring = true, .clock = 16 * HZ_PER_MHZ, .sinc5_data_rates = ad7175_sinc5_data_rates, .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), @@ -302,6 +315,7 @@ static const struct ad7173_device_info ad7173_device_info[] = { .has_temp = true, .has_input_buf = true, .has_int_ref = true, + .has_pow_supply_monitoring = true, .clock = 16 * HZ_PER_MHZ, .odr_start_value = AD7177_ODR_START_VALUE, .sinc5_data_rates = ad7175_sinc5_data_rates, @@ -911,9 +925,18 @@ static int ad7173_validate_voltage_ain_inputs(struct ad7173_state *st, unsigned int ain0, unsigned int ain1) { struct device *dev = &st->sd.spi->dev; + bool special_input0, special_input1; + + /* (AVDD1-AVSS)/5 power supply monitoring */ + if (ain0 == AD7173_AIN_POW_MON_POS && ain1 == AD7173_AIN_POW_MON_NEG && + st->info->has_pow_supply_monitoring) + return 0; + + special_input0 = AD7173_IS_REF_INPUT(ain0); + special_input1 = AD7173_IS_REF_INPUT(ain1); - if (ain0 >= st->info->num_inputs || - ain1 >= st->info->num_inputs) + if ((ain0 >= st->info->num_inputs && !special_input0) || + (ain1 >= st->info->num_inputs && !special_input1)) return dev_err_probe(dev, -EINVAL, "Input pin number out of range for pair (%d %d).\n", ain0, ain1); From patchwork Fri Jun 7 14:53:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dumitru Ceclan via B4 Relay X-Patchwork-Id: 13690297 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B352419FA75; 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a=ed25519-sha256; t=1717771987; l=9538; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=fMuh8OO5hShokxIvs5skpXRA8mt7q9YlruIrVzF63aU=; b=/Y3NS8QWHb3AfnCON0hDBte/jVJbmWA3Kz5I3nrJ4mMLpGpq9tZV9EvoIxretjTRaEYS4rJ6W QN8U0G9jCEoBO6mVj76oW6dojZbfrrRF1prwXFjT3eJXXrTd89GktZT X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= X-Endpoint-Received: by B4 Relay for dumitru.ceclan@analog.com/20240313 with auth_id=140 X-Original-From: Dumitru Ceclan Reply-To: dumitru.ceclan@analog.com From: Dumitru Ceclan Drop setting .has_temp and .has_input_buf to false in device info struct. Drop array of device info structs and use individual structs for all; drop models enum as no longer needed. This improves readability as the structs are pointed directly. Reviewed-by: Nuno Sa Signed-off-by: Dumitru Ceclan --- drivers/iio/adc/ad7173.c | 260 ++++++++++++++++++++++------------------------- 1 file changed, 122 insertions(+), 138 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index ca96a9aeec4b..6ed5b8fed8c0 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -132,16 +132,6 @@ #define AD7173_FILTER_ODR0_MASK GENMASK(5, 0) #define AD7173_MAX_CONFIGS 8 -enum ad7173_ids { - ID_AD7172_2, - ID_AD7172_4, - ID_AD7173_8, - ID_AD7175_2, - ID_AD7175_8, - ID_AD7176_2, - ID_AD7177_2, -}; - struct ad7173_device_info { const unsigned int *sinc5_data_rates; unsigned int num_sinc5_data_rates; @@ -214,113 +204,114 @@ static const unsigned int ad7175_sinc5_data_rates[] = { 5000, /* 20 */ }; -static const struct ad7173_device_info ad7173_device_info[] = { - [ID_AD7172_2] = { - .name = "ad7172-2", - .id = AD7172_2_ID, - .num_inputs = 5, - .num_channels = 4, - .num_configs = 4, - .num_gpios = 2, - .has_temp = true, - .has_input_buf = true, - .has_int_ref = true, - .has_pow_supply_monitoring = true, - .clock = 2 * HZ_PER_MHZ, - .sinc5_data_rates = ad7173_sinc5_data_rates, - .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), - }, - [ID_AD7172_4] = { - .name = "ad7172-4", - .id = AD7172_4_ID, - .num_inputs = 9, - .num_channels = 8, - .num_configs = 8, - .num_gpios = 4, - .has_temp = false, - .has_input_buf = true, - .has_ref2 = true, - .has_pow_supply_monitoring = true, - .clock = 2 * HZ_PER_MHZ, - .sinc5_data_rates = ad7173_sinc5_data_rates, - .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), - }, - [ID_AD7173_8] = { - .name = "ad7173-8", - .id = AD7173_ID, - .num_inputs = 17, - .num_channels = 16, - .num_configs = 8, - .num_gpios = 4, - .has_temp = true, - .has_input_buf = true, - .has_int_ref = true, - .has_ref2 = true, - .clock = 2 * HZ_PER_MHZ, - .sinc5_data_rates = ad7173_sinc5_data_rates, - .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), - }, - [ID_AD7175_2] = { - .name = "ad7175-2", - .id = AD7175_2_ID, - .num_inputs = 5, - .num_channels = 4, - .num_configs = 4, - .num_gpios = 2, - .has_temp = true, - .has_input_buf = true, - .has_int_ref = true, - .has_pow_supply_monitoring = true, - .clock = 16 * HZ_PER_MHZ, - .sinc5_data_rates = ad7175_sinc5_data_rates, - .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), - }, - [ID_AD7175_8] = { - .name = "ad7175-8", - .id = AD7175_8_ID, - .num_inputs = 17, - .num_channels = 16, - .num_configs = 8, - .num_gpios = 4, - .has_temp = true, - .has_input_buf = true, - .has_int_ref = true, - .has_ref2 = true, - .has_pow_supply_monitoring = true, - .clock = 16 * HZ_PER_MHZ, - .sinc5_data_rates = ad7175_sinc5_data_rates, - .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), - }, - [ID_AD7176_2] = { - .name = "ad7176-2", - .id = AD7176_ID, - .num_inputs = 5, - .num_channels = 4, - .num_configs = 4, - .num_gpios = 2, - .has_temp = false, - .has_input_buf = false, - .has_int_ref = true, - .clock = 16 * HZ_PER_MHZ, - .sinc5_data_rates = ad7175_sinc5_data_rates, - .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), - }, - [ID_AD7177_2] = { - .name = "ad7177-2", - .id = AD7177_ID, - .num_inputs = 5, - .num_channels = 4, - .num_configs = 4, - .num_gpios = 2, - .has_temp = true, - .has_input_buf = true, - .has_int_ref = true, - .has_pow_supply_monitoring = true, - .clock = 16 * HZ_PER_MHZ, - .odr_start_value = AD7177_ODR_START_VALUE, - .sinc5_data_rates = ad7175_sinc5_data_rates, - .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), - }, +static const struct ad7173_device_info ad7172_2_device_info = { + .name = "ad7172-2", + .id = AD7172_2_ID, + .num_inputs = 5, + .num_channels = 4, + .num_configs = 4, + .num_gpios = 2, + .has_temp = true, + .has_input_buf = true, + .has_int_ref = true, + .has_pow_supply_monitoring = true, + .clock = 2 * HZ_PER_MHZ, + .sinc5_data_rates = ad7173_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7172_4_device_info = { + .name = "ad7172-4", + .id = AD7172_4_ID, + .num_inputs = 9, + .num_channels = 8, + .num_configs = 8, + .num_gpios = 4, + .has_input_buf = true, + .has_ref2 = true, + .has_pow_supply_monitoring = true, + .clock = 2 * HZ_PER_MHZ, + .sinc5_data_rates = ad7173_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7173_8_device_info = { + .name = "ad7173-8", + .id = AD7173_ID, + .num_inputs = 17, + .num_channels = 16, + .num_configs = 8, + .num_gpios = 4, + .has_temp = true, + .has_input_buf = true, + .has_int_ref = true, + .has_ref2 = true, + .clock = 2 * HZ_PER_MHZ, + .sinc5_data_rates = ad7173_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7175_2_device_info = { + .name = "ad7175-2", + .id = AD7175_2_ID, + .num_inputs = 5, + .num_channels = 4, + .num_configs = 4, + .num_gpios = 2, + .has_temp = true, + .has_input_buf = true, + .has_int_ref = true, + .has_pow_supply_monitoring = true, + .clock = 16 * HZ_PER_MHZ, + .sinc5_data_rates = ad7175_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7175_8_device_info = { + .name = "ad7175-8", + .id = AD7175_8_ID, + .num_inputs = 17, + .num_channels = 16, + .num_configs = 8, + .num_gpios = 4, + .has_temp = true, + .has_input_buf = true, + .has_int_ref = true, + .has_ref2 = true, + .has_pow_supply_monitoring = true, + .clock = 16 * HZ_PER_MHZ, + .sinc5_data_rates = ad7175_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7176_2_device_info = { + .name = "ad7176-2", + .id = AD7176_ID, + .num_inputs = 5, + .num_channels = 4, + .num_configs = 4, + .num_gpios = 2, + .has_int_ref = true, + .clock = 16 * HZ_PER_MHZ, + .sinc5_data_rates = ad7175_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad7177_2_device_info = { + .name = "ad7177-2", + .id = AD7177_ID, + .num_inputs = 5, + .num_channels = 4, + .num_configs = 4, + .num_gpios = 2, + .has_temp = true, + .has_input_buf = true, + .has_int_ref = true, + .has_pow_supply_monitoring = true, + .clock = 16 * HZ_PER_MHZ, + .odr_start_value = AD7177_ODR_START_VALUE, + .sinc5_data_rates = ad7175_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad7175_sinc5_data_rates), }; static const char *const ad7173_ref_sel_str[] = { @@ -1188,32 +1179,25 @@ static int ad7173_probe(struct spi_device *spi) } static const struct of_device_id ad7173_of_match[] = { - { .compatible = "adi,ad7172-2", - .data = &ad7173_device_info[ID_AD7172_2]}, - { .compatible = "adi,ad7172-4", - .data = &ad7173_device_info[ID_AD7172_4]}, - { .compatible = "adi,ad7173-8", - .data = &ad7173_device_info[ID_AD7173_8]}, - { .compatible = "adi,ad7175-2", - .data = &ad7173_device_info[ID_AD7175_2]}, - { .compatible = "adi,ad7175-8", - .data = &ad7173_device_info[ID_AD7175_8]}, - { .compatible = "adi,ad7176-2", - .data = &ad7173_device_info[ID_AD7176_2]}, - { .compatible = "adi,ad7177-2", - .data = &ad7173_device_info[ID_AD7177_2]}, + { .compatible = "adi,ad7172-2", .data = &ad7172_2_device_info }, + { .compatible = "adi,ad7172-4", .data = &ad7172_4_device_info }, + { .compatible = "adi,ad7173-8", .data = &ad7173_8_device_info }, + { .compatible = "adi,ad7175-2", .data = &ad7175_2_device_info }, + { .compatible = "adi,ad7175-8", .data = &ad7175_8_device_info }, + { .compatible = "adi,ad7176-2", .data = &ad7176_2_device_info }, + { .compatible = "adi,ad7177-2", .data = &ad7177_2_device_info }, { } }; MODULE_DEVICE_TABLE(of, ad7173_of_match); static const struct spi_device_id ad7173_id_table[] = { - { "ad7172-2", (kernel_ulong_t)&ad7173_device_info[ID_AD7172_2]}, - { "ad7172-4", (kernel_ulong_t)&ad7173_device_info[ID_AD7172_4]}, - { "ad7173-8", (kernel_ulong_t)&ad7173_device_info[ID_AD7173_8]}, - { "ad7175-2", (kernel_ulong_t)&ad7173_device_info[ID_AD7175_2]}, - { "ad7175-8", (kernel_ulong_t)&ad7173_device_info[ID_AD7175_8]}, - { "ad7176-2", (kernel_ulong_t)&ad7173_device_info[ID_AD7176_2]}, - { "ad7177-2", (kernel_ulong_t)&ad7173_device_info[ID_AD7177_2]}, + { "ad7172-2", (kernel_ulong_t)&ad7172_2_device_info }, + { "ad7172-4", (kernel_ulong_t)&ad7172_4_device_info }, + { "ad7173-8", (kernel_ulong_t)&ad7173_8_device_info }, + { "ad7175-2", (kernel_ulong_t)&ad7175_2_device_info }, + { "ad7175-8", (kernel_ulong_t)&ad7175_8_device_info }, + { "ad7176-2", (kernel_ulong_t)&ad7176_2_device_info }, + { "ad7177-2", (kernel_ulong_t)&ad7177_2_device_info }, { } }; MODULE_DEVICE_TABLE(spi, ad7173_id_table); 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Fri, 7 Jun 2024 14:53:09 +0000 (UTC) From: Dumitru Ceclan via B4 Relay Date: Fri, 07 Jun 2024 17:53:14 +0300 Subject: [PATCH v7 8/9] iio: adc: ad7173: document sampling frequency behaviour Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-ad4111-v7-8-97e3855900a0@analog.com> References: <20240607-ad4111-v7-0-97e3855900a0@analog.com> In-Reply-To: <20240607-ad4111-v7-0-97e3855900a0@analog.com> To: Ceclan Dumitru Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dumitru Ceclan , Nuno Sa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717771987; l=1661; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=mdKO2dnGlcZH90ri/TM/oMJLgoJ91RNSOsEvtEgKDAE=; b=ssITTpfL4Seggrz3KWXnnpHuG9ukbS4R2iLyMYPBuup1yGCnywGRhUXkj/E6iFDtX5Kj6l+gM kol/veezwmSDnCgal8fTjSB7b95rqbYhId/OvQiL7fgoiHv3wejYv9B X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= X-Endpoint-Received: by B4 Relay for dumitru.ceclan@analog.com/20240313 with auth_id=140 X-Original-From: Dumitru Ceclan Reply-To: dumitru.ceclan@analog.com From: Dumitru Ceclan The ADCs supported by this driver feature a sequencer that read in a loop all the enabled chanels. When setting the individual sampling frequency for each channel and enabling multiple channels, the effective of each channel will be lower than the actual set value. Document this behaviour in a comment. Reviewed-by: Nuno Sa Signed-off-by: Dumitru Ceclan --- drivers/iio/adc/ad7173.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 6ed5b8fed8c0..22dcf89ef3ef 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -732,6 +732,21 @@ static int ad7173_write_raw(struct iio_dev *indio_dev, return ret; switch (info) { + /* + * This attribute sets the sampling frequency for each channel individually. + * There are no issues for raw or buffered reads of an individual channel. + * + * When multiple channels are enabled in buffered mode, the effective + * sampling rate of a channel is lowered in correlation to the number + * of channels enabled and the sampling rate of the other channels. + * + * Example: 3 channels enabled with rates CH1:6211sps CH2,CH3:10sps + * While the reading of CH1 takes only 0.16ms, the reading of CH2 and CH3 + * will take 100ms each. + * + * This will cause the reading of CH1 to be actually done once every + * 200.16ms, an effective rate of 4.99sps. + */ case IIO_CHAN_INFO_SAMP_FREQ: freq = val * MILLI + val2 / MILLI; for (i = st->info->odr_start_value; i < st->info->num_sinc5_data_rates - 1; i++) From patchwork Fri Jun 7 14:53:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Dumitru Ceclan via B4 Relay X-Patchwork-Id: 13690301 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB6FE19FA8F; Fri, 7 Jun 2024 14:53:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717771990; cv=none; b=DrhG0cvMv6GByU/pJioAKeBEljC64AAWQqxFxBPdi6gs7995r2G/4mdkbMg8rTv28QlL5ubVw9a+OinlRLb5bfH+tsGM+N/v2mCXAJ2p2T5XayGvlYSUf0Rez7j2BMNHbj825By9bptiwuyMhqLskpSpK2rfUT32MKfZ6vFvXNY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Fri, 7 Jun 2024 14:53:09 +0000 (UTC) From: Dumitru Ceclan via B4 Relay Date: Fri, 07 Jun 2024 17:53:15 +0300 Subject: [PATCH v7 9/9] iio: adc: ad7173: Add support for AD411x devices Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240607-ad4111-v7-9-97e3855900a0@analog.com> References: <20240607-ad4111-v7-0-97e3855900a0@analog.com> In-Reply-To: <20240607-ad4111-v7-0-97e3855900a0@analog.com> To: Ceclan Dumitru Cc: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , David Lechner , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dumitru Ceclan X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1717771987; l=19081; i=dumitru.ceclan@analog.com; s=20240313; h=from:subject:message-id; bh=aN//K1Rv7OekPWpPGG5trom2tsq0QQWwgNFaaISc3X0=; b=bYFMbYKHAGkKxF7pzGi+rGE7Cxh49gtJVJ9K1i9RycYDEE35A1eBLoc82H2YQIhjZkRX75Cxk s3ip07aRWxSCFhAUcMbMp2If6/ZtPjbkulmVH6zfuNuzOSz6skH74jO X-Developer-Key: i=dumitru.ceclan@analog.com; a=ed25519; pk=HdqMlVyrcazwoiai7oN6ghU+Bj1pusGUFRl30jhS7Bo= X-Endpoint-Received: by B4 Relay for dumitru.ceclan@analog.com/20240313 with auth_id=140 X-Original-From: Dumitru Ceclan Reply-To: dumitru.ceclan@analog.com From: Dumitru Ceclan Add support for AD4111/AD4112/AD4114/AD4115/AD4116. The AD411X family encompasses a series of low power, low noise, 24-bit, sigma-delta analog-to-digital converters that offer a versatile range of specifications. This family of ADCs integrates an analog front end suitable for processing both fully differential and single-ended, bipolar voltage inputs addressing a wide array of industrial and instrumentation requirements. - All ADCs have inputs with a precision voltage divider with a division ratio of 10. - AD4116 has 5 low level inputs without a voltage divider. - AD4111 and AD4112 support current inputs (0 mA to 20 mA) using a 50ohm shunt resistor. Signed-off-by: Dumitru Ceclan Reviewed-by: Nuno Sa --- drivers/iio/adc/ad7173.c | 314 ++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 282 insertions(+), 32 deletions(-) diff --git a/drivers/iio/adc/ad7173.c b/drivers/iio/adc/ad7173.c index 22dcf89ef3ef..6fbbdccff20b 100644 --- a/drivers/iio/adc/ad7173.c +++ b/drivers/iio/adc/ad7173.c @@ -1,8 +1,9 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * AD717x family SPI ADC driver + * AD717x and AD411x family SPI ADC driver * * Supported devices: + * AD4111/AD4112/AD4114/AD4115/AD4116 * AD7172-2/AD7172-4/AD7173-8/AD7175-2 * AD7175-8/AD7176-2/AD7177-2 * @@ -80,6 +81,11 @@ #define AD7175_2_ID 0x0cd0 #define AD7172_4_ID 0x2050 #define AD7173_ID 0x30d0 +#define AD4111_ID AD7173_ID +#define AD4112_ID AD7173_ID +#define AD4114_ID AD7173_ID +#define AD4116_ID 0x34d0 +#define AD4115_ID 0x38d0 #define AD7175_8_ID 0x3cd0 #define AD7177_ID 0x4fd0 #define AD7173_ID_MASK GENMASK(15, 4) @@ -110,6 +116,7 @@ #define AD7173_GPO12_DATA(x) BIT((x) + 0) #define AD7173_GPO23_DATA(x) BIT((x) + 4) +#define AD4111_GPO01_DATA(x) BIT((x) + 6) #define AD7173_GPO_DATA(x) ((x) < 2 ? AD7173_GPO12_DATA(x) : AD7173_GPO23_DATA(x)) #define AD7173_INTERFACE_DATA_STAT BIT(6) @@ -128,6 +135,16 @@ #define AD7173_VOLTAGE_INT_REF_uV 2500000 #define AD7173_TEMP_SENSIIVITY_uV_per_C 477 #define AD7177_ODR_START_VALUE 0x07 +#define AD4111_SHUNT_RESISTOR_OHM 50 +#define AD4111_DIVIDER_RATIO 10 +#define AD4111_CURRENT_CHAN_CUTOFF 16 +#define AD4111_VINCOM_INPUT 0x10 + +/* pin < num_voltage_in is a normal voltage input */ +/* pin >= num_voltage_in_div is a voltage input without a divider */ +#define AD4111_IS_VINCOM_MISMATCH(pin1, pin2) ((pin1) == AD4111_VINCOM_INPUT && \ + (pin2) < st->info->num_voltage_in && \ + (pin2) >= st->info->num_voltage_in_div) #define AD7173_FILTER_ODR0_MASK GENMASK(5, 0) #define AD7173_MAX_CONFIGS 8 @@ -136,18 +153,27 @@ struct ad7173_device_info { const unsigned int *sinc5_data_rates; unsigned int num_sinc5_data_rates; unsigned int odr_start_value; + /* + * AD4116 has both inputs with a voltage divider and without. + * These inputs cannot be mixed in the channel configuration. + * Does not include the VINCOM input. + */ + unsigned int num_voltage_in_div; unsigned int num_channels; unsigned int num_configs; - unsigned int num_inputs; + unsigned int num_voltage_in; unsigned int clock; unsigned int id; char *name; + bool has_current_inputs; + bool has_vincom_input; bool has_temp; /* ((AVDD1 − AVSS)/5) */ bool has_pow_supply_monitoring; bool has_input_buf; bool has_int_ref; bool has_ref2; + bool higher_gpio_bits; u8 num_gpios; }; @@ -189,6 +215,24 @@ struct ad7173_state { #endif }; +static unsigned int ad4115_sinc5_data_rates[] = { + 24845000, 24845000, 20725000, 20725000, /* 0-3 */ + 15564000, 13841000, 10390000, 10390000, /* 4-7 */ + 4994000, 2499000, 1000000, 500000, /* 8-11 */ + 395500, 200000, 100000, 59890, /* 12-15 */ + 49920, 20000, 16660, 10000, /* 16-19 */ + 5000, 2500, 2500, /* 20-22 */ +}; + +static unsigned int ad4116_sinc5_data_rates[] = { + 12422360, 12422360, 12422360, 12422360, /* 0-3 */ + 10362690, 10362690, 7782100, 6290530, /* 4-7 */ + 5194800, 2496900, 1007600, 499900, /* 8-11 */ + 390600, 200300, 100000, 59750, /* 12-15 */ + 49840, 20000, 16650, 10000, /* 16-19 */ + 5000, 2500, 1250, /* 20-22 */ +}; + static const unsigned int ad7173_sinc5_data_rates[] = { 6211000, 6211000, 6211000, 6211000, 6211000, 6211000, 5181000, 4444000, /* 0-7 */ 3115000, 2597000, 1007000, 503800, 381000, 200300, 100500, 59520, /* 8-15 */ @@ -204,10 +248,110 @@ static const unsigned int ad7175_sinc5_data_rates[] = { 5000, /* 20 */ }; +static unsigned int ad4111_current_channel_config[] = { + /* Ain sel: pos neg */ + 0x1E8, /* 15:IIN0+ 8:IIN0− */ + 0x1C9, /* 14:IIN1+ 9:IIN1− */ + 0x1AA, /* 13:IIN2+ 10:IIN2− */ + 0x18B, /* 12:IIN3+ 11:IIN3− */ +}; + +static const struct ad7173_device_info ad4111_device_info = { + .name = "ad4111", + .id = AD4111_ID, + .num_voltage_in_div = 8, + .num_channels = 16, + .num_configs = 8, + .num_voltage_in = 8, + .num_gpios = 2, + .higher_gpio_bits = true, + .has_temp = true, + .has_vincom_input = true, + .has_input_buf = true, + .has_current_inputs = true, + .has_int_ref = true, + .clock = 2 * HZ_PER_MHZ, + .sinc5_data_rates = ad7173_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4112_device_info = { + .name = "ad4112", + .id = AD4112_ID, + .num_voltage_in_div = 8, + .num_channels = 16, + .num_configs = 8, + .num_voltage_in = 8, + .num_gpios = 2, + .higher_gpio_bits = true, + .has_vincom_input = true, + .has_temp = true, + .has_input_buf = true, + .has_current_inputs = true, + .has_int_ref = true, + .clock = 2 * HZ_PER_MHZ, + .sinc5_data_rates = ad7173_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4114_device_info = { + .name = "ad4114", + .id = AD4114_ID, + .num_voltage_in_div = 16, + .num_channels = 16, + .num_configs = 8, + .num_voltage_in = 16, + .num_gpios = 4, + .higher_gpio_bits = true, + .has_vincom_input = true, + .has_temp = true, + .has_input_buf = true, + .has_int_ref = true, + .clock = 2 * HZ_PER_MHZ, + .sinc5_data_rates = ad7173_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad7173_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4115_device_info = { + .name = "ad4115", + .id = AD4115_ID, + .num_voltage_in_div = 16, + .num_channels = 16, + .num_configs = 8, + .num_voltage_in = 16, + .num_gpios = 4, + .higher_gpio_bits = true, + .has_vincom_input = true, + .has_temp = true, + .has_input_buf = true, + .has_int_ref = true, + .clock = 8 * HZ_PER_MHZ, + .sinc5_data_rates = ad4115_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad4115_sinc5_data_rates), +}; + +static const struct ad7173_device_info ad4116_device_info = { + .name = "ad4116", + .id = AD4116_ID, + .num_voltage_in_div = 11, + .num_channels = 16, + .num_configs = 8, + .num_voltage_in = 16, + .num_gpios = 4, + .higher_gpio_bits = true, + .has_vincom_input = true, + .has_temp = true, + .has_input_buf = true, + .has_int_ref = true, + .clock = 4 * HZ_PER_MHZ, + .sinc5_data_rates = ad4116_sinc5_data_rates, + .num_sinc5_data_rates = ARRAY_SIZE(ad4116_sinc5_data_rates), +}; + static const struct ad7173_device_info ad7172_2_device_info = { .name = "ad7172-2", .id = AD7172_2_ID, - .num_inputs = 5, + .num_voltage_in = 5, .num_channels = 4, .num_configs = 4, .num_gpios = 2, @@ -223,7 +367,7 @@ static const struct ad7173_device_info ad7172_2_device_info = { static const struct ad7173_device_info ad7172_4_device_info = { .name = "ad7172-4", .id = AD7172_4_ID, - .num_inputs = 9, + .num_voltage_in = 9, .num_channels = 8, .num_configs = 8, .num_gpios = 4, @@ -238,7 +382,7 @@ static const struct ad7173_device_info ad7172_4_device_info = { static const struct ad7173_device_info ad7173_8_device_info = { .name = "ad7173-8", .id = AD7173_ID, - .num_inputs = 17, + .num_voltage_in = 17, .num_channels = 16, .num_configs = 8, .num_gpios = 4, @@ -254,7 +398,7 @@ static const struct ad7173_device_info ad7173_8_device_info = { static const struct ad7173_device_info ad7175_2_device_info = { .name = "ad7175-2", .id = AD7175_2_ID, - .num_inputs = 5, + .num_voltage_in = 5, .num_channels = 4, .num_configs = 4, .num_gpios = 2, @@ -270,7 +414,7 @@ static const struct ad7173_device_info ad7175_2_device_info = { static const struct ad7173_device_info ad7175_8_device_info = { .name = "ad7175-8", .id = AD7175_8_ID, - .num_inputs = 17, + .num_voltage_in = 17, .num_channels = 16, .num_configs = 8, .num_gpios = 4, @@ -287,7 +431,7 @@ static const struct ad7173_device_info ad7175_8_device_info = { static const struct ad7173_device_info ad7176_2_device_info = { .name = "ad7176-2", .id = AD7176_ID, - .num_inputs = 5, + .num_voltage_in = 5, .num_channels = 4, .num_configs = 4, .num_gpios = 2, @@ -300,7 +444,7 @@ static const struct ad7173_device_info ad7176_2_device_info = { static const struct ad7173_device_info ad7177_2_device_info = { .name = "ad7177-2", .id = AD7177_ID, - .num_inputs = 5, + .num_voltage_in = 5, .num_channels = 4, .num_configs = 4, .num_gpios = 2, @@ -353,6 +497,15 @@ static int ad7173_mask_xlate(struct gpio_regmap *gpio, unsigned int base, return 0; } +static int ad4111_mask_xlate(struct gpio_regmap *gpio, unsigned int base, + unsigned int offset, unsigned int *reg, + unsigned int *mask) +{ + *mask = AD4111_GPO01_DATA(offset); + *reg = base; + return 0; +} + static void ad7173_gpio_disable(void *data) { struct ad7173_state *st = data; @@ -385,7 +538,10 @@ static int ad7173_gpio_init(struct ad7173_state *st) gpio_regmap.regmap = st->reg_gpiocon_regmap; gpio_regmap.ngpio = st->info->num_gpios; gpio_regmap.reg_set_base = AD7173_REG_GPIO; - gpio_regmap.reg_mask_xlate = ad7173_mask_xlate; + if (st->info->higher_gpio_bits) + gpio_regmap.reg_mask_xlate = ad4111_mask_xlate; + else + gpio_regmap.reg_mask_xlate = ad7173_mask_xlate; st->gpio_regmap = devm_gpio_regmap_register(dev, &gpio_regmap); ret = PTR_ERR_OR_ZERO(st->gpio_regmap); @@ -682,18 +838,33 @@ static int ad7173_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: - if (chan->type == IIO_TEMP) { + + switch (chan->type) { + case IIO_TEMP: temp = AD7173_VOLTAGE_INT_REF_uV * MILLI; temp /= AD7173_TEMP_SENSIIVITY_uV_per_C; *val = temp; *val2 = chan->scan_type.realbits; - } else { + return IIO_VAL_FRACTIONAL_LOG2; + case IIO_VOLTAGE: *val = ad7173_get_ref_voltage_milli(st, ch->cfg.ref_sel); *val2 = chan->scan_type.realbits - !!(ch->cfg.bipolar); + + if (chan->channel < st->info->num_voltage_in_div) + *val *= AD4111_DIVIDER_RATIO; + return IIO_VAL_FRACTIONAL_LOG2; + case IIO_CURRENT: + *val = ad7173_get_ref_voltage_milli(st, ch->cfg.ref_sel); + *val /= AD4111_SHUNT_RESISTOR_OHM; + *val2 = chan->scan_type.realbits - ch->cfg.bipolar; + return IIO_VAL_FRACTIONAL_LOG2; + default: + return -EINVAL; } - return IIO_VAL_FRACTIONAL_LOG2; case IIO_CHAN_INFO_OFFSET: - if (chan->type == IIO_TEMP) { + + switch (chan->type) { + case IIO_TEMP: /* 0 Kelvin -> raw sample */ temp = -ABSOLUTE_ZERO_MILLICELSIUS; temp *= AD7173_TEMP_SENSIIVITY_uV_per_C; @@ -702,10 +873,14 @@ static int ad7173_read_raw(struct iio_dev *indio_dev, AD7173_VOLTAGE_INT_REF_uV * MILLI); *val = -temp; - } else { + return IIO_VAL_INT; + case IIO_VOLTAGE: + case IIO_CURRENT: *val = -BIT(chan->scan_type.realbits - 1); + return IIO_VAL_INT; + default: + return -EINVAL; } - return IIO_VAL_INT; case IIO_CHAN_INFO_SAMP_FREQ: reg = st->channels[chan->address].cfg.odr; @@ -927,6 +1102,23 @@ static int ad7173_register_clk_provider(struct iio_dev *indio_dev) &st->int_clk_hw); } +static int ad4111_validate_current_ain(struct ad7173_state *st, + const unsigned int ain[AD7173_NO_AINS_PER_CHANNEL]) +{ + struct device *dev = &st->sd.spi->dev; + + if (!st->info->has_current_inputs) + return dev_err_probe(dev, -EINVAL, + "Model %s does not support current channels\n", + st->info->name); + + if (ain[0] >= ARRAY_SIZE(ad4111_current_channel_config)) + return dev_err_probe(dev, -EINVAL, + "For current channels single-channel must be <[0-3]>\n"); + + return 0; +} + static int ad7173_validate_voltage_ain_inputs(struct ad7173_state *st, unsigned int ain0, unsigned int ain1) { @@ -938,14 +1130,33 @@ static int ad7173_validate_voltage_ain_inputs(struct ad7173_state *st, st->info->has_pow_supply_monitoring) return 0; - special_input0 = AD7173_IS_REF_INPUT(ain0); - special_input1 = AD7173_IS_REF_INPUT(ain1); + special_input0 = AD7173_IS_REF_INPUT(ain0) || + (ain0 == AD4111_VINCOM_INPUT && st->info->has_vincom_input); + special_input1 = AD7173_IS_REF_INPUT(ain1) || + (ain1 == AD4111_VINCOM_INPUT && st->info->has_vincom_input); + + if ((ain0 >= st->info->num_voltage_in && !special_input0) || + (ain1 >= st->info->num_voltage_in && !special_input1)) { + if (ain0 == AD4111_VINCOM_INPUT || ain1 == AD4111_VINCOM_INPUT) + return dev_err_probe(dev, -EINVAL, + "VINCOM not supported for %s\n", st->info->name); - if ((ain0 >= st->info->num_inputs && !special_input0) || - (ain1 >= st->info->num_inputs && !special_input1)) return dev_err_probe(dev, -EINVAL, "Input pin number out of range for pair (%d %d).\n", ain0, ain1); + } + + if (AD4111_IS_VINCOM_MISMATCH(ain0, ain1) || + AD4111_IS_VINCOM_MISMATCH(ain1, ain0)) + return dev_err_probe(dev, -EINVAL, + "VINCOM must be paired with inputs having divider.\n"); + + if (!special_input0 && !special_input1 && + ((ain0 >= st->info->num_voltage_in_div) != + (ain1 >= st->info->num_voltage_in_div))) + return dev_err_probe(dev, -EINVAL, + "Both inputs must either have a voltage divider or not have: (%d %d).\n", + ain0, ain1); return 0; } @@ -978,7 +1189,7 @@ static int ad7173_fw_parse_channel_config(struct iio_dev *indio_dev) struct device *dev = indio_dev->dev.parent; struct iio_chan_spec *chan_arr, *chan; unsigned int ain[AD7173_NO_AINS_PER_CHANNEL], chan_index = 0; - int ref_sel, ret, num_channels; + int ref_sel, ret, is_current_chan, num_channels; num_channels = device_get_child_node_count(dev); @@ -1025,15 +1236,38 @@ static int ad7173_fw_parse_channel_config(struct iio_dev *indio_dev) device_for_each_child_node_scoped(dev, child) { chan = &chan_arr[chan_index]; + *chan = ad7173_channel_template; chan_st_priv = &chans_st_arr[chan_index]; ret = fwnode_property_read_u32_array(child, "diff-channels", ain, ARRAY_SIZE(ain)); - if (ret) - return ret; + if (ret) { + ret = fwnode_property_read_u32(child, "single-channel", + ain); + if (ret) + return dev_err_probe(dev, ret, + "Channel must define one of diff-channels or single-channel.\n"); - ret = ad7173_validate_voltage_ain_inputs(st, ain[0], ain[1]); - if (ret) - return ret; + is_current_chan = fwnode_property_read_bool(child, "adi,current-channel"); + } else { + chan->differential = true; + } + + if (is_current_chan) { + ret = ad4111_validate_current_ain(st, ain); + if (ret) + return ret; + } else { + if (!chan->differential) { + ret = fwnode_property_read_u32(child, + "common-mode-channel", ain + 1); + if (ret) + return dev_err_probe(dev, ret, + "common-mode-channel must be defined for single-ended channels.\n"); + } + ret = ad7173_validate_voltage_ain_inputs(st, ain[0], ain[1]); + if (ret) + return ret; + } ret = fwnode_property_match_property_string(child, "adi,reference-select", @@ -1052,14 +1286,9 @@ static int ad7173_fw_parse_channel_config(struct iio_dev *indio_dev) st->adc_mode |= AD7173_ADC_MODE_REF_EN; chan_st_priv->cfg.ref_sel = ref_sel; - *chan = ad7173_channel_template; chan->address = chan_index; chan->scan_index = chan_index; chan->channel = ain[0]; - chan->channel2 = ain[1]; - chan->differential = true; - - chan_st_priv->ain = AD7173_CH_ADDRESS(ain[0], ain[1]); chan_st_priv->chan_reg = chan_index; chan_st_priv->cfg.input_buf = st->info->has_input_buf; chan_st_priv->cfg.odr = 0; @@ -1068,6 +1297,17 @@ static int ad7173_fw_parse_channel_config(struct iio_dev *indio_dev) if (chan_st_priv->cfg.bipolar) chan->info_mask_separate |= BIT(IIO_CHAN_INFO_OFFSET); + if (is_current_chan) { + chan->type = IIO_CURRENT; + chan->differential = false; + chan->channel2 = 0; + chan_st_priv->ain = ad4111_current_channel_config[ain[0]]; + } else { + chan_st_priv->cfg.input_buf = st->info->has_input_buf; + chan->channel2 = ain[1]; + chan_st_priv->ain = AD7173_CH_ADDRESS(ain[0], ain[1]); + } + chan_index++; } return 0; @@ -1194,6 +1434,11 @@ static int ad7173_probe(struct spi_device *spi) } static const struct of_device_id ad7173_of_match[] = { + { .compatible = "ad4111", .data = &ad4111_device_info }, + { .compatible = "ad4112", .data = &ad4112_device_info }, + { .compatible = "ad4114", .data = &ad4114_device_info }, + { .compatible = "ad4115", .data = &ad4115_device_info }, + { .compatible = "ad4116", .data = &ad4116_device_info }, { .compatible = "adi,ad7172-2", .data = &ad7172_2_device_info }, { .compatible = "adi,ad7172-4", .data = &ad7172_4_device_info }, { .compatible = "adi,ad7173-8", .data = &ad7173_8_device_info }, @@ -1206,6 +1451,11 @@ static const struct of_device_id ad7173_of_match[] = { MODULE_DEVICE_TABLE(of, ad7173_of_match); static const struct spi_device_id ad7173_id_table[] = { + { "ad4111", (kernel_ulong_t)&ad4111_device_info }, + { "ad4112", (kernel_ulong_t)&ad4112_device_info }, + { "ad4114", (kernel_ulong_t)&ad4114_device_info }, + { "ad4115", (kernel_ulong_t)&ad4115_device_info }, + { "ad4116", (kernel_ulong_t)&ad4116_device_info }, { "ad7172-2", (kernel_ulong_t)&ad7172_2_device_info }, { "ad7172-4", (kernel_ulong_t)&ad7172_4_device_info }, { "ad7173-8", (kernel_ulong_t)&ad7173_8_device_info }, @@ -1230,5 +1480,5 @@ module_spi_driver(ad7173_driver); MODULE_IMPORT_NS(IIO_AD_SIGMA_DELTA); MODULE_AUTHOR("Lars-Peter Clausen "); MODULE_AUTHOR("Dumitru Ceclan "); -MODULE_DESCRIPTION("Analog Devices AD7172/AD7173/AD7175/AD7176 ADC driver"); +MODULE_DESCRIPTION("Analog Devices AD7173 and similar ADC driver"); MODULE_LICENSE("GPL");