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Fri, 14 Jun 2024 07:28:28 +0000 Received: from MA0P287MB2822.INDP287.PROD.OUTLOOK.COM ([fe80::a94:ad0a:9071:806c]) by MA0P287MB2822.INDP287.PROD.OUTLOOK.COM ([fe80::a94:ad0a:9071:806c%3]) with mapi id 15.20.7677.024; Fri, 14 Jun 2024 07:28:28 +0000 Message-ID: Date: Fri, 14 Jun 2024 15:28:22 +0800 User-Agent: Mozilla Thunderbird To: Stephen Boyd , linux-clk@vger.kernel.org Cc: Conor Dooley , linux-riscv , Inochi Amaoto , Xiaoguang Xing , haijiao.liu@sophgo.com, Chao Wei , unicorn_wang@outlook.com From: Chen Wang Subject: [GIT PULL] RISC-V Sophgo SG2042 clock drivers for v6.11 X-TMN: [V6hmKVxa+2TXGYhWZ337mj1u1hjF14KI] X-ClientProxiedBy: SG2PR04CA0200.apcprd04.prod.outlook.com (2603:1096:4:187::15) To MA0P287MB2822.INDP287.PROD.OUTLOOK.COM (2603:1096:a01:138::5) X-Microsoft-Original-Message-ID: Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MA0P287MB2822:EE_|MA0P287MB0678:EE_ X-MS-Office365-Filtering-Correlation-Id: 1986975e-7254-490d-aa68-08dc8c43958a X-Microsoft-Antispam: BCL:0;ARA:14566002|461199023|3412199020|4302099008|440099023|1602099007|1710799023; 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For dts part, I will handle it at my side. I send this PR just want to expedite patches for this clock driver. The patches have gone through 16 rounds of review [1], and I have carefully checked and revised all of them based on everyone's comments. Link: https://lore.kernel.org/linux-riscv/cover.1717661798.git.unicorn_wang@outlook.com/ [1] Thanks, Chen. The following changes since commit 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0:   Linux 6.10-rc1 (2024-05-26 15:20:12 -0700) are available in the Git repository at:   https://github.com/sophgo/linux.git tags/riscv-sg2042-clk-for-v6.11 for you to fetch changes up to 48cf7e01386e7e35ea12255bc401bdd484c34e7d:   clk: sophgo: Add SG2042 clock driver (2024-06-14 14:49:40 +0800) ---------------------------------------------------------------- RISC-V SG2042 clock driver changes for v6.11 Sophgo: Added clock support for sg2042 Signed-off-by: Chen Wang ---------------------------------------------------------------- Chen Wang (4):       dt-bindings: clock: sophgo: add pll clocks for SG2042       dt-bindings: clock: sophgo: add RP gate clocks for SG2042       dt-bindings: clock: sophgo: add clkgen for SG2042       clk: sophgo: Add SG2042 clock driver  Documentation/devicetree/bindings/clock/sophgo,sg2042-clkgen.yaml |   61 +++++  Documentation/devicetree/bindings/clock/sophgo,sg2042-pll.yaml |   53 ++++  Documentation/devicetree/bindings/clock/sophgo,sg2042-rpgate.yaml |   49 ++++  drivers/clk/sophgo/Kconfig |   28 +++  drivers/clk/sophgo/Makefile |    4 +  drivers/clk/sophgo/clk-sg2042-clkgen.c | 1152 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++  drivers/clk/sophgo/clk-sg2042-pll.c |  570 ++++++++++++++++++++++++++++++++++++++++++  drivers/clk/sophgo/clk-sg2042-rpgate.c |  291 +++++++++++++++++++++  drivers/clk/sophgo/clk-sg2042.h |   18 ++  include/dt-bindings/clock/sophgo,sg2042-clkgen.h |  111 ++++++++  include/dt-bindings/clock/sophgo,sg2042-pll.h |   14 ++  include/dt-bindings/clock/sophgo,sg2042-rpgate.h |   58 +++++  12 files changed, 2409 insertions(+)  create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2042-clkgen.yaml  create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2042-pll.yaml  create mode 100644 Documentation/devicetree/bindings/clock/sophgo,sg2042-rpgate.yaml  create mode 100644 drivers/clk/sophgo/clk-sg2042-clkgen.c  create mode 100644 drivers/clk/sophgo/clk-sg2042-pll.c  create mode 100644 drivers/clk/sophgo/clk-sg2042-rpgate.c  create mode 100644 drivers/clk/sophgo/clk-sg2042.h  create mode 100644 include/dt-bindings/clock/sophgo,sg2042-clkgen.h  create mode 100644 include/dt-bindings/clock/sophgo,sg2042-pll.h  create mode 100644 include/dt-bindings/clock/sophgo,sg2042-rpgate.h