From patchwork Thu Feb 28 22:57:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabiano Rosas X-Patchwork-Id: 10834213 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 5524515AC for ; Thu, 28 Feb 2019 22:59:34 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 46FCF2F983 for ; Thu, 28 Feb 2019 22:59:34 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 392B62F9A3; Thu, 28 Feb 2019 22:59:34 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A195F2F983 for ; Thu, 28 Feb 2019 22:59:33 +0000 (UTC) Received: from localhost ([127.0.0.1]:47799 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzUeK-0003tz-SZ for patchwork-qemu-devel@patchwork.kernel.org; Thu, 28 Feb 2019 17:59:32 -0500 Received: from eggs.gnu.org ([209.51.188.92]:57690) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzUd3-0002kb-U7 for qemu-devel@nongnu.org; Thu, 28 Feb 2019 17:58:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gzUd3-0001m7-0V for qemu-devel@nongnu.org; Thu, 28 Feb 2019 17:58:13 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:33882 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gzUd2-0001le-LT for qemu-devel@nongnu.org; Thu, 28 Feb 2019 17:58:12 -0500 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x1SMsHZ5055836 for ; Thu, 28 Feb 2019 17:58:12 -0500 Received: from e14.ny.us.ibm.com (e14.ny.us.ibm.com [129.33.205.204]) by mx0b-001b2d01.pphosted.com with ESMTP id 2qxnus8akd-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 28 Feb 2019 17:58:12 -0500 Received: from localhost by e14.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 28 Feb 2019 22:58:09 -0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x1SMw8jh15532254 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 28 Feb 2019 22:58:08 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1BA5C112061; Thu, 28 Feb 2019 22:58:08 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7852D112062; Thu, 28 Feb 2019 22:58:06 +0000 (GMT) Received: from farosas.linux.ibm.com.ibmmodules.com (unknown [9.80.200.125]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 28 Feb 2019 22:58:06 +0000 (GMT) From: Fabiano Rosas To: qemu-devel@nongnu.org Date: Thu, 28 Feb 2019 19:57:55 -0300 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190228225759.21328-1-farosas@linux.ibm.com> References: <20190228225759.21328-1-farosas@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19022822-0052-0000-0000-000003927A49 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010682; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01167780; UDB=6.00610101; IPR=6.00948393; MB=3.00025786; MTD=3.00000008; XFM=3.00000015; UTC=2019-02-28 22:58:10 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19022822-0053-0000-0000-00006000A2B0 Message-Id: <20190228225759.21328-2-farosas@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-02-28_14:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=29 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1902280152 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [RFC PATCH v4 1/5] target/ppc: Move exception vector offset computation into a function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexey Kardashevskiy , Paolo Bonzini , Richard Henderson , qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Fabiano Rosas Reviewed-by: Alexey Kardashevskiy --- target/ppc/excp_helper.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 39bedbb11d..beafcf1ebd 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -107,6 +107,24 @@ static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp, return POWERPC_EXCP_RESET; } +static uint64_t ppc_excp_vector_offset(CPUState *cs, int ail) +{ + uint64_t offset = 0; + + switch (ail) { + case AIL_0001_8000: + offset = 0x18000; + break; + case AIL_C000_0000_0000_4000: + offset = 0xc000000000004000ull; + break; + default: + cpu_abort(cs, "Invalid AIL combination %d\n", ail); + break; + } + + return offset; +} /* Note that this function should be greatly optimized * when called with a constant excp, from ppc_hw_interrupt @@ -708,17 +726,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) /* Handle AIL */ if (ail) { new_msr |= (1 << MSR_IR) | (1 << MSR_DR); - switch(ail) { - case AIL_0001_8000: - vector |= 0x18000; - break; - case AIL_C000_0000_0000_4000: - vector |= 0xc000000000004000ull; - break; - default: - cpu_abort(cs, "Invalid AIL combination %d\n", ail); - break; - } + vector |= ppc_excp_vector_offset(cs, ail); } #if defined(TARGET_PPC64) From patchwork Thu Feb 28 22:57:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabiano Rosas X-Patchwork-Id: 10834219 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E65721399 for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 28 Feb 2019 22:58:12 -0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x1SMwB1824838250 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 28 Feb 2019 22:58:11 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2DDCB112061; Thu, 28 Feb 2019 22:58:11 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8567A112065; Thu, 28 Feb 2019 22:58:09 +0000 (GMT) Received: from farosas.linux.ibm.com.ibmmodules.com (unknown [9.80.200.125]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 28 Feb 2019 22:58:09 +0000 (GMT) From: Fabiano Rosas To: qemu-devel@nongnu.org Date: Thu, 28 Feb 2019 19:57:56 -0300 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190228225759.21328-1-farosas@linux.ibm.com> References: <20190228225759.21328-1-farosas@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19022822-0060-0000-0000-00000313DF27 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010682; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01167780; UDB=6.00610102; IPR=6.00948394; MB=3.00025786; MTD=3.00000008; XFM=3.00000015; UTC=2019-02-28 22:58:14 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19022822-0061-0000-0000-000048754906 Message-Id: <20190228225759.21328-3-farosas@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-02-28_14:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1902280152 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [RFC PATCH v4 2/5] kvm-all: Introduce kvm_set_singlestep X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexey Kardashevskiy , Paolo Bonzini , Richard Henderson , qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP For single stepping (via KVM) of a guest vcpu to work, KVM needs not only to support the SET_GUEST_DEBUG ioctl but to also recognize the KVM_GUESTDBG_SINGLESTEP bit in the control field of the kvm_guest_debug struct. This patch adds support for querying the single step capability so that QEMU can decide what to do for the platforms that do not have such support. This will allow architecture-specific implementations of a fallback mechanism for single stepping in cases where KVM does not support it. Signed-off-by: Fabiano Rosas --- accel/kvm/kvm-all.c | 16 ++++++++++++++++ accel/stubs/kvm-stub.c | 4 ++++ exec.c | 2 +- include/sysemu/kvm.h | 3 +++ stubs/Makefile.objs | 1 + stubs/kvm-arch-set-singlestep.c | 8 ++++++++ 6 files changed, 33 insertions(+), 1 deletion(-) create mode 100644 stubs/kvm-arch-set-singlestep.c diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c index fd92b6f375..d3ac5a9e5c 100644 --- a/accel/kvm/kvm-all.c +++ b/accel/kvm/kvm-all.c @@ -2267,6 +2267,13 @@ bool kvm_arm_supports_user_irq(void) return kvm_check_extension(kvm_state, KVM_CAP_ARM_USER_IRQ); } +/* Whether the KVM_SET_GUEST_DEBUG ioctl supports single stepping */ +int kvm_has_guestdbg_singlestep(void) +{ + /* return kvm_check_extension(kvm_state, KVM_CAP_GUEST_DEBUG_SSTEP); */ + return 0; +} + #ifdef KVM_CAP_SET_GUEST_DEBUG struct kvm_sw_breakpoint *kvm_find_sw_breakpoint(CPUState *cpu, target_ulong pc) @@ -2316,6 +2323,15 @@ int kvm_update_guest_debug(CPUState *cpu, unsigned long reinject_trap) return data.err; } +void kvm_set_singlestep(CPUState *cs, int enabled) +{ + if (kvm_has_guestdbg_singlestep()) { + kvm_update_guest_debug(cs, 0); + } else { + kvm_arch_set_singlestep(cs, enabled); + } +} + int kvm_insert_breakpoint(CPUState *cpu, target_ulong addr, target_ulong len, int type) { diff --git a/accel/stubs/kvm-stub.c b/accel/stubs/kvm-stub.c index 02d5170031..69bd07f50e 100644 --- a/accel/stubs/kvm-stub.c +++ b/accel/stubs/kvm-stub.c @@ -79,6 +79,10 @@ int kvm_update_guest_debug(CPUState *cpu, unsigned long reinject_trap) return -ENOSYS; } +void kvm_set_singlestep(CPUState *cs, int enabled) +{ +} + int kvm_insert_breakpoint(CPUState *cpu, target_ulong addr, target_ulong len, int type) { diff --git a/exec.c b/exec.c index 518064530b..8817513e26 100644 --- a/exec.c +++ b/exec.c @@ -1236,7 +1236,7 @@ void cpu_single_step(CPUState *cpu, int enabled) if (cpu->singlestep_enabled != enabled) { cpu->singlestep_enabled = enabled; if (kvm_enabled()) { - kvm_update_guest_debug(cpu, 0); + kvm_set_singlestep(cpu, enabled); } else { /* must flush all the translated code to avoid inconsistencies */ /* XXX: only flush what is necessary */ diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h index a6d1cd190f..e1ef2f5b99 100644 --- a/include/sysemu/kvm.h +++ b/include/sysemu/kvm.h @@ -214,6 +214,7 @@ int kvm_has_pit_state2(void); int kvm_has_many_ioeventfds(void); int kvm_has_gsi_routing(void); int kvm_has_intx_set_mask(void); +int kvm_has_guestdbg_singlestep(void); int kvm_init_vcpu(CPUState *cpu); int kvm_cpu_exec(CPUState *cpu); @@ -246,6 +247,7 @@ bool kvm_memcrypt_enabled(void); */ int kvm_memcrypt_encrypt_data(uint8_t *ptr, uint64_t len); +void kvm_arch_set_singlestep(CPUState *cpu, int enabled); #ifdef NEED_CPU_H #include "cpu.h" @@ -258,6 +260,7 @@ int kvm_remove_breakpoint(CPUState *cpu, target_ulong addr, target_ulong len, int type); void kvm_remove_all_breakpoints(CPUState *cpu); int kvm_update_guest_debug(CPUState *cpu, unsigned long reinject_trap); +void kvm_set_singlestep(CPUState *cs, int enabled); int kvm_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); int kvm_on_sigbus(int code, void *addr); diff --git a/stubs/Makefile.objs b/stubs/Makefile.objs index 269dfa5832..884f9b2268 100644 --- a/stubs/Makefile.objs +++ b/stubs/Makefile.objs @@ -12,6 +12,7 @@ stub-obj-y += get-vm-name.o stub-obj-y += iothread.o stub-obj-y += iothread-lock.o stub-obj-y += is-daemonized.o +stub-obj-y += kvm-arch-set-singlestep.o stub-obj-$(CONFIG_LINUX_AIO) += linux-aio.o stub-obj-y += machine-init-done.o stub-obj-y += migr-blocker.o diff --git a/stubs/kvm-arch-set-singlestep.c b/stubs/kvm-arch-set-singlestep.c new file mode 100644 index 0000000000..ba6e0323d6 --- /dev/null +++ b/stubs/kvm-arch-set-singlestep.c @@ -0,0 +1,8 @@ +#include "qemu/osdep.h" +#include "qemu/error-report.h" +#include "sysemu/kvm.h" + +void kvm_arch_set_singlestep(CPUState *cpu, int enabled) +{ + warn_report("KVM does not support single stepping"); +} From patchwork Thu Feb 28 22:57:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabiano Rosas X-Patchwork-Id: 10834217 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F2F0A1399 for ; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 28 Feb 2019 22:58:15 -0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x1SMwENq22937612 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 28 Feb 2019 22:58:14 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3ECD8112064; Thu, 28 Feb 2019 22:58:14 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 99745112061; Thu, 28 Feb 2019 22:58:12 +0000 (GMT) Received: from farosas.linux.ibm.com.ibmmodules.com (unknown [9.80.200.125]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 28 Feb 2019 22:58:12 +0000 (GMT) From: Fabiano Rosas To: qemu-devel@nongnu.org Date: Thu, 28 Feb 2019 19:57:57 -0300 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190228225759.21328-1-farosas@linux.ibm.com> References: <20190228225759.21328-1-farosas@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19022822-0072-0000-0000-00000401BEBF X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010682; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01167780; UDB=6.00610102; IPR=6.00948392; MB=3.00025786; MTD=3.00000008; XFM=3.00000015; UTC=2019-02-28 22:58:17 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19022822-0073-0000-0000-00004B553F7D Message-Id: <20190228225759.21328-4-farosas@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-02-28_14:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=923 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1902280152 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [RFC PATCH v4 3/5] target/ppc: Move handling of hardware breakpoints to a separate function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexey Kardashevskiy , Paolo Bonzini , Richard Henderson , qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP This is in preparation for a refactoring of the kvm_handle_debug function in the next patch. Signed-off-by: Fabiano Rosas --- target/ppc/kvm.c | 47 ++++++++++++++++++++++++++++------------------- 1 file changed, 28 insertions(+), 19 deletions(-) diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index d01852fe31..941c4e7523 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -1593,35 +1593,44 @@ void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg) } } +static int kvm_handle_hw_breakpoint(CPUState *cs, + struct kvm_debug_exit_arch *arch_info) +{ + int handle = 0; + int n; + int flag = 0; + + if (nb_hw_breakpoint + nb_hw_watchpoint > 0) { + if (arch_info->status & KVMPPC_DEBUG_BREAKPOINT) { + n = find_hw_breakpoint(arch_info->address, GDB_BREAKPOINT_HW); + if (n >= 0) { + handle = 1; + } + } else if (arch_info->status & (KVMPPC_DEBUG_WATCH_READ | + KVMPPC_DEBUG_WATCH_WRITE)) { + n = find_hw_watchpoint(arch_info->address, &flag); + if (n >= 0) { + handle = 1; + cs->watchpoint_hit = &hw_watchpoint; + hw_watchpoint.vaddr = hw_debug_points[n].addr; + hw_watchpoint.flags = flag; + } + } + } + return handle; +} + static int kvm_handle_debug(PowerPCCPU *cpu, struct kvm_run *run) { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; struct kvm_debug_exit_arch *arch_info = &run->debug.arch; int handle = 0; - int n; - int flag = 0; if (cs->singlestep_enabled) { handle = 1; } else if (arch_info->status) { - if (nb_hw_breakpoint + nb_hw_watchpoint > 0) { - if (arch_info->status & KVMPPC_DEBUG_BREAKPOINT) { - n = find_hw_breakpoint(arch_info->address, GDB_BREAKPOINT_HW); - if (n >= 0) { - handle = 1; - } - } else if (arch_info->status & (KVMPPC_DEBUG_WATCH_READ | - KVMPPC_DEBUG_WATCH_WRITE)) { - n = find_hw_watchpoint(arch_info->address, &flag); - if (n >= 0) { - handle = 1; - cs->watchpoint_hit = &hw_watchpoint; - hw_watchpoint.vaddr = hw_debug_points[n].addr; - hw_watchpoint.flags = flag; - } - } - } + handle = kvm_handle_hw_breakpoint(cs, arch_info); } else if (kvm_find_sw_breakpoint(cs, arch_info->address)) { handle = 1; } else { From patchwork Thu Feb 28 22:57:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabiano Rosas X-Patchwork-Id: 10834215 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A34E8180E for ; Thu, 28 Feb 2019 22:59:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 94B032F985 for ; Thu, 28 Feb 2019 22:59:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 88C882F9A7; Thu, 28 Feb 2019 22:59:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 08DAF2F985 for ; Thu, 28 Feb 2019 22:59:36 +0000 (UTC) Received: from localhost ([127.0.0.1]:47801 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzUeN-0003wL-AX for patchwork-qemu-devel@patchwork.kernel.org; Thu, 28 Feb 2019 17:59:35 -0500 Received: from eggs.gnu.org ([209.51.188.92]:57808) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzUdD-0002sh-Eb for qemu-devel@nongnu.org; Thu, 28 Feb 2019 17:58:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gzUdC-0001vK-FL for qemu-devel@nongnu.org; Thu, 28 Feb 2019 17:58:23 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:35004 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gzUdC-0001uf-8p for qemu-devel@nongnu.org; Thu, 28 Feb 2019 17:58:22 -0500 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x1SMsHcl055827 for ; Thu, 28 Feb 2019 17:58:21 -0500 Received: from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206]) by mx0b-001b2d01.pphosted.com with ESMTP id 2qxnus8as0-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 28 Feb 2019 17:58:21 -0500 Received: from localhost by e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 28 Feb 2019 22:58:18 -0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x1SMwHY623003310 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 28 Feb 2019 22:58:17 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 50A44112062; Thu, 28 Feb 2019 22:58:17 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A64F6112061; Thu, 28 Feb 2019 22:58:15 +0000 (GMT) Received: from farosas.linux.ibm.com.ibmmodules.com (unknown [9.80.200.125]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 28 Feb 2019 22:58:15 +0000 (GMT) From: Fabiano Rosas To: qemu-devel@nongnu.org Date: Thu, 28 Feb 2019 19:57:58 -0300 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190228225759.21328-1-farosas@linux.ibm.com> References: <20190228225759.21328-1-farosas@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19022822-0072-0000-0000-00000401BEC1 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010682; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01167780; UDB=6.00610102; IPR=6.00948392; MB=3.00025786; MTD=3.00000008; XFM=3.00000015; UTC=2019-02-28 22:58:20 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19022822-0073-0000-0000-00004B553F85 Message-Id: <20190228225759.21328-5-farosas@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-02-28_14:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=29 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=955 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1902280152 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [RFC PATCH v4 4/5] target/ppc: Refactor kvm_handle_debug X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexey Kardashevskiy , Paolo Bonzini , Richard Henderson , qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP There are four scenarios being handled in this function: - single stepping - hardware breakpoints - software breakpoints - fallback (no debug supported) A future patch will add code to handle specific single step and software breakpoints cases so let's split each scenario into its own function now to avoid hurting readability. Signed-off-by: Fabiano Rosas Reviewed-by: Alexey Kardashevskiy --- target/ppc/kvm.c | 86 ++++++++++++++++++++++++++++-------------------- 1 file changed, 50 insertions(+), 36 deletions(-) diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 941c4e7523..9392fba192 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -1620,52 +1620,66 @@ static int kvm_handle_hw_breakpoint(CPUState *cs, return handle; } +static int kvm_handle_singlestep(void) +{ + return 1; +} + +static int kvm_handle_sw_breakpoint(void) +{ + return 1; +} + static int kvm_handle_debug(PowerPCCPU *cpu, struct kvm_run *run) { CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; struct kvm_debug_exit_arch *arch_info = &run->debug.arch; - int handle = 0; if (cs->singlestep_enabled) { - handle = 1; - } else if (arch_info->status) { - handle = kvm_handle_hw_breakpoint(cs, arch_info); - } else if (kvm_find_sw_breakpoint(cs, arch_info->address)) { - handle = 1; - } else { - /* QEMU is not able to handle debug exception, so inject - * program exception to guest; - * Yes program exception NOT debug exception !! - * When QEMU is using debug resources then debug exception must - * be always set. To achieve this we set MSR_DE and also set - * MSRP_DEP so guest cannot change MSR_DE. - * When emulating debug resource for guest we want guest - * to control MSR_DE (enable/disable debug interrupt on need). - * Supporting both configurations are NOT possible. - * So the result is that we cannot share debug resources - * between QEMU and Guest on BOOKE architecture. - * In the current design QEMU gets the priority over guest, - * this means that if QEMU is using debug resources then guest - * cannot use them; - * For software breakpoint QEMU uses a privileged instruction; - * So there cannot be any reason that we are here for guest - * set debug exception, only possibility is guest executed a - * privileged / illegal instruction and that's why we are - * injecting a program interrupt. - */ + return kvm_handle_singlestep(); + } + + if (arch_info->status) { + return kvm_handle_hw_breakpoint(cs, arch_info); + } - cpu_synchronize_state(cs); - /* env->nip is PC, so increment this by 4 to use - * ppc_cpu_do_interrupt(), which set srr0 = env->nip - 4. - */ - env->nip += 4; - cs->exception_index = POWERPC_EXCP_PROGRAM; - env->error_code = POWERPC_EXCP_INVAL; - ppc_cpu_do_interrupt(cs); + if (kvm_find_sw_breakpoint(cs, arch_info->address)) { + return kvm_handle_sw_breakpoint(); } - return handle; + /* + * QEMU is not able to handle debug exception, so inject + * program exception to guest; + * Yes program exception NOT debug exception !! + * When QEMU is using debug resources then debug exception must + * be always set. To achieve this we set MSR_DE and also set + * MSRP_DEP so guest cannot change MSR_DE. + * When emulating debug resource for guest we want guest + * to control MSR_DE (enable/disable debug interrupt on need). + * Supporting both configurations are NOT possible. + * So the result is that we cannot share debug resources + * between QEMU and Guest on BOOKE architecture. + * In the current design QEMU gets the priority over guest, + * this means that if QEMU is using debug resources then guest + * cannot use them; + * For software breakpoint QEMU uses a privileged instruction; + * So there cannot be any reason that we are here for guest + * set debug exception, only possibility is guest executed a + * privileged / illegal instruction and that's why we are + * injecting a program interrupt. + */ + cpu_synchronize_state(cs); + /* + * env->nip is PC, so increment this by 4 to use + * ppc_cpu_do_interrupt(), which set srr0 = env->nip - 4. + */ + env->nip += 4; + cs->exception_index = POWERPC_EXCP_PROGRAM; + env->error_code = POWERPC_EXCP_INVAL; + ppc_cpu_do_interrupt(cs); + + return 0; } int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run) From patchwork Thu Feb 28 22:57:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabiano Rosas X-Patchwork-Id: 10834221 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C0C27180E for ; Thu, 28 Feb 2019 23:04:25 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A256A28639 for ; Thu, 28 Feb 2019 23:04:25 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 92D8C28644; Thu, 28 Feb 2019 23:04:25 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B07A428639 for ; Thu, 28 Feb 2019 23:04:24 +0000 (UTC) Received: from localhost ([127.0.0.1]:47874 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzUj1-0007Aa-Ox for patchwork-qemu-devel@patchwork.kernel.org; Thu, 28 Feb 2019 18:04:23 -0500 Received: from eggs.gnu.org ([209.51.188.92]:57841) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzUdG-0002vw-O8 for qemu-devel@nongnu.org; Thu, 28 Feb 2019 17:58:28 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gzUdF-0001yQ-04 for qemu-devel@nongnu.org; Thu, 28 Feb 2019 17:58:26 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:54808 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gzUdE-0001xu-Mf for qemu-devel@nongnu.org; Thu, 28 Feb 2019 17:58:24 -0500 Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x1SMsEpn109905 for ; Thu, 28 Feb 2019 17:58:24 -0500 Received: from e11.ny.us.ibm.com (e11.ny.us.ibm.com [129.33.205.201]) by mx0b-001b2d01.pphosted.com with ESMTP id 2qxq6bmmb1-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 28 Feb 2019 17:58:24 -0500 Received: from localhost by e11.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 28 Feb 2019 22:58:21 -0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x1SMwKUx16711934 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 28 Feb 2019 22:58:20 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 63539112063; Thu, 28 Feb 2019 22:58:20 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BAF62112061; Thu, 28 Feb 2019 22:58:18 +0000 (GMT) Received: from farosas.linux.ibm.com.ibmmodules.com (unknown [9.80.200.125]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Thu, 28 Feb 2019 22:58:18 +0000 (GMT) From: Fabiano Rosas To: qemu-devel@nongnu.org Date: Thu, 28 Feb 2019 19:57:59 -0300 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190228225759.21328-1-farosas@linux.ibm.com> References: <20190228225759.21328-1-farosas@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19022822-2213-0000-0000-0000035A8169 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00010682; HX=3.00000242; KW=3.00000007; PH=3.00000004; SC=3.00000281; SDB=6.01167781; UDB=6.00610102; IPR=6.00948394; MB=3.00025786; MTD=3.00000008; XFM=3.00000015; UTC=2019-02-28 22:58:23 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19022822-2214-0000-0000-00005D83469B Message-Id: <20190228225759.21328-6-farosas@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-02-28_14:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=526 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1902280152 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [RFC PATCH v4 5/5] target/ppc: support single stepping with KVM HV X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexey Kardashevskiy , Paolo Bonzini , Richard Henderson , qemu-ppc@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The hardware singlestep mechanism in POWER works via a Trace Interrupt (0xd00) that happens after any instruction executes, whenever MSR_SE = 1 (PowerISA Section 6.5.15 - Trace Interrupt). However, with kvm_hv, the Trace Interrupt happens inside the guest and KVM has no visibility of it. Therefore, when the gdbstub uses the KVM_SET_GUEST_DEBUG ioctl to enable singlestep, KVM simply ignores it. This patch takes advantage of the Trace Interrupt to perform the step inside the guest, but uses a breakpoint at the Trace Interrupt handler to return control to KVM. The exit is treated by KVM as a regular breakpoint and it returns to the host (and QEMU eventually). Before signalling GDB, QEMU sets the Next Instruction Pointer to the instruction following the one being stepped and restores the MSR, SRR0, SRR1 values from before the step, effectively skipping the interrupt handler execution and hiding the trace interrupt breakpoint from GDB. This approach works with both of GDB's 'scheduler-locking' options (off, step). Note: - kvm_arch_set_singlestep happens after GDB asks for a single step, while the vcpus are stopped. - kvm_handle_singlestep executes after the step, during the handling of the Emulation Assist Interrupt (breakpoint). Signed-off-by: Fabiano Rosas Reviewed-by: Alexey Kardashevskiy --- target/ppc/cpu.h | 16 ++++ target/ppc/excp_helper.c | 13 +++ target/ppc/gdbstub.c | 35 +++++++ target/ppc/kvm.c | 195 +++++++++++++++++++++++++++++++++++++-- 4 files changed, 252 insertions(+), 7 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 26604ddf98..fb1bf1e9d7 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1171,6 +1171,11 @@ struct CPUPPCState { uint32_t tm_vscr; uint64_t tm_dscr; uint64_t tm_tar; + + /* Used for software single step */ + target_ulong sstep_msr; + target_ulong sstep_srr0; + target_ulong sstep_srr1; }; #define SET_FIT_PERIOD(a_, b_, c_, d_) \ @@ -1266,6 +1271,7 @@ struct PPCVirtualHypervisorClass { OBJECT_GET_CLASS(PPCVirtualHypervisorClass, (obj), \ TYPE_PPC_VIRTUAL_HYPERVISOR) +target_ulong ppc_get_trace_int_handler_addr(CPUState *cs); void ppc_cpu_do_interrupt(CPUState *cpu); bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req); void ppc_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, @@ -1281,6 +1287,12 @@ int ppc_cpu_gdb_write_register_apple(CPUState *cpu, uint8_t *buf, int reg); void ppc_gdb_gen_spr_xml(PowerPCCPU *cpu); const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name); #endif +uint32_t ppc_gdb_read_insn(CPUState *cs, target_ulong addr); +uint32_t ppc_gdb_get_op(uint32_t insn); +uint32_t ppc_gdb_get_xop(uint32_t insn); +uint32_t ppc_gdb_get_spr(uint32_t insn); +uint32_t ppc_gdb_get_rt(uint32_t insn); + int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, int cpuid, void *opaque); int ppc32_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs, @@ -2227,6 +2239,10 @@ enum { PPC2_ISA300) }; +#define XOP_RFID 18 +#define XOP_MFMSR 83 +#define XOP_MTSPR 467 + /*****************************************************************************/ /* Memory access type : * may be needed for precise access rights control and precise exceptions. diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index beafcf1ebd..cf8c86de91 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -112,6 +112,8 @@ static uint64_t ppc_excp_vector_offset(CPUState *cs, int ail) uint64_t offset = 0; switch (ail) { + case AIL_NONE: + break; case AIL_0001_8000: offset = 0x18000; break; @@ -768,6 +770,17 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) check_tlb_flush(env, false); } +target_ulong ppc_get_trace_int_handler_addr(CPUState *cs) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + int ail; + + ail = (env->spr[SPR_LPCR] & LPCR_AIL) >> LPCR_AIL_SHIFT; + return env->excp_vectors[POWERPC_EXCP_TRACE] | + ppc_excp_vector_offset(cs, ail); +} + void ppc_cpu_do_interrupt(CPUState *cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); diff --git a/target/ppc/gdbstub.c b/target/ppc/gdbstub.c index fbf3821f4b..a5b2705ade 100644 --- a/target/ppc/gdbstub.c +++ b/target/ppc/gdbstub.c @@ -380,3 +380,38 @@ const char *ppc_gdb_get_dynamic_xml(CPUState *cs, const char *xml_name) return NULL; } #endif + +uint32_t ppc_gdb_read_insn(CPUState *cs, target_ulong addr) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + uint32_t insn; + + cpu_memory_rw_debug(cs, addr, (uint8_t *)&insn, sizeof(insn), 0); + + if (msr_le) { + return ldl_le_p(&insn); + } else { + return ldl_be_p(&insn); + } +} + +uint32_t ppc_gdb_get_op(uint32_t insn) +{ + return extract32(insn, 26, 6); +} + +uint32_t ppc_gdb_get_xop(uint32_t insn) +{ + return extract32(insn, 1, 10); +} + +uint32_t ppc_gdb_get_spr(uint32_t insn) +{ + return extract32(insn, 11, 5) << 5 | extract32(insn, 16, 5); +} + +uint32_t ppc_gdb_get_rt(uint32_t insn) +{ + return extract32(insn, 21, 5); +} diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 9392fba192..2bcb8814f4 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -1554,6 +1554,86 @@ void kvm_arch_remove_all_hw_breakpoints(void) nb_hw_breakpoint = nb_hw_watchpoint = 0; } +void kvm_arch_set_singlestep(CPUState *cs, int enabled) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + target_ulong trace_handler_addr; + uint32_t insn; + bool rfid; + + if (!enabled) { + return; + } + + cpu_synchronize_state(cs); + insn = ppc_gdb_read_insn(cs, env->nip); + + /* + * rfid needs special handling because it: + * - overwrites NIP with SRR0; + * - overwrites MSR with SRR1; + * - cannot be single stepped. + */ + rfid = ppc_gdb_get_op(insn) == 19 && ppc_gdb_get_xop(insn) == XOP_RFID; + + if (rfid && kvm_find_sw_breakpoint(cs, env->spr[SPR_SRR0])) { + /* + * There is a breakpoint at the next instruction address. It + * will already cause the vm exit we need for the single step, + * so there's nothing to be done. + */ + return; + } + + /* + * Save the registers that will be affected by the single step + * mechanism. These will be restored after the step at + * kvm_handle_singlestep. + */ + env->sstep_msr = env->msr; + env->sstep_srr0 = env->spr[SPR_SRR0]; + env->sstep_srr1 = env->spr[SPR_SRR1]; + + /* + * MSR_SE = 1 will cause a Trace Interrupt in the guest after the + * next instruction executes. If this is a rfid, use SRR1 instead + * of MSR. + */ + if (rfid) { + if ((env->spr[SPR_SRR1] >> MSR_SE) & 1) { + /* + * The guest is doing a single step itself. Make sure we + * restore it later. + */ + env->sstep_msr |= (1ULL << MSR_SE); + } + + env->spr[SPR_SRR1] |= (1ULL << MSR_SE); + } else { + env->msr |= (1ULL << MSR_SE); + } + + /* + * We set a breakpoint at the interrupt handler address so + * that the singlestep will be seen by KVM (this is treated by + * KVM like an ordinary breakpoint) and control is returned to + * QEMU. + */ + trace_handler_addr = ppc_get_trace_int_handler_addr(cs); + + if (env->nip == trace_handler_addr) { + /* + * We are trying to step over the interrupt handler + * address itself; move the breakpoint to the next + * instruction. + */ + trace_handler_addr += 4; + } + + kvm_insert_breakpoint(cs, trace_handler_addr, 4, GDB_BREAKPOINT_SW); +} + void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg) { int n; @@ -1593,6 +1673,91 @@ void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg) } } +/* Revert any side-effects caused during single step */ +static void restore_singlestep_env(CPUState *cs) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + uint32_t insn; + int reg; + int spr; + + insn = ppc_gdb_read_insn(cs, env->spr[SPR_SRR0] - 4); + + env->spr[SPR_SRR0] = env->sstep_srr0; + env->spr[SPR_SRR1] = env->sstep_srr1; + + if (ppc_gdb_get_op(insn) != 31) { + return; + } + + reg = ppc_gdb_get_rt(insn); + + switch (ppc_gdb_get_xop(insn)) { + case XOP_MTSPR: + /* + * mtspr: the guest altered the SRR, so do not use the + * pre-step value. + */ + spr = ppc_gdb_get_spr(insn); + if (spr == SPR_SRR0 || spr == SPR_SRR1) { + env->spr[spr] = env->gpr[reg]; + } + break; + case XOP_MFMSR: + /* + * mfmsr: clear MSR_SE bit to avoid the guest knowing + * that it is being single-stepped. + */ + env->gpr[reg] &= ~(1ULL << MSR_SE); + break; + } +} + +static int kvm_handle_singlestep(CPUState *cs, target_ulong address) +{ + PowerPCCPU *cpu = POWERPC_CPU(cs); + CPUPPCState *env = &cpu->env; + target_ulong trace_handler_addr; + + if (kvm_has_guestdbg_singlestep()) { + return 1; + } + + cpu_synchronize_state(cs); + trace_handler_addr = ppc_get_trace_int_handler_addr(cs); + + if (address == trace_handler_addr) { + kvm_remove_breakpoint(cs, trace_handler_addr, 4, GDB_BREAKPOINT_SW); + + if (env->sstep_msr & (1ULL << MSR_SE)) { + /* + * The guest expects the last instruction to have caused a + * single step, go back into the interrupt handler. + */ + return 1; + } + + env->nip = env->spr[SPR_SRR0]; + /* Bits 33-36, 43-47 are set by the interrupt */ + env->msr = env->spr[SPR_SRR1] & ~(1ULL << MSR_SE | + PPC_BITMASK(33, 36) | + PPC_BITMASK(43, 47)); + restore_singlestep_env(cs); + + } else if (address == trace_handler_addr + 4) { + /* + * A step at trace_handler_addr would interfere with the + * singlestep mechanism itself, so we have previously + * displaced the breakpoint to the next instruction. + */ + kvm_remove_breakpoint(cs, trace_handler_addr + 4, 4, GDB_BREAKPOINT_SW); + restore_singlestep_env(cs); + } + + return 1; +} + static int kvm_handle_hw_breakpoint(CPUState *cs, struct kvm_debug_exit_arch *arch_info) { @@ -1620,13 +1785,29 @@ static int kvm_handle_hw_breakpoint(CPUState *cs, return handle; } -static int kvm_handle_singlestep(void) +static int kvm_handle_sw_breakpoint(CPUState *cs, target_ulong address) { - return 1; -} + target_ulong trace_handler_addr; -static int kvm_handle_sw_breakpoint(void) -{ + if (kvm_has_guestdbg_singlestep()) { + return 1; + } + + cpu_synchronize_state(cs); + trace_handler_addr = ppc_get_trace_int_handler_addr(cs); + + if (address == trace_handler_addr) { + CPU_FOREACH(cs) { + if (cs->singlestep_enabled) { + /* + * We hit this breakpoint while another cpu is doing a + * software single step. Go back into the guest to + * give chance for the single step to finish. + */ + return 0; + } + } + } return 1; } @@ -1637,7 +1818,7 @@ static int kvm_handle_debug(PowerPCCPU *cpu, struct kvm_run *run) struct kvm_debug_exit_arch *arch_info = &run->debug.arch; if (cs->singlestep_enabled) { - return kvm_handle_singlestep(); + return kvm_handle_singlestep(cs, arch_info->address); } if (arch_info->status) { @@ -1645,7 +1826,7 @@ static int kvm_handle_debug(PowerPCCPU *cpu, struct kvm_run *run) } if (kvm_find_sw_breakpoint(cs, arch_info->address)) { - return kvm_handle_sw_breakpoint(); + return kvm_handle_sw_breakpoint(cs, arch_info->address); } /*