From patchwork Tue Jun 18 15:59:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702559 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8C672C2BA18 for ; Tue, 18 Jun 2024 16:03:50 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbGU-0003J2-AB; Tue, 18 Jun 2024 12:00:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbGN-0003Gq-9B for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:00:51 -0400 Received: from mail-ed1-x533.google.com ([2a00:1450:4864:20::533]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sJbGL-0006jV-Lr for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:00:51 -0400 Received: by mail-ed1-x533.google.com with SMTP id 4fb4d7f45d1cf-57cf8880f95so1498525a12.3 for ; Tue, 18 Jun 2024 09:00:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1718726448; x=1719331248; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6hsn1dzY26DF1TLxl9KireRz1A8Sf8ZBFLuWm3kWcmI=; b=AIZaWhQfJcJKlb1HjPXlrqbFKmOpnwXozCyJH20MRnmIPxm0O8rP9GzMiIRJ7Tnk9W RqCadU554s7xsP/JT3dDhsCh2og0ftXtbj65XujWJks+HdByCZAdrrsHzWopPbb+VjbZ 4cXO11bIixnupPvcocJL8ewp22JThkSHgA04fde+/P/XVMWQhvDEekR21IRHjzHfeD89 shO0lxdNLzCvnuw/SV2yE/jLL162ML8riXQORN7PReQvWFK/r/6oOr9khuOAlxIxeQBu NNQOZ/Vn4xkhpl/1TQ3XYT8JhZN3A8ad8eUo9g7qbeMEkr7pgiFgGRwBEna4OQ6a5ogF PU4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718726448; x=1719331248; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6hsn1dzY26DF1TLxl9KireRz1A8Sf8ZBFLuWm3kWcmI=; b=Y3DelLSljD/sCs2Kdq5ctY4keRxYEcEtv/8BPNptL4fi7IGS7PX1+NDY9+Z7+NsKWj lSf0fL7d1DLpP6CbPxk849qJqu6POFwRXKLL05dOM9wkoSzswxVah/H5EiDSWFUKUs2L V9x1mcbS/TVSn2t1mbCvknILr8/PW8s9yl+ble7JDkSfFjNTo6zXzBXQ0OKrktEC7Yti UBHEhC8SoYDXuVmizv4QY0izdABiVpQ4jA9IlXq4B87Foad7Y0jNX7MvNbiFqS5TRIVR +lVEfb+Af8ALiLEnJ44182lNh+okbeqQ/Wu+Y8W/B9U1rj8JfH8fYmpTCNwy+Ba8W3vd QgSQ== X-Gm-Message-State: AOJu0YzzOq+LsfKKiZtonPWNRb7DIj3CC6IdlmT2z7MVcY/XvfwvqSkn Ts9k/uB0amloyi611V5E0O9bxbfDg0S1oWg8Vm8k3Kadsyc8I6t7X4CVnkCOiCkXuMicAbRXtRI 3 X-Google-Smtp-Source: AGHT+IEbux0/JDxRYooh7zJXJwXy0LAikIw3kqyH+y6w4JxSMWmTyowpNt/vHNK8wLfOiOhzYwScwQ== X-Received: by 2002:a17:906:c243:b0:a6f:1839:ed48 with SMTP id a640c23a62f3a-a6f60de24c9mr1047303066b.66.1718726447743; Tue, 18 Jun 2024 09:00:47 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56fa416asm634920566b.224.2024.06.18.09.00.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:00:47 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 01/76] hw/i386/pc: Deprecate 2.4 to 2.12 pc-i440fx machines Date: Tue, 18 Jun 2024 17:59:23 +0200 Message-ID: <20240618160039.36108-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=philmd@linaro.org; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Similarly to the commit c7437f0ddb "docs/about: Mark the old pc-i440fx-2.0 - 2.3 machine types as deprecated", deprecate the 2.4 to 2.12 machines. Suggested-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-2-philmd@linaro.org> --- docs/about/deprecated.rst | 4 ++-- hw/i386/pc_piix.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index b62877e51c..66a5f43626 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -212,8 +212,8 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name better reflects the way this property affects all random data within the device tree blob, not just the ``kaslr-seed`` node. -``pc-i440fx-2.0`` up to ``pc-i440fx-2.3`` (since 8.2) -''''''''''''''''''''''''''''''''''''''''''''''''''''' +``pc-i440fx-2.0`` up to ``pc-i440fx-2.3`` (since 8.2) and ``pc-i440fx-2.4`` up to ``pc-i440fx-2.12`` (since 9.1) +'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' These old machine types are quite neglected nowadays and thus might have various pitfalls with regards to live migration. Use a newer machine type diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index ebb51de380..02878060d0 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -742,6 +742,7 @@ DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, static void pc_i440fx_2_12_machine_options(MachineClass *m) { pc_i440fx_3_0_machine_options(m); + m->deprecation_reason = "old and unattended - use a newer version instead"; compat_props_add(m->compat_props, hw_compat_2_12, hw_compat_2_12_len); compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); } @@ -847,7 +848,6 @@ static void pc_i440fx_2_3_machine_options(MachineClass *m) { pc_i440fx_2_4_machine_options(m); m->hw_version = "2.3.0"; - m->deprecation_reason = "old and unattended - use a newer version instead"; compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); } From patchwork Tue Jun 18 15:59:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702562 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E65F7C2BA18 for ; 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Tue, 18 Jun 2024 09:00:53 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56db61ebsm625236366b.56.2024.06.18.09.00.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:00:53 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 02/76] hw/i386/pc: Remove deprecated pc-i440fx-2.0 machine Date: Tue, 18 Jun 2024 17:59:24 +0200 Message-ID: <20240618160039.36108-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The pc-i440fx-2.0 machine was deprecated for the 8.2 release (see commit c7437f0ddb "docs/about: Mark the old pc-i440fx-2.0 - 2.3 machine types as deprecated"), time to remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-3-philmd@linaro.org> --- docs/about/deprecated.rst | 2 +- docs/about/removed-features.rst | 2 +- include/hw/i386/pc.h | 3 --- hw/i386/pc.c | 15 ------------- hw/i386/pc_piix.c | 37 --------------------------------- 5 files changed, 2 insertions(+), 57 deletions(-) diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index 66a5f43626..e12eab1f72 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -212,7 +212,7 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name better reflects the way this property affects all random data within the device tree blob, not just the ``kaslr-seed`` node. -``pc-i440fx-2.0`` up to ``pc-i440fx-2.3`` (since 8.2) and ``pc-i440fx-2.4`` up to ``pc-i440fx-2.12`` (since 9.1) +``pc-i440fx-2.1`` up to ``pc-i440fx-2.3`` (since 8.2) and ``pc-i440fx-2.4`` up to ``pc-i440fx-2.12`` (since 9.1) '''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' These old machine types are quite neglected nowadays and thus might have diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst index eaae82b8a5..f84bfaf2b6 100644 --- a/docs/about/removed-features.rst +++ b/docs/about/removed-features.rst @@ -948,7 +948,7 @@ mips ``fulong2e`` machine alias (removed in 6.0) This machine has been renamed ``fuloong2e``. -``pc-0.10`` up to ``pc-i440fx-1.7`` (removed in 4.0 up to 8.2) +``pc-0.10`` up to ``pc-i440fx-2.0`` (removed in 4.0 up to 9.0) '''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' These machine types were very old and likely could not be used for live diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index ca7904ac2c..3e606949fb 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -318,9 +318,6 @@ extern const size_t pc_compat_2_2_len; extern GlobalProperty pc_compat_2_1[]; extern const size_t pc_compat_2_1_len; -extern GlobalProperty pc_compat_2_0[]; -extern const size_t pc_compat_2_0_len; - #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ { \ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 0469af00a7..d0f2628d46 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -320,21 +320,6 @@ GlobalProperty pc_compat_2_1[] = { }; const size_t pc_compat_2_1_len = G_N_ELEMENTS(pc_compat_2_1); -GlobalProperty pc_compat_2_0[] = { - PC_CPU_MODEL_IDS("2.0.0") - { "virtio-scsi-pci", "any_layout", "off" }, - { "PIIX4_PM", "memory-hotplug-support", "off" }, - { "apic", "version", "0x11" }, - { "nec-usb-xhci", "superspeed-ports-first", "off" }, - { "nec-usb-xhci", "force-pcie-endcap", "on" }, - { "pci-serial", "prog_if", "0" }, - { "pci-serial-2x", "prog_if", "0" }, - { "pci-serial-4x", "prog_if", "0" }, - { "virtio-net-pci", "guest_announce", "off" }, - { "ICH9-LPC", "memory-hotplug-support", "off" }, -}; -const size_t pc_compat_2_0_len = G_N_ELEMENTS(pc_compat_2_0); - GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled) { GSIState *s; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 02878060d0..a750a0e6ab 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -441,11 +441,6 @@ static void pc_compat_2_1_fn(MachineState *machine) x86_cpu_change_kvm_default("svm", NULL); } -static void pc_compat_2_0_fn(MachineState *machine) -{ - pc_compat_2_1_fn(machine); -} - #ifdef CONFIG_ISAPC static void pc_init_isa(MachineState *machine) { @@ -887,38 +882,6 @@ static void pc_i440fx_2_1_machine_options(MachineClass *m) DEFINE_I440FX_MACHINE(v2_1, "pc-i440fx-2.1", pc_compat_2_1_fn, pc_i440fx_2_1_machine_options); -static void pc_i440fx_2_0_machine_options(MachineClass *m) -{ - PCMachineClass *pcmc = PC_MACHINE_CLASS(m); - - pc_i440fx_2_1_machine_options(m); - m->hw_version = "2.0.0"; - compat_props_add(m->compat_props, pc_compat_2_0, pc_compat_2_0_len); - pcmc->smbios_legacy_mode = true; - pcmc->has_reserved_memory = false; - /* This value depends on the actual DSDT and SSDT compiled into - * the source QEMU; unfortunately it depends on the binary and - * not on the machine type, so we cannot make pc-i440fx-1.7 work on - * both QEMU 1.7 and QEMU 2.0. - * - * Large variations cause migration to fail for more than one - * consecutive value of the "-smp" maxcpus option. - * - * For small variations of the kind caused by different iasl versions, - * the 4k rounding usually leaves slack. However, there could be still - * one or two values that break. For QEMU 1.7 and QEMU 2.0 the - * slack is only ~10 bytes before one "-smp maxcpus" value breaks! - * - * 6652 is valid for QEMU 2.0, the right value for pc-i440fx-1.7 on - * QEMU 1.7 it is 6414. For RHEL/CentOS 7.0 it is 6418. - */ - pcmc->legacy_acpi_table_size = 6652; - pcmc->acpi_data_size = 0x10000; -} - -DEFINE_I440FX_MACHINE(v2_0, "pc-i440fx-2.0", pc_compat_2_0_fn, - pc_i440fx_2_0_machine_options); - #ifdef CONFIG_ISAPC static void isapc_machine_options(MachineClass *m) { From patchwork Tue Jun 18 15:59:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702564 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BE130C27C4F for ; Tue, 18 Jun 2024 16:04:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbGb-0003OC-9Q; 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Tue, 18 Jun 2024 09:00:59 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56fa67ecsm621213766b.215.2024.06.18.09.00.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:00:59 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 03/76] hw/usb/hcd-xhci: Remove XHCI_FLAG_FORCE_PCIE_ENDCAP flag Date: Tue, 18 Jun 2024 17:59:25 +0200 Message-ID: <20240618160039.36108-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org XHCI_FLAG_FORCE_PCIE_ENDCAP was only used by the pc-i440fx-2.0 machine, which got removed. Remove it and simplify usb_xhci_pci_realize(). Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-4-philmd@linaro.org> --- hw/usb/hcd-xhci.h | 1 - hw/usb/hcd-xhci-nec.c | 2 -- hw/usb/hcd-xhci-pci.c | 3 +-- 3 files changed, 1 insertion(+), 5 deletions(-) diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 98f598382a..1efa4858fb 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -37,7 +37,6 @@ typedef struct XHCIEPContext XHCIEPContext; enum xhci_flags { XHCI_FLAG_SS_FIRST = 1, - XHCI_FLAG_FORCE_PCIE_ENDCAP, XHCI_FLAG_ENABLE_STREAMS, }; diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c index 328e5bfe7c..5d5b069cf9 100644 --- a/hw/usb/hcd-xhci-nec.c +++ b/hw/usb/hcd-xhci-nec.c @@ -43,8 +43,6 @@ static Property nec_xhci_properties[] = { DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO), DEFINE_PROP_BIT("superspeed-ports-first", XHCINecState, flags, XHCI_FLAG_SS_FIRST, true), - DEFINE_PROP_BIT("force-pcie-endcap", XHCINecState, flags, - XHCI_FLAG_FORCE_PCIE_ENDCAP, false), DEFINE_PROP_UINT32("intrs", XHCINecState, intrs, XHCI_MAXINTRS), DEFINE_PROP_UINT32("slots", XHCINecState, slots, XHCI_MAXSLOTS), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c index 4423983308..cbad96f393 100644 --- a/hw/usb/hcd-xhci-pci.c +++ b/hw/usb/hcd-xhci-pci.c @@ -148,8 +148,7 @@ static void usb_xhci_pci_realize(struct PCIDevice *dev, Error **errp) PCI_BASE_ADDRESS_MEM_TYPE_64, &s->xhci.mem); - if (pci_bus_is_express(pci_get_bus(dev)) || - xhci_get_flag(&s->xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) { + if (pci_bus_is_express(pci_get_bus(dev))) { ret = pcie_endpoint_cap_init(dev, 0xa0); assert(ret > 0); } From patchwork Tue Jun 18 15:59:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702553 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3DA3C41513 for ; Tue, 18 Jun 2024 16:02:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbGm-0003V6-EC; Tue, 18 Jun 2024 12:01:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbGe-0003Pw-R5 for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:01:05 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cb72e9dd7sm7820991a12.57.2024.06.18.09.01.04 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:01:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 04/76] hw/usb/hcd-xhci: Remove XHCI_FLAG_SS_FIRST flag Date: Tue, 18 Jun 2024 17:59:26 +0200 Message-ID: <20240618160039.36108-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=philmd@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org XHCI_FLAG_SS_FIRST was only used by the pc-i440fx-2.0 machine, which got removed. Remove it and simplify various functions in hcd-xhci.c. Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-5-philmd@linaro.org> --- hw/usb/hcd-xhci.h | 3 +-- hw/usb/hcd-xhci-nec.c | 2 -- hw/usb/hcd-xhci-pci.c | 1 - hw/usb/hcd-xhci.c | 42 ++++++++---------------------------------- 4 files changed, 9 insertions(+), 39 deletions(-) diff --git a/hw/usb/hcd-xhci.h b/hw/usb/hcd-xhci.h index 1efa4858fb..fe16d7ad05 100644 --- a/hw/usb/hcd-xhci.h +++ b/hw/usb/hcd-xhci.h @@ -36,8 +36,7 @@ typedef struct XHCIStreamContext XHCIStreamContext; typedef struct XHCIEPContext XHCIEPContext; enum xhci_flags { - XHCI_FLAG_SS_FIRST = 1, - XHCI_FLAG_ENABLE_STREAMS, + XHCI_FLAG_ENABLE_STREAMS = 1, }; typedef enum TRBType { diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c index 5d5b069cf9..0c063b3697 100644 --- a/hw/usb/hcd-xhci-nec.c +++ b/hw/usb/hcd-xhci-nec.c @@ -41,8 +41,6 @@ struct XHCINecState { static Property nec_xhci_properties[] = { DEFINE_PROP_ON_OFF_AUTO("msi", XHCIPciState, msi, ON_OFF_AUTO_AUTO), DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO), - DEFINE_PROP_BIT("superspeed-ports-first", XHCINecState, flags, - XHCI_FLAG_SS_FIRST, true), DEFINE_PROP_UINT32("intrs", XHCINecState, intrs, XHCI_MAXINTRS), DEFINE_PROP_UINT32("slots", XHCINecState, slots, XHCI_MAXSLOTS), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c index cbad96f393..264d7ebb77 100644 --- a/hw/usb/hcd-xhci-pci.c +++ b/hw/usb/hcd-xhci-pci.c @@ -242,7 +242,6 @@ static void qemu_xhci_instance_init(Object *obj) s->msix = ON_OFF_AUTO_AUTO; xhci->numintrs = XHCI_MAXINTRS; xhci->numslots = XHCI_MAXSLOTS; - xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST); } static const TypeInfo qemu_xhci_info = { diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index ad40232eb6..b6411f0bda 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -541,18 +541,10 @@ static XHCIPort *xhci_lookup_port(XHCIState *xhci, struct USBPort *uport) case USB_SPEED_LOW: case USB_SPEED_FULL: case USB_SPEED_HIGH: - if (xhci_get_flag(xhci, XHCI_FLAG_SS_FIRST)) { - index = uport->index + xhci->numports_3; - } else { - index = uport->index; - } + index = uport->index + xhci->numports_3; break; case USB_SPEED_SUPER: - if (xhci_get_flag(xhci, XHCI_FLAG_SS_FIRST)) { - index = uport->index; - } else { - index = uport->index + xhci->numports_2; - } + index = uport->index; break; default: return NULL; @@ -2779,11 +2771,7 @@ static uint64_t xhci_cap_read(void *ptr, hwaddr reg, unsigned size) ret = 0x20425355; /* "USB " */ break; case 0x28: /* Supported Protocol:08 */ - if (xhci_get_flag(xhci, XHCI_FLAG_SS_FIRST)) { - ret = (xhci->numports_2<<8) | (xhci->numports_3+1); - } else { - ret = (xhci->numports_2<<8) | 1; - } + ret = (xhci->numports_2 << 8) | (xhci->numports_3 + 1); break; case 0x2c: /* Supported Protocol:0c */ ret = 0x00000000; /* reserved */ @@ -2795,11 +2783,7 @@ static uint64_t xhci_cap_read(void *ptr, hwaddr reg, unsigned size) ret = 0x20425355; /* "USB " */ break; case 0x38: /* Supported Protocol:08 */ - if (xhci_get_flag(xhci, XHCI_FLAG_SS_FIRST)) { - ret = (xhci->numports_3<<8) | 1; - } else { - ret = (xhci->numports_3<<8) | (xhci->numports_2+1); - } + ret = (xhci->numports_3 << 8) | 1; break; case 0x3c: /* Supported Protocol:0c */ ret = 0x00000000; /* reserved */ @@ -3349,13 +3333,8 @@ static void usb_xhci_init(XHCIState *xhci) for (i = 0; i < usbports; i++) { speedmask = 0; if (i < xhci->numports_2) { - if (xhci_get_flag(xhci, XHCI_FLAG_SS_FIRST)) { - port = &xhci->ports[i + xhci->numports_3]; - port->portnr = i + 1 + xhci->numports_3; - } else { - port = &xhci->ports[i]; - port->portnr = i + 1; - } + port = &xhci->ports[i + xhci->numports_3]; + port->portnr = i + 1 + xhci->numports_3; port->uport = &xhci->uports[i]; port->speedmask = USB_SPEED_MASK_LOW | @@ -3366,13 +3345,8 @@ static void usb_xhci_init(XHCIState *xhci) speedmask |= port->speedmask; } if (i < xhci->numports_3) { - if (xhci_get_flag(xhci, XHCI_FLAG_SS_FIRST)) { - port = &xhci->ports[i]; - port->portnr = i + 1; - } else { - port = &xhci->ports[i + xhci->numports_2]; - port->portnr = i + 1 + xhci->numports_2; - } + port = &xhci->ports[i]; + port->portnr = i + 1; port->uport = &xhci->uports[i]; port->speedmask = USB_SPEED_MASK_SUPER; assert(i < XHCI_MAXPORTS); From patchwork Tue Jun 18 15:59:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702552 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D945AC27C4F for ; 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Tue, 18 Jun 2024 09:01:11 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56db674esm626117466b.83.2024.06.18.09.01.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:01:10 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu , Igor Mammedov Subject: [PULL 05/76] hw/i386/acpi: Remove PCMachineClass::legacy_acpi_table_size Date: Tue, 18 Jun 2024 17:59:27 +0200 Message-ID: <20240618160039.36108-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::235; envelope-from=philmd@linaro.org; helo=mail-lj1-x235.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org PCMachineClass::legacy_acpi_table_size was only used by the pc-i440fx-2.0 machine, which got removed. Remove it and simplify acpi_build(). Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20240617071118.60464-6-philmd@linaro.org> --- include/hw/i386/pc.h | 1 - hw/i386/acpi-build.c | 63 +++++++++----------------------------------- 2 files changed, 12 insertions(+), 52 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 3e606949fb..434e531160 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -103,7 +103,6 @@ struct PCMachineClass { /* ACPI compat: */ bool has_acpi_build; bool rsdp_in_ram; - int legacy_acpi_table_size; unsigned acpi_data_size; int pci_root_uid; diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 53f804ac16..f5d74e2b4b 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -85,7 +85,6 @@ * a little bit, there should be plenty of free space since the DSDT * shrunk by ~1.5k between QEMU 2.0 and QEMU 2.1. */ -#define ACPI_BUILD_LEGACY_CPU_AML_SIZE 97 #define ACPI_BUILD_ALIGN_SIZE 0x1000 #define ACPI_BUILD_TABLE_SIZE 0x20000 @@ -2499,13 +2498,12 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) X86MachineState *x86ms = X86_MACHINE(machine); DeviceState *iommu = pcms->iommu; GArray *table_offsets; - unsigned facs, dsdt, rsdt, fadt; + unsigned facs, dsdt, rsdt; AcpiPmInfo pm; AcpiMiscInfo misc; AcpiMcfgInfo mcfg; Range pci_hole = {}, pci_hole64 = {}; uint8_t *u; - size_t aml_len = 0; GArray *tables_blob = tables->table_data; AcpiSlicOem slic_oem = { .id = NULL, .table_id = NULL }; Object *vmgenid_dev; @@ -2551,19 +2549,12 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) build_dsdt(tables_blob, tables->linker, &pm, &misc, &pci_hole, &pci_hole64, machine); - /* Count the size of the DSDT and SSDT, we will need it for legacy - * sizing of ACPI tables. - */ - aml_len += tables_blob->len - dsdt; - /* ACPI tables pointed to by RSDT */ - fadt = tables_blob->len; acpi_add_table(table_offsets, tables_blob); pm.fadt.facs_tbl_offset = &facs; pm.fadt.dsdt_tbl_offset = &dsdt; pm.fadt.xdsdt_tbl_offset = &dsdt; build_fadt(tables_blob, tables->linker, &pm.fadt, oem_id, oem_table_id); - aml_len += tables_blob->len - fadt; acpi_add_table(table_offsets, tables_blob); acpi_build_madt(tables_blob, tables->linker, x86ms, @@ -2694,49 +2685,19 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) * too simple to be enough. 4k turned out to be too small an * alignment very soon, and in fact it is almost impossible to * keep the table size stable for all (max_cpus, max_memory_slots) - * combinations. So the table size is always 64k for pc-i440fx-2.1 - * and we give an error if the table grows beyond that limit. - * - * We still have the problem of migrating from "-M pc-i440fx-2.0". For - * that, we exploit the fact that QEMU 2.1 generates _smaller_ tables - * than 2.0 and we can always pad the smaller tables with zeros. We can - * then use the exact size of the 2.0 tables. - * - * All this is for PIIX4, since QEMU 2.0 didn't support Q35 migration. + * combinations. */ - if (pcmc->legacy_acpi_table_size) { - /* Subtracting aml_len gives the size of fixed tables. Then add the - * size of the PIIX4 DSDT/SSDT in QEMU 2.0. - */ - int legacy_aml_len = - pcmc->legacy_acpi_table_size + - ACPI_BUILD_LEGACY_CPU_AML_SIZE * x86ms->apic_id_limit; - int legacy_table_size = - ROUND_UP(tables_blob->len - aml_len + legacy_aml_len, - ACPI_BUILD_ALIGN_SIZE); - if ((tables_blob->len > legacy_table_size) && - !pcmc->resizable_acpi_blob) { - /* Should happen only with PCI bridges and -M pc-i440fx-2.0. */ - warn_report("ACPI table size %u exceeds %d bytes," - " migration may not work", - tables_blob->len, legacy_table_size); - error_printf("Try removing CPUs, NUMA nodes, memory slots" - " or PCI bridges.\n"); - } - g_array_set_size(tables_blob, legacy_table_size); - } else { - /* Make sure we have a buffer in case we need to resize the tables. */ - if ((tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) && - !pcmc->resizable_acpi_blob) { - /* As of QEMU 2.1, this fires with 160 VCPUs and 255 memory slots. */ - warn_report("ACPI table size %u exceeds %d bytes," - " migration may not work", - tables_blob->len, ACPI_BUILD_TABLE_SIZE / 2); - error_printf("Try removing CPUs, NUMA nodes, memory slots" - " or PCI bridges.\n"); - } - acpi_align_size(tables_blob, ACPI_BUILD_TABLE_SIZE); + /* Make sure we have a buffer in case we need to resize the tables. */ + if ((tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) && + !pcmc->resizable_acpi_blob) { + /* As of QEMU 2.1, this fires with 160 VCPUs and 255 memory slots. */ + warn_report("ACPI table size %u exceeds %d bytes," + " migration may not work", + tables_blob->len, ACPI_BUILD_TABLE_SIZE / 2); + error_printf("Try removing CPUs, NUMA nodes, memory slots" + " or PCI bridges.\n"); } + acpi_align_size(tables_blob, ACPI_BUILD_TABLE_SIZE); acpi_align_size(tables->linker->cmd_blob, ACPI_BUILD_ALIGN_SIZE); From patchwork Tue Jun 18 15:59:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702556 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 53137C27C4F for ; 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Tue, 18 Jun 2024 09:01:17 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f993da434sm83740666b.221.2024.06.18.09.01.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:01:17 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 06/76] hw/acpi/ich9: Remove 'memory-hotplug-support' property Date: Tue, 18 Jun 2024 17:59:28 +0200 Message-ID: <20240618160039.36108-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org No external code sets the 'memory-hotplug-support' property, remove it. Suggested-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-7-philmd@linaro.org> --- hw/acpi/ich9.c | 18 ------------------ 1 file changed, 18 deletions(-) diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index 573d032e8e..9b605af21a 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -351,21 +351,6 @@ static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name, visit_type_uint32(v, name, &value, errp); } -static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp) -{ - ICH9LPCState *s = ICH9_LPC_DEVICE(obj); - - return s->pm.acpi_memory_hotplug.is_enabled; -} - -static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value, - Error **errp) -{ - ICH9LPCState *s = ICH9_LPC_DEVICE(obj); - - s->pm.acpi_memory_hotplug.is_enabled = value; -} - static bool ich9_pm_get_cpu_hotplug_legacy(Object *obj, Error **errp) { ICH9LPCState *s = ICH9_LPC_DEVICE(obj); @@ -445,9 +430,6 @@ void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm) NULL, NULL, pm); object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN, &gpe0_len, OBJ_PROP_FLAG_READ); - object_property_add_bool(obj, "memory-hotplug-support", - ich9_pm_get_memory_hotplug_support, - ich9_pm_set_memory_hotplug_support); object_property_add_bool(obj, "cpu-hotplug-legacy", ich9_pm_get_cpu_hotplug_legacy, ich9_pm_set_cpu_hotplug_legacy); From patchwork Tue Jun 18 15:59:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702557 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5969FC2BB85 for ; Tue, 18 Jun 2024 16:03:49 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbHH-0003xi-8A; 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Tue, 18 Jun 2024 09:01:23 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cb72e9515sm7906127a12.41.2024.06.18.09.01.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:01:22 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu , Igor Mammedov Subject: [PULL 07/76] hw/acpi/ich9: Remove dead code related to 'acpi_memory_hotplug' Date: Tue, 18 Jun 2024 17:59:29 +0200 Message-ID: <20240618160039.36108-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52c; envelope-from=philmd@linaro.org; helo=mail-ed1-x52c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org acpi_memory_hotplug::is_enabled is set to %true once via ich9_lpc_initfn() -> ich9_pm_add_properties(). No need to check it, so remove now dead code. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-8-philmd@linaro.org> --- hw/acpi/ich9.c | 28 ++++++---------------------- 1 file changed, 6 insertions(+), 22 deletions(-) diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index 9b605af21a..02d8546bd3 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -153,17 +153,10 @@ static int ich9_pm_post_load(void *opaque, int version_id) .offset = vmstate_offset_pointer(_state, _field, uint8_t), \ } -static bool vmstate_test_use_memhp(void *opaque) -{ - ICH9LPCPMRegs *s = opaque; - return s->acpi_memory_hotplug.is_enabled; -} - static const VMStateDescription vmstate_memhp_state = { .name = "ich9_pm/memhp", .version_id = 1, .minimum_version_id = 1, - .needed = vmstate_test_use_memhp, .fields = (const VMStateField[]) { VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs), VMSTATE_END_OF_LIST() @@ -335,11 +328,9 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, qemu_irq sci_irq) legacy_acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE); - if (pm->acpi_memory_hotplug.is_enabled) { - acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), - &pm->acpi_memory_hotplug, - ACPI_MEMORY_HOTPLUG_BASE); - } + acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci), + &pm->acpi_memory_hotplug, + ACPI_MEMORY_HOTPLUG_BASE); } static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name, @@ -460,12 +451,7 @@ void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, return; } - if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) && - !lpc->pm.acpi_memory_hotplug.is_enabled) { - error_setg(errp, - "memory hotplug is not enabled: %s.memory-hotplug-support " - "is not set", object_get_typename(OBJECT(lpc))); - } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { + if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { uint64_t negotiated = lpc->smi_negotiated_features; if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) && @@ -509,8 +495,7 @@ void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev, { ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev); - if (lpc->pm.acpi_memory_hotplug.is_enabled && - object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { + if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { acpi_memory_unplug_request_cb(hotplug_dev, &lpc->pm.acpi_memory_hotplug, dev, errp); @@ -545,8 +530,7 @@ void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, { ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev); - if (lpc->pm.acpi_memory_hotplug.is_enabled && - object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { + if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { acpi_memory_unplug_cb(&lpc->pm.acpi_memory_hotplug, dev, errp); } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && !lpc->pm.cpu_hotplug_legacy) { From patchwork Tue Jun 18 15:59:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702595 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E0183C2BA18 for ; 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Tue, 18 Jun 2024 09:01:29 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f57552633sm625781966b.191.2024.06.18.09.01.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:01:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 08/76] hw/i386/pc: Remove deprecated pc-i440fx-2.1 machine Date: Tue, 18 Jun 2024 17:59:30 +0200 Message-ID: <20240618160039.36108-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The pc-i440fx-2.1 machine was deprecated for the 8.2 release (see commit c7437f0ddb "docs/about: Mark the old pc-i440fx-2.0 - 2.3 machine types as deprecated"), time to remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-9-philmd@linaro.org> --- docs/about/deprecated.rst | 2 +- docs/about/removed-features.rst | 2 +- include/hw/i386/pc.h | 3 --- hw/i386/pc.c | 7 ------- hw/i386/pc_piix.c | 23 ----------------------- 5 files changed, 2 insertions(+), 35 deletions(-) diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index e12eab1f72..e332eb46e9 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -212,7 +212,7 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name better reflects the way this property affects all random data within the device tree blob, not just the ``kaslr-seed`` node. -``pc-i440fx-2.1`` up to ``pc-i440fx-2.3`` (since 8.2) and ``pc-i440fx-2.4`` up to ``pc-i440fx-2.12`` (since 9.1) +``pc-i440fx-2.2`` up to ``pc-i440fx-2.3`` (since 8.2) and ``pc-i440fx-2.4`` up to ``pc-i440fx-2.12`` (since 9.1) '''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' These old machine types are quite neglected nowadays and thus might have diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst index f84bfaf2b6..347e04e50e 100644 --- a/docs/about/removed-features.rst +++ b/docs/about/removed-features.rst @@ -948,7 +948,7 @@ mips ``fulong2e`` machine alias (removed in 6.0) This machine has been renamed ``fuloong2e``. -``pc-0.10`` up to ``pc-i440fx-2.0`` (removed in 4.0 up to 9.0) +``pc-0.10`` up to ``pc-i440fx-2.1`` (removed in 4.0 up to 9.0) '''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' These machine types were very old and likely could not be used for live diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 434e531160..0d730318fe 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -314,9 +314,6 @@ extern const size_t pc_compat_2_3_len; extern GlobalProperty pc_compat_2_2[]; extern const size_t pc_compat_2_2_len; -extern GlobalProperty pc_compat_2_1[]; -extern const size_t pc_compat_2_1_len; - #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ { \ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index d0f2628d46..b0b8ecd64d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -313,13 +313,6 @@ GlobalProperty pc_compat_2_2[] = { }; const size_t pc_compat_2_2_len = G_N_ELEMENTS(pc_compat_2_2); -GlobalProperty pc_compat_2_1[] = { - PC_CPU_MODEL_IDS("2.1.0") - { "coreduo" "-" TYPE_X86_CPU, "vmx", "on" }, - { "core2duo" "-" TYPE_X86_CPU, "vmx", "on" }, -}; -const size_t pc_compat_2_1_len = G_N_ELEMENTS(pc_compat_2_1); - GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled) { GSIState *s; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index a750a0e6ab..e0b421dd51 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -66,7 +66,6 @@ #include "hw/hyperv/vmbus-bridge.h" #include "hw/mem/nvdimm.h" #include "hw/i386/acpi-build.h" -#include "kvm/kvm-cpu.h" #include "target/i386/cpu.h" #define XEN_IOAPIC_NUM_PIRQS 128ULL @@ -435,12 +434,6 @@ static void pc_compat_2_2_fn(MachineState *machine) pc_compat_2_3_fn(machine); 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Tue, 18 Jun 2024 09:01:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 09/76] target/i386/kvm: Remove x86_cpu_change_kvm_default() and 'kvm-cpu.h' Date: Tue, 18 Jun 2024 17:59:31 +0200 Message-ID: <20240618160039.36108-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org x86_cpu_change_kvm_default() was only used out of kvm-cpu.c by the pc-i440fx-2.1 machine, which got removed. Make it static, and remove its declaration. "kvm-cpu.h" is now empty, remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-10-philmd@linaro.org> --- target/i386/kvm/kvm-cpu.h | 41 --------------------------------------- target/i386/kvm/kvm-cpu.c | 3 +-- 2 files changed, 1 insertion(+), 43 deletions(-) delete mode 100644 target/i386/kvm/kvm-cpu.h diff --git a/target/i386/kvm/kvm-cpu.h b/target/i386/kvm/kvm-cpu.h deleted file mode 100644 index e858ca21e5..0000000000 --- a/target/i386/kvm/kvm-cpu.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * i386 KVM CPU type and functions - * - * Copyright (c) 2003 Fabrice Bellard - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, see . - */ - -#ifndef KVM_CPU_H -#define KVM_CPU_H - -#ifdef CONFIG_KVM -/* - * Change the value of a KVM-specific default - * - * If value is NULL, no default will be set and the original - * value from the CPU model table will be kept. - * - * It is valid to call this function only for properties that - * are already present in the kvm_default_props table. - */ -void x86_cpu_change_kvm_default(const char *prop, const char *value); - -#else /* !CONFIG_KVM */ - -#define x86_cpu_change_kvm_default(a, b) - -#endif /* CONFIG_KVM */ - -#endif /* KVM_CPU_H */ diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index f76972e47e..f9b99b5f50 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -10,7 +10,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "host-cpu.h" -#include "kvm-cpu.h" #include "qapi/error.h" #include "sysemu/sysemu.h" #include "hw/boards.h" @@ -178,7 +177,7 @@ static PropValue kvm_default_props[] = { /* * Only for builtin_x86_defs models initialized with x86_register_cpudef_types. */ -void x86_cpu_change_kvm_default(const char *prop, const char *value) +static void x86_cpu_change_kvm_default(const char *prop, const char *value) { PropValue *pv; for (pv = kvm_default_props; pv->prop; pv++) { From patchwork Tue Jun 18 15:59:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702555 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4D428C27C4F for ; Tue, 18 Jun 2024 16:02:11 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbHP-0004EJ-7Z; Tue, 18 Jun 2024 12:01:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbHG-0003xq-8d for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:01:41 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56ed3679sm627324366b.122.2024.06.18.09.01.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:01:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 10/76] hw/i386/pc: Remove PCMachineClass::smbios_uuid_encoded Date: Tue, 18 Jun 2024 17:59:32 +0200 Message-ID: <20240618160039.36108-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org PCMachineClass::smbios_uuid_encoded was only used by the pc-i440fx-2.1 machine, which got removed. It is now always true, remove it. Reviewed-by: Thomas Huth Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-11-philmd@linaro.org> --- include/hw/i386/pc.h | 1 - hw/i386/fw_cfg.c | 3 +-- hw/i386/pc.c | 1 - 3 files changed, 1 insertion(+), 4 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 0d730318fe..5667b87ed0 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -109,7 +109,6 @@ struct PCMachineClass { /* SMBIOS compat: */ bool smbios_defaults; bool smbios_legacy_mode; - bool smbios_uuid_encoded; SmbiosEntryPointType default_smbios_ep_type; /* RAM / address space compat: */ diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index 6e0d9945d0..f9e8af3bf5 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -63,8 +63,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, if (pcmc->smbios_defaults) { /* These values are guest ABI, do not change */ - smbios_set_defaults("QEMU", mc->desc, mc->name, - pcmc->smbios_uuid_encoded); + smbios_set_defaults("QEMU", mc->desc, mc->name, true); } /* tell smbios about cpuid version and features */ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index b0b8ecd64d..215462e861 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1796,7 +1796,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) pcmc->has_acpi_build = true; pcmc->rsdp_in_ram = true; pcmc->smbios_defaults = true; - pcmc->smbios_uuid_encoded = true; pcmc->gigabyte_align = true; pcmc->has_reserved_memory = true; pcmc->enforce_aligned_dimm = true; From patchwork Tue Jun 18 15:59:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702560 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C79BDC27C4F for ; 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Tue, 18 Jun 2024 09:01:46 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56db6dfesm624580866b.87.2024.06.18.09.01.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:01:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu , Igor Mammedov Subject: [PULL 11/76] hw/smbios: Remove 'uuid_encoded' argument from smbios_set_defaults() Date: Tue, 18 Jun 2024 17:59:33 +0200 Message-ID: <20240618160039.36108-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=philmd@linaro.org; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org 'uuid_encoded' is always true, remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-12-philmd@linaro.org> --- include/hw/firmware/smbios.h | 3 +-- hw/arm/virt.c | 3 +-- hw/i386/fw_cfg.c | 2 +- hw/loongarch/virt.c | 2 +- hw/riscv/virt.c | 2 +- hw/smbios/smbios.c | 6 ++---- 6 files changed, 7 insertions(+), 11 deletions(-) diff --git a/include/hw/firmware/smbios.h b/include/hw/firmware/smbios.h index 8d3fb2fb3b..f066ab7262 100644 --- a/include/hw/firmware/smbios.h +++ b/include/hw/firmware/smbios.h @@ -331,8 +331,7 @@ void smbios_add_usr_blob_size(size_t size); void smbios_entry_add(QemuOpts *opts, Error **errp); void smbios_set_cpuid(uint32_t version, uint32_t features); void smbios_set_defaults(const char *manufacturer, const char *product, - const char *version, - bool uuid_encoded); + const char *version); void smbios_set_default_processor_family(uint16_t processor_family); uint8_t *smbios_get_table_legacy(size_t *length, Error **errp); void smbios_get_tables(MachineState *ms, diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 3c93c0c0a6..268b25e332 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1677,8 +1677,7 @@ static void virt_build_smbios(VirtMachineState *vms) } smbios_set_defaults("QEMU", product, - vmc->smbios_old_sys_ver ? "1.0" : mc->name, - true); + vmc->smbios_old_sys_ver ? "1.0" : mc->name); /* build the array of physical mem area from base_memmap */ mem_array.address = vms->memmap[VIRT_MEM].base; diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c index f9e8af3bf5..7c43c325ef 100644 --- a/hw/i386/fw_cfg.c +++ b/hw/i386/fw_cfg.c @@ -63,7 +63,7 @@ void fw_cfg_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg, if (pcmc->smbios_defaults) { /* These values are guest ABI, do not change */ - smbios_set_defaults("QEMU", mc->desc, mc->name, true); + smbios_set_defaults("QEMU", mc->desc, mc->name); } /* tell smbios about cpuid version and features */ diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 66cef201ab..b7ea17d5f3 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -556,7 +556,7 @@ static void virt_build_smbios(LoongArchVirtMachineState *lvms) return; } - smbios_set_defaults("QEMU", product, mc->name, true); + smbios_set_defaults("QEMU", product, mc->name); smbios_get_tables(ms, SMBIOS_ENTRY_POINT_TYPE_64, NULL, 0, diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 4fdb660525..5676d66d12 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1277,7 +1277,7 @@ static void virt_build_smbios(RISCVVirtState *s) product = "KVM Virtual Machine"; } - smbios_set_defaults("QEMU", product, mc->name, true); + smbios_set_defaults("QEMU", product, mc->name); if (riscv_is_32bit(&s->soc[0])) { smbios_set_default_processor_family(0x200); diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c index eed5787b15..8261eb716f 100644 --- a/hw/smbios/smbios.c +++ b/hw/smbios/smbios.c @@ -30,7 +30,7 @@ #include "hw/pci/pci_device.h" #include "smbios_build.h" -static bool smbios_uuid_encoded = true; +static const bool smbios_uuid_encoded = true; /* * SMBIOS tables provided by user with '-smbios file=' option */ @@ -1017,11 +1017,9 @@ void smbios_set_default_processor_family(uint16_t processor_family) } void smbios_set_defaults(const char *manufacturer, const char *product, - const char *version, - bool uuid_encoded) + const char *version) { smbios_have_defaults = true; - smbios_uuid_encoded = uuid_encoded; SMBIOS_SET_DEFAULT(smbios_type1.manufacturer, manufacturer); SMBIOS_SET_DEFAULT(smbios_type1.product, product); From patchwork Tue Jun 18 15:59:34 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:01:52 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu , Igor Mammedov Subject: [PULL 12/76] hw/smbios: Remove 'smbios_uuid_encoded', simplify smbios_encode_uuid() Date: Tue, 18 Jun 2024 17:59:34 +0200 Message-ID: <20240618160039.36108-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philmd@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org 'smbios_encode_uuid' is always true, remove it, simplifying smbios_encode_uuid(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-13-philmd@linaro.org> --- hw/smbios/smbios.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c index 8261eb716f..3b7703489d 100644 --- a/hw/smbios/smbios.c +++ b/hw/smbios/smbios.c @@ -30,7 +30,6 @@ #include "hw/pci/pci_device.h" #include "smbios_build.h" -static const bool smbios_uuid_encoded = true; /* * SMBIOS tables provided by user with '-smbios file=' option */ @@ -600,11 +599,9 @@ static void smbios_build_type_0_table(void) static void smbios_encode_uuid(struct smbios_uuid *uuid, QemuUUID *in) { memcpy(uuid, in, 16); - if (smbios_uuid_encoded) { - uuid->time_low = bswap32(uuid->time_low); - uuid->time_mid = bswap16(uuid->time_mid); - uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version); - } + uuid->time_low = bswap32(uuid->time_low); + uuid->time_mid = bswap16(uuid->time_mid); + uuid->time_hi_and_version = bswap16(uuid->time_hi_and_version); } static void smbios_build_type_1_table(void) From patchwork Tue Jun 18 15:59:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702561 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EA177C2BB85 for ; Tue, 18 Jun 2024 16:04:00 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbHZ-0004qZ-Gm; Tue, 18 Jun 2024 12:02:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbHX-0004af-MN for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:01:58 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cb741e5a3sm7813974a12.65.2024.06.18.09.01.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:01:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu , Igor Mammedov Subject: [PULL 13/76] hw/i386/pc: Remove PCMachineClass::enforce_aligned_dimm Date: Tue, 18 Jun 2024 17:59:35 +0200 Message-ID: <20240618160039.36108-14-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=philmd@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org PCMachineClass::enforce_aligned_dimm was only used by the pc-i440fx-2.1 machine, which got removed. It is now always true. Remove it, simplifying pc_get_device_memory_range(). Update the comment in Avocado test_phybits_low_pse36(). Reviewed-by: Zhao Liu Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-14-philmd@linaro.org> --- include/hw/i386/pc.h | 3 --- hw/i386/pc.c | 14 +++----------- tests/avocado/mem-addr-space-check.py | 9 ++++----- 3 files changed, 7 insertions(+), 19 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 5667b87ed0..ca72f8cab8 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -74,8 +74,6 @@ typedef struct PCMachineState { * * Compat fields: * - * @enforce_aligned_dimm: check that DIMM's address/size is aligned by - * backend's alignment value if provided * @acpi_data_size: Size of the chunk of memory at the top of RAM * for the BIOS ACPI tables and other BIOS * datastructures. @@ -114,7 +112,6 @@ struct PCMachineClass { /* RAM / address space compat: */ bool gigabyte_align; bool has_reserved_memory; - bool enforce_aligned_dimm; bool broken_reserved_end; bool enforce_amd_1tb_hole; bool isa_bios_alias; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 215462e861..ff5683a8ee 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -728,7 +728,6 @@ static void pc_get_device_memory_range(PCMachineState *pcms, hwaddr *base, ram_addr_t *device_mem_size) { - PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); MachineState *machine = MACHINE(pcms); ram_addr_t size; hwaddr addr; @@ -736,10 +735,8 @@ static void pc_get_device_memory_range(PCMachineState *pcms, size = machine->maxram_size - machine->ram_size; addr = ROUND_UP(pc_above_4g_end(pcms), 1 * GiB); - if (pcmc->enforce_aligned_dimm) { - /* size device region assuming 1G page max alignment per slot */ - size += (1 * GiB) * machine->ram_slots; - } + /* size device region assuming 1G page max alignment per slot */ + size += (1 * GiB) * machine->ram_slots; *base = addr; *device_mem_size = size; @@ -1303,12 +1300,9 @@ void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs) static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { - const PCMachineState *pcms = PC_MACHINE(hotplug_dev); const X86MachineState *x86ms = X86_MACHINE(hotplug_dev); - const PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); const MachineState *ms = MACHINE(hotplug_dev); const bool is_nvdimm = object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM); - const uint64_t legacy_align = TARGET_PAGE_SIZE; Error *local_err = NULL; /* @@ -1333,8 +1327,7 @@ static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, return; } - pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), - pcmc->enforce_aligned_dimm ? NULL : &legacy_align, errp); + pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), NULL, errp); } static void pc_memory_plug(HotplugHandler *hotplug_dev, @@ -1798,7 +1791,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) pcmc->smbios_defaults = true; pcmc->gigabyte_align = true; pcmc->has_reserved_memory = true; - pcmc->enforce_aligned_dimm = true; pcmc->enforce_amd_1tb_hole = true; pcmc->isa_bios_alias = true; /* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported diff --git a/tests/avocado/mem-addr-space-check.py b/tests/avocado/mem-addr-space-check.py index af019969c0..85541ea051 100644 --- a/tests/avocado/mem-addr-space-check.py +++ b/tests/avocado/mem-addr-space-check.py @@ -31,11 +31,10 @@ def test_phybits_low_pse36(self): at 4 GiB boundary when "above_4g_mem_size" is 0 (this would be true when we have 0.5 GiB of VM memory, see pc_q35_init()). This means total hotpluggable memory size is 60 GiB. Per slot, we reserve 1 GiB of memory - for dimm alignment for all newer machines (see enforce_aligned_dimm - property for pc machines and pc_get_device_memory_range()). That leaves - total hotpluggable actual memory size of 59 GiB. If the VM is started - with 0.5 GiB of memory, maxmem should be set to a maximum value of - 59.5 GiB to ensure that the processor can address all memory directly. + for dimm alignment for all machines. That leaves total hotpluggable + actual memory size of 59 GiB. If the VM is started with 0.5 GiB of + memory, maxmem should be set to a maximum value of 59.5 GiB to ensure + that the processor can address all memory directly. Note that 64-bit pci hole size is 0 in this case. If maxmem is set to 59.6G, QEMU should fail to start with a message "phy-bits are too low". If maxmem is set to 59.5G with all other QEMU parameters identical, QEMU From patchwork Tue Jun 18 15:59:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702558 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3237CC27C4F for ; Tue, 18 Jun 2024 16:03:49 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbHf-000544-5n; Tue, 18 Jun 2024 12:02:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbHd-00051T-DW for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:02:09 -0400 Received: from mail-ed1-x536.google.com ([2a00:1450:4864:20::536]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sJbHa-0006vI-8O for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:02:07 -0400 Received: by mail-ed1-x536.google.com with SMTP id 4fb4d7f45d1cf-57c778b5742so6557774a12.2 for ; Tue, 18 Jun 2024 09:02:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1718726524; x=1719331324; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wCZJ5ylQLswy1jx1rgaB0EFpBR4bZntZL6FEGbk+Shg=; b=ZD+1RD3tXGxL7oX1v1m5AVUK5mvd2fIml5ifuB1e3IrvCcTEE1/7AXu1RaJtKBKndG jGtDYm0y00gXsgSe96D7q/GLcShWgI+E50H401f6RHZ9Ozsd7mxc7AM4MX0UehzbMtKa 1W8PhqDOKQQCoy6q4dQE+MbqFuVG0+nE0rMHeVfyPufRqhWNaBVdVFAk1eaaNWeZOM7E 7iukrlEcMSC7MAZQRMLq6Tx5r3n3ttPT/5sXofCFSeooyu/g0gOvNcfxmGIvodY+G65b TdWlT+FfS2Wjm3oxUElQKzt2AqBwrwAL1O8vw0NI0VvW4PMztThCRXrBET6L4uMJpglo m58Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718726524; x=1719331324; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wCZJ5ylQLswy1jx1rgaB0EFpBR4bZntZL6FEGbk+Shg=; b=XSHakAlJT9x7LYwm3Yf8qq/XjxOfW4RusX6FwjNeiKdPgKLstOOZPJBw2IaA9YGMQq 6eJ1cH1S2JnGIkwtxJGIwosf9xBHN2uM3pow7HkMiyey9bl4Gs4kfh3w/3roWC2qCdYe R4YVsfrU0ZDlttvvseB5R4s0JipNvbOTq2cBTyDkjD9JXnHccjxqGukbLA6YWb8xPiZ1 ru/0HcLiobCW/zSc0X3+XfieO+PXxd8GAwSFwLqygBGYZFqbAuSLk8MBTniMWdCRTq8Y D6IzxOUhfGmbAfsVJtJDH9r6zQyMrVOTuTdvKzcsf4rVtNtkKLVfp601CGMnZat7Dahk 3Nww== X-Gm-Message-State: AOJu0YyklizNtxmU9c5n4pIqawTUo6jxuuRGA+qXPl8ODanmVQ8nbj0n rWN07Ke3iPOhG22SPpK3qfPZSka43kVMJ8U+6D9kZDmwJC0QXt55TgS7WzsKyZ7s2N+zyvc6FQ+ + X-Google-Smtp-Source: AGHT+IG/EwMS3L52HYg7V3HbHG1fBnp+zEDkDY1lyLMOiuqK9Dh3NaGF6x44XmPkKhBFsh8CBBz/yw== X-Received: by 2002:a17:906:4109:b0:a6f:5a48:7b90 with SMTP id a640c23a62f3a-a6f60d413f1mr734751466b.38.1718726524169; Tue, 18 Jun 2024 09:02:04 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f5b5ce0c2sm600947866b.78.2024.06.18.09.02.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:02:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , David Hildenbrand , Zhao Liu , Igor Mammedov Subject: [PULL 14/76] hw/mem/pc-dimm: Remove legacy_align argument from pc_dimm_pre_plug() Date: Tue, 18 Jun 2024 17:59:36 +0200 Message-ID: <20240618160039.36108-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=philmd@linaro.org; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org 'legacy_align' is always NULL, remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: David Hildenbrand Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-15-philmd@linaro.org> --- include/hw/mem/pc-dimm.h | 3 +-- hw/arm/virt.c | 2 +- hw/i386/pc.c | 2 +- hw/loongarch/virt.c | 2 +- hw/mem/pc-dimm.c | 6 ++---- hw/ppc/spapr.c | 2 +- 6 files changed, 7 insertions(+), 10 deletions(-) diff --git a/include/hw/mem/pc-dimm.h b/include/hw/mem/pc-dimm.h index 322bebe555..fe0f3ea963 100644 --- a/include/hw/mem/pc-dimm.h +++ b/include/hw/mem/pc-dimm.h @@ -66,8 +66,7 @@ struct PCDIMMDeviceClass { void (*unrealize)(PCDIMMDevice *dimm); }; -void pc_dimm_pre_plug(PCDIMMDevice *dimm, MachineState *machine, - const uint64_t *legacy_align, Error **errp); +void pc_dimm_pre_plug(PCDIMMDevice *dimm, MachineState *machine, Error **errp); void pc_dimm_plug(PCDIMMDevice *dimm, MachineState *machine); void pc_dimm_unplug(PCDIMMDevice *dimm, MachineState *machine); #endif diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 268b25e332..c7a1f754e7 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2763,7 +2763,7 @@ static void virt_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, return; } - pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), NULL, errp); + pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), errp); } static void virt_memory_plug(HotplugHandler *hotplug_dev, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index ff5683a8ee..2d0a517c4c 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1327,7 +1327,7 @@ static void pc_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, return; } - pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), NULL, errp); + pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), errp); } static void pc_memory_plug(HotplugHandler *hotplug_dev, diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index b7ea17d5f3..8be2d2ff6a 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -1245,7 +1245,7 @@ static bool memhp_type_supported(DeviceState *dev) static void virt_mem_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { - pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), NULL, errp); + pc_dimm_pre_plug(PC_DIMM(dev), MACHINE(hotplug_dev), errp); } static void virt_device_pre_plug(HotplugHandler *hotplug_dev, diff --git a/hw/mem/pc-dimm.c b/hw/mem/pc-dimm.c index 37f1f4ccfd..836384a90f 100644 --- a/hw/mem/pc-dimm.c +++ b/hw/mem/pc-dimm.c @@ -44,8 +44,7 @@ static MemoryRegion *pc_dimm_get_memory_region(PCDIMMDevice *dimm, Error **errp) return host_memory_backend_get_memory(dimm->hostmem); } -void pc_dimm_pre_plug(PCDIMMDevice *dimm, MachineState *machine, - const uint64_t *legacy_align, Error **errp) +void pc_dimm_pre_plug(PCDIMMDevice *dimm, MachineState *machine, Error **errp) { Error *local_err = NULL; int slot; @@ -70,8 +69,7 @@ void pc_dimm_pre_plug(PCDIMMDevice *dimm, MachineState *machine, &error_abort); trace_mhp_pc_dimm_assigned_slot(slot); - memory_device_pre_plug(MEMORY_DEVICE(dimm), machine, legacy_align, - errp); + memory_device_pre_plug(MEMORY_DEVICE(dimm), machine, NULL, errp); } void pc_dimm_plug(PCDIMMDevice *dimm, MachineState *machine) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 81a187f126..d7d4b188ee 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3700,7 +3700,7 @@ static void spapr_memory_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev, return; } - pc_dimm_pre_plug(dimm, MACHINE(hotplug_dev), NULL, errp); + pc_dimm_pre_plug(dimm, MACHINE(hotplug_dev), errp); } struct SpaprDimmState { From patchwork Tue Jun 18 15:59:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702592 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F8CEC41513 for ; Tue, 18 Jun 2024 16:07:56 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbI5-0005ca-5v; Tue, 18 Jun 2024 12:02:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbHj-0005G6-Hv for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:02:09 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56f411a7sm631061766b.158.2024.06.18.09.02.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:02:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , David Hildenbrand , Zhao Liu , Igor Mammedov Subject: [PULL 15/76] hw/mem/memory-device: Remove legacy_align from memory_device_pre_plug() Date: Tue, 18 Jun 2024 17:59:37 +0200 Message-ID: <20240618160039.36108-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org 'legacy_align' is always NULL, remove it, simplifying memory_device_pre_plug(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: David Hildenbrand Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-16-philmd@linaro.org> --- include/hw/mem/memory-device.h | 2 +- hw/i386/pc.c | 3 +-- hw/mem/memory-device.c | 12 ++++-------- hw/mem/pc-dimm.c | 2 +- hw/virtio/virtio-md-pci.c | 2 +- 5 files changed, 8 insertions(+), 13 deletions(-) diff --git a/include/hw/mem/memory-device.h b/include/hw/mem/memory-device.h index e0571c8a31..c0a58087cc 100644 --- a/include/hw/mem/memory-device.h +++ b/include/hw/mem/memory-device.h @@ -169,7 +169,7 @@ uint64_t get_plugged_memory_size(void); unsigned int memory_devices_get_reserved_memslots(void); bool memory_devices_memslot_auto_decision_active(void); void memory_device_pre_plug(MemoryDeviceState *md, MachineState *ms, - const uint64_t *legacy_align, Error **errp); + Error **errp); void memory_device_plug(MemoryDeviceState *md, MachineState *ms); void memory_device_unplug(MemoryDeviceState *md, MachineState *ms); uint64_t memory_device_get_region_size(const MemoryDeviceState *md, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 2d0a517c4c..8a9c025754 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1395,8 +1395,7 @@ static void pc_hv_balloon_pre_plug(HotplugHandler *hotplug_dev, { /* The vmbus handler has no hotplug handler; we should never end up here. */ g_assert(!dev->hotplugged); - memory_device_pre_plug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev), NULL, - errp); + memory_device_pre_plug(MEMORY_DEVICE(dev), MACHINE(hotplug_dev), errp); } static void pc_hv_balloon_plug(HotplugHandler *hotplug_dev, diff --git a/hw/mem/memory-device.c b/hw/mem/memory-device.c index e098585cda..a5f279adcc 100644 --- a/hw/mem/memory-device.c +++ b/hw/mem/memory-device.c @@ -345,7 +345,7 @@ uint64_t get_plugged_memory_size(void) } void memory_device_pre_plug(MemoryDeviceState *md, MachineState *ms, - const uint64_t *legacy_align, Error **errp) + Error **errp) { const MemoryDeviceClass *mdc = MEMORY_DEVICE_GET_CLASS(md); Error *local_err = NULL; @@ -388,14 +388,10 @@ void memory_device_pre_plug(MemoryDeviceState *md, MachineState *ms, return; } - if (legacy_align) { - align = *legacy_align; - } else { - if (mdc->get_min_alignment) { - align = mdc->get_min_alignment(md); - } - align = MAX(align, memory_region_get_alignment(mr)); + if (mdc->get_min_alignment) { + align = mdc->get_min_alignment(md); } + align = MAX(align, memory_region_get_alignment(mr)); addr = mdc->get_addr(md); addr = memory_device_get_free_addr(ms, !addr ? NULL : &addr, align, memory_region_size(mr), &local_err); diff --git a/hw/mem/pc-dimm.c b/hw/mem/pc-dimm.c index 836384a90f..27919ca45d 100644 --- a/hw/mem/pc-dimm.c +++ b/hw/mem/pc-dimm.c @@ -69,7 +69,7 @@ void pc_dimm_pre_plug(PCDIMMDevice *dimm, MachineState *machine, Error **errp) &error_abort); trace_mhp_pc_dimm_assigned_slot(slot); - memory_device_pre_plug(MEMORY_DEVICE(dimm), machine, NULL, errp); + memory_device_pre_plug(MEMORY_DEVICE(dimm), machine, errp); } void pc_dimm_plug(PCDIMMDevice *dimm, MachineState *machine) diff --git a/hw/virtio/virtio-md-pci.c b/hw/virtio/virtio-md-pci.c index 62bfb7920b..9ec5067662 100644 --- a/hw/virtio/virtio-md-pci.c +++ b/hw/virtio/virtio-md-pci.c @@ -37,7 +37,7 @@ void virtio_md_pci_pre_plug(VirtIOMDPCI *vmd, MachineState *ms, Error **errp) * First, see if we can plug this memory device at all. If that * succeeds, branch of to the actual hotplug handler. */ - memory_device_pre_plug(md, ms, NULL, &local_err); + memory_device_pre_plug(md, ms, &local_err); if (!local_err && bus_handler) { hotplug_handler_pre_plug(bus_handler, dev, &local_err); } From patchwork Tue Jun 18 15:59:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702589 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1C6E1C2BB85 for ; Tue, 18 Jun 2024 16:07:15 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbI5-0005fu-8P; Tue, 18 Jun 2024 12:02:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbHo-0005Ti-Qe for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:02:15 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cbc2d4b0dsm7123083a12.33.2024.06.18.09.02.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:02:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 16/76] hw/i386/pc: Remove deprecated pc-i440fx-2.2 machine Date: Tue, 18 Jun 2024 17:59:38 +0200 Message-ID: <20240618160039.36108-17-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philmd@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The pc-i440fx-2.2 machine was deprecated for the 8.2 release (see commit c7437f0ddb "docs/about: Mark the old pc-i440fx-2.0 - 2.3 machine types as deprecated"), time to remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-17-philmd@linaro.org> --- docs/about/deprecated.rst | 2 +- docs/about/removed-features.rst | 2 +- include/hw/i386/pc.h | 3 --- hw/i386/pc.c | 23 ----------------------- hw/i386/pc_piix.c | 21 --------------------- 5 files changed, 2 insertions(+), 49 deletions(-) diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index e332eb46e9..d7775fbb84 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -212,7 +212,7 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name better reflects the way this property affects all random data within the device tree blob, not just the ``kaslr-seed`` node. -``pc-i440fx-2.2`` up to ``pc-i440fx-2.3`` (since 8.2) and ``pc-i440fx-2.4`` up to ``pc-i440fx-2.12`` (since 9.1) +``pc-i440fx-2.3`` up to ``pc-i440fx-2.3`` (since 8.2) and ``pc-i440fx-2.4`` up to ``pc-i440fx-2.12`` (since 9.1) '''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' These old machine types are quite neglected nowadays and thus might have diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst index 347e04e50e..58821a8695 100644 --- a/docs/about/removed-features.rst +++ b/docs/about/removed-features.rst @@ -948,7 +948,7 @@ mips ``fulong2e`` machine alias (removed in 6.0) This machine has been renamed ``fuloong2e``. -``pc-0.10`` up to ``pc-i440fx-2.1`` (removed in 4.0 up to 9.0) +``pc-0.10`` up to ``pc-i440fx-2.2`` (removed in 4.0 up to 9.0) '''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' These machine types were very old and likely could not be used for live diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index ca72f8cab8..155a02b1b5 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -307,9 +307,6 @@ extern const size_t pc_compat_2_4_len; extern GlobalProperty pc_compat_2_3[]; extern const size_t pc_compat_2_3_len; -extern GlobalProperty pc_compat_2_2[]; -extern const size_t pc_compat_2_2_len; - #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ { \ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 8a9c025754..21a9b7a5ae 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -290,29 +290,6 @@ GlobalProperty pc_compat_2_3[] = { }; const size_t pc_compat_2_3_len = G_N_ELEMENTS(pc_compat_2_3); -GlobalProperty pc_compat_2_2[] = { - PC_CPU_MODEL_IDS("2.2.0") - { "kvm64" "-" TYPE_X86_CPU, "vme", "off" }, - { "kvm32" "-" TYPE_X86_CPU, "vme", "off" }, - { "Conroe" "-" TYPE_X86_CPU, "vme", "off" }, - { "Penryn" "-" TYPE_X86_CPU, "vme", "off" }, - { "Nehalem" "-" TYPE_X86_CPU, "vme", "off" }, - { "Westmere" "-" TYPE_X86_CPU, "vme", "off" }, - { "SandyBridge" "-" TYPE_X86_CPU, "vme", "off" }, - { "Haswell" "-" TYPE_X86_CPU, "vme", "off" }, - { "Broadwell" "-" TYPE_X86_CPU, "vme", "off" }, - { "Opteron_G1" "-" TYPE_X86_CPU, "vme", "off" }, - { "Opteron_G2" "-" TYPE_X86_CPU, "vme", "off" }, - { "Opteron_G3" "-" TYPE_X86_CPU, "vme", "off" }, - { "Opteron_G4" "-" TYPE_X86_CPU, "vme", "off" }, - { "Opteron_G5" "-" TYPE_X86_CPU, "vme", "off" }, - { "Haswell" "-" TYPE_X86_CPU, "f16c", "off" }, - { "Haswell" "-" TYPE_X86_CPU, "rdrand", "off" }, - { "Broadwell" "-" TYPE_X86_CPU, "f16c", "off" }, - { "Broadwell" "-" TYPE_X86_CPU, "rdrand", "off" }, -}; -const size_t pc_compat_2_2_len = G_N_ELEMENTS(pc_compat_2_2); - GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled) { GSIState *s; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index e0b421dd51..1343fd93e7 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -429,11 +429,6 @@ static void pc_compat_2_3_fn(MachineState *machine) } } -static void pc_compat_2_2_fn(MachineState *machine) -{ - pc_compat_2_3_fn(machine); -} - #ifdef CONFIG_ISAPC static void pc_init_isa(MachineState *machine) { @@ -843,22 +838,6 @@ static void pc_i440fx_2_3_machine_options(MachineClass *m) DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, pc_i440fx_2_3_machine_options); -static void pc_i440fx_2_2_machine_options(MachineClass *m) -{ - PCMachineClass *pcmc = PC_MACHINE_CLASS(m); - - pc_i440fx_2_3_machine_options(m); - m->hw_version = "2.2.0"; - m->default_machine_opts = "firmware=bios-256k.bin,suppress-vmdesc=on"; - compat_props_add(m->compat_props, hw_compat_2_2, hw_compat_2_2_len); - compat_props_add(m->compat_props, pc_compat_2_2, pc_compat_2_2_len); - pcmc->rsdp_in_ram = false; - pcmc->resizable_acpi_blob = false; -} - -DEFINE_I440FX_MACHINE(v2_2, "pc-i440fx-2.2", pc_compat_2_2_fn, - pc_i440fx_2_2_machine_options); - #ifdef CONFIG_ISAPC static void isapc_machine_options(MachineClass *m) { From patchwork Tue Jun 18 15:59:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702565 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A1638C27C4F for ; Tue, 18 Jun 2024 16:04:30 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbIJ-00069H-5B; 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Tue, 18 Jun 2024 09:02:23 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56dd135esm632707466b.96.2024.06.18.09.02.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:02:22 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu , Igor Mammedov Subject: [PULL 17/76] hw/i386/pc: Remove PCMachineClass::resizable_acpi_blob Date: Tue, 18 Jun 2024 17:59:39 +0200 Message-ID: <20240618160039.36108-18-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=philmd@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org PCMachineClass::resizable_acpi_blob was only used by the pc-i440fx-2.2 machine, which got removed. It is now always true. Remove it, simplifying acpi_build(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-18-philmd@linaro.org> --- include/hw/i386/pc.h | 3 --- hw/i386/acpi-build.c | 10 ---------- hw/i386/pc.c | 1 - 3 files changed, 14 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 155a02b1b5..d01ddc4618 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -125,9 +125,6 @@ struct PCMachineClass { /* create kvmclock device even when KVM PV features are not exposed */ bool kvmclock_create_always; - /* resizable acpi blob compat */ - bool resizable_acpi_blob; - /* * whether the machine type implements broken 32-bit address space bound * check for memory. diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index f5d74e2b4b..eafc3761c8 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2687,16 +2687,6 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) * keep the table size stable for all (max_cpus, max_memory_slots) * combinations. */ - /* Make sure we have a buffer in case we need to resize the tables. */ - if ((tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) && - !pcmc->resizable_acpi_blob) { - /* As of QEMU 2.1, this fires with 160 VCPUs and 255 memory slots. */ - warn_report("ACPI table size %u exceeds %d bytes," - " migration may not work", - tables_blob->len, ACPI_BUILD_TABLE_SIZE / 2); - error_printf("Try removing CPUs, NUMA nodes, memory slots" - " or PCI bridges.\n"); - } acpi_align_size(tables_blob, ACPI_BUILD_TABLE_SIZE); acpi_align_size(tables->linker->cmd_blob, ACPI_BUILD_ALIGN_SIZE); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 21a9b7a5ae..a6d50df500 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1774,7 +1774,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) pcmc->acpi_data_size = 0x20000 + 0x8000; pcmc->pvh_enabled = true; pcmc->kvmclock_create_always = true; - pcmc->resizable_acpi_blob = true; x86mc->apic_xrupt_override = true; assert(!mc->get_hotplug_handler); mc->get_hotplug_handler = pc_get_hotplug_handler; From patchwork Tue Jun 18 15:59:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702568 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82D79C2BA18 for ; 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Tue, 18 Jun 2024 09:02:28 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cb72e9dd7sm7821785a12.57.2024.06.18.09.02.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:02:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 18/76] hw/i386/pc: Remove PCMachineClass::rsdp_in_ram Date: Tue, 18 Jun 2024 17:59:40 +0200 Message-ID: <20240618160039.36108-19-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philmd@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org PCMachineClass::rsdp_in_ram was only used by the pc-i440fx-2.2 machine, which got removed. It is now always true. Remove it, simplifying acpi_setup(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-19-philmd@linaro.org> --- include/hw/i386/pc.h | 1 - hw/i386/acpi-build.c | 35 ++++------------------------------- hw/i386/pc.c | 1 - 3 files changed, 4 insertions(+), 33 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index d01ddc4618..0b7a18a882 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -100,7 +100,6 @@ struct PCMachineClass { /* ACPI compat: */ bool has_acpi_build; - bool rsdp_in_ram; unsigned acpi_data_size; int pci_root_uid; diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index eafc3761c8..158e74f64a 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2494,7 +2494,6 @@ static void acpi_build(AcpiBuildTables *tables, MachineState *machine) { PCMachineState *pcms = PC_MACHINE(machine); - PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); X86MachineState *x86ms = X86_MACHINE(machine); DeviceState *iommu = pcms->iommu; GArray *table_offsets; @@ -2666,16 +2665,6 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) .rsdt_tbl_offset = &rsdt, }; build_rsdp(tables->rsdp, tables->linker, &rsdp_data); - if (!pcmc->rsdp_in_ram) { - /* We used to allocate some extra space for RSDP revision 2 but - * only used the RSDP revision 0 space. The extra bytes were - * zeroed out and not used. - * Here we continue wasting those extra 16 bytes to make sure we - * don't break migration for machine types 2.2 and older due to - * RSDP blob size mismatch. - */ - build_append_int_noprefix(tables->rsdp, 0, 16); - } } /* We'll expose it all to Guest so we want to reduce @@ -2754,7 +2743,6 @@ static const VMStateDescription vmstate_acpi_build = { void acpi_setup(void) { PCMachineState *pcms = PC_MACHINE(qdev_get_machine()); - PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); X86MachineState *x86ms = X86_MACHINE(pcms); AcpiBuildTables tables; AcpiBuildState *build_state; @@ -2816,25 +2804,10 @@ void acpi_setup(void) tables.vmgenid); } - if (!pcmc->rsdp_in_ram) { - /* - * Keep for compatibility with old machine types. - * Though RSDP is small, its contents isn't immutable, so - * we'll update it along with the rest of tables on guest access. - */ - uint32_t rsdp_size = acpi_data_len(tables.rsdp); - - build_state->rsdp = g_memdup(tables.rsdp->data, rsdp_size); - fw_cfg_add_file_callback(x86ms->fw_cfg, ACPI_BUILD_RSDP_FILE, - acpi_build_update, NULL, build_state, - build_state->rsdp, rsdp_size, true); - build_state->rsdp_mr = NULL; - } else { - build_state->rsdp = NULL; - build_state->rsdp_mr = acpi_add_rom_blob(acpi_build_update, - build_state, tables.rsdp, - ACPI_BUILD_RSDP_FILE); - } + build_state->rsdp = NULL; + build_state->rsdp_mr = acpi_add_rom_blob(acpi_build_update, + build_state, tables.rsdp, + ACPI_BUILD_RSDP_FILE); qemu_register_reset(acpi_build_reset, build_state); acpi_build_reset(build_state); diff --git a/hw/i386/pc.c b/hw/i386/pc.c index a6d50df500..b0fc8686d8 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1763,7 +1763,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) pcmc->pci_enabled = true; pcmc->has_acpi_build = true; - pcmc->rsdp_in_ram = true; pcmc->smbios_defaults = true; pcmc->gigabyte_align = true; pcmc->has_reserved_memory = true; From patchwork Tue Jun 18 15:59:41 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:02:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 19/76] hw/i386/acpi: Remove AcpiBuildState::rsdp field Date: Tue, 18 Jun 2024 17:59:41 +0200 Message-ID: <20240618160039.36108-20-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=philmd@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org AcpiBuildState::rsdp is always NULL, remove it, simplifying acpi_build_update(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-20-philmd@linaro.org> --- hw/i386/acpi-build.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 158e74f64a..f4e366f64f 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -2458,7 +2458,6 @@ struct AcpiBuildState { MemoryRegion *table_mr; /* Is table patched? */ uint8_t patched; - void *rsdp; MemoryRegion *rsdp_mr; MemoryRegion *linker_mr; } AcpiBuildState; @@ -2714,11 +2713,7 @@ static void acpi_build_update(void *build_opaque) acpi_ram_update(build_state->table_mr, tables.table_data); - if (build_state->rsdp) { - memcpy(build_state->rsdp, tables.rsdp->data, acpi_data_len(tables.rsdp)); - } else { - acpi_ram_update(build_state->rsdp_mr, tables.rsdp); - } + acpi_ram_update(build_state->rsdp_mr, tables.rsdp); acpi_ram_update(build_state->linker_mr, tables.linker->cmd_blob); acpi_build_tables_cleanup(&tables, true); @@ -2804,7 +2799,6 @@ void acpi_setup(void) tables.vmgenid); } - build_state->rsdp = NULL; build_state->rsdp_mr = acpi_add_rom_blob(acpi_build_update, build_state, tables.rsdp, ACPI_BUILD_RSDP_FILE); From patchwork Tue Jun 18 15:59:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702628 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62AC3C27C4F for ; Tue, 18 Jun 2024 16:11:42 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbIW-0006sF-FJ; Tue, 18 Jun 2024 12:03:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbIC-00062g-0b for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:02:40 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f6a1f2cb9sm500182066b.17.2024.06.18.09.02.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:02:39 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 20/76] hw/i386/pc: Remove deprecated pc-i440fx-2.3 machine Date: Tue, 18 Jun 2024 17:59:42 +0200 Message-ID: <20240618160039.36108-21-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The pc-i440fx-2.3 machine was deprecated for the 8.2 release (see commit c7437f0ddb "docs/about: Mark the old pc-i440fx-2.0 - 2.3 machine types as deprecated"), time to remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-21-philmd@linaro.org> --- docs/about/deprecated.rst | 4 ++-- docs/about/removed-features.rst | 2 +- hw/i386/pc.c | 25 ------------------------- hw/i386/pc_piix.c | 19 ------------------- 4 files changed, 3 insertions(+), 47 deletions(-) diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst index d7775fbb84..ff3da68208 100644 --- a/docs/about/deprecated.rst +++ b/docs/about/deprecated.rst @@ -212,8 +212,8 @@ deprecated; use the new name ``dtb-randomness`` instead. The new name better reflects the way this property affects all random data within the device tree blob, not just the ``kaslr-seed`` node. -``pc-i440fx-2.3`` up to ``pc-i440fx-2.3`` (since 8.2) and ``pc-i440fx-2.4`` up to ``pc-i440fx-2.12`` (since 9.1) -'''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' +``pc-i440fx-2.4`` up to ``pc-i440fx-2.12`` (since 9.1) +'''''''''''''''''''''''''''''''''''''''''''''''''''''' These old machine types are quite neglected nowadays and thus might have various pitfalls with regards to live migration. Use a newer machine type diff --git a/docs/about/removed-features.rst b/docs/about/removed-features.rst index 58821a8695..fc7b28e637 100644 --- a/docs/about/removed-features.rst +++ b/docs/about/removed-features.rst @@ -948,7 +948,7 @@ mips ``fulong2e`` machine alias (removed in 6.0) This machine has been renamed ``fuloong2e``. -``pc-0.10`` up to ``pc-i440fx-2.2`` (removed in 4.0 up to 9.0) +``pc-0.10`` up to ``pc-i440fx-2.3`` (removed in 4.0 up to 9.0) '''''''''''''''''''''''''''''''''''''''''''''''''''''''''''''' These machine types were very old and likely could not be used for live diff --git a/hw/i386/pc.c b/hw/i386/pc.c index b0fc8686d8..819a164373 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -265,31 +265,6 @@ GlobalProperty pc_compat_2_4[] = { }; const size_t pc_compat_2_4_len = G_N_ELEMENTS(pc_compat_2_4); -GlobalProperty pc_compat_2_3[] = { - PC_CPU_MODEL_IDS("2.3.0") - { TYPE_X86_CPU, "arat", "off" }, - { "qemu64" "-" TYPE_X86_CPU, "min-level", "4" }, - { "kvm64" "-" TYPE_X86_CPU, "min-level", "5" }, - { "pentium3" "-" TYPE_X86_CPU, "min-level", "2" }, - { "n270" "-" TYPE_X86_CPU, "min-level", "5" }, - { "Conroe" "-" TYPE_X86_CPU, "min-level", "4" }, - { "Penryn" "-" TYPE_X86_CPU, "min-level", "4" }, - { "Nehalem" "-" TYPE_X86_CPU, "min-level", "4" }, - { "n270" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { "Penryn" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { "Conroe" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { "Nehalem" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { "Westmere" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { "SandyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { "IvyBridge" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { "Haswell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { "Haswell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { "Broadwell" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { "Broadwell-noTSX" "-" TYPE_X86_CPU, "min-xlevel", "0x8000000a" }, - { TYPE_X86_CPU, "kvm-no-smi-migration", "on" }, -}; -const size_t pc_compat_2_3_len = G_N_ELEMENTS(pc_compat_2_3); - GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled) { GSIState *s; diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 1343fd93e7..217c749705 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -421,14 +421,6 @@ static void pc_set_south_bridge(Object *obj, int value, Error **errp) * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). */ -static void pc_compat_2_3_fn(MachineState *machine) -{ - X86MachineState *x86ms = X86_MACHINE(machine); - if (kvm_enabled()) { - x86ms->smm = ON_OFF_AUTO_OFF; - } -} - #ifdef CONFIG_ISAPC static void pc_init_isa(MachineState *machine) { @@ -827,17 +819,6 @@ static void pc_i440fx_2_4_machine_options(MachineClass *m) DEFINE_I440FX_MACHINE(v2_4, "pc-i440fx-2.4", NULL, pc_i440fx_2_4_machine_options) -static void pc_i440fx_2_3_machine_options(MachineClass *m) -{ - pc_i440fx_2_4_machine_options(m); - m->hw_version = "2.3.0"; - compat_props_add(m->compat_props, hw_compat_2_3, hw_compat_2_3_len); - compat_props_add(m->compat_props, pc_compat_2_3, pc_compat_2_3_len); -} - -DEFINE_I440FX_MACHINE(v2_3, "pc-i440fx-2.3", pc_compat_2_3_fn, - pc_i440fx_2_3_machine_options); - #ifdef CONFIG_ISAPC static void isapc_machine_options(MachineClass *m) { From patchwork Tue Jun 18 15:59:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702570 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 63198C2BA18 for ; Tue, 18 Jun 2024 16:05:19 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbIV-0006oY-RN; Tue, 18 Jun 2024 12:03:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbII-00069J-BB for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:02:46 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56fa67ecsm621310566b.215.2024.06.18.09.02.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:02:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?D?= =?utf-8?q?aniel_P_=2E_Berrang=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 21/76] hw/i386/pc: Simplify DEFINE_I440FX_MACHINE() macro Date: Tue, 18 Jun 2024 17:59:43 +0200 Message-ID: <20240618160039.36108-22-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Last commit removed the last non-NULL use of DEFINE_I440FX_MACHINE 3rd parameter. 'compatfn' is now obsolete, remove it. Suggested-by: Daniel P. Berrangé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Daniel P. Berrangé Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-22-philmd@linaro.org> --- hw/i386/pc_piix.c | 69 ++++++++++++++++++++--------------------------- 1 file changed, 29 insertions(+), 40 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 217c749705..e4930b7f48 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -414,13 +414,6 @@ static void pc_set_south_bridge(Object *obj, int value, Error **errp) pcms->south_bridge = PCSouthBridgeOption_lookup.array[value]; } -/* Looking for a pc_compat_2_4() function? It doesn't exist. - * pc_compat_*() functions that run on machine-init time and - * change global QEMU state are deprecated. Please don't create - * one, and implement any pc-*-2.4 (and newer) compat code in - * hw_compat_*, pc_compat_*, or * pc_*_machine_options(). - */ - #ifdef CONFIG_ISAPC static void pc_init_isa(MachineState *machine) { @@ -452,13 +445,9 @@ static void pc_xen_hvm_init(MachineState *machine) } #endif -#define DEFINE_I440FX_MACHINE(suffix, name, compatfn, optionfn) \ +#define DEFINE_I440FX_MACHINE(suffix, name, optionfn) \ static void pc_init_##suffix(MachineState *machine) \ { \ - void (*compat)(MachineState *m) = (compatfn); \ - if (compat) { \ - compat(machine); \ - } \ pc_init1(machine, TYPE_I440FX_PCI_DEVICE); \ } \ DEFINE_PC_MACHINE(suffix, name, pc_init_##suffix, optionfn) @@ -496,7 +485,7 @@ static void pc_i440fx_9_1_machine_options(MachineClass *m) m->is_default = true; } -DEFINE_I440FX_MACHINE(v9_1, "pc-i440fx-9.1", NULL, +DEFINE_I440FX_MACHINE(v9_1, "pc-i440fx-9.1", pc_i440fx_9_1_machine_options); static void pc_i440fx_9_0_machine_options(MachineClass *m) @@ -512,7 +501,7 @@ static void pc_i440fx_9_0_machine_options(MachineClass *m) pcmc->isa_bios_alias = false; } -DEFINE_I440FX_MACHINE(v9_0, "pc-i440fx-9.0", NULL, +DEFINE_I440FX_MACHINE(v9_0, "pc-i440fx-9.0", pc_i440fx_9_0_machine_options); static void pc_i440fx_8_2_machine_options(MachineClass *m) @@ -527,7 +516,7 @@ static void pc_i440fx_8_2_machine_options(MachineClass *m) pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_64; } -DEFINE_I440FX_MACHINE(v8_2, "pc-i440fx-8.2", NULL, +DEFINE_I440FX_MACHINE(v8_2, "pc-i440fx-8.2", pc_i440fx_8_2_machine_options); static void pc_i440fx_8_1_machine_options(MachineClass *m) @@ -541,7 +530,7 @@ static void pc_i440fx_8_1_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len); } -DEFINE_I440FX_MACHINE(v8_1, "pc-i440fx-8.1", NULL, +DEFINE_I440FX_MACHINE(v8_1, "pc-i440fx-8.1", pc_i440fx_8_1_machine_options); static void pc_i440fx_8_0_machine_options(MachineClass *m) @@ -556,7 +545,7 @@ static void pc_i440fx_8_0_machine_options(MachineClass *m) pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32; } -DEFINE_I440FX_MACHINE(v8_0, "pc-i440fx-8.0", NULL, +DEFINE_I440FX_MACHINE(v8_0, "pc-i440fx-8.0", pc_i440fx_8_0_machine_options); static void pc_i440fx_7_2_machine_options(MachineClass *m) @@ -566,7 +555,7 @@ static void pc_i440fx_7_2_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len); } -DEFINE_I440FX_MACHINE(v7_2, "pc-i440fx-7.2", NULL, +DEFINE_I440FX_MACHINE(v7_2, "pc-i440fx-7.2", pc_i440fx_7_2_machine_options); static void pc_i440fx_7_1_machine_options(MachineClass *m) @@ -576,7 +565,7 @@ static void pc_i440fx_7_1_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len); } -DEFINE_I440FX_MACHINE(v7_1, "pc-i440fx-7.1", NULL, +DEFINE_I440FX_MACHINE(v7_1, "pc-i440fx-7.1", pc_i440fx_7_1_machine_options); static void pc_i440fx_7_0_machine_options(MachineClass *m) @@ -588,7 +577,7 @@ static void pc_i440fx_7_0_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len); } -DEFINE_I440FX_MACHINE(v7_0, "pc-i440fx-7.0", NULL, +DEFINE_I440FX_MACHINE(v7_0, "pc-i440fx-7.0", pc_i440fx_7_0_machine_options); static void pc_i440fx_6_2_machine_options(MachineClass *m) @@ -598,7 +587,7 @@ static void pc_i440fx_6_2_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len); } -DEFINE_I440FX_MACHINE(v6_2, "pc-i440fx-6.2", NULL, +DEFINE_I440FX_MACHINE(v6_2, "pc-i440fx-6.2", pc_i440fx_6_2_machine_options); static void pc_i440fx_6_1_machine_options(MachineClass *m) @@ -609,7 +598,7 @@ static void pc_i440fx_6_1_machine_options(MachineClass *m) m->smp_props.prefer_sockets = true; } -DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", NULL, +DEFINE_I440FX_MACHINE(v6_1, "pc-i440fx-6.1", pc_i440fx_6_1_machine_options); static void pc_i440fx_6_0_machine_options(MachineClass *m) @@ -619,7 +608,7 @@ static void pc_i440fx_6_0_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len); } -DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", NULL, +DEFINE_I440FX_MACHINE(v6_0, "pc-i440fx-6.0", pc_i440fx_6_0_machine_options); static void pc_i440fx_5_2_machine_options(MachineClass *m) @@ -629,7 +618,7 @@ static void pc_i440fx_5_2_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len); } -DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", NULL, +DEFINE_I440FX_MACHINE(v5_2, "pc-i440fx-5.2", pc_i440fx_5_2_machine_options); static void pc_i440fx_5_1_machine_options(MachineClass *m) @@ -643,7 +632,7 @@ static void pc_i440fx_5_1_machine_options(MachineClass *m) pcmc->pci_root_uid = 1; } -DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", NULL, +DEFINE_I440FX_MACHINE(v5_1, "pc-i440fx-5.1", pc_i440fx_5_1_machine_options); static void pc_i440fx_5_0_machine_options(MachineClass *m) @@ -655,7 +644,7 @@ static void pc_i440fx_5_0_machine_options(MachineClass *m) m->auto_enable_numa_with_memdev = false; } -DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, +DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", pc_i440fx_5_0_machine_options); static void pc_i440fx_4_2_machine_options(MachineClass *m) @@ -665,7 +654,7 @@ static void pc_i440fx_4_2_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); } -DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, +DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", pc_i440fx_4_2_machine_options); static void pc_i440fx_4_1_machine_options(MachineClass *m) @@ -675,7 +664,7 @@ static void pc_i440fx_4_1_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len); } -DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", NULL, +DEFINE_I440FX_MACHINE(v4_1, "pc-i440fx-4.1", pc_i440fx_4_1_machine_options); static void pc_i440fx_4_0_machine_options(MachineClass *m) @@ -687,7 +676,7 @@ static void pc_i440fx_4_0_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_4_0, pc_compat_4_0_len); } -DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", NULL, +DEFINE_I440FX_MACHINE(v4_0, "pc-i440fx-4.0", pc_i440fx_4_0_machine_options); static void pc_i440fx_3_1_machine_options(MachineClass *m) @@ -701,7 +690,7 @@ static void pc_i440fx_3_1_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_3_1, pc_compat_3_1_len); } -DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", NULL, +DEFINE_I440FX_MACHINE(v3_1, "pc-i440fx-3.1", pc_i440fx_3_1_machine_options); static void pc_i440fx_3_0_machine_options(MachineClass *m) @@ -711,7 +700,7 @@ static void pc_i440fx_3_0_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_3_0, pc_compat_3_0_len); } -DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", NULL, +DEFINE_I440FX_MACHINE(v3_0, "pc-i440fx-3.0", pc_i440fx_3_0_machine_options); static void pc_i440fx_2_12_machine_options(MachineClass *m) @@ -722,7 +711,7 @@ static void pc_i440fx_2_12_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_2_12, pc_compat_2_12_len); } -DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", NULL, +DEFINE_I440FX_MACHINE(v2_12, "pc-i440fx-2.12", pc_i440fx_2_12_machine_options); static void pc_i440fx_2_11_machine_options(MachineClass *m) @@ -732,7 +721,7 @@ static void pc_i440fx_2_11_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_2_11, pc_compat_2_11_len); } -DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", NULL, +DEFINE_I440FX_MACHINE(v2_11, "pc-i440fx-2.11", pc_i440fx_2_11_machine_options); static void pc_i440fx_2_10_machine_options(MachineClass *m) @@ -743,7 +732,7 @@ static void pc_i440fx_2_10_machine_options(MachineClass *m) m->auto_enable_numa_with_memhp = false; } -DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, +DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", pc_i440fx_2_10_machine_options); static void pc_i440fx_2_9_machine_options(MachineClass *m) @@ -753,7 +742,7 @@ static void pc_i440fx_2_9_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_2_9, pc_compat_2_9_len); } -DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, +DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", pc_i440fx_2_9_machine_options); static void pc_i440fx_2_8_machine_options(MachineClass *m) @@ -763,7 +752,7 @@ static void pc_i440fx_2_8_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_2_8, pc_compat_2_8_len); } -DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", NULL, +DEFINE_I440FX_MACHINE(v2_8, "pc-i440fx-2.8", pc_i440fx_2_8_machine_options); static void pc_i440fx_2_7_machine_options(MachineClass *m) @@ -773,7 +762,7 @@ static void pc_i440fx_2_7_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_2_7, pc_compat_2_7_len); } -DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", NULL, +DEFINE_I440FX_MACHINE(v2_7, "pc-i440fx-2.7", pc_i440fx_2_7_machine_options); static void pc_i440fx_2_6_machine_options(MachineClass *m) @@ -788,7 +777,7 @@ static void pc_i440fx_2_6_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_2_6, pc_compat_2_6_len); } -DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", NULL, +DEFINE_I440FX_MACHINE(v2_6, "pc-i440fx-2.6", pc_i440fx_2_6_machine_options); static void pc_i440fx_2_5_machine_options(MachineClass *m) @@ -802,7 +791,7 @@ static void pc_i440fx_2_5_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_2_5, pc_compat_2_5_len); } -DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", NULL, +DEFINE_I440FX_MACHINE(v2_5, "pc-i440fx-2.5", pc_i440fx_2_5_machine_options); static void pc_i440fx_2_4_machine_options(MachineClass *m) @@ -816,7 +805,7 @@ static void pc_i440fx_2_4_machine_options(MachineClass *m) compat_props_add(m->compat_props, pc_compat_2_4, pc_compat_2_4_len); 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Tue, 18 Jun 2024 09:02:52 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cddba1a17sm3598763a12.43.2024.06.18.09.02.51 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:02:52 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Zhao Liu , Thomas Huth , Igor Mammedov Subject: [PULL 22/76] target/i386: Remove X86CPU::kvm_no_smi_migration field Date: Tue, 18 Jun 2024 17:59:44 +0200 Message-ID: <20240618160039.36108-23-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=philmd@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org X86CPU::kvm_no_smi_migration was only used by the pc-i440fx-2.3 machine, which got removed. Remove it and simplify kvm_put_vcpu_events(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Zhao Liu Reviewed-by: Thomas Huth Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-23-philmd@linaro.org> --- target/i386/cpu.h | 3 --- target/i386/cpu.c | 2 -- target/i386/kvm/kvm.c | 7 +------ 3 files changed, 1 insertion(+), 11 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 7e2a9b56ae..52571ababe 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2108,9 +2108,6 @@ struct ArchCPU { /* if set, limit maximum value for phys_bits when host_phys_bits is true */ uint8_t host_phys_bits_limit; - /* Stop SMI delivery for migration compatibility with old machines */ - bool kvm_no_smi_migration; - /* Forcefully disable KVM PV features not exposed in guest CPUIDs */ bool kvm_pv_enforce_cpuid; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 365852cb99..4c2e6f3a71 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8281,8 +8281,6 @@ static Property x86_cpu_properties[] = { DEFINE_PROP_BOOL("x-vendor-cpuid-only", X86CPU, vendor_cpuid_only, true), DEFINE_PROP_BOOL("lmce", X86CPU, enable_lmce, false), DEFINE_PROP_BOOL("l3-cache", X86CPU, enable_l3_cache, true), - DEFINE_PROP_BOOL("kvm-no-smi-migration", X86CPU, kvm_no_smi_migration, - false), DEFINE_PROP_BOOL("kvm-pv-enforce-cpuid", X86CPU, kvm_pv_enforce_cpuid, false), DEFINE_PROP_BOOL("vmware-cpuid-freq", X86CPU, vmware_cpuid_freq, true), diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 912f5d5a6b..7ad8072748 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -4474,6 +4474,7 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int level) events.sipi_vector = env->sipi_vector; if (has_msr_smbase) { + events.flags |= KVM_VCPUEVENT_VALID_SMM; events.smi.smm = !!(env->hflags & HF_SMM_MASK); events.smi.smm_inside_nmi = !!(env->hflags2 & HF2_SMM_INSIDE_NMI_MASK); if (kvm_irqchip_in_kernel()) { @@ -4488,12 +4489,6 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int level) events.smi.pending = 0; events.smi.latched_init = 0; } - /* Stop SMI delivery on old machine types to avoid a reboot - * on an inward migration of an old VM. - */ - if (!cpu->kvm_no_smi_migration) { - events.flags |= KVM_VCPUEVENT_VALID_SMM; - } } if (level >= KVM_PUT_RESET_STATE) { From patchwork Tue Jun 18 15:59:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702569 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5B280C2BB85 for ; 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Tue, 18 Jun 2024 09:02:58 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56f9802csm627137066b.189.2024.06.18.09.02.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:02:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Zhao Liu , Igor Mammedov Subject: [PULL 23/76] hw/i386/pc: Replace PCMachineClass::acpi_data_size by PC_ACPI_DATA_SIZE Date: Tue, 18 Jun 2024 17:59:45 +0200 Message-ID: <20240618160039.36108-24-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=philmd@linaro.org; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org PCMachineClass::acpi_data_size was only used by the pc-i440fx-2.0 machine, which got removed. Since it is constant, replace the class field by a definition (local to hw/i386/pc.c, since not used elsewhere). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Zhao Liu Reviewed-by: Igor Mammedov Message-Id: <20240617071118.60464-24-philmd@linaro.org> --- include/hw/i386/pc.h | 4 ---- hw/i386/pc.c | 19 ++++++++++++------- 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 0b7a18a882..46bc411063 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -74,9 +74,6 @@ typedef struct PCMachineState { * * Compat fields: * - * @acpi_data_size: Size of the chunk of memory at the top of RAM - * for the BIOS ACPI tables and other BIOS - * datastructures. * @gigabyte_align: Make sure that guest addresses aligned at * 1Gbyte boundaries get mapped to host * addresses aligned at 1Gbyte boundaries. This @@ -100,7 +97,6 @@ struct PCMachineClass { /* ACPI compat: */ bool has_acpi_build; - unsigned acpi_data_size; int pci_root_uid; /* SMBIOS compat: */ diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 819a164373..77415064c6 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -265,6 +265,16 @@ GlobalProperty pc_compat_2_4[] = { }; const size_t pc_compat_2_4_len = G_N_ELEMENTS(pc_compat_2_4); +/* + * @PC_FW_DATA: + * Size of the chunk of memory at the top of RAM for the BIOS ACPI tables + * and other BIOS datastructures. + * + * BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K + * reported to be used at the moment, 32K should be enough for a while. + */ +#define PC_FW_DATA (0x20000 + 0x8000) + GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled) { GSIState *s; @@ -646,8 +656,7 @@ void xen_load_linux(PCMachineState *pcms) fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, x86ms->boot_cpus); rom_set_fw(fw_cfg); - x86_load_linux(x86ms, fw_cfg, pcmc->acpi_data_size, - pcmc->pvh_enabled); + x86_load_linux(x86ms, fw_cfg, PC_FW_DATA, pcmc->pvh_enabled); for (i = 0; i < nb_option_roms; i++) { assert(!strcmp(option_rom[i].name, "linuxboot.bin") || !strcmp(option_rom[i].name, "linuxboot_dma.bin") || @@ -986,8 +995,7 @@ void pc_memory_init(PCMachineState *pcms, } if (linux_boot) { - x86_load_linux(x86ms, fw_cfg, pcmc->acpi_data_size, - pcmc->pvh_enabled); + x86_load_linux(x86ms, fw_cfg, PC_FW_DATA, pcmc->pvh_enabled); } for (i = 0; i < nb_option_roms; i++) { @@ -1743,9 +1751,6 @@ static void pc_machine_class_init(ObjectClass *oc, void *data) pcmc->has_reserved_memory = true; pcmc->enforce_amd_1tb_hole = true; pcmc->isa_bios_alias = true; - /* BIOS ACPI tables: 128K. Other BIOS datastructures: less than 4K reported - * to be used at the moment, 32K should be enough for a while. */ - pcmc->acpi_data_size = 0x20000 + 0x8000; pcmc->pvh_enabled = true; pcmc->kvmclock_create_always = true; x86mc->apic_xrupt_override = true; From patchwork Tue Jun 18 15:59:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702600 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E909AC2BA18 for ; Tue, 18 Jun 2024 16:08:57 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbIb-00077C-Ao; Tue, 18 Jun 2024 12:03:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbIZ-00072s-9D for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:03:07 -0400 Received: from mail-ej1-x630.google.com ([2a00:1450:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sJbIX-00077Z-LQ for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:03:06 -0400 Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-a6efacd25ecso350258366b.1 for ; Tue, 18 Jun 2024 09:03:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1718726584; x=1719331384; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=oLAsEZ1WvZS0nMNIQBNTpRKUp/i555alHafKiDl+nF8=; b=LAU50MYf3XGGj339E4iXSrWXXpdCejEOlUAitjnh2pv+3RgekTuyKnC9OmvyOm0+xC 3mlooR6sd+HgbbQh8gKZve7MbXTf/0n6MqxiM6/eluPpuNwHbDVoubO7+A4fO7O3CoQs +GvTPu4d1meWefqgJ5oN4aFI530j/eFiQ37d2GPOarvMBJ4ZSrFh58hBmI/baM1llpnb 2b8XRHg25w/rHCM6hSTfmH+pw1QMal+PFGNw2K5yXAXUse2BySjrIgJYC4VRLe4f/yqk boJgCyftTWCyE1Flq/tBBSdx2uqXsfm9uVeAxtqcOdTpOdHqdYfMEKTnW4QnWN8HT8fH RY2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718726584; x=1719331384; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=oLAsEZ1WvZS0nMNIQBNTpRKUp/i555alHafKiDl+nF8=; b=h1eEaR0Y/7uZrsH6nL7tYBC4CK614ZHdGA4q9e4tae/bwe/wo0ctHrI86HkNE4Z4la DmVu/+z3VMBC9DW77URMe0epKNfA/Nb+npGcfTS/3/wfoNp7tKoNS/e94E5mYJq0K8KN sqrOMTB/woM6TqfJiJY8Ze7DAAPJzpNK/YMs+/QF0N1ctkA7WW2ZIyUuozZ8tS/qC0Rr dhF1+v3U6nPQT+nLGHJ2IZtiYpaQvKTaoksly+V1iFZplaXvOwAq95q3BoLOhb6WbroF IVl5IBTn61kzAWfIfeygCGE/owFI6FrvUePw5n316j2Oxaqa8tOboEsfvMrgryVtR/Be DB0g== X-Gm-Message-State: AOJu0Yxwhl3Gmtz3X+n/0k9bOw4MRxci9nC1cmlAQmwM7DcDtIlSAQMy hvkPBv2OZjcVGEZRKiGVEvUaYsa2Osw32oiffA77jqf0g1crd5CnFagNW66Ec0IgQftnzRLpfr3 8 X-Google-Smtp-Source: AGHT+IG3RiFau78Mo8mE6dYmzum4/NrtfRiyfoQF7qv6p4mxHTS1Ww+VTqiku6RKguLU54fjIdqRJw== X-Received: by 2002:a50:aa8a:0:b0:57c:6d89:eaef with SMTP id 4fb4d7f45d1cf-57cbd68dbe7mr8665503a12.18.1718726583755; Tue, 18 Jun 2024 09:03:03 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f8176eea5sm288091766b.88.2024.06.18.09.03.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:03:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-stable@nongnu.org, "Michael S . Tsirkin" Subject: [PULL 24/76] hw/audio/virtio-snd: Always use little endian audio format Date: Tue, 18 Jun 2024 17:59:46 +0200 Message-ID: <20240618160039.36108-25-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The VIRTIO Sound Device conforms with the Virtio spec v1.2, thus only use little endianness. Remove the suspicious target_words_bigendian() noticed during code review. Cc: qemu-stable@nongnu.org Fixes: eb9ad377bb ("virtio-sound: handle control messages and streams") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Message-Id: <20240422211830.25606-1-philmd@linaro.org> --- hw/audio/virtio-snd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/audio/virtio-snd.c b/hw/audio/virtio-snd.c index 7d09800d1f..5993f4f040 100644 --- a/hw/audio/virtio-snd.c +++ b/hw/audio/virtio-snd.c @@ -401,7 +401,7 @@ static void virtio_snd_get_qemu_audsettings(audsettings *as, as->nchannels = MIN(AUDIO_MAX_CHANNELS, params->channels); as->fmt = virtio_snd_get_qemu_format(params->format); as->freq = virtio_snd_get_qemu_freq(params->rate); - as->endianness = target_words_bigendian() ? 1 : 0; + as->endianness = 0; /* Conforming to VIRTIO 1.0: always little endian. */ } /* From patchwork Tue Jun 18 15:59:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702601 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DB091C2BBCA for ; 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Tue, 18 Jun 2024 09:03:09 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cb743ade6sm7856056a12.95.2024.06.18.09.03.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:03:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 25/76] hw/ppc: Avoid using Monitor in pnv_phb3_msi_pic_print_info() Date: Tue, 18 Jun 2024 17:59:47 +0200 Message-ID: <20240618160039.36108-26-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=philmd@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-2-philmd@linaro.org> --- include/hw/pci-host/pnv_phb3.h | 2 +- hw/pci-host/pnv_phb3_msi.c | 21 ++++++++++----------- hw/ppc/pnv.c | 8 +++++++- 3 files changed, 18 insertions(+), 13 deletions(-) diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h index d62b3091ac..24ca3dddaa 100644 --- a/include/hw/pci-host/pnv_phb3.h +++ b/include/hw/pci-host/pnv_phb3.h @@ -40,7 +40,7 @@ void pnv_phb3_msi_update_config(Phb3MsiState *msis, uint32_t base, void pnv_phb3_msi_send(Phb3MsiState *msis, uint64_t addr, uint16_t data, int32_t dev_pe); void pnv_phb3_msi_ffi(Phb3MsiState *msis, uint64_t val); -void pnv_phb3_msi_pic_print_info(Phb3MsiState *msis, Monitor *mon); +void pnv_phb3_msi_pic_print_info(Phb3MsiState *msis, GString *buf); /* diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c index a6d827f903..77d673da54 100644 --- a/hw/pci-host/pnv_phb3_msi.c +++ b/hw/pci-host/pnv_phb3_msi.c @@ -13,7 +13,6 @@ #include "hw/pci-host/pnv_phb3.h" #include "hw/ppc/pnv.h" #include "hw/pci/msi.h" -#include "monitor/monitor.h" #include "hw/irq.h" #include "hw/qdev-properties.h" #include "sysemu/reset.h" @@ -316,13 +315,13 @@ static void pnv_phb3_msi_register_types(void) type_init(pnv_phb3_msi_register_types); -void pnv_phb3_msi_pic_print_info(Phb3MsiState *msi, Monitor *mon) +void pnv_phb3_msi_pic_print_info(Phb3MsiState *msi, GString *buf) { ICSState *ics = ICS(msi); int i; - monitor_printf(mon, "ICS %4x..%4x %p\n", - ics->offset, ics->offset + ics->nr_irqs - 1, ics); + g_string_append_printf(buf, "ICS %4x..%4x %p\n", + ics->offset, ics->offset + ics->nr_irqs - 1, ics); for (i = 0; i < ics->nr_irqs; i++) { uint64_t ive; @@ -335,12 +334,12 @@ void pnv_phb3_msi_pic_print_info(Phb3MsiState *msi, Monitor *mon) continue; } - monitor_printf(mon, " %4x %c%c server=%04x prio=%02x gen=%d\n", - ics->offset + i, - GETFIELD(IODA2_IVT_P, ive) ? 'P' : '-', - GETFIELD(IODA2_IVT_Q, ive) ? 'Q' : '-', - (uint32_t) GETFIELD(IODA2_IVT_SERVER, ive) >> 2, - (uint32_t) GETFIELD(IODA2_IVT_PRIORITY, ive), - (uint32_t) GETFIELD(IODA2_IVT_GEN, ive)); + g_string_append_printf(buf, " %4x %c%c server=%04x prio=%02x gen=%d\n", + ics->offset + i, + GETFIELD(IODA2_IVT_P, ive) ? 'P' : '-', + GETFIELD(IODA2_IVT_Q, ive) ? 'Q' : '-', + (uint32_t) GETFIELD(IODA2_IVT_SERVER, ive) >> 2, + (uint32_t) GETFIELD(IODA2_IVT_PRIORITY, ive), + (uint32_t) GETFIELD(IODA2_IVT_GEN, ive)); } } diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 6e3a5ccdec..5356a4e295 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -38,6 +38,7 @@ #include "hw/loader.h" #include "hw/nmi.h" #include "qapi/visitor.h" +#include "qapi/type-helpers.h" #include "monitor/monitor.h" #include "hw/intc/intc.h" #include "hw/ipmi/ipmi.h" @@ -774,8 +775,13 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon) for (i = 0; i < chip8->num_phbs; i++) { PnvPHB *phb = chip8->phbs[i]; PnvPHB3 *phb3 = PNV_PHB3(phb->backend); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; + + pnv_phb3_msi_pic_print_info(&phb3->msis, buf); + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); - pnv_phb3_msi_pic_print_info(&phb3->msis, mon); ics_pic_print_info(&phb3->lsis, mon); } } From patchwork Tue Jun 18 15:59:48 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:03:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 26/76] hw/ppc: Avoid using Monitor in icp_pic_print_info() Date: Tue, 18 Jun 2024 17:59:48 +0200 Message-ID: <20240618160039.36108-27-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-3-philmd@linaro.org> --- include/hw/ppc/xics.h | 2 +- hw/intc/xics.c | 8 ++++---- hw/intc/xics_spapr.c | 8 +++++++- hw/ppc/pnv.c | 8 +++++++- 4 files changed, 19 insertions(+), 7 deletions(-) diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 95ead0dd7c..1116aa6953 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -171,7 +171,7 @@ static inline bool ics_irq_free(ICSState *ics, uint32_t srcno) } void ics_set_irq_type(ICSState *ics, int srcno, bool lsi); -void icp_pic_print_info(ICPState *icp, Monitor *mon); +void icp_pic_print_info(ICPState *icp, GString *buf); void ics_pic_print_info(ICSState *ics, Monitor *mon); void ics_resend(ICSState *ics); diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 9b3b7abaea..039e10a0e4 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -42,7 +42,7 @@ #include "sysemu/reset.h" #include "target/ppc/cpu.h" -void icp_pic_print_info(ICPState *icp, Monitor *mon) +void icp_pic_print_info(ICPState *icp, GString *buf) { int cpu_index; @@ -63,9 +63,9 @@ void icp_pic_print_info(ICPState *icp, Monitor *mon) icp_synchronize_state(icp); } - monitor_printf(mon, "CPU %d XIRR=%08x (%p) PP=%02x MFRR=%02x\n", - cpu_index, icp->xirr, icp->xirr_owner, - icp->pending_priority, icp->mfrr); + g_string_append_printf(buf, "CPU %d XIRR=%08x (%p) PP=%02x MFRR=%02x\n", + cpu_index, icp->xirr, icp->xirr_owner, + icp->pending_priority, icp->mfrr); } void ics_pic_print_info(ICSState *ics, Monitor *mon) diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index 37b2d99977..bab9d88218 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -34,6 +34,8 @@ #include "hw/ppc/xics_spapr.h" #include "hw/ppc/fdt.h" #include "qapi/visitor.h" +#include "qapi/type-helpers.h" +#include "monitor/monitor.h" /* * Guest interfaces @@ -399,12 +401,16 @@ static void xics_spapr_print_info(SpaprInterruptController *intc, Monitor *mon) { ICSState *ics = ICS_SPAPR(intc); CPUState *cs; + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); - icp_pic_print_info(spapr_cpu_state(cpu)->icp, mon); + icp_pic_print_info(spapr_cpu_state(cpu)->icp, buf); } + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); ics_pic_print_info(ics, mon); } diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 5356a4e295..fa23b27a2b 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1130,7 +1130,13 @@ static void pnv_chip_power8_intc_destroy(PnvChip *chip, PowerPCCPU *cpu) static void pnv_chip_power8_intc_print_info(PnvChip *chip, PowerPCCPU *cpu, Monitor *mon) { - icp_pic_print_info(ICP(pnv_cpu_state(cpu)->intc), mon); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; + + icp_pic_print_info(ICP(pnv_cpu_state(cpu)->intc), buf); + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } /* From patchwork Tue Jun 18 15:59:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702608 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D18AEC27C4F for ; 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Tue, 18 Jun 2024 09:03:20 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56dd3109sm633044166b.95.2024.06.18.09.03.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:03:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 27/76] hw/ppc: Avoid using Monitor in xive_tctx_pic_print_info() Date: Tue, 18 Jun 2024 17:59:49 +0200 Message-ID: <20240618160039.36108-28-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::136; envelope-from=philmd@linaro.org; helo=mail-lf1-x136.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-4-philmd@linaro.org> --- include/hw/ppc/xive.h | 2 +- hw/intc/spapr_xive.c | 7 ++++++- hw/intc/xive.c | 11 ++++++----- hw/ppc/pnv.c | 16 ++++++++++++++-- 4 files changed, 27 insertions(+), 9 deletions(-) diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index f120874e0f..bc1cbad8a8 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -528,7 +528,7 @@ void xive_tctx_tm_write(XivePresenter *xptr, XiveTCTX *tctx, hwaddr offset, uint64_t xive_tctx_tm_read(XivePresenter *xptr, XiveTCTX *tctx, hwaddr offset, unsigned size); -void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon); +void xive_tctx_pic_print_info(XiveTCTX *tctx, GString *buf); Object *xive_tctx_create(Object *cpu, XivePresenter *xptr, Error **errp); void xive_tctx_reset(XiveTCTX *tctx); void xive_tctx_destroy(XiveTCTX *tctx); diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index d7e56bfb20..b7c12aa432 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -11,6 +11,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qapi/type-helpers.h" #include "qemu/error-report.h" #include "target/ppc/cpu.h" #include "sysemu/cpus.h" @@ -703,12 +704,16 @@ static void spapr_xive_print_info(SpaprInterruptController *intc, Monitor *mon) { SpaprXive *xive = SPAPR_XIVE(intc); CPUState *cs; + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); - xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, mon); + xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, buf); } + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); spapr_xive_pic_print_info(xive, mon); } diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 057b308ae9..a0d7e7ca67 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -669,7 +669,7 @@ static const char * const xive_tctx_ring_names[] = { xpc->in_kernel ? xpc->in_kernel(xptr) : false; \ })) -void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon) +void xive_tctx_pic_print_info(XiveTCTX *tctx, GString *buf) { int cpu_index; int i; @@ -693,13 +693,14 @@ void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon) } } - monitor_printf(mon, "CPU[%04x]: QW NSR CPPR IPB LSMFB ACK# INC AGE PIPR" - " W2\n", cpu_index); + g_string_append_printf(buf, "CPU[%04x]: " + "QW NSR CPPR IPB LSMFB ACK# INC AGE PIPR W2\n", + cpu_index); for (i = 0; i < XIVE_TM_RING_COUNT; i++) { char *s = xive_tctx_ring_print(&tctx->regs[i * XIVE_TM_RING_SIZE]); - monitor_printf(mon, "CPU[%04x]: %4s %s\n", cpu_index, - xive_tctx_ring_names[i], s); + g_string_append_printf(buf, "CPU[%04x]: %4s %s\n", + cpu_index, xive_tctx_ring_names[i], s); g_free(s); } } diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index fa23b27a2b..5854358f65 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1223,7 +1223,13 @@ static void pnv_chip_power9_intc_destroy(PnvChip *chip, PowerPCCPU *cpu) static void pnv_chip_power9_intc_print_info(PnvChip *chip, PowerPCCPU *cpu, Monitor *mon) { - xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), mon); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; + + xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf); + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } static void pnv_chip_power10_intc_create(PnvChip *chip, PowerPCCPU *cpu, @@ -1267,7 +1273,13 @@ static void pnv_chip_power10_intc_destroy(PnvChip *chip, PowerPCCPU *cpu) static void pnv_chip_power10_intc_print_info(PnvChip *chip, PowerPCCPU *cpu, Monitor *mon) { - xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), mon); 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Tue, 18 Jun 2024 09:03:26 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56da329asm632887466b.37.2024.06.18.09.03.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:03:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 28/76] hw/ppc: Avoid using Monitor in ics_pic_print_info() Date: Tue, 18 Jun 2024 17:59:50 +0200 Message-ID: <20240618160039.36108-29-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-5-philmd@linaro.org> --- include/hw/ppc/xics.h | 2 +- hw/intc/xics.c | 17 ++++++++--------- hw/intc/xics_spapr.c | 4 ++-- hw/ppc/pnv.c | 15 ++++++++------- 4 files changed, 19 insertions(+), 19 deletions(-) diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 1116aa6953..e94d53405f 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -172,7 +172,7 @@ static inline bool ics_irq_free(ICSState *ics, uint32_t srcno) void ics_set_irq_type(ICSState *ics, int srcno, bool lsi); void icp_pic_print_info(ICPState *icp, GString *buf); -void ics_pic_print_info(ICSState *ics, Monitor *mon); +void ics_pic_print_info(ICSState *ics, GString *buf); void ics_resend(ICSState *ics); void icp_resend(ICPState *ss); diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 039e10a0e4..6f4d5271ea 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -35,7 +35,6 @@ #include "qemu/module.h" #include "qapi/visitor.h" #include "migration/vmstate.h" -#include "monitor/monitor.h" #include "hw/intc/intc.h" #include "hw/irq.h" #include "sysemu/kvm.h" @@ -68,12 +67,12 @@ void icp_pic_print_info(ICPState *icp, GString *buf) icp->pending_priority, icp->mfrr); } -void ics_pic_print_info(ICSState *ics, Monitor *mon) +void ics_pic_print_info(ICSState *ics, GString *buf) { uint32_t i; - monitor_printf(mon, "ICS %4x..%4x %p\n", - ics->offset, ics->offset + ics->nr_irqs - 1, ics); + g_string_append_printf(buf, "ICS %4x..%4x %p\n", + ics->offset, ics->offset + ics->nr_irqs - 1, ics); if (!ics->irqs) { return; @@ -89,11 +88,11 @@ void ics_pic_print_info(ICSState *ics, Monitor *mon) if (!(irq->flags & XICS_FLAGS_IRQ_MASK)) { continue; } - monitor_printf(mon, " %4x %s %02x %02x\n", - ics->offset + i, - (irq->flags & XICS_FLAGS_IRQ_LSI) ? - "LSI" : "MSI", - irq->priority, irq->status); + g_string_append_printf(buf, " %4x %s %02x %02x\n", + ics->offset + i, + (irq->flags & XICS_FLAGS_IRQ_LSI) ? + "LSI" : "MSI", + irq->priority, irq->status); } } diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index bab9d88218..1926373ebd 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -409,10 +409,10 @@ static void xics_spapr_print_info(SpaprInterruptController *intc, Monitor *mon) icp_pic_print_info(spapr_cpu_state(cpu)->icp, buf); } + ics_pic_print_info(ics, buf); + info = human_readable_text_from_str(buf); monitor_puts(mon, info->human_readable_text); - - ics_pic_print_info(ics, mon); } static int xics_spapr_post_load(SpaprInterruptController *intc, int version_id) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 5854358f65..3eaf674efa 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -770,20 +770,21 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon) Pnv8Chip *chip8 = PNV8_CHIP(chip); int i; - ics_pic_print_info(&chip8->psi.ics, mon); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; + + ics_pic_print_info(&chip8->psi.ics, buf); for (i = 0; i < chip8->num_phbs; i++) { PnvPHB *phb = chip8->phbs[i]; PnvPHB3 *phb3 = PNV_PHB3(phb->backend); - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; pnv_phb3_msi_pic_print_info(&phb3->msis, buf); - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - - ics_pic_print_info(&phb3->lsis, mon); + ics_pic_print_info(&phb3->lsis, buf); } + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque) From patchwork Tue Jun 18 15:59:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702566 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E6485C41513 for ; Tue, 18 Jun 2024 16:04:30 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbJ5-00083g-9R; Tue, 18 Jun 2024 12:03:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbJ2-0007xp-TT for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:03:32 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f86dfdb22sm253599366b.77.2024.06.18.09.03.30 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:03:31 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 29/76] hw/ppc: Avoid using Monitor in PnvChipClass::intc_print_info() Date: Tue, 18 Jun 2024 17:59:51 +0200 Message-ID: <20240618160039.36108-30-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-6-philmd@linaro.org> --- include/hw/ppc/pnv_chip.h | 2 +- hw/ppc/pnv.c | 30 ++++++++---------------------- 2 files changed, 9 insertions(+), 23 deletions(-) diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h index 8589f3291e..a5e428be7c 100644 --- a/include/hw/ppc/pnv_chip.h +++ b/include/hw/ppc/pnv_chip.h @@ -151,7 +151,7 @@ struct PnvChipClass { void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp); void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu); void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu); - void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, Monitor *mon); + void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, GString *buf); ISABus *(*isa_create)(PnvChip *chip, Error **errp); void (*dt_populate)(PnvChip *chip, void *fdt); void (*pic_print_info)(PnvChip *chip, Monitor *mon); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 3eaf674efa..aed6767c8d 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1129,15 +1129,9 @@ static void pnv_chip_power8_intc_destroy(PnvChip *chip, PowerPCCPU *cpu) } static void pnv_chip_power8_intc_print_info(PnvChip *chip, PowerPCCPU *cpu, - Monitor *mon) + GString *buf) { - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; - icp_pic_print_info(ICP(pnv_cpu_state(cpu)->intc), buf); - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } /* @@ -1222,15 +1216,9 @@ static void pnv_chip_power9_intc_destroy(PnvChip *chip, PowerPCCPU *cpu) } static void pnv_chip_power9_intc_print_info(PnvChip *chip, PowerPCCPU *cpu, - Monitor *mon) + GString *buf) { - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; - xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf); - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } static void pnv_chip_power10_intc_create(PnvChip *chip, PowerPCCPU *cpu, @@ -1272,15 +1260,9 @@ static void pnv_chip_power10_intc_destroy(PnvChip *chip, PowerPCCPU *cpu) } static void pnv_chip_power10_intc_print_info(PnvChip *chip, PowerPCCPU *cpu, - Monitor *mon) + GString *buf) { - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; - xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), buf); - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } /* @@ -2363,14 +2345,18 @@ static void pnv_pic_print_info(InterruptStatsProvider *obj, PnvMachineState *pnv = PNV_MACHINE(obj); int i; CPUState *cs; + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); /* XXX: loop on each chip/core/thread instead of CPU_FOREACH() */ PNV_CHIP_GET_CLASS(pnv->chips[0])->intc_print_info(pnv->chips[0], cpu, - mon); + buf); } + info = human_readable_text_from_str(buf); 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Tue, 18 Jun 2024 09:03:37 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56db6182sm630018366b.51.2024.06.18.09.03.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:03:37 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 30/76] hw/ppc: Avoid using Monitor in xive_end_queue_pic_print_info() Date: Tue, 18 Jun 2024 17:59:52 +0200 Message-ID: <20240618160039.36108-31-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=philmd@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-7-philmd@linaro.org> --- include/hw/ppc/xive_regs.h | 2 +- hw/intc/spapr_xive.c | 7 ++++++- hw/intc/xive.c | 17 +++++++++++------ 3 files changed, 18 insertions(+), 8 deletions(-) diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h index 4a3c9badd3..51e9a2152e 100644 --- a/include/hw/ppc/xive_regs.h +++ b/include/hw/ppc/xive_regs.h @@ -262,7 +262,7 @@ static inline uint64_t xive_end_qaddr(XiveEND *end) } void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon); -void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, Monitor *mon); +void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, GString *buf); void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon); /* Notification Virtual Target (NVT) */ diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index b7c12aa432..3357f6325f 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -142,12 +142,17 @@ static void spapr_xive_end_pic_print_info(SpaprXive *xive, XiveEND *end, uint32_t qentries = 1 << (qsize + 10); uint32_t nvt = xive_get_field32(END_W6_NVT_INDEX, end->w6); uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; monitor_printf(mon, "%3d/%d % 6d/%5d @%"PRIx64" ^%d", spapr_xive_nvt_to_target(0, nvt), priority, qindex, qentries, qaddr_base, qgen); - xive_end_queue_pic_print_info(end, 6, mon); + xive_end_queue_pic_print_info(end, 6, buf); + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } /* diff --git a/hw/intc/xive.c b/hw/intc/xive.c index a0d7e7ca67..260a94e2ca 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -11,6 +11,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qapi/type-helpers.h" #include "target/ppc/cpu.h" #include "sysemu/cpus.h" #include "sysemu/dma.h" @@ -1323,7 +1324,7 @@ static const TypeInfo xive_source_info = { * XiveEND helpers */ -void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, Monitor *mon) +void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, GString *buf) { uint64_t qaddr_base = xive_end_qaddr(end); uint32_t qsize = xive_get_field32(END_W0_QSIZE, end->w0); @@ -1334,7 +1335,7 @@ void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, Monitor *mon) /* * print out the [ (qindex - (width - 1)) .. (qindex + 1)] window */ - monitor_printf(mon, " [ "); + g_string_append_printf(buf, " [ "); qindex = (qindex - (width - 1)) & (qentries - 1); for (i = 0; i < width; i++) { uint64_t qaddr = qaddr_base + (qindex << 2); @@ -1346,11 +1347,11 @@ void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, Monitor *mon) HWADDR_PRIx "\n", qaddr); return; } - monitor_printf(mon, "%s%08x ", i == width - 1 ? "^" : "", - be32_to_cpu(qdata)); + g_string_append_printf(buf, "%s%08x ", i == width - 1 ? "^" : "", + be32_to_cpu(qdata)); qindex = (qindex + 1) & (qentries - 1); } - monitor_printf(mon, "]"); + g_string_append_c(buf, ']'); } void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon) @@ -1365,6 +1366,8 @@ void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon) uint32_t nvt_idx = xive_get_field32(END_W6_NVT_INDEX, end->w6); uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7); uint8_t pq; + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; if (!xive_end_is_valid(end)) { return; @@ -1389,8 +1392,10 @@ void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon) if (qaddr_base) { monitor_printf(mon, " eq:@%08"PRIx64"% 6d/%5d ^%d", qaddr_base, qindex, qentries, qgen); - xive_end_queue_pic_print_info(end, 6, mon); + xive_end_queue_pic_print_info(end, 6, buf); } + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); monitor_printf(mon, "\n"); } From patchwork Tue Jun 18 15:59:53 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:03:43 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 31/76] hw/ppc: Avoid using Monitor in spapr_xive_end_pic_print_info() Date: Tue, 18 Jun 2024 17:59:53 +0200 Message-ID: <20240618160039.36108-32-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=philmd@linaro.org; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-8-philmd@linaro.org> --- hw/intc/spapr_xive.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 3357f6325f..d571645e9e 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -133,7 +133,7 @@ static int spapr_xive_target_to_end(uint32_t target, uint8_t prio, * structure dumping only the information related to the OS EQ. */ static void spapr_xive_end_pic_print_info(SpaprXive *xive, XiveEND *end, - Monitor *mon) + GString *buf) { uint64_t qaddr_base = xive_end_qaddr(end); uint32_t qindex = xive_get_field32(END_W1_PAGE_OFF, end->w1); @@ -142,17 +142,12 @@ static void spapr_xive_end_pic_print_info(SpaprXive *xive, XiveEND *end, uint32_t qentries = 1 << (qsize + 10); uint32_t nvt = xive_get_field32(END_W6_NVT_INDEX, end->w6); uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7); - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; - monitor_printf(mon, "%3d/%d % 6d/%5d @%"PRIx64" ^%d", - spapr_xive_nvt_to_target(0, nvt), - priority, qindex, qentries, qaddr_base, qgen); + g_string_append_printf(buf, "%3d/%d % 6d/%5d @%"PRIx64" ^%d", + spapr_xive_nvt_to_target(0, nvt), + priority, qindex, qentries, qaddr_base, qgen); xive_end_queue_pic_print_info(end, 6, buf); - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } /* @@ -198,13 +193,18 @@ static void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon) if (!xive_eas_is_masked(eas)) { uint32_t end_idx = xive_get_field64(EAS_END_INDEX, eas->w); XiveEND *end; + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; assert(end_idx < xive->nr_ends); end = &xive->endt[end_idx]; if (xive_end_is_valid(end)) { - spapr_xive_end_pic_print_info(xive, end, mon); + spapr_xive_end_pic_print_info(xive, end, buf); } + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } monitor_printf(mon, "\n"); } From patchwork Tue Jun 18 15:59:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702621 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5A78EC2BB85 for ; Tue, 18 Jun 2024 16:11:04 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbJL-00013g-FN; Tue, 18 Jun 2024 12:03:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbJJ-0000sd-3L for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:03:49 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56fa6740sm630108566b.223.2024.06.18.09.03.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:03:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 32/76] hw/ppc: Avoid using Monitor in spapr_xive_pic_print_info() Date: Tue, 18 Jun 2024 17:59:54 +0200 Message-ID: <20240618160039.36108-33-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=philmd@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-9-philmd@linaro.org> --- hw/intc/spapr_xive.c | 28 ++++++++++++---------------- 1 file changed, 12 insertions(+), 16 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index d571645e9e..9d0d5948ff 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -157,7 +157,7 @@ static void spapr_xive_end_pic_print_info(SpaprXive *xive, XiveEND *end, #define spapr_xive_in_kernel(xive) \ (kvm_irqchip_in_kernel() && (xive)->fd != -1) -static void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon) +static void spapr_xive_pic_print_info(SpaprXive *xive, GString *buf) { XiveSource *xsrc = &xive->source; int i; @@ -172,7 +172,7 @@ static void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon) } } - monitor_printf(mon, " LISN PQ EISN CPU/PRIO EQ\n"); + g_string_append_printf(buf, " LISN PQ EISN CPU/PRIO EQ\n"); for (i = 0; i < xive->nr_irqs; i++) { uint8_t pq = xive_source_esb_get(xsrc, i); @@ -182,19 +182,17 @@ static void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon) continue; } - monitor_printf(mon, " %08x %s %c%c%c %s %08x ", i, - xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI", - pq & XIVE_ESB_VAL_P ? 'P' : '-', - pq & XIVE_ESB_VAL_Q ? 'Q' : '-', - xive_source_is_asserted(xsrc, i) ? 'A' : ' ', - xive_eas_is_masked(eas) ? "M" : " ", - (int) xive_get_field64(EAS_END_DATA, eas->w)); + g_string_append_printf(buf, " %08x %s %c%c%c %s %08x ", i, + xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI", + pq & XIVE_ESB_VAL_P ? 'P' : '-', + pq & XIVE_ESB_VAL_Q ? 'Q' : '-', + xive_source_is_asserted(xsrc, i) ? 'A' : ' ', + xive_eas_is_masked(eas) ? "M" : " ", + (int) xive_get_field64(EAS_END_DATA, eas->w)); if (!xive_eas_is_masked(eas)) { uint32_t end_idx = xive_get_field64(EAS_END_INDEX, eas->w); XiveEND *end; - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; assert(end_idx < xive->nr_ends); end = &xive->endt[end_idx]; @@ -203,10 +201,8 @@ static void spapr_xive_pic_print_info(SpaprXive *xive, Monitor *mon) spapr_xive_end_pic_print_info(xive, end, buf); } - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } - monitor_printf(mon, "\n"); + g_string_append_c(buf, '\n'); } } @@ -717,10 +713,10 @@ static void spapr_xive_print_info(SpaprInterruptController *intc, Monitor *mon) xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, buf); } + spapr_xive_pic_print_info(xive, buf); + info = human_readable_text_from_str(buf); monitor_puts(mon, info->human_readable_text); - - spapr_xive_pic_print_info(xive, mon); } static void spapr_xive_dt(SpaprInterruptController *intc, uint32_t nr_servers, From patchwork Tue Jun 18 15:59:55 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:03:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 33/76] hw/ppc: Avoid using Monitor in xive_source_pic_print_info() Date: Tue, 18 Jun 2024 17:59:55 +0200 Message-ID: <20240618160039.36108-34-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-10-philmd@linaro.org> --- include/hw/ppc/xive.h | 2 +- hw/intc/pnv_xive.c | 11 ++++++++--- hw/intc/pnv_xive2.c | 8 +++++++- hw/intc/xive.c | 16 +++++++--------- hw/pci-host/pnv_phb4.c | 20 ++++++++++++++------ hw/ppc/pnv_psi.c | 12 +++++++++--- 6 files changed, 46 insertions(+), 23 deletions(-) diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index bc1cbad8a8..28c181faa2 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -314,7 +314,7 @@ static inline bool xive_source_is_asserted(XiveSource *xsrc, uint32_t srcno) } void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset, - Monitor *mon); + GString *buf); static inline bool xive_source_irq_is_lsi(XiveSource *xsrc, uint32_t srcno) { diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index da10deceb8..520d7e0acd 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -11,6 +11,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qapi/type-helpers.h" #include "target/ppc/cpu.h" #include "sysemu/cpus.h" #include "sysemu/dma.h" @@ -1857,10 +1858,14 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon) XiveNVT nvt; int i; uint64_t xive_nvt_per_subpage; + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; - monitor_printf(mon, "XIVE[%x] #%d Source %08x .. %08x\n", chip_id, blk, - srcno0, srcno0 + nr_ipis - 1); - xive_source_pic_print_info(&xive->ipi_source, srcno0, mon); + g_string_append_printf(buf, "XIVE[%x] #%d Source %08x .. %08x\n", + chip_id, blk, srcno0, srcno0 + nr_ipis - 1); + xive_source_pic_print_info(&xive->ipi_source, srcno0, buf); + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); monitor_printf(mon, "XIVE[%x] #%d EAT %08x .. %08x\n", chip_id, blk, srcno0, srcno0 + nr_ipis - 1); diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index 4b8d0a5d81..83e0f6b09f 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -10,6 +10,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qapi/error.h" +#include "qapi/type-helpers.h" #include "target/ppc/cpu.h" #include "sysemu/cpus.h" #include "sysemu/dma.h" @@ -2116,10 +2117,15 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon) Xive2Nvp nvp; int i; uint64_t xive_nvp_per_subpage; + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; monitor_printf(mon, "XIVE[%x] Source %08x .. %08x\n", blk, srcno0, srcno0 + nr_esbs - 1); - xive_source_pic_print_info(&xive->ipi_source, srcno0, mon); + xive_source_pic_print_info(&xive->ipi_source, srcno0, buf); + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); monitor_printf(mon, "XIVE[%x] EAT %08x .. %08x\n", blk, srcno0, srcno0 + nr_esbs - 1); diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 260a94e2ca..1adb0439c5 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -1209,22 +1209,20 @@ void xive_source_set_irq(void *opaque, int srcno, int val) } } -void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset, Monitor *mon) +void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset, GString *buf) { - int i; - - for (i = 0; i < xsrc->nr_irqs; i++) { + for (unsigned i = 0; i < xsrc->nr_irqs; i++) { uint8_t pq = xive_source_esb_get(xsrc, i); if (pq == XIVE_ESB_OFF) { continue; } - monitor_printf(mon, " %08x %s %c%c%c\n", i + offset, - xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI", - pq & XIVE_ESB_VAL_P ? 'P' : '-', - pq & XIVE_ESB_VAL_Q ? 'Q' : '-', - xive_source_is_asserted(xsrc, i) ? 'A' : ' '); + g_string_append_printf(buf, " %08x %s %c%c%c\n", i + offset, + xive_source_irq_is_lsi(xsrc, i) ? "LSI" : "MSI", + pq & XIVE_ESB_VAL_P ? 'P' : '-', + pq & XIVE_ESB_VAL_Q ? 'Q' : '-', + xive_source_is_asserted(xsrc, i) ? 'A' : ' '); } } diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 075499d36d..4b453997e7 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -10,6 +10,7 @@ #include "qemu/log.h" #include "qapi/visitor.h" #include "qapi/error.h" +#include "qapi/type-helpers.h" #include "monitor/monitor.h" #include "target/ppc/cpu.h" #include "hw/pci-host/pnv_phb4_regs.h" @@ -1807,11 +1808,18 @@ void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon) phb->regs[PHB_INT_NOTIFY_ADDR >> 3] & ~PHB_INT_NOTIFY_ADDR_64K; uint32_t offset = phb->regs[PHB_INT_NOTIFY_INDEX >> 3]; bool abt = !!(phb->regs[PHB_CTRLR >> 3] & PHB_CTRLR_IRQ_ABT_MODE); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; - monitor_printf(mon, "PHB4[%x:%x] Source %08x .. %08x %s @%"HWADDR_PRIx"\n", - phb->chip_id, phb->phb_id, - offset, offset + phb->xsrc.nr_irqs - 1, - abt ? "ABT" : "", - notif_port); - xive_source_pic_print_info(&phb->xsrc, 0, mon); + g_string_append_printf(buf, + "PHB4[%x:%x] Source %08x .. %08x " + "%s @%"HWADDR_PRIx"\n", + phb->chip_id, phb->phb_id, + offset, offset + phb->xsrc.nr_irqs - 1, + abt ? "ABT" : "", + notif_port); + xive_source_pic_print_info(&phb->xsrc, 0, buf); + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 26460d210d..922ac07b2f 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -25,6 +25,7 @@ #include "qemu/module.h" #include "sysemu/reset.h" #include "qapi/error.h" +#include "qapi/type-helpers.h" #include "monitor/monitor.h" @@ -980,11 +981,16 @@ type_init(pnv_psi_register_types); void pnv_psi_pic_print_info(Pnv9Psi *psi9, Monitor *mon) { PnvPsi *psi = PNV_PSI(psi9); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; uint32_t offset = (psi->regs[PSIHB_REG(PSIHB9_IVT_OFFSET)] >> PSIHB9_IVT_OFF_SHIFT); - monitor_printf(mon, "PSIHB Source %08x .. %08x\n", - offset, offset + psi9->source.nr_irqs - 1); - xive_source_pic_print_info(&psi9->source, offset, mon); + g_string_append_printf(buf, "PSIHB Source %08x .. %08x\n", + offset, offset + psi9->source.nr_irqs - 1); + xive_source_pic_print_info(&psi9->source, offset, buf); + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } From patchwork Tue Jun 18 15:59:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702599 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D544EC27C4F for ; Tue, 18 Jun 2024 16:08:56 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbJV-0002Z6-2m; Tue, 18 Jun 2024 12:04:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbJU-0002WN-6Q for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:04:00 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56ecdd1fsm625207666b.102.2024.06.18.09.03.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:04:00 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 34/76] hw/ppc: Avoid using Monitor in pnv_phb4_pic_print_info() Date: Tue, 18 Jun 2024 17:59:56 +0200 Message-ID: <20240618160039.36108-35-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::531; envelope-from=philmd@linaro.org; helo=mail-ed1-x531.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-11-philmd@linaro.org> --- include/hw/pci-host/pnv_phb4.h | 2 +- hw/pci-host/pnv_phb4.c | 9 +-------- hw/ppc/pnv.c | 6 +++++- 3 files changed, 7 insertions(+), 10 deletions(-) diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h index 3212e68160..8abee78e4d 100644 --- a/include/hw/pci-host/pnv_phb4.h +++ b/include/hw/pci-host/pnv_phb4.h @@ -155,7 +155,7 @@ struct PnvPHB4 { QLIST_HEAD(, PnvPhb4DMASpace) dma_spaces; }; -void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon); +void pnv_phb4_pic_print_info(PnvPHB4 *phb, GString *buf); int pnv_phb4_pec_get_phb_id(PnvPhb4PecState *pec, int stack_index); PnvPhb4PecState *pnv_pec_add_phb(PnvChip *chip, PnvPHB *phb, Error **errp); void pnv_phb4_bus_init(DeviceState *dev, PnvPHB4 *phb); diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c index 4b453997e7..99991008c1 100644 --- a/hw/pci-host/pnv_phb4.c +++ b/hw/pci-host/pnv_phb4.c @@ -10,8 +10,6 @@ #include "qemu/log.h" #include "qapi/visitor.h" #include "qapi/error.h" -#include "qapi/type-helpers.h" -#include "monitor/monitor.h" #include "target/ppc/cpu.h" #include "hw/pci-host/pnv_phb4_regs.h" #include "hw/pci-host/pnv_phb4.h" @@ -1802,14 +1800,12 @@ static void pnv_phb4_register_types(void) type_init(pnv_phb4_register_types); -void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon) +void pnv_phb4_pic_print_info(PnvPHB4 *phb, GString *buf) { uint64_t notif_port = phb->regs[PHB_INT_NOTIFY_ADDR >> 3] & ~PHB_INT_NOTIFY_ADDR_64K; uint32_t offset = phb->regs[PHB_INT_NOTIFY_INDEX >> 3]; bool abt = !!(phb->regs[PHB_CTRLR >> 3] & PHB_CTRLR_IRQ_ABT_MODE); - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; g_string_append_printf(buf, "PHB4[%x:%x] Source %08x .. %08x " @@ -1819,7 +1815,4 @@ void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon) abt ? "ABT" : "", notif_port); xive_source_pic_print_info(&phb->xsrc, 0, buf); - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index aed6767c8d..df187c5180 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -791,12 +791,16 @@ static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque) { Monitor *mon = opaque; PnvPHB *phb = (PnvPHB *) object_dynamic_cast(child, TYPE_PNV_PHB); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; if (!phb) { return 0; } - pnv_phb4_pic_print_info(PNV_PHB4(phb->backend), mon); + pnv_phb4_pic_print_info(PNV_PHB4(phb->backend), buf); + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); return 0; } From patchwork Tue Jun 18 15:59:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702590 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B9FA5C27C4F for ; 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Tue, 18 Jun 2024 09:04:07 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56db6dfesm624700466b.87.2024.06.18.09.04.05 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:04:05 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 35/76] hw/ppc: Avoid using Monitor in xive_eas_pic_print_info() Date: Tue, 18 Jun 2024 17:59:57 +0200 Message-ID: <20240618160039.36108-36-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-12-philmd@linaro.org> --- include/hw/ppc/xive_regs.h | 2 +- hw/intc/pnv_xive.c | 10 +++++----- hw/intc/xive.c | 12 ++++++------ 3 files changed, 12 insertions(+), 12 deletions(-) diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h index 51e9a2152e..dd4a76bcf0 100644 --- a/include/hw/ppc/xive_regs.h +++ b/include/hw/ppc/xive_regs.h @@ -167,7 +167,7 @@ typedef struct XiveEAS { #define xive_eas_is_valid(eas) (be64_to_cpu((eas)->w) & EAS_VALID) #define xive_eas_is_masked(eas) (be64_to_cpu((eas)->w) & EAS_MASKED) -void xive_eas_pic_print_info(XiveEAS *eas, uint32_t lisn, Monitor *mon); +void xive_eas_pic_print_info(XiveEAS *eas, uint32_t lisn, GString *buf); static inline uint64_t xive_get_field64(uint64_t mask, uint64_t word) { diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index 520d7e0acd..c377823522 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -1864,19 +1864,19 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon) g_string_append_printf(buf, "XIVE[%x] #%d Source %08x .. %08x\n", chip_id, blk, srcno0, srcno0 + nr_ipis - 1); xive_source_pic_print_info(&xive->ipi_source, srcno0, buf); - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - monitor_printf(mon, "XIVE[%x] #%d EAT %08x .. %08x\n", chip_id, blk, - srcno0, srcno0 + nr_ipis - 1); + g_string_append_printf(buf, "XIVE[%x] #%d EAT %08x .. %08x\n", + chip_id, blk, srcno0, srcno0 + nr_ipis - 1); for (i = 0; i < nr_ipis; i++) { if (xive_router_get_eas(xrtr, blk, i, &eas)) { break; } if (!xive_eas_is_masked(&eas)) { - xive_eas_pic_print_info(&eas, i, mon); + xive_eas_pic_print_info(&eas, i, buf); } } + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); monitor_printf(mon, "XIVE[%x] #%d ENDT\n", chip_id, blk); i = 0; diff --git a/hw/intc/xive.c b/hw/intc/xive.c index 1adb0439c5..b2203b721b 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -1921,17 +1921,17 @@ static const TypeInfo xive_router_info = { } }; -void xive_eas_pic_print_info(XiveEAS *eas, uint32_t lisn, Monitor *mon) +void xive_eas_pic_print_info(XiveEAS *eas, uint32_t lisn, GString *buf) { if (!xive_eas_is_valid(eas)) { return; } - monitor_printf(mon, " %08x %s end:%02x/%04x data:%08x\n", - lisn, xive_eas_is_masked(eas) ? "M" : " ", - (uint8_t) xive_get_field64(EAS_END_BLOCK, eas->w), - (uint32_t) xive_get_field64(EAS_END_INDEX, eas->w), - (uint32_t) xive_get_field64(EAS_END_DATA, eas->w)); + g_string_append_printf(buf, " %08x %s end:%02x/%04x data:%08x\n", + lisn, xive_eas_is_masked(eas) ? "M" : " ", + (uint8_t) xive_get_field64(EAS_END_BLOCK, eas->w), + (uint32_t) xive_get_field64(EAS_END_INDEX, eas->w), + (uint32_t) xive_get_field64(EAS_END_DATA, eas->w)); } /* From patchwork Tue Jun 18 15:59:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702616 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71FA0C27C4F for ; Tue, 18 Jun 2024 16:10:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbJj-0003cA-SE; Tue, 18 Jun 2024 12:04:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbJg-0003MN-P0 for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:04:16 -0400 Received: from mail-ej1-x62c.google.com ([2a00:1450:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sJbJe-0007EY-Nt for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:04:16 -0400 Received: by mail-ej1-x62c.google.com with SMTP id a640c23a62f3a-a6efae34c83so694534566b.0 for ; Tue, 18 Jun 2024 09:04:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1718726653; x=1719331453; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=khVkiqMrtLebSa9wzun/miaiMcGkBkr7V5nJnGtflmQ=; b=Ove9yzAuKgoLc07rzx2kBM4Tx7n85G7kRIkUNPTNwebprVXREkLOptTexnAhrfyCAG VxKuCZdzCdSQxNkvgO0Ty5j87q5xS+XueUJhT9elTGzTZVGLuCp0NvYw0QkefkZ8WjU+ QVNIWrJXEDDzbV/dgYto/QPif6fQhhGQXVxMDR293LQ9WgE+zwGnZztn5HrpQiNrj9AT gvCoMyu9TVjuZSD1fWJ6PAib7vC4hBtCfRhJZiNE+1unwxqVS/7aun3CbL1XXhO9nJTA BsCE2vo+crpdVck9Xhf0+CJNFe7LVEVUe/yBj/1TMs6vQ54fOnYkR1o6AFJpdPqr+lYg otVw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718726653; x=1719331453; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=khVkiqMrtLebSa9wzun/miaiMcGkBkr7V5nJnGtflmQ=; b=cdUN2gWo4zvtQCrhPwXuwa/U74OyLHLbJQGkG/deEg3mseJuLae4bsRbFFkaehacd6 e/khVOHCQ3X2k8Z6ZIqsecXUSCF+pNPCUGQy/uv1E9OtG0aZTYt8flEFin+IPKHAJo5I lmlHhN856ZStoAz+PLR0YTboDs25SMSot5B9nWS+LKKe7JpJCwbW+bkIbBSdpBWwvhL9 pJ4IjqTyJKXukhF3Qy0I1GAH0ykbH1fA8ICH7z8FvTZmtCSSplkw3G+AFMlYyfopFBaE +2LVdrQdlc8oNqmcPrAQNXmEW2GliPCYggJmPrcA/Sw0QvfE28CgmpWx6DLemZn5jvm8 kX8w== X-Gm-Message-State: AOJu0YwfgqEimDKkphFoDgtBVq9KN3Y+ERBsJkcnP+JiAhPLWuo+lfdV YxUWA3gQV8dsD/727QpKOMRmO4RRRzy6d4WRweYoYDsv5pI9HELq/G/ulo5uTeeH3F9C9G+xQVz 2 X-Google-Smtp-Source: AGHT+IGXKUbDz0p7mOE4uPtCHUQbJ1FhjmJcciMx8hcVPRCuErku3MzZ2qGlxZ6ddblFRn8e6RDl3A== X-Received: by 2002:a17:907:6d08:b0:a66:c338:65cc with SMTP id a640c23a62f3a-a6f60d2991bmr1000055966b.19.1718726652710; Tue, 18 Jun 2024 09:04:12 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56ecdd06sm625651966b.119.2024.06.18.09.04.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:04:12 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 36/76] hw/ppc: Avoid using Monitor in xive_end_pic_print_info() Date: Tue, 18 Jun 2024 17:59:58 +0200 Message-ID: <20240618160039.36108-37-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=philmd@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-13-philmd@linaro.org> --- include/hw/ppc/xive_regs.h | 2 +- hw/intc/pnv_xive.c | 8 ++++---- hw/intc/xive.c | 40 +++++++++++++++++--------------------- 3 files changed, 23 insertions(+), 27 deletions(-) diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h index dd4a76bcf0..5e6f9d1be4 100644 --- a/include/hw/ppc/xive_regs.h +++ b/include/hw/ppc/xive_regs.h @@ -261,7 +261,7 @@ static inline uint64_t xive_end_qaddr(XiveEND *end) be32_to_cpu(end->w3); } -void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon); +void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf); void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, GString *buf); void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon); diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index c377823522..1dddbf7827 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -1875,14 +1875,14 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon) xive_eas_pic_print_info(&eas, i, buf); } } - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - monitor_printf(mon, "XIVE[%x] #%d ENDT\n", chip_id, blk); + g_string_append_printf(buf, "XIVE[%x] #%d ENDT\n", chip_id, blk); i = 0; while (!xive_router_get_end(xrtr, blk, i, &end)) { - xive_end_pic_print_info(&end, i++, mon); + xive_end_pic_print_info(&end, i++, buf); } + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); monitor_printf(mon, "XIVE[%x] #%d END Escalation EAT\n", chip_id, blk); i = 0; diff --git a/hw/intc/xive.c b/hw/intc/xive.c index b2203b721b..f631d7cd6e 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -11,7 +11,6 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" -#include "qapi/type-helpers.h" #include "target/ppc/cpu.h" #include "sysemu/cpus.h" #include "sysemu/dma.h" @@ -1352,7 +1351,7 @@ void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, GString *buf) g_string_append_c(buf, ']'); } -void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon) +void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf) { uint64_t qaddr_base = xive_end_qaddr(end); uint32_t qindex = xive_get_field32(END_W1_PAGE_OFF, end->w1); @@ -1364,8 +1363,6 @@ void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon) uint32_t nvt_idx = xive_get_field32(END_W6_NVT_INDEX, end->w6); uint8_t priority = xive_get_field32(END_W7_F0_PRIORITY, end->w7); uint8_t pq; - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; if (!xive_end_is_valid(end)) { return; @@ -1373,28 +1370,27 @@ void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon) pq = xive_get_field32(END_W1_ESn, end->w1); - monitor_printf(mon, " %08x %c%c %c%c%c%c%c%c%c%c prio:%d nvt:%02x/%04x", - end_idx, - pq & XIVE_ESB_VAL_P ? 'P' : '-', - pq & XIVE_ESB_VAL_Q ? 'Q' : '-', - xive_end_is_valid(end) ? 'v' : '-', - xive_end_is_enqueue(end) ? 'q' : '-', - xive_end_is_notify(end) ? 'n' : '-', - xive_end_is_backlog(end) ? 'b' : '-', - xive_end_is_escalate(end) ? 'e' : '-', - xive_end_is_uncond_escalation(end) ? 'u' : '-', - xive_end_is_silent_escalation(end) ? 's' : '-', - xive_end_is_firmware(end) ? 'f' : '-', - priority, nvt_blk, nvt_idx); + g_string_append_printf(buf, + " %08x %c%c %c%c%c%c%c%c%c%c prio:%d nvt:%02x/%04x", + end_idx, + pq & XIVE_ESB_VAL_P ? 'P' : '-', + pq & XIVE_ESB_VAL_Q ? 'Q' : '-', + xive_end_is_valid(end) ? 'v' : '-', + xive_end_is_enqueue(end) ? 'q' : '-', + xive_end_is_notify(end) ? 'n' : '-', + xive_end_is_backlog(end) ? 'b' : '-', + xive_end_is_escalate(end) ? 'e' : '-', + xive_end_is_uncond_escalation(end) ? 'u' : '-', + xive_end_is_silent_escalation(end) ? 's' : '-', + xive_end_is_firmware(end) ? 'f' : '-', + priority, nvt_blk, nvt_idx); if (qaddr_base) { - monitor_printf(mon, " eq:@%08"PRIx64"% 6d/%5d ^%d", - qaddr_base, qindex, qentries, qgen); + g_string_append_printf(buf, " eq:@%08"PRIx64"% 6d/%5d ^%d", + qaddr_base, qindex, qentries, qgen); xive_end_queue_pic_print_info(end, 6, buf); } - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - monitor_printf(mon, "\n"); + g_string_append_c(buf, '\n'); } static void xive_end_enqueue(XiveEND *end, uint32_t data) From patchwork Tue Jun 18 15:59:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702680 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 614BEC2BB85 for ; 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Tue, 18 Jun 2024 09:04:18 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56f43220sm625702166b.185.2024.06.18.09.04.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:04:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 37/76] hw/ppc: Avoid using Monitor in xive_end_eas_pic_print_info() Date: Tue, 18 Jun 2024 17:59:59 +0200 Message-ID: <20240618160039.36108-38-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=philmd@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-14-philmd@linaro.org> --- include/hw/ppc/xive_regs.h | 2 +- hw/intc/pnv_xive.c | 9 +++++---- hw/intc/xive.c | 22 ++++++++++------------ 3 files changed, 16 insertions(+), 17 deletions(-) diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h index 5e6f9d1be4..b9db7abc2e 100644 --- a/include/hw/ppc/xive_regs.h +++ b/include/hw/ppc/xive_regs.h @@ -263,7 +263,7 @@ static inline uint64_t xive_end_qaddr(XiveEND *end) void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf); void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, GString *buf); -void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, Monitor *mon); +void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf); /* Notification Virtual Target (NVT) */ typedef struct XiveNVT { diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index 1dddbf7827..a0c6dee5db 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -1881,14 +1881,15 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon) while (!xive_router_get_end(xrtr, blk, i, &end)) { xive_end_pic_print_info(&end, i++, buf); } - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - monitor_printf(mon, "XIVE[%x] #%d END Escalation EAT\n", chip_id, blk); + g_string_append_printf(buf, "XIVE[%x] #%d END Escalation EAT\n", + chip_id, blk); i = 0; while (!xive_router_get_end(xrtr, blk, i, &end)) { - xive_end_eas_pic_print_info(&end, i++, mon); + xive_end_eas_pic_print_info(&end, i++, buf); } + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); monitor_printf(mon, "XIVE[%x] #%d NVTT %08x .. %08x\n", chip_id, blk, 0, XIVE_NVT_COUNT - 1); diff --git a/hw/intc/xive.c b/hw/intc/xive.c index f631d7cd6e..70f11f993b 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -17,7 +17,6 @@ #include "sysemu/reset.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" -#include "monitor/monitor.h" #include "hw/irq.h" #include "hw/ppc/xive.h" #include "hw/ppc/xive2.h" @@ -1419,8 +1418,7 @@ static void xive_end_enqueue(XiveEND *end, uint32_t data) end->w1 = xive_set_field32(END_W1_PAGE_OFF, end->w1, qindex); } -void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, - Monitor *mon) +void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf) { XiveEAS *eas = (XiveEAS *) &end->w4; uint8_t pq; @@ -1431,15 +1429,15 @@ void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, pq = xive_get_field32(END_W1_ESe, end->w1); - monitor_printf(mon, " %08x %c%c %c%c end:%02x/%04x data:%08x\n", - end_idx, - pq & XIVE_ESB_VAL_P ? 'P' : '-', - pq & XIVE_ESB_VAL_Q ? 'Q' : '-', - xive_eas_is_valid(eas) ? 'V' : ' ', - xive_eas_is_masked(eas) ? 'M' : ' ', - (uint8_t) xive_get_field64(EAS_END_BLOCK, eas->w), - (uint32_t) xive_get_field64(EAS_END_INDEX, eas->w), - (uint32_t) xive_get_field64(EAS_END_DATA, eas->w)); + g_string_append_printf(buf, " %08x %c%c %c%c end:%02x/%04x data:%08x\n", + end_idx, + pq & XIVE_ESB_VAL_P ? 'P' : '-', + pq & XIVE_ESB_VAL_Q ? 'Q' : '-', + xive_eas_is_valid(eas) ? 'V' : ' ', + xive_eas_is_masked(eas) ? 'M' : ' ', + (uint8_t) xive_get_field64(EAS_END_BLOCK, eas->w), + (uint32_t) xive_get_field64(EAS_END_INDEX, eas->w), + (uint32_t) xive_get_field64(EAS_END_DATA, eas->w)); } /* From patchwork Tue Jun 18 16:00:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702677 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 319D8C2BA18 for ; Tue, 18 Jun 2024 16:12:07 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbJt-0004FE-SM; Tue, 18 Jun 2024 12:04:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbJs-00046D-9y for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:04:28 -0400 Received: from mail-lf1-x132.google.com ([2a00:1450:4864:20::132]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sJbJq-0007FS-DN for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:04:28 -0400 Received: by mail-lf1-x132.google.com with SMTP id 2adb3069b0e04-52c9034860dso7113258e87.2 for ; Tue, 18 Jun 2024 09:04:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1718726664; x=1719331464; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=r0OrXW9b+XN8YsCIUyH/dpkBirMjCPjOco0x9NNBa2Y=; b=KCkXwesSj0HXqEOtm9OX84nlpySUPOvvRpX8SjCP4s9pSZ5yaFnpFymTW+HtzUNKkh 1dHznbgvHIr6splMxTy6E0znGergPFiHfq1UkNa6+fEJbklt+mU1G1GlkPICUyWRsbxZ y+tCL4xLmIf4nGLYLFlpjR4UAHPnjC4dzAx1lW8NtTl6uIfjvsaub4kCQ6s4N72A9Edl lsGKCi7zMBPnyAwzsX9cDxyavGlf6n3+ifjySKsk6Sp858l5PtFGGMEGdtL0RtI1IMr5 kqQGkeNlpsEf07XOu1R65T+Y31vW74JhJvkNfzOqJa+zjT2Aq/4n4O1mNPo5iNYeWrkK ON3A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718726664; x=1719331464; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=r0OrXW9b+XN8YsCIUyH/dpkBirMjCPjOco0x9NNBa2Y=; b=N5Pv6ClMTMhbPU5fFBDVhYg+vBCYjVDFaww6YIEnxSw8RwIr8PQIo1OQYvZbd1zeqG MT4TZBiaExQ/aeyzRHF8wk5+vaq2rN+XKa6v5PwEO97CEWWlYgcg18fuL/j4EL1ibUyO BdpR/4twRUfOk95wdNIUn92DudpdiV8b5P0aM4ZTN6DKp/Pbj6UHZveGtZFFrq0hO1i5 +LR7JHCQ2DFsK2GP7MMIte+hOQbt5deAj3REoDSjK3CodSSABEjllfVA1dDzwrEmaPmS WkhhwgESXPr/GwT2bDVWOp59HESwGhlKvNcIfmlokuX2LKlCTdBRkGFlrfM3Zw5mo1Bi fzcg== X-Gm-Message-State: AOJu0YwiwadCrB25K5J9UOsewYXG/fdTxH6CP1MN2ipfX13E0hc2sf18 FGZZyrB862Va3YNKJUX4a0o6c/WcnVX+IwhPIGG/f8sxnxaD6W25inxNlQuiIsdiIoWXjNY0dS4 i X-Google-Smtp-Source: AGHT+IGJFekd4SyH7Ya3cjSVBaA4VcnIV+ApX16mjo3H2sv4IfpCSac6Ht9kflhSO5p+EOKdvJ2S+g== X-Received: by 2002:ac2:5b04:0:b0:52c:9523:f0db with SMTP id 2adb3069b0e04-52ccaa523e4mr44812e87.45.1718726664248; Tue, 18 Jun 2024 09:04:24 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56da32c3sm638640566b.13.2024.06.18.09.04.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:04:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 38/76] hw/ppc: Avoid using Monitor in xive_nvt_pic_print_info() Date: Tue, 18 Jun 2024 18:00:00 +0200 Message-ID: <20240618160039.36108-39-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::132; envelope-from=philmd@linaro.org; helo=mail-lf1-x132.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-15-philmd@linaro.org> --- hw/intc/pnv_xive.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index a0c6dee5db..3ad4ac8e7d 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -1832,7 +1832,7 @@ static const MemoryRegionOps pnv_xive_pc_ops = { }; static void xive_nvt_pic_print_info(XiveNVT *nvt, uint32_t nvt_idx, - Monitor *mon) + GString *buf) { uint8_t eq_blk = xive_get_field32(NVT_W1_EQ_BLOCK, nvt->w1); uint32_t eq_idx = xive_get_field32(NVT_W1_EQ_INDEX, nvt->w1); @@ -1841,9 +1841,9 @@ static void xive_nvt_pic_print_info(XiveNVT *nvt, uint32_t nvt_idx, return; } - monitor_printf(mon, " %08x end:%02x/%04x IPB:%02x\n", nvt_idx, - eq_blk, eq_idx, - xive_get_field32(NVT_W4_IPB, nvt->w4)); + g_string_append_printf(buf, " %08x end:%02x/%04x IPB:%02x\n", + nvt_idx, eq_blk, eq_idx, + xive_get_field32(NVT_W4_IPB, nvt->w4)); } void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon) @@ -1888,17 +1888,18 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon) while (!xive_router_get_end(xrtr, blk, i, &end)) { xive_end_eas_pic_print_info(&end, i++, buf); } - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - monitor_printf(mon, "XIVE[%x] #%d NVTT %08x .. %08x\n", chip_id, blk, - 0, XIVE_NVT_COUNT - 1); + g_string_append_printf(buf, "XIVE[%x] #%d NVTT %08x .. %08x\n", + chip_id, blk, 0, XIVE_NVT_COUNT - 1); xive_nvt_per_subpage = pnv_xive_vst_per_subpage(xive, VST_TSEL_VPDT); for (i = 0; i < XIVE_NVT_COUNT; i += xive_nvt_per_subpage) { while (!xive_router_get_nvt(xrtr, blk, i, &nvt)) { - xive_nvt_pic_print_info(&nvt, i++, mon); + xive_nvt_pic_print_info(&nvt, i++, buf); } } + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } static void pnv_xive_reset(void *dev) From patchwork Tue Jun 18 16:00:01 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:04:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 39/76] hw/ppc: Avoid using Monitor in pnv_xive_pic_print_info() Date: Tue, 18 Jun 2024 18:00:01 +0200 Message-ID: <20240618160039.36108-40-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-16-philmd@linaro.org> --- include/hw/ppc/pnv_xive.h | 2 +- hw/intc/pnv_xive.c | 9 +-------- hw/ppc/pnv.c | 8 +++++++- 3 files changed, 9 insertions(+), 10 deletions(-) diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h index 9c48430ee4..7d634e469c 100644 --- a/include/hw/ppc/pnv_xive.h +++ b/include/hw/ppc/pnv_xive.h @@ -93,7 +93,7 @@ struct PnvXiveClass { DeviceRealize parent_realize; }; -void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon); +void pnv_xive_pic_print_info(PnvXive *xive, GString *buf); /* * XIVE2 interrupt controller (POWER10) diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index 3ad4ac8e7d..5bacbce6a4 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -11,12 +11,10 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" -#include "qapi/type-helpers.h" #include "target/ppc/cpu.h" #include "sysemu/cpus.h" #include "sysemu/dma.h" #include "sysemu/reset.h" -#include "monitor/monitor.h" #include "hw/ppc/fdt.h" #include "hw/ppc/pnv.h" #include "hw/ppc/pnv_chip.h" @@ -1846,7 +1844,7 @@ static void xive_nvt_pic_print_info(XiveNVT *nvt, uint32_t nvt_idx, xive_get_field32(NVT_W4_IPB, nvt->w4)); } -void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon) +void pnv_xive_pic_print_info(PnvXive *xive, GString *buf) { XiveRouter *xrtr = XIVE_ROUTER(xive); uint8_t blk = pnv_xive_block_id(xive); @@ -1858,8 +1856,6 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon) XiveNVT nvt; int i; uint64_t xive_nvt_per_subpage; - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; g_string_append_printf(buf, "XIVE[%x] #%d Source %08x .. %08x\n", chip_id, blk, srcno0, srcno0 + nr_ipis - 1); @@ -1897,9 +1893,6 @@ void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon) xive_nvt_pic_print_info(&nvt, i++, buf); } } - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } static void pnv_xive_reset(void *dev) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index df187c5180..7e6f923c7e 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -808,8 +808,14 @@ static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque) static void pnv_chip_power9_pic_print_info(PnvChip *chip, Monitor *mon) { Pnv9Chip *chip9 = PNV9_CHIP(chip); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; + + pnv_xive_pic_print_info(&chip9->xive, buf); + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); - pnv_xive_pic_print_info(&chip9->xive, mon); pnv_psi_pic_print_info(&chip9->psi, mon); object_child_foreach_recursive(OBJECT(chip), From patchwork Tue Jun 18 16:00:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702588 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67F91C27C4F for ; Tue, 18 Jun 2024 16:07:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbKG-0004x9-29; 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Tue, 18 Jun 2024 09:04:35 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f9bbc2136sm62937066b.123.2024.06.18.09.04.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:04:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 40/76] hw/ppc: Avoid using Monitor in pnv_psi_pic_print_info() Date: Tue, 18 Jun 2024 18:00:02 +0200 Message-ID: <20240618160039.36108-41-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=philmd@linaro.org; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-17-philmd@linaro.org> --- include/hw/ppc/pnv_psi.h | 2 +- hw/ppc/pnv.c | 10 +++++++--- hw/ppc/pnv_psi.c | 9 +-------- 3 files changed, 9 insertions(+), 12 deletions(-) diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h index 2a6f715350..cf7f95a6b1 100644 --- a/include/hw/ppc/pnv_psi.h +++ b/include/hw/ppc/pnv_psi.h @@ -110,6 +110,6 @@ typedef enum PnvPsiIrq { #define PSIHB9_IRQ_PSU 13 #define PSIHB9_NUM_IRQS 14 -void pnv_psi_pic_print_info(Pnv9Psi *psi, Monitor *mon); +void pnv_psi_pic_print_info(Pnv9Psi *psi, GString *buf); #endif /* PPC_PNV_PSI_H */ diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 7e6f923c7e..4a1a302a25 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -812,12 +812,11 @@ static void pnv_chip_power9_pic_print_info(PnvChip *chip, Monitor *mon) g_autoptr(HumanReadableText) info = NULL; pnv_xive_pic_print_info(&chip9->xive, buf); + pnv_psi_pic_print_info(&chip9->psi, buf); info = human_readable_text_from_str(buf); monitor_puts(mon, info->human_readable_text); - pnv_psi_pic_print_info(&chip9->psi, mon); - object_child_foreach_recursive(OBJECT(chip), pnv_chip_power9_pic_print_info_child, mon); } @@ -862,9 +861,14 @@ static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, uint32_t irq) static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon) { Pnv10Chip *chip10 = PNV10_CHIP(chip); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; pnv_xive2_pic_print_info(&chip10->xive, mon); - pnv_psi_pic_print_info(&chip10->psi, mon); + + pnv_psi_pic_print_info(&chip10->psi, buf); + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); object_child_foreach_recursive(OBJECT(chip), pnv_chip_power9_pic_print_info_child, mon); diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 922ac07b2f..18cc76a7e4 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -25,8 +25,6 @@ #include "qemu/module.h" #include "sysemu/reset.h" #include "qapi/error.h" -#include "qapi/type-helpers.h" -#include "monitor/monitor.h" #include "hw/ppc/fdt.h" @@ -978,11 +976,9 @@ static void pnv_psi_register_types(void) type_init(pnv_psi_register_types); -void pnv_psi_pic_print_info(Pnv9Psi *psi9, Monitor *mon) +void pnv_psi_pic_print_info(Pnv9Psi *psi9, GString *buf) { PnvPsi *psi = PNV_PSI(psi9); - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; uint32_t offset = (psi->regs[PSIHB_REG(PSIHB9_IVT_OFFSET)] >> PSIHB9_IVT_OFF_SHIFT); @@ -990,7 +986,4 @@ void pnv_psi_pic_print_info(Pnv9Psi *psi9, Monitor *mon) g_string_append_printf(buf, "PSIHB Source %08x .. %08x\n", offset, offset + psi9->source.nr_irqs - 1); xive_source_pic_print_info(&psi9->source, offset, buf); - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } From patchwork Tue Jun 18 16:00:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702606 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D5D5C2BA18 for ; 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Tue, 18 Jun 2024 09:04:41 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f7ea3a5c9sm302023166b.169.2024.06.18.09.04.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:04:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 41/76] hw/ppc: Avoid using Monitor in xive2_eas_pic_print_info() Date: Tue, 18 Jun 2024 18:00:03 +0200 Message-ID: <20240618160039.36108-42-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-18-philmd@linaro.org> --- include/hw/ppc/xive2_regs.h | 2 +- hw/intc/pnv_xive2.c | 16 ++++++++-------- hw/intc/xive2.c | 12 ++++++------ 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h index 816f5d0e84..f662f0e325 100644 --- a/include/hw/ppc/xive2_regs.h +++ b/include/hw/ppc/xive2_regs.h @@ -48,7 +48,7 @@ typedef struct Xive2Eas { #define xive2_eas_is_valid(eas) (be64_to_cpu((eas)->w) & EAS2_VALID) #define xive2_eas_is_masked(eas) (be64_to_cpu((eas)->w) & EAS2_MASKED) -void xive2_eas_pic_print_info(Xive2Eas *eas, uint32_t lisn, Monitor *mon); +void xive2_eas_pic_print_info(Xive2Eas *eas, uint32_t lisn, GString *buf); /* * Event Notifification Descriptor (END) diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index 83e0f6b09f..649e5001fd 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -2120,24 +2120,24 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon) g_autoptr(GString) buf = g_string_new(""); g_autoptr(HumanReadableText) info = NULL; - monitor_printf(mon, "XIVE[%x] Source %08x .. %08x\n", blk, srcno0, - srcno0 + nr_esbs - 1); + g_string_append_printf(buf, "XIVE[%x] Source %08x .. %08x\n", + blk, srcno0, srcno0 + nr_esbs - 1); xive_source_pic_print_info(&xive->ipi_source, srcno0, buf); - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - - monitor_printf(mon, "XIVE[%x] EAT %08x .. %08x\n", blk, srcno0, - srcno0 + nr_esbs - 1); + g_string_append_printf(buf, "XIVE[%x] EAT %08x .. %08x\n", + blk, srcno0, srcno0 + nr_esbs - 1); for (i = 0; i < nr_esbs; i++) { if (xive2_router_get_eas(xrtr, blk, i, &eas)) { break; } if (!xive2_eas_is_masked(&eas)) { - xive2_eas_pic_print_info(&eas, i, mon); + xive2_eas_pic_print_info(&eas, i, buf); } } + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); + monitor_printf(mon, "XIVE[%x] #%d END Escalation EAT\n", chip_id, blk); i = 0; while (!xive2_router_get_end(xrtr, blk, i, &end)) { diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 98c0d8ba44..0154ebb59c 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -27,17 +27,17 @@ uint32_t xive2_router_get_config(Xive2Router *xrtr) return xrc->get_config(xrtr); } -void xive2_eas_pic_print_info(Xive2Eas *eas, uint32_t lisn, Monitor *mon) +void xive2_eas_pic_print_info(Xive2Eas *eas, uint32_t lisn, GString *buf) { if (!xive2_eas_is_valid(eas)) { return; } - monitor_printf(mon, " %08x %s end:%02x/%04x data:%08x\n", - lisn, xive2_eas_is_masked(eas) ? "M" : " ", - (uint8_t) xive_get_field64(EAS2_END_BLOCK, eas->w), - (uint32_t) xive_get_field64(EAS2_END_INDEX, eas->w), - (uint32_t) xive_get_field64(EAS2_END_DATA, eas->w)); + g_string_append_printf(buf, " %08x %s end:%02x/%04x data:%08x\n", + lisn, xive2_eas_is_masked(eas) ? "M" : " ", + (uint8_t) xive_get_field64(EAS2_END_BLOCK, eas->w), + (uint32_t) xive_get_field64(EAS2_END_INDEX, eas->w), + (uint32_t) xive_get_field64(EAS2_END_DATA, eas->w)); } void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, From patchwork Tue Jun 18 16:00:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702603 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67AA7C27C4F for ; Tue, 18 Jun 2024 16:09:03 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbKK-00055D-UQ; Tue, 18 Jun 2024 12:04:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbKG-0004xz-8D for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:04:53 -0400 Received: from mail-ej1-x630.google.com ([2a00:1450:4864:20::630]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sJbKD-0007K7-Qr for qemu-devel@nongnu.org; Tue, 18 Jun 2024 12:04:51 -0400 Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-a6e43dad8ecso975837966b.1 for ; Tue, 18 Jun 2024 09:04:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1718726687; x=1719331487; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bBbXvZQRPypaSl3gh9f7m2D/B8J51wUHOUkRF4HQox4=; b=iWjmmdba0prKDq2sEbpQ1q74fMadEOUqD0NEq9DBhkIjEt5qQPvyi2gZ/6VahlJMk1 Jv7NplwN1VQixyoO5JckeyiL31/i88npeaQDB0YYq99ihoslzrUdEF7ZPJSZZ4O48ZYO uaPSgQ7fLi30VrBPEOhiMxajN4Bf2MEWq7Qvb/2Ld+o9NHVjY74gtgRDx2E6nYlZ50DT 90SKKPn+F+pe6czTihR7sr+ZZs9+rHnI6F6OhkIDeF5qVIkGGXlenn1UlyND7zL8YLBX qS2RnWTJqHUzLechXkGa8kFPkHME2HMOGO82jm8feV3tv/ThaEnnjNwxxmUYvsMjzuuR H+RA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718726687; x=1719331487; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bBbXvZQRPypaSl3gh9f7m2D/B8J51wUHOUkRF4HQox4=; b=J4zJwEKUEOxEsOtWZHiyBUpZFO4wHapO46fqRYOFg2o85XBR/S1+XbGeu96g0y/d4j YvMbGW2i1niQZZ0vujygaisLndTdB5n+mzYL4mO/JDI4BzFQjxahvGzKDPIp+Oc/CwfU ueqBVJ0FsLQaygqVQclLUgODxRGuW53mJnSGq/LAdhMfxMKi0XdsKfl2HIN78rSEW7Q8 XD0QCeHkSBfmADnOQ05m4F2GwJw487C4uVg7/QVa/r1rpDa+IjhiDI3FiUdsnrai+9rX 9OA7+rSZpewqE5Qrcji9noOu4pdeN3b2nuyOhM6kG52FWSQqVI85DZXaEPBAAF7HfT3C GlEQ== X-Gm-Message-State: AOJu0YxOJ6TSft936Ly4qLNO8OvtkJrj9KLYyyhcqYfDZoCoGVFs/wMU jTNxz/J/BM8UxS/1DX4Oc/oriNhQ7R/QWPSomDjKVmX6s2js19FNMFuDj7z+wfUa2dcNQq4GvPo Q X-Google-Smtp-Source: AGHT+IFnJLQXVqGHi9GbVeDHGWEysnGQ4lcbJ60Pu/yKn7KG2qnGcaQYXlWfUuu7tpAS7k5R9MNxfA== X-Received: by 2002:a17:907:20f1:b0:a6e:6555:4bcd with SMTP id a640c23a62f3a-a6fa449aa71mr14354566b.35.1718726686860; Tue, 18 Jun 2024 09:04:46 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56f9c86esm629412166b.219.2024.06.18.09.04.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:04:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 42/76] hw/ppc: Avoid using Monitor in xive2_end_eas_pic_print_info() Date: Tue, 18 Jun 2024 18:00:04 +0200 Message-ID: <20240618160039.36108-43-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-19-philmd@linaro.org> --- include/hw/ppc/xive2_regs.h | 2 +- hw/intc/pnv_xive2.c | 10 +++++----- hw/intc/xive2.c | 20 ++++++++++---------- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h index f662f0e325..37f572ed6d 100644 --- a/include/hw/ppc/xive2_regs.h +++ b/include/hw/ppc/xive2_regs.h @@ -134,7 +134,7 @@ void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, Monitor *mon); void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, Monitor *mon); void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx, - Monitor *mon); + GString *buf); /* * Notification Virtual Processor (NVP) diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index 649e5001fd..9535f60828 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -2135,14 +2135,14 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon) } } - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - - monitor_printf(mon, "XIVE[%x] #%d END Escalation EAT\n", chip_id, blk); + g_string_append_printf(buf, "XIVE[%x] #%d END Escalation EAT\n", + chip_id, blk); i = 0; while (!xive2_router_get_end(xrtr, blk, i, &end)) { - xive2_end_eas_pic_print_info(&end, i++, mon); + xive2_end_eas_pic_print_info(&end, i++, buf); } + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); monitor_printf(mon, "XIVE[%x] #%d ENDT\n", chip_id, blk); i = 0; diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 0154ebb59c..23356acff7 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -116,7 +116,7 @@ void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, Monitor *mon) } void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx, - Monitor *mon) + GString *buf) { Xive2Eas *eas = (Xive2Eas *) &end->w4; uint8_t pq; @@ -127,15 +127,15 @@ void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx, pq = xive_get_field32(END2_W1_ESe, end->w1); - monitor_printf(mon, " %08x %c%c %c%c end:%02x/%04x data:%08x\n", - end_idx, - pq & XIVE_ESB_VAL_P ? 'P' : '-', - pq & XIVE_ESB_VAL_Q ? 'Q' : '-', - xive2_eas_is_valid(eas) ? 'v' : ' ', - xive2_eas_is_masked(eas) ? 'M' : ' ', - (uint8_t) xive_get_field64(EAS2_END_BLOCK, eas->w), - (uint32_t) xive_get_field64(EAS2_END_INDEX, eas->w), - (uint32_t) xive_get_field64(EAS2_END_DATA, eas->w)); + g_string_append_printf(buf, " %08x %c%c %c%c end:%02x/%04x data:%08x\n", + end_idx, + pq & XIVE_ESB_VAL_P ? 'P' : '-', + pq & XIVE_ESB_VAL_Q ? 'Q' : '-', + xive2_eas_is_valid(eas) ? 'v' : ' ', + xive2_eas_is_masked(eas) ? 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-20-philmd@linaro.org> --- include/hw/ppc/xive2_regs.h | 2 +- hw/intc/xive2.c | 19 ++++++++++++------- 2 files changed, 13 insertions(+), 8 deletions(-) diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h index 37f572ed6d..4d32703c26 100644 --- a/include/hw/ppc/xive2_regs.h +++ b/include/hw/ppc/xive2_regs.h @@ -132,7 +132,7 @@ static inline uint64_t xive2_end_qaddr(Xive2End *end) void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, Monitor *mon); void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, - Monitor *mon); + GString *buf); void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx, GString *buf); diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 23356acff7..6a15b4d1e4 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -11,6 +11,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qapi/type-helpers.h" #include "target/ppc/cpu.h" #include "sysemu/cpus.h" #include "sysemu/dma.h" @@ -40,8 +41,7 @@ void xive2_eas_pic_print_info(Xive2Eas *eas, uint32_t lisn, GString *buf) (uint32_t) xive_get_field64(EAS2_END_DATA, eas->w)); } -void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, - Monitor *mon) +void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, GString *buf) { uint64_t qaddr_base = xive2_end_qaddr(end); uint32_t qsize = xive_get_field32(END2_W3_QSIZE, end->w3); @@ -52,7 +52,7 @@ void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, /* * print out the [ (qindex - (width - 1)) .. (qindex + 1)] window */ - monitor_printf(mon, " [ "); + g_string_append_printf(buf, " [ "); qindex = (qindex - (width - 1)) & (qentries - 1); for (i = 0; i < width; i++) { uint64_t qaddr = qaddr_base + (qindex << 2); @@ -64,11 +64,11 @@ void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, HWADDR_PRIx "\n", qaddr); return; } - monitor_printf(mon, "%s%08x ", i == width - 1 ? "^" : "", - be32_to_cpu(qdata)); + g_string_append_printf(buf, "%s%08x ", i == width - 1 ? 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Tue, 18 Jun 2024 09:04:58 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cb72da785sm7832728a12.28.2024.06.18.09.04.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:04:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 44/76] hw/ppc: Avoid using Monitor in xive2_end_pic_print_info() Date: Tue, 18 Jun 2024 18:00:06 +0200 Message-ID: <20240618160039.36108-45-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-21-philmd@linaro.org> --- include/hw/ppc/xive2_regs.h | 2 +- hw/intc/pnv_xive2.c | 8 +++---- hw/intc/xive2.c | 48 ++++++++++++++++--------------------- 3 files changed, 26 insertions(+), 32 deletions(-) diff --git a/include/hw/ppc/xive2_regs.h b/include/hw/ppc/xive2_regs.h index 4d32703c26..4e5e17cd89 100644 --- a/include/hw/ppc/xive2_regs.h +++ b/include/hw/ppc/xive2_regs.h @@ -130,7 +130,7 @@ static inline uint64_t xive2_end_qaddr(Xive2End *end) (be32_to_cpu(end->w3) & END2_W3_EQ_ADDR_LO); } -void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, Monitor *mon); +void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, GString *buf); void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, GString *buf); void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx, diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index 9535f60828..52505fd1a4 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -2141,14 +2141,14 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon) while (!xive2_router_get_end(xrtr, blk, i, &end)) { xive2_end_eas_pic_print_info(&end, i++, buf); } - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - monitor_printf(mon, "XIVE[%x] #%d ENDT\n", chip_id, blk); + g_string_append_printf(buf, "XIVE[%x] #%d ENDT\n", chip_id, blk); i = 0; while (!xive2_router_get_end(xrtr, blk, i, &end)) { - xive2_end_pic_print_info(&end, i++, mon); + xive2_end_pic_print_info(&end, i++, buf); } + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); monitor_printf(mon, "XIVE[%x] #%d NVPT %08x .. %08x\n", chip_id, blk, 0, XIVE2_NVP_COUNT - 1); diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c index 6a15b4d1e4..3e7238c663 100644 --- a/hw/intc/xive2.c +++ b/hw/intc/xive2.c @@ -11,12 +11,10 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" -#include "qapi/type-helpers.h" #include "target/ppc/cpu.h" #include "sysemu/cpus.h" #include "sysemu/dma.h" #include "hw/qdev-properties.h" -#include "monitor/monitor.h" #include "hw/ppc/xive.h" #include "hw/ppc/xive2.h" #include "hw/ppc/xive2_regs.h" @@ -71,7 +69,7 @@ void xive2_end_queue_pic_print_info(Xive2End *end, uint32_t width, GString *buf) g_string_append_printf(buf, "]"); } -void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, Monitor *mon) +void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, GString *buf) { uint64_t qaddr_base = xive2_end_qaddr(end); uint32_t qindex = xive_get_field32(END2_W1_PAGE_OFF, end->w1); @@ -90,34 +88,30 @@ void xive2_end_pic_print_info(Xive2End *end, uint32_t end_idx, Monitor *mon) pq = xive_get_field32(END2_W1_ESn, end->w1); - monitor_printf(mon, - " %08x %c%c %c%c%c%c%c%c%c%c%c%c prio:%d nvp:%02x/%04x", - end_idx, - pq & XIVE_ESB_VAL_P ? 'P' : '-', - pq & XIVE_ESB_VAL_Q ? 'Q' : '-', - xive2_end_is_valid(end) ? 'v' : '-', - xive2_end_is_enqueue(end) ? 'q' : '-', - xive2_end_is_notify(end) ? 'n' : '-', - xive2_end_is_backlog(end) ? 'b' : '-', - xive2_end_is_escalate(end) ? 'e' : '-', - xive2_end_is_escalate_end(end) ? 'N' : '-', - xive2_end_is_uncond_escalation(end) ? 'u' : '-', - xive2_end_is_silent_escalation(end) ? 's' : '-', - xive2_end_is_firmware1(end) ? 'f' : '-', - xive2_end_is_firmware2(end) ? 'F' : '-', - priority, nvp_blk, nvp_idx); + g_string_append_printf(buf, + " %08x %c%c %c%c%c%c%c%c%c%c%c%c " + "prio:%d nvp:%02x/%04x", + end_idx, + pq & XIVE_ESB_VAL_P ? 'P' : '-', + pq & XIVE_ESB_VAL_Q ? 'Q' : '-', + xive2_end_is_valid(end) ? 'v' : '-', + xive2_end_is_enqueue(end) ? 'q' : '-', + xive2_end_is_notify(end) ? 'n' : '-', + xive2_end_is_backlog(end) ? 'b' : '-', + xive2_end_is_escalate(end) ? 'e' : '-', + xive2_end_is_escalate_end(end) ? 'N' : '-', + xive2_end_is_uncond_escalation(end) ? 'u' : '-', + xive2_end_is_silent_escalation(end) ? 's' : '-', + xive2_end_is_firmware1(end) ? 'f' : '-', + xive2_end_is_firmware2(end) ? 'F' : '-', + priority, nvp_blk, nvp_idx); if (qaddr_base) { - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; - - monitor_printf(mon, " eq:@%08"PRIx64"% 6d/%5d ^%d", - qaddr_base, qindex, qentries, qgen); + g_string_append_printf(buf, " eq:@%08"PRIx64"% 6d/%5d ^%d", + qaddr_base, qindex, qentries, qgen); xive2_end_queue_pic_print_info(end, 6, buf); - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } - monitor_printf(mon, "\n"); + g_string_append_c(buf, '\n'); } void xive2_end_eas_pic_print_info(Xive2End *end, uint32_t end_idx, From patchwork Tue Jun 18 16:00:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702625 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 850DBC27C4F for ; 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Tue, 18 Jun 2024 09:05:03 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56f41684sm628373866b.153.2024.06.18.09.05.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:05:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 45/76] hw/ppc: Avoid using Monitor in xive2_nvp_pic_print_info() Date: Tue, 18 Jun 2024 18:00:07 +0200 Message-ID: <20240618160039.36108-46-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=philmd@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-22-philmd@linaro.org> --- hw/intc/pnv_xive2.c | 29 +++++++++++++++-------------- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index 52505fd1a4..10914b04df 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -2028,7 +2028,7 @@ static void pnv_xive2_register_types(void) type_init(pnv_xive2_register_types) static void xive2_nvp_pic_print_info(Xive2Nvp *nvp, uint32_t nvp_idx, - Monitor *mon) + GString *buf) { uint8_t eq_blk = xive_get_field32(NVP2_W5_VP_END_BLOCK, nvp->w5); uint32_t eq_idx = xive_get_field32(NVP2_W5_VP_END_INDEX, nvp->w5); @@ -2037,21 +2037,21 @@ static void xive2_nvp_pic_print_info(Xive2Nvp *nvp, uint32_t nvp_idx, return; } - monitor_printf(mon, " %08x end:%02x/%04x IPB:%02x", - nvp_idx, eq_blk, eq_idx, - xive_get_field32(NVP2_W2_IPB, nvp->w2)); + g_string_append_printf(buf, " %08x end:%02x/%04x IPB:%02x", + nvp_idx, eq_blk, eq_idx, + xive_get_field32(NVP2_W2_IPB, nvp->w2)); /* * When the NVP is HW controlled, more fields are updated */ if (xive2_nvp_is_hw(nvp)) { - monitor_printf(mon, " CPPR:%02x", - xive_get_field32(NVP2_W2_CPPR, nvp->w2)); + g_string_append_printf(buf, " CPPR:%02x", + xive_get_field32(NVP2_W2_CPPR, nvp->w2)); if (xive2_nvp_is_co(nvp)) { - monitor_printf(mon, " CO:%04x", - xive_get_field32(NVP2_W1_CO_THRID, nvp->w1)); + g_string_append_printf(buf, " CO:%04x", + xive_get_field32(NVP2_W1_CO_THRID, nvp->w1)); } } - monitor_printf(mon, "\n"); + g_string_append_c(buf, '\n'); } /* @@ -2147,15 +2147,16 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon) while (!xive2_router_get_end(xrtr, blk, i, &end)) { xive2_end_pic_print_info(&end, i++, buf); } - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - monitor_printf(mon, "XIVE[%x] #%d NVPT %08x .. %08x\n", chip_id, blk, - 0, XIVE2_NVP_COUNT - 1); + g_string_append_printf(buf, "XIVE[%x] #%d NVPT %08x .. %08x\n", + chip_id, blk, 0, XIVE2_NVP_COUNT - 1); xive_nvp_per_subpage = pnv_xive2_vst_per_subpage(xive, VST_NVP); for (i = 0; i < XIVE2_NVP_COUNT; i += xive_nvp_per_subpage) { while (!xive2_router_get_nvp(xrtr, blk, i, &nvp)) { - xive2_nvp_pic_print_info(&nvp, i++, mon); + xive2_nvp_pic_print_info(&nvp, i++, buf); } } + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } From patchwork Tue Jun 18 16:00:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702594 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73FF7C41513 for ; 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Tue, 18 Jun 2024 09:05:09 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a6f56f99b67sm625233066b.201.2024.06.18.09.05.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:05:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 46/76] hw/ppc: Avoid using Monitor in pnv_xive2_pic_print_info() Date: Tue, 18 Jun 2024 18:00:08 +0200 Message-ID: <20240618160039.36108-47-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-23-philmd@linaro.org> --- include/hw/ppc/pnv_xive.h | 2 +- hw/intc/pnv_xive2.c | 9 +-------- hw/ppc/pnv.c | 2 +- 3 files changed, 3 insertions(+), 10 deletions(-) diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h index 7d634e469c..5b4cb4167b 100644 --- a/include/hw/ppc/pnv_xive.h +++ b/include/hw/ppc/pnv_xive.h @@ -163,6 +163,6 @@ typedef struct PnvXive2Class { DeviceRealize parent_realize; } PnvXive2Class; -void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon); +void pnv_xive2_pic_print_info(PnvXive2 *xive, GString *buf); #endif /* PPC_PNV_XIVE_H */ diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c index 10914b04df..2fb4fa29d4 100644 --- a/hw/intc/pnv_xive2.c +++ b/hw/intc/pnv_xive2.c @@ -10,11 +10,9 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qapi/error.h" -#include "qapi/type-helpers.h" #include "target/ppc/cpu.h" #include "sysemu/cpus.h" #include "sysemu/dma.h" -#include "monitor/monitor.h" #include "hw/ppc/fdt.h" #include "hw/ppc/pnv.h" #include "hw/ppc/pnv_chip.h" @@ -2105,7 +2103,7 @@ static uint64_t pnv_xive2_vst_per_subpage(PnvXive2 *xive, uint32_t type) return (1ull << page_shift) / info->size; } -void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon) +void pnv_xive2_pic_print_info(PnvXive2 *xive, GString *buf) { Xive2Router *xrtr = XIVE2_ROUTER(xive); uint8_t blk = pnv_xive2_block_id(xive); @@ -2117,8 +2115,6 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon) Xive2Nvp nvp; int i; uint64_t xive_nvp_per_subpage; - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; g_string_append_printf(buf, "XIVE[%x] Source %08x .. %08x\n", blk, srcno0, srcno0 + nr_esbs - 1); @@ -2156,7 +2152,4 @@ void pnv_xive2_pic_print_info(PnvXive2 *xive, Monitor *mon) xive2_nvp_pic_print_info(&nvp, i++, buf); } } - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 4a1a302a25..5b9dbff754 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -864,7 +864,7 @@ static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon) g_autoptr(GString) buf = g_string_new(""); g_autoptr(HumanReadableText) info = NULL; - pnv_xive2_pic_print_info(&chip10->xive, mon); + pnv_xive2_pic_print_info(&chip10->xive, buf); pnv_psi_pic_print_info(&chip10->psi, buf); info = human_readable_text_from_str(buf); From patchwork Tue Jun 18 16:00:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702622 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1AB95C2BA18 for ; Tue, 18 Jun 2024 16:11:12 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbKi-000639-E0; Tue, 18 Jun 2024 12:05:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbKg-0005x1-QG for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:05:15 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-57cb7439606sm7870168a12.90.2024.06.18.09.05.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:05:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 47/76] hw/ppc: Avoid using Monitor in SpaprInterruptControllerClass::print_info() Date: Tue, 18 Jun 2024 18:00:09 +0200 Message-ID: <20240618160039.36108-48-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=philmd@linaro.org; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-24-philmd@linaro.org> --- include/hw/ppc/spapr_irq.h | 2 +- hw/intc/spapr_xive.c | 9 +-------- hw/intc/xics_spapr.c | 9 +-------- hw/ppc/spapr_irq.c | 8 +++++++- 4 files changed, 10 insertions(+), 18 deletions(-) diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index 4fd2d5853d..6e50470cff 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -73,7 +73,7 @@ struct SpaprInterruptControllerClass { /* These methods should only be called on the active intc */ void (*set_irq)(SpaprInterruptController *intc, int irq, int val); - void (*print_info)(SpaprInterruptController *intc, Monitor *mon); + void (*print_info)(SpaprInterruptController *intc, GString *buf); void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers, void *fdt, uint32_t phandle); int (*post_load)(SpaprInterruptController *intc, int version_id); diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 9d0d5948ff..283a6b8fd2 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -11,13 +11,11 @@ #include "qemu/log.h" #include "qemu/module.h" #include "qapi/error.h" -#include "qapi/type-helpers.h" #include "qemu/error-report.h" #include "target/ppc/cpu.h" #include "sysemu/cpus.h" #include "sysemu/reset.h" #include "migration/vmstate.h" -#include "monitor/monitor.h" #include "hw/ppc/fdt.h" #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_cpu_core.h" @@ -701,12 +699,10 @@ static void spapr_xive_set_irq(SpaprInterruptController *intc, int irq, int val) } } -static void spapr_xive_print_info(SpaprInterruptController *intc, Monitor *mon) +static void spapr_xive_print_info(SpaprInterruptController *intc, GString *buf) { SpaprXive *xive = SPAPR_XIVE(intc); CPUState *cs; - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); @@ -714,9 +710,6 @@ static void spapr_xive_print_info(SpaprInterruptController *intc, Monitor *mon) xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, buf); } spapr_xive_pic_print_info(xive, buf); - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } static void spapr_xive_dt(SpaprInterruptController *intc, uint32_t nr_servers, diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index 1926373ebd..a0d97bdefe 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -34,8 +34,6 @@ #include "hw/ppc/xics_spapr.h" #include "hw/ppc/fdt.h" #include "qapi/visitor.h" -#include "qapi/type-helpers.h" -#include "monitor/monitor.h" /* * Guest interfaces @@ -397,12 +395,10 @@ static void xics_spapr_set_irq(SpaprInterruptController *intc, int irq, int val) ics_set_irq(ics, srcno, val); } -static void xics_spapr_print_info(SpaprInterruptController *intc, Monitor *mon) +static void xics_spapr_print_info(SpaprInterruptController *intc, GString *buf) { ICSState *ics = ICS_SPAPR(intc); CPUState *cs; - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); @@ -410,9 +406,6 @@ static void xics_spapr_print_info(SpaprInterruptController *intc, Monitor *mon) icp_pic_print_info(spapr_cpu_state(cpu)->icp, buf); } ics_pic_print_info(ics, buf); - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } static int xics_spapr_post_load(SpaprInterruptController *intc, int version_id) diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 97b2fc42ab..b43917e7fe 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -11,6 +11,7 @@ #include "qemu/log.h" #include "qemu/error-report.h" #include "qapi/error.h" +#include "qapi/type-helpers.h" #include "hw/irq.h" #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_cpu_core.h" @@ -18,6 +19,7 @@ #include "hw/ppc/xics.h" #include "hw/ppc/xics_spapr.h" #include "hw/qdev-properties.h" +#include "monitor/monitor.h" #include "cpu-models.h" #include "sysemu/kvm.h" @@ -269,8 +271,12 @@ void spapr_irq_print_info(SpaprMachineState *spapr, Monitor *mon) { SpaprInterruptControllerClass *sicc = SPAPR_INTC_GET_CLASS(spapr->active_intc); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; - sicc->print_info(spapr->active_intc, mon); + sicc->print_info(spapr->active_intc, buf); + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } void spapr_irq_dt(SpaprMachineState *spapr, uint32_t nr_servers, From patchwork Tue Jun 18 16:00:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702605 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B49CC27C4F for ; Tue, 18 Jun 2024 16:09:15 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbKo-0006Fk-Cz; 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Tue, 18 Jun 2024 09:05:20 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-423b7a61501sm113840875e9.46.2024.06.18.09.05.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:05:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 48/76] hw/ppc: Avoid using Monitor in spapr_irq_print_info() Date: Tue, 18 Jun 2024 18:00:10 +0200 Message-ID: <20240618160039.36108-49-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-25-philmd@linaro.org> --- include/hw/ppc/spapr_irq.h | 2 +- hw/ppc/spapr.c | 11 ++++++++--- hw/ppc/spapr_irq.c | 8 +------- 3 files changed, 10 insertions(+), 11 deletions(-) diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index 6e50470cff..cb9a85f657 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -85,7 +85,7 @@ int spapr_irq_cpu_intc_create(struct SpaprMachineState *spapr, PowerPCCPU *cpu, Error **errp); void spapr_irq_cpu_intc_reset(struct SpaprMachineState *spapr, PowerPCCPU *cpu); void spapr_irq_cpu_intc_destroy(struct SpaprMachineState *spapr, PowerPCCPU *cpu); -void spapr_irq_print_info(struct SpaprMachineState *spapr, Monitor *mon); +void spapr_irq_print_info(struct SpaprMachineState *spapr, GString *buf); void spapr_irq_dt(struct SpaprMachineState *spapr, uint32_t nr_servers, void *fdt, uint32_t phandle); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index d7d4b188ee..a22decb643 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -31,6 +31,7 @@ #include "qapi/error.h" #include "qapi/qapi-events-machine.h" #include "qapi/qapi-events-qdev.h" +#include "qapi/type-helpers.h" #include "qapi/visitor.h" #include "sysemu/sysemu.h" #include "sysemu/hostmem.h" @@ -4530,10 +4531,14 @@ static void spapr_pic_print_info(InterruptStatsProvider *obj, Monitor *mon) { SpaprMachineState *spapr = SPAPR_MACHINE(obj); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; - spapr_irq_print_info(spapr, mon); - monitor_printf(mon, "irqchip: %s\n", - kvm_irqchip_in_kernel() ? "in-kernel" : "emulated"); + spapr_irq_print_info(spapr, buf); + g_string_append_printf(buf, "irqchip: %s\n", + kvm_irqchip_in_kernel() ? "in-kernel" : "emulated"); + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } /* diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index b43917e7fe..aebd7eaabb 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -11,7 +11,6 @@ #include "qemu/log.h" #include "qemu/error-report.h" #include "qapi/error.h" -#include "qapi/type-helpers.h" #include "hw/irq.h" #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_cpu_core.h" @@ -19,7 +18,6 @@ #include "hw/ppc/xics.h" #include "hw/ppc/xics_spapr.h" #include "hw/qdev-properties.h" -#include "monitor/monitor.h" #include "cpu-models.h" #include "sysemu/kvm.h" @@ -267,16 +265,12 @@ static void spapr_set_irq(void *opaque, int irq, int level) sicc->set_irq(spapr->active_intc, irq, level); } -void spapr_irq_print_info(SpaprMachineState *spapr, Monitor *mon) +void spapr_irq_print_info(SpaprMachineState *spapr, GString *buf) { SpaprInterruptControllerClass *sicc = SPAPR_INTC_GET_CLASS(spapr->active_intc); - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; sicc->print_info(spapr->active_intc, buf); - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } void spapr_irq_dt(SpaprMachineState *spapr, uint32_t nr_servers, From patchwork Tue Jun 18 16:00:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702678 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51A4EC27C4F for ; Tue, 18 Jun 2024 16:12:21 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbKt-0006JK-QA; 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Tue, 18 Jun 2024 09:05:26 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-422870e986asm233047535e9.27.2024.06.18.09.05.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:05:25 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 49/76] hw/ppc: Avoid using Monitor in pnv_chip_power9_pic_print_info_child() Date: Tue, 18 Jun 2024 18:00:11 +0200 Message-ID: <20240618160039.36108-50-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12c; envelope-from=philmd@linaro.org; helo=mail-lf1-x12c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-26-philmd@linaro.org> --- hw/ppc/pnv.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 5b9dbff754..9039c1777a 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -789,18 +789,14 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon) static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque) { - Monitor *mon = opaque; + GString *buf = opaque; PnvPHB *phb = (PnvPHB *) object_dynamic_cast(child, TYPE_PNV_PHB); - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; if (!phb) { return 0; } pnv_phb4_pic_print_info(PNV_PHB4(phb->backend), buf); - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); return 0; } @@ -813,12 +809,11 @@ static void pnv_chip_power9_pic_print_info(PnvChip *chip, Monitor *mon) pnv_xive_pic_print_info(&chip9->xive, buf); pnv_psi_pic_print_info(&chip9->psi, buf); + object_child_foreach_recursive(OBJECT(chip), + pnv_chip_power9_pic_print_info_child, buf); info = human_readable_text_from_str(buf); monitor_puts(mon, info->human_readable_text); - - object_child_foreach_recursive(OBJECT(chip), - pnv_chip_power9_pic_print_info_child, mon); } static uint64_t pnv_chip_power8_xscom_core_base(PnvChip *chip, @@ -865,13 +860,12 @@ static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon) g_autoptr(HumanReadableText) info = NULL; pnv_xive2_pic_print_info(&chip10->xive, buf); - pnv_psi_pic_print_info(&chip10->psi, buf); + object_child_foreach_recursive(OBJECT(chip), + pnv_chip_power9_pic_print_info_child, buf); + info = human_readable_text_from_str(buf); monitor_puts(mon, info->human_readable_text); - - object_child_foreach_recursive(OBJECT(chip), - pnv_chip_power9_pic_print_info_child, mon); } /* Always give the first 1GB to chip 0 else we won't boot */ From patchwork Tue Jun 18 16:00:12 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:05:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Manos Pitsidianakis , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Harsh Prateek Bora Subject: [PULL 50/76] hw/ppc: Avoid using Monitor in pic_print_info() Date: Tue, 18 Jun 2024 18:00:12 +0200 Message-ID: <20240618160039.36108-51-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Manos Pitsidianakis Reviewed-by: Cédric Le Goater Reviewed-by: Harsh Prateek Bora Message-Id: <20240610062105.49848-27-philmd@linaro.org> --- include/hw/ppc/pnv_chip.h | 2 +- hw/ppc/pnv.c | 29 +++++++---------------------- 2 files changed, 8 insertions(+), 23 deletions(-) diff --git a/include/hw/ppc/pnv_chip.h b/include/hw/ppc/pnv_chip.h index a5e428be7c..a4ed17ac59 100644 --- a/include/hw/ppc/pnv_chip.h +++ b/include/hw/ppc/pnv_chip.h @@ -154,7 +154,7 @@ struct PnvChipClass { void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, GString *buf); ISABus *(*isa_create)(PnvChip *chip, Error **errp); void (*dt_populate)(PnvChip *chip, void *fdt); - void (*pic_print_info)(PnvChip *chip, Monitor *mon); + void (*pic_print_info)(PnvChip *chip, GString *buf); uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id); uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr); }; diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 9039c1777a..df74f032d7 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -765,14 +765,11 @@ static ISABus *pnv_isa_create(PnvChip *chip, Error **errp) return PNV_CHIP_GET_CLASS(chip)->isa_create(chip, errp); } -static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon) +static void pnv_chip_power8_pic_print_info(PnvChip *chip, GString *buf) { Pnv8Chip *chip8 = PNV8_CHIP(chip); int i; - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; - ics_pic_print_info(&chip8->psi.ics, buf); for (i = 0; i < chip8->num_phbs; i++) { @@ -782,9 +779,6 @@ static void pnv_chip_power8_pic_print_info(PnvChip *chip, Monitor *mon) pnv_phb3_msi_pic_print_info(&phb3->msis, buf); ics_pic_print_info(&phb3->lsis, buf); } - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque) @@ -801,19 +795,14 @@ static int pnv_chip_power9_pic_print_info_child(Object *child, void *opaque) return 0; } -static void pnv_chip_power9_pic_print_info(PnvChip *chip, Monitor *mon) +static void pnv_chip_power9_pic_print_info(PnvChip *chip, GString *buf) { Pnv9Chip *chip9 = PNV9_CHIP(chip); - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; pnv_xive_pic_print_info(&chip9->xive, buf); pnv_psi_pic_print_info(&chip9->psi, buf); object_child_foreach_recursive(OBJECT(chip), pnv_chip_power9_pic_print_info_child, buf); - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } static uint64_t pnv_chip_power8_xscom_core_base(PnvChip *chip, @@ -853,19 +842,14 @@ static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, uint32_t irq) isa_realize_and_unref(dev, bus, &error_fatal); } -static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon) +static void pnv_chip_power10_pic_print_info(PnvChip *chip, GString *buf) { Pnv10Chip *chip10 = PNV10_CHIP(chip); - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; pnv_xive2_pic_print_info(&chip10->xive, buf); pnv_psi_pic_print_info(&chip10->psi, buf); object_child_foreach_recursive(OBJECT(chip), pnv_chip_power9_pic_print_info_child, buf); - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } /* Always give the first 1GB to chip 0 else we won't boot */ @@ -2363,12 +2347,13 @@ static void pnv_pic_print_info(InterruptStatsProvider *obj, PNV_CHIP_GET_CLASS(pnv->chips[0])->intc_print_info(pnv->chips[0], cpu, buf); } - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); for (i = 0; i < pnv->num_chips; i++) { - PNV_CHIP_GET_CLASS(pnv->chips[i])->pic_print_info(pnv->chips[i], mon); + PNV_CHIP_GET_CLASS(pnv->chips[i])->pic_print_info(pnv->chips[i], buf); } + + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } static int pnv_match_nvt(XiveFabric *xfb, uint8_t format, From patchwork Tue Jun 18 16:00:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702602 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24756C2BB85 for ; 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Tue, 18 Jun 2024 09:05:39 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4247101aac6sm17490365e9.0.2024.06.18.09.05.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:05:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?D?= =?utf-8?q?aniel_P_=2E_Berrang=C3=A9?= Subject: [PULL 51/76] hw/intc: Avoid using Monitor in INTERRUPT_STATS_PROVIDER::print_info() Date: Tue, 18 Jun 2024 18:00:13 +0200 Message-ID: <20240618160039.36108-52-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Replace Monitor API by HumanReadableText one (see commit f2de406f29 "docs/devel: document expectations for QAPI data modelling for QMP" for rationale). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Message-Id: <20240610063518.50680-2-philmd@linaro.org> --- include/hw/intc/intc.h | 2 +- hw/intc/goldfish_pic.c | 8 +++--- hw/intc/i8259_common.c | 14 +++++----- hw/intc/ioapic_common.c | 57 +++++++++++++++++++++-------------------- hw/intc/m68k_irqc.c | 5 ++-- hw/intc/slavio_intctl.c | 11 ++++---- hw/ppc/pnv.c | 10 +------- hw/ppc/spapr.c | 10 +------- monitor/hmp-cmds.c | 8 +++++- 9 files changed, 57 insertions(+), 68 deletions(-) diff --git a/include/hw/intc/intc.h b/include/hw/intc/intc.h index 7018f608ca..e40194b8e3 100644 --- a/include/hw/intc/intc.h +++ b/include/hw/intc/intc.h @@ -22,7 +22,7 @@ struct InterruptStatsProviderClass { */ bool (*get_statistics)(InterruptStatsProvider *obj, uint64_t **irq_counts, unsigned int *nb_irqs); - void (*print_info)(InterruptStatsProvider *obj, Monitor *mon); + void (*print_info)(InterruptStatsProvider *obj, GString *buf); }; #endif diff --git a/hw/intc/goldfish_pic.c b/hw/intc/goldfish_pic.c index d662dfeb99..6cc1c69d26 100644 --- a/hw/intc/goldfish_pic.c +++ b/hw/intc/goldfish_pic.c @@ -12,7 +12,6 @@ #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "migration/vmstate.h" -#include "monitor/monitor.h" #include "qemu/log.h" #include "trace.h" #include "hw/intc/intc.h" @@ -39,11 +38,12 @@ static bool goldfish_pic_get_statistics(InterruptStatsProvider *obj, return true; } -static void goldfish_pic_print_info(InterruptStatsProvider *obj, Monitor *mon) +static void goldfish_pic_print_info(InterruptStatsProvider *obj, GString *buf) { GoldfishPICState *s = GOLDFISH_PIC(obj); - monitor_printf(mon, "goldfish-pic.%d: pending=0x%08x enabled=0x%08x\n", - s->idx, s->pending, s->enabled); + g_string_append_printf(buf, + "goldfish-pic.%d: pending=0x%08x enabled=0x%08x\n", + s->idx, s->pending, s->enabled); } static void goldfish_pic_update(GoldfishPICState *s) diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c index ee0041115c..d9558e3940 100644 --- a/hw/intc/i8259_common.c +++ b/hw/intc/i8259_common.c @@ -28,7 +28,6 @@ #include "hw/isa/i8259_internal.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" -#include "monitor/monitor.h" #include "qapi/error.h" static int irq_level[16]; @@ -132,16 +131,17 @@ static bool pic_get_statistics(InterruptStatsProvider *obj, return true; } -static void pic_print_info(InterruptStatsProvider *obj, Monitor *mon) +static void pic_print_info(InterruptStatsProvider *obj, GString *buf) { PICCommonState *s = PIC_COMMON(obj); pic_dispatch_pre_save(s); - monitor_printf(mon, "pic%d: irr=%02x imr=%02x isr=%02x hprio=%d " - "irq_base=%02x rr_sel=%d elcr=%02x fnm=%d\n", - s->master ? 0 : 1, s->irr, s->imr, s->isr, s->priority_add, - s->irq_base, s->read_reg_select, s->elcr, - s->special_fully_nested_mode); + g_string_append_printf(buf, "pic%d: irr=%02x imr=%02x isr=%02x hprio=%d " + "irq_base=%02x rr_sel=%d elcr=%02x fnm=%d\n", + s->master ? 0 : 1, s->irr, s->imr, s->isr, + s->priority_add, + s->irq_base, s->read_reg_select, s->elcr, + s->special_fully_nested_mode); } static bool ltim_state_needed(void *opaque) diff --git a/hw/intc/ioapic_common.c b/hw/intc/ioapic_common.c index efbe6958c8..769896353a 100644 --- a/hw/intc/ioapic_common.c +++ b/hw/intc/ioapic_common.c @@ -23,7 +23,6 @@ #include "qapi/error.h" #include "qemu/module.h" #include "migration/vmstate.h" -#include "monitor/monitor.h" #include "hw/intc/intc.h" #include "hw/intc/ioapic.h" #include "hw/intc/ioapic_internal.h" @@ -59,59 +58,62 @@ static bool ioapic_get_statistics(InterruptStatsProvider *obj, return true; } -static void ioapic_irr_dump(Monitor *mon, const char *name, uint32_t bitmap) +static void ioapic_irr_dump(GString *buf, const char *name, uint32_t bitmap) { int i; - monitor_printf(mon, "%-10s ", name); + g_string_append_printf(buf, "%-10s ", name); if (bitmap == 0) { - monitor_printf(mon, "(none)\n"); + g_string_append_printf(buf, "(none)\n"); return; } for (i = 0; i < IOAPIC_NUM_PINS; i++) { if (bitmap & (1 << i)) { - monitor_printf(mon, "%-2u ", i); + g_string_append_printf(buf, "%-2u ", i); } } - monitor_printf(mon, "\n"); + g_string_append_c(buf, '\n'); } -static void ioapic_print_redtbl(Monitor *mon, IOAPICCommonState *s) +static void ioapic_print_redtbl(GString *buf, IOAPICCommonState *s) { static const char *delm_str[] = { "fixed", "lowest", "SMI", "...", "NMI", "INIT", "...", "extINT"}; uint32_t remote_irr = 0; int i; - monitor_printf(mon, "ioapic0: ver=0x%x id=0x%02x sel=0x%02x", - s->version, s->id, s->ioregsel); + g_string_append_printf(buf, "ioapic0: ver=0x%x id=0x%02x sel=0x%02x", + s->version, s->id, s->ioregsel); if (s->ioregsel) { - monitor_printf(mon, " (redir[%u])\n", - (s->ioregsel - IOAPIC_REG_REDTBL_BASE) >> 1); + g_string_append_printf(buf, " (redir[%u])\n", + (s->ioregsel - IOAPIC_REG_REDTBL_BASE) >> 1); } else { - monitor_printf(mon, "\n"); + g_string_append_c(buf, '\n'); } for (i = 0; i < IOAPIC_NUM_PINS; i++) { uint64_t entry = s->ioredtbl[i]; uint32_t delm = (uint32_t)((entry & IOAPIC_LVT_DELIV_MODE) >> IOAPIC_LVT_DELIV_MODE_SHIFT); - monitor_printf(mon, " pin %-2u 0x%016"PRIx64" dest=%"PRIx64 - " vec=%-3"PRIu64" %s %-5s %-6s %-6s %s\n", - i, entry, - (entry >> IOAPIC_LVT_DEST_SHIFT) & - (entry & IOAPIC_LVT_DEST_MODE ? 0xff : 0xf), - entry & IOAPIC_VECTOR_MASK, - entry & IOAPIC_LVT_POLARITY ? "active-lo" : "active-hi", - entry & IOAPIC_LVT_TRIGGER_MODE ? "level" : "edge", - entry & IOAPIC_LVT_MASKED ? "masked" : "", - delm_str[delm], - entry & IOAPIC_LVT_DEST_MODE ? "logical" : "physical"); + g_string_append_printf(buf, " pin %-2u 0x%016"PRIx64" dest=%"PRIx64 + " vec=%-3"PRIu64" %s %-5s %-6s %-6s %s\n", + i, entry, + (entry >> IOAPIC_LVT_DEST_SHIFT) & + (entry & IOAPIC_LVT_DEST_MODE ? 0xff : 0xf), + entry & IOAPIC_VECTOR_MASK, + entry & IOAPIC_LVT_POLARITY + ? "active-lo" : "active-hi", + entry & IOAPIC_LVT_TRIGGER_MODE + ? "level" : "edge", + entry & IOAPIC_LVT_MASKED ? "masked" : "", + delm_str[delm], + entry & IOAPIC_LVT_DEST_MODE + ? "logical" : "physical"); remote_irr |= entry & IOAPIC_LVT_TRIGGER_MODE ? (entry & IOAPIC_LVT_REMOTE_IRR ? (1 << i) : 0) : 0; } - ioapic_irr_dump(mon, " IRR", s->irr); - ioapic_irr_dump(mon, " Remote IRR", remote_irr); + ioapic_irr_dump(buf, " IRR", s->irr); + ioapic_irr_dump(buf, " Remote IRR", remote_irr); } void ioapic_reset_common(DeviceState *dev) @@ -171,13 +173,12 @@ static void ioapic_common_realize(DeviceState *dev, Error **errp) ioapic_no++; } -static void ioapic_print_info(InterruptStatsProvider *obj, - Monitor *mon) +static void ioapic_print_info(InterruptStatsProvider *obj, GString *buf) { IOAPICCommonState *s = IOAPIC_COMMON(obj); ioapic_dispatch_pre_save(s); - ioapic_print_redtbl(mon, s); + ioapic_print_redtbl(buf, s); } static const VMStateDescription vmstate_ioapic_common = { diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c index 4b11fb9f72..cf3beefcfe 100644 --- a/hw/intc/m68k_irqc.c +++ b/hw/intc/m68k_irqc.c @@ -10,7 +10,6 @@ #include "qemu/osdep.h" #include "cpu.h" #include "migration/vmstate.h" -#include "monitor/monitor.h" #include "hw/qdev-properties.h" #include "hw/nmi.h" #include "hw/intc/intc.h" @@ -27,10 +26,10 @@ static bool m68k_irqc_get_statistics(InterruptStatsProvider *obj, return true; } -static void m68k_irqc_print_info(InterruptStatsProvider *obj, Monitor *mon) +static void m68k_irqc_print_info(InterruptStatsProvider *obj, GString *buf) { M68KIRQCState *s = M68K_IRQC(obj); - monitor_printf(mon, "m68k-irqc: ipr=0x%x\n", s->ipr); + g_string_append_printf(buf, "m68k-irqc: ipr=0x%x\n", s->ipr); } static void m68k_set_irq(void *opaque, int irq, int level) diff --git a/hw/intc/slavio_intctl.c b/hw/intc/slavio_intctl.c index 36b4a12f60..d6e49d29aa 100644 --- a/hw/intc/slavio_intctl.c +++ b/hw/intc/slavio_intctl.c @@ -24,7 +24,6 @@ #include "qemu/osdep.h" #include "migration/vmstate.h" -#include "monitor/monitor.h" #include "qemu/module.h" #include "hw/sysbus.h" #include "hw/intc/intc.h" @@ -401,17 +400,17 @@ static bool slavio_intctl_get_statistics(InterruptStatsProvider *obj, } #endif -static void slavio_intctl_print_info(InterruptStatsProvider *obj, Monitor *mon) +static void slavio_intctl_print_info(InterruptStatsProvider *obj, GString *buf) { SLAVIO_INTCTLState *s = SLAVIO_INTCTL(obj); int i; for (i = 0; i < MAX_CPUS; i++) { - monitor_printf(mon, "per-cpu %d: pending 0x%08x\n", i, - s->slaves[i].intreg_pending); + g_string_append_printf(buf, "per-cpu %d: pending 0x%08x\n", i, + s->slaves[i].intreg_pending); } - monitor_printf(mon, "master: pending 0x%08x, disabled 0x%08x\n", - s->intregm_pending, s->intregm_disabled); + g_string_append_printf(buf, "master: pending 0x%08x, disabled 0x%08x\n", + s->intregm_pending, s->intregm_disabled); } static void slavio_intctl_init(Object *obj) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index df74f032d7..03c595788f 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -38,8 +38,6 @@ #include "hw/loader.h" #include "hw/nmi.h" #include "qapi/visitor.h" -#include "qapi/type-helpers.h" -#include "monitor/monitor.h" #include "hw/intc/intc.h" #include "hw/ipmi/ipmi.h" #include "target/ppc/mmu-hash64.h" @@ -2331,14 +2329,11 @@ static ICPState *pnv_icp_get(XICSFabric *xi, int pir) return cpu ? ICP(pnv_cpu_state(cpu)->intc) : NULL; } -static void pnv_pic_print_info(InterruptStatsProvider *obj, - Monitor *mon) +static void pnv_pic_print_info(InterruptStatsProvider *obj, GString *buf) { PnvMachineState *pnv = PNV_MACHINE(obj); int i; CPUState *cs; - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; CPU_FOREACH(cs) { PowerPCCPU *cpu = POWERPC_CPU(cs); @@ -2351,9 +2346,6 @@ static void pnv_pic_print_info(InterruptStatsProvider *obj, for (i = 0; i < pnv->num_chips; i++) { PNV_CHIP_GET_CLASS(pnv->chips[i])->pic_print_info(pnv->chips[i], buf); } - - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } static int pnv_match_nvt(XiveFabric *xfb, uint8_t format, diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index a22decb643..a9908545e6 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -31,7 +31,6 @@ #include "qapi/error.h" #include "qapi/qapi-events-machine.h" #include "qapi/qapi-events-qdev.h" -#include "qapi/type-helpers.h" #include "qapi/visitor.h" #include "sysemu/sysemu.h" #include "sysemu/hostmem.h" @@ -90,8 +89,6 @@ #include "hw/ppc/spapr_nvdimm.h" #include "hw/ppc/spapr_numa.h" -#include "monitor/monitor.h" - #include /* SLOF memory layout: @@ -4527,18 +4524,13 @@ static ICPState *spapr_icp_get(XICSFabric *xi, int vcpu_id) return cpu ? spapr_cpu_state(cpu)->icp : NULL; } -static void spapr_pic_print_info(InterruptStatsProvider *obj, - Monitor *mon) +static void spapr_pic_print_info(InterruptStatsProvider *obj, GString *buf) { SpaprMachineState *spapr = SPAPR_MACHINE(obj); - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; spapr_irq_print_info(spapr, buf); g_string_append_printf(buf, "irqchip: %s\n", kvm_irqchip_in_kernel() ? "in-kernel" : "emulated"); - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); } /* diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c index ea79148ee8..fbff7fdb57 100644 --- a/monitor/hmp-cmds.c +++ b/monitor/hmp-cmds.c @@ -25,6 +25,7 @@ #include "qapi/qapi-commands-machine.h" #include "qapi/qapi-commands-misc.h" #include "qapi/qmp/qdict.h" +#include "qapi/type-helpers.h" #include "qemu/cutils.h" #include "hw/intc/intc.h" #include "qemu/log.h" @@ -92,7 +93,12 @@ static int hmp_info_pic_foreach(Object *obj, void *opaque) intc = INTERRUPT_STATS_PROVIDER(obj); k = INTERRUPT_STATS_PROVIDER_GET_CLASS(obj); if (k->print_info) { - k->print_info(intc, mon); + g_autoptr(GString) buf = g_string_new(""); + g_autoptr(HumanReadableText) info = NULL; + + k->print_info(intc, buf); + info = human_readable_text_from_str(buf); + monitor_puts(mon, info->human_readable_text); } else { monitor_printf(mon, "Interrupt controller information not available for %s.\n", object_get_typename(obj)); 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Tue, 18 Jun 2024 09:05:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?D?= =?utf-8?q?aniel_P_=2E_Berrang=C3=A9?= Subject: [PULL 52/76] hw/intc: Introduce x-query-interrupt-controllers QMP command Date: Tue, 18 Jun 2024 18:00:14 +0200 Message-ID: <20240618160039.36108-53-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This is a counterpart to the HMP "info pic" command. It is being added with an "x-" prefix because this QMP command is intended as an adhoc debugging tool and will thus not be modelled in QAPI as fully structured data, nor will it have long term guaranteed stability. The existing HMP command is rewritten to call the QMP command. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Message-Id: <20240610063518.50680-3-philmd@linaro.org> --- qapi/machine.json | 17 +++++++++++++++++ hw/core/machine-qmp-cmds.c | 29 +++++++++++++++++++++++++++++ monitor/hmp-cmds.c | 33 --------------------------------- hmp-commands-info.hx | 2 +- 4 files changed, 47 insertions(+), 34 deletions(-) diff --git a/qapi/machine.json b/qapi/machine.json index 453feb9347..2fd3e9c3d5 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -1864,3 +1864,20 @@ { 'command': 'dumpdtb', 'data': { 'filename': 'str' }, 'if': 'CONFIG_FDT' } + +## +# @x-query-interrupt-controllers: +# +# Query information on interrupt controller devices +# +# Features: +# +# @unstable: This command is meant for debugging. +# +# Returns: Interrupt controller devices information +# +# Since: 9.1 +## +{ 'command': 'x-query-interrupt-controllers', + 'returns': 'HumanReadableText', + 'features': [ 'unstable' ]} diff --git a/hw/core/machine-qmp-cmds.c b/hw/core/machine-qmp-cmds.c index 5972100b1f..130217da8f 100644 --- a/hw/core/machine-qmp-cmds.c +++ b/hw/core/machine-qmp-cmds.c @@ -361,6 +361,35 @@ HumanReadableText *qmp_x_query_irq(Error **errp) return human_readable_text_from_str(buf); } +static int qmp_x_query_intc_foreach(Object *obj, void *opaque) +{ + InterruptStatsProvider *intc; + InterruptStatsProviderClass *k; + GString *buf = opaque; + + if (object_dynamic_cast(obj, TYPE_INTERRUPT_STATS_PROVIDER)) { + intc = INTERRUPT_STATS_PROVIDER(obj); + k = INTERRUPT_STATS_PROVIDER_GET_CLASS(obj); + if (k->print_info) { + k->print_info(intc, buf); + } else { + g_string_append_printf(buf, + "Interrupt controller information not available for %s.\n", + object_get_typename(obj)); + } + } + + return 0; +} + +HumanReadableText *qmp_x_query_interrupt_controllers(Error **errp) +{ + g_autoptr(GString) buf = g_string_new(""); + object_child_foreach_recursive(object_get_root(), + qmp_x_query_intc_foreach, buf); + return human_readable_text_from_str(buf); +} + GuidInfo *qmp_query_vm_generation_id(Error **errp) { GuidInfo *info; diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c index fbff7fdb57..45ee3a9e1f 100644 --- a/monitor/hmp-cmds.c +++ b/monitor/hmp-cmds.c @@ -25,9 +25,7 @@ #include "qapi/qapi-commands-machine.h" #include "qapi/qapi-commands-misc.h" #include "qapi/qmp/qdict.h" -#include "qapi/type-helpers.h" #include "qemu/cutils.h" -#include "hw/intc/intc.h" #include "qemu/log.h" #include "sysemu/sysemu.h" @@ -83,37 +81,6 @@ void hmp_info_version(Monitor *mon, const QDict *qdict) qapi_free_VersionInfo(info); } -static int hmp_info_pic_foreach(Object *obj, void *opaque) -{ - InterruptStatsProvider *intc; - InterruptStatsProviderClass *k; - Monitor *mon = opaque; - - if (object_dynamic_cast(obj, TYPE_INTERRUPT_STATS_PROVIDER)) { - intc = INTERRUPT_STATS_PROVIDER(obj); - k = INTERRUPT_STATS_PROVIDER_GET_CLASS(obj); - if (k->print_info) { - g_autoptr(GString) buf = g_string_new(""); - g_autoptr(HumanReadableText) info = NULL; - - k->print_info(intc, buf); - info = human_readable_text_from_str(buf); - monitor_puts(mon, info->human_readable_text); - } else { - monitor_printf(mon, "Interrupt controller information not available for %s.\n", - object_get_typename(obj)); - } - } - - return 0; -} - -void hmp_info_pic(Monitor *mon, const QDict *qdict) -{ - object_child_foreach_recursive(object_get_root(), - hmp_info_pic_foreach, mon); -} - void hmp_quit(Monitor *mon, const QDict *qdict) { monitor_suspend(mon); diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx index 20a9835ea8..cfd4ad5651 100644 --- a/hmp-commands-info.hx +++ b/hmp-commands-info.hx @@ -174,7 +174,7 @@ ERST .args_type = "", .params = "", .help = "show PIC state", - .cmd = hmp_info_pic, + .cmd_info_hrt = qmp_x_query_interrupt_controllers, }, SRST From patchwork Tue Jun 18 16:00:15 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:05:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Nicholas Piggin , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 53/76] ppc/pnv: Introduce pnv_chip_foreach_cpu() Date: Tue, 18 Jun 2024 18:00:15 +0200 Message-ID: <20240618160039.36108-54-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=philmd@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Cédric Le Goater This helper routine uses the machine definition, sockets, cores and threads, to loop on all CPUs of the machine. Replace CPU_FOREACH() with it. Signed-off-by: Cédric Le Goater Reviewed-by: Nicholas Piggin Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240424093048.180966-1-clg@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/ppc/pnv.c | 50 +++++++++++++++++++++++++++++++++++++------------- 1 file changed, 37 insertions(+), 13 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 03c595788f..6b41d1d2dd 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -2261,6 +2261,21 @@ PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir) return NULL; } +static void pnv_chip_foreach_cpu(PnvChip *chip, + void (*fn)(PnvChip *chip, PowerPCCPU *cpu, void *opaque), + void *opaque) +{ + int i, j; + + for (i = 0; i < chip->nr_cores; i++) { + PnvCore *pc = chip->cores[i]; + + for (j = 0; j < CPU_CORE(pc)->nr_threads; j++) { + fn(chip, pc->threads[j], opaque); + } + } +} + static ICSState *pnv_ics_get(XICSFabric *xi, int irq) { PnvMachineState *pnv = PNV_MACHINE(xi); @@ -2329,22 +2344,25 @@ static ICPState *pnv_icp_get(XICSFabric *xi, int pir) return cpu ? ICP(pnv_cpu_state(cpu)->intc) : NULL; } +static void pnv_pic_intc_print_info(PnvChip *chip, PowerPCCPU *cpu, + void *opaque) +{ + PNV_CHIP_GET_CLASS(chip)->intc_print_info(chip, cpu, opaque); +} + static void pnv_pic_print_info(InterruptStatsProvider *obj, GString *buf) { PnvMachineState *pnv = PNV_MACHINE(obj); int i; - CPUState *cs; - - CPU_FOREACH(cs) { - PowerPCCPU *cpu = POWERPC_CPU(cs); - - /* XXX: loop on each chip/core/thread instead of CPU_FOREACH() */ - PNV_CHIP_GET_CLASS(pnv->chips[0])->intc_print_info(pnv->chips[0], cpu, - buf); - } for (i = 0; i < pnv->num_chips; i++) { - PNV_CHIP_GET_CLASS(pnv->chips[i])->pic_print_info(pnv->chips[i], buf); + PnvChip *chip = pnv->chips[i]; + + /* First CPU presenters */ + pnv_chip_foreach_cpu(chip, pnv_pic_intc_print_info, buf); + + /* Then other devices, PHB, PSI, XIVE */ + PNV_CHIP_GET_CLASS(chip)->pic_print_info(chip, buf); } } @@ -2545,12 +2563,18 @@ static void pnv_cpu_do_nmi_on_cpu(CPUState *cs, run_on_cpu_data arg) } } +static void pnv_cpu_do_nmi(PnvChip *chip, PowerPCCPU *cpu, void *opaque) +{ + async_run_on_cpu(CPU(cpu), pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_NULL); +} + static void pnv_nmi(NMIState *n, int cpu_index, Error **errp) { - CPUState *cs; + PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine()); + int i; - CPU_FOREACH(cs) { - async_run_on_cpu(cs, pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_NULL); + for (i = 0; i < pnv->num_chips; i++) { + pnv_chip_foreach_cpu(pnv->chips[i], pnv_cpu_do_nmi, NULL); } } From patchwork Tue Jun 18 16:00:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702593 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6D303C27C4F for ; Tue, 18 Jun 2024 16:08:00 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbLb-0006gM-4r; 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Tue, 18 Jun 2024 09:05:56 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4246b67f0aesm60973935e9.45.2024.06.18.09.05.54 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:05:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Richard Henderson Subject: [PULL 54/76] target/arm: Set arm_v7m_tcg_ops cpu_exec_halt to arm_cpu_exec_halt() Date: Tue, 18 Jun 2024 18:00:16 +0200 Message-ID: <20240618160039.36108-55-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=philmd@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Peter Maydell In commit a96edb687e76 we set the cpu_exec_halt field of the TCGCPUOps arm_tcg_ops to arm_cpu_exec_halt(), but we left the arm_v7m_tcg_ops struct unchanged. That isn't wrong, because for M-profile FEAT_WFxT doesn't exist and the default handling for "no cpu_exec_halt method" is correct, but it's perhaps a little confusing. We would also like to make setting the cpu_exec_halt method mandatory. Initialize arm_v7m_tcg_ops cpu_exec_halt to the same function we use for A-profile. (On M-profile we never set up the wfxt timer so there is no change in behaviour here.) Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-ID: <20240603160933.1141717-2-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- target/arm/internals.h | 3 +++ target/arm/cpu.c | 2 +- target/arm/tcg/cpu-v7m.c | 1 + 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 11b5da2562..e45ccd983e 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -364,6 +364,9 @@ void arm_restore_state_to_opc(CPUState *cs, #ifdef CONFIG_TCG void arm_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb); + +/* Our implementation of TCGCPUOps::cpu_exec_halt */ +bool arm_cpu_exec_halt(CPUState *cs); #endif /* CONFIG_TCG */ typedef enum ARMFPRounding { diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 35fa281f1b..948e904bd8 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1133,7 +1133,7 @@ static bool arm_cpu_virtio_is_big_endian(CPUState *cs) } #ifdef CONFIG_TCG -static bool arm_cpu_exec_halt(CPUState *cs) +bool arm_cpu_exec_halt(CPUState *cs) { bool leave_halt = cpu_has_work(cs); diff --git a/target/arm/tcg/cpu-v7m.c b/target/arm/tcg/cpu-v7m.c index c059c681e9..5496f14dc1 100644 --- a/target/arm/tcg/cpu-v7m.c +++ b/target/arm/tcg/cpu-v7m.c @@ -244,6 +244,7 @@ static const TCGCPUOps arm_v7m_tcg_ops = { #else .tlb_fill = arm_cpu_tlb_fill, .cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt, + .cpu_exec_halt = arm_cpu_exec_halt, .do_interrupt = arm_v7m_cpu_do_interrupt, .do_transaction_failed = arm_cpu_do_transaction_failed, .do_unaligned_access = arm_cpu_do_unaligned_access, From patchwork Tue Jun 18 16:00:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702633 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 98973C27C4F for ; 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Tue, 18 Jun 2024 09:06:02 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-362c19d798bsm650072f8f.40.2024.06.18.09.06.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:06:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Richard Henderson Subject: [PULL 55/76] target: Set TCGCPUOps::cpu_exec_halt to target's has_work implementation Date: Tue, 18 Jun 2024 18:00:17 +0200 Message-ID: <20240618160039.36108-56-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Peter Maydell Currently the TCGCPUOps::cpu_exec_halt method is optional, and if it is not set then the default is to call the CPUClass::has_work method (which has an identical function signature). We would like to make the cpu_exec_halt method mandatory so we can remove the runtime check and fallback handling. In preparation for that, make all the targets which don't need special handling in their cpu_exec_halt set it to their cpu_has_work implementation instead of leaving it unset. (This is every target except for arm and i386.) In the riscv case this requires us to make the function not be local to the source file it's defined in. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-ID: <20240603160933.1141717-3-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- target/riscv/internals.h | 3 +++ target/alpha/cpu.c | 1 + target/avr/cpu.c | 1 + target/cris/cpu.c | 2 ++ target/hppa/cpu.c | 1 + target/loongarch/cpu.c | 1 + target/m68k/cpu.c | 1 + target/microblaze/cpu.c | 1 + target/mips/cpu.c | 1 + target/openrisc/cpu.c | 1 + target/ppc/cpu_init.c | 2 ++ target/riscv/cpu.c | 2 +- target/riscv/tcg/tcg-cpu.c | 2 ++ target/rx/cpu.c | 1 + target/s390x/cpu.c | 1 + target/sh4/cpu.c | 1 + target/sparc/cpu.c | 1 + target/xtensa/cpu.c | 1 + 18 files changed, 23 insertions(+), 1 deletion(-) diff --git a/target/riscv/internals.h b/target/riscv/internals.h index 8239ae83cc..0ac17bc5ad 100644 --- a/target/riscv/internals.h +++ b/target/riscv/internals.h @@ -136,4 +136,7 @@ static inline float16 check_nanbox_h(CPURISCVState *env, uint64_t f) } } +/* Our implementation of CPUClass::has_work */ +bool riscv_cpu_has_work(CPUState *cs); + #endif diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 0e2fbcb397..9db1dffc03 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -219,6 +219,7 @@ static const TCGCPUOps alpha_tcg_ops = { #else .tlb_fill = alpha_cpu_tlb_fill, .cpu_exec_interrupt = alpha_cpu_exec_interrupt, + .cpu_exec_halt = alpha_cpu_has_work, .do_interrupt = alpha_cpu_do_interrupt, .do_transaction_failed = alpha_cpu_do_transaction_failed, .do_unaligned_access = alpha_cpu_do_unaligned_access, diff --git a/target/avr/cpu.c b/target/avr/cpu.c index f53e1192b1..3132842d56 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -210,6 +210,7 @@ static const TCGCPUOps avr_tcg_ops = { .synchronize_from_tb = avr_cpu_synchronize_from_tb, .restore_state_to_opc = avr_restore_state_to_opc, .cpu_exec_interrupt = avr_cpu_exec_interrupt, + .cpu_exec_halt = avr_cpu_has_work, .tlb_fill = avr_cpu_tlb_fill, .do_interrupt = avr_cpu_do_interrupt, }; diff --git a/target/cris/cpu.c b/target/cris/cpu.c index 535ec39c73..ff31ca7fbc 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -186,6 +186,7 @@ static const TCGCPUOps crisv10_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = cris_cpu_tlb_fill, .cpu_exec_interrupt = cris_cpu_exec_interrupt, + .cpu_exec_halt = cris_cpu_has_work, .do_interrupt = crisv10_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ }; @@ -197,6 +198,7 @@ static const TCGCPUOps crisv32_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = cris_cpu_tlb_fill, .cpu_exec_interrupt = cris_cpu_exec_interrupt, + .cpu_exec_halt = cris_cpu_has_work, .do_interrupt = cris_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ }; diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index f0507874ce..7cf2e2f266 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -228,6 +228,7 @@ static const TCGCPUOps hppa_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = hppa_cpu_tlb_fill, .cpu_exec_interrupt = hppa_cpu_exec_interrupt, + .cpu_exec_halt = hppa_cpu_has_work, .do_interrupt = hppa_cpu_do_interrupt, .do_unaligned_access = hppa_cpu_do_unaligned_access, .do_transaction_failed = hppa_cpu_do_transaction_failed, diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 270f711f11..69f9ad7711 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -736,6 +736,7 @@ static const TCGCPUOps loongarch_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = loongarch_cpu_tlb_fill, .cpu_exec_interrupt = loongarch_cpu_exec_interrupt, + .cpu_exec_halt = loongarch_cpu_has_work, .do_interrupt = loongarch_cpu_do_interrupt, .do_transaction_failed = loongarch_cpu_do_transaction_failed, #endif diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index efd6bbded8..1d49f4cb23 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -536,6 +536,7 @@ static const TCGCPUOps m68k_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = m68k_cpu_tlb_fill, .cpu_exec_interrupt = m68k_cpu_exec_interrupt, + .cpu_exec_halt = m68k_cpu_has_work, .do_interrupt = m68k_cpu_do_interrupt, .do_transaction_failed = m68k_cpu_transaction_failed, #endif /* !CONFIG_USER_ONLY */ diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 41ad47d04c..135947ee80 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -413,6 +413,7 @@ static const TCGCPUOps mb_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = mb_cpu_tlb_fill, .cpu_exec_interrupt = mb_cpu_exec_interrupt, + .cpu_exec_halt = mb_cpu_has_work, .do_interrupt = mb_cpu_do_interrupt, .do_transaction_failed = mb_cpu_transaction_failed, .do_unaligned_access = mb_cpu_do_unaligned_access, diff --git a/target/mips/cpu.c b/target/mips/cpu.c index bbe01d07dd..89655b1900 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -555,6 +555,7 @@ static const TCGCPUOps mips_tcg_ops = { #if !defined(CONFIG_USER_ONLY) .tlb_fill = mips_cpu_tlb_fill, .cpu_exec_interrupt = mips_cpu_exec_interrupt, + .cpu_exec_halt = mips_cpu_has_work, .do_interrupt = mips_cpu_do_interrupt, .do_transaction_failed = mips_cpu_do_transaction_failed, .do_unaligned_access = mips_cpu_do_unaligned_access, diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index fdaaa09fc8..6ec54ad7a6 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -233,6 +233,7 @@ static const TCGCPUOps openrisc_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = openrisc_cpu_tlb_fill, .cpu_exec_interrupt = openrisc_cpu_exec_interrupt, + .cpu_exec_halt = openrisc_cpu_has_work, .do_interrupt = openrisc_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ }; diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 01e358a4a5..cdada7987d 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -1,3 +1,4 @@ + /* * PowerPC CPU initialization for qemu. * @@ -7481,6 +7482,7 @@ static const TCGCPUOps ppc_tcg_ops = { #else .tlb_fill = ppc_cpu_tlb_fill, .cpu_exec_interrupt = ppc_cpu_exec_interrupt, + .cpu_exec_halt = ppc_cpu_has_work, .do_interrupt = ppc_cpu_do_interrupt, .cpu_exec_enter = ppc_cpu_exec_enter, .cpu_exec_exit = ppc_cpu_exec_exit, diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 69a08e8c2c..a849a0ffcb 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -903,7 +903,7 @@ static vaddr riscv_cpu_get_pc(CPUState *cs) return env->pc; } -static bool riscv_cpu_has_work(CPUState *cs) +bool riscv_cpu_has_work(CPUState *cs) { #ifndef CONFIG_USER_ONLY RISCVCPU *cpu = RISCV_CPU(cs); diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 683f604d9f..4fe6d2f09d 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -21,6 +21,7 @@ #include "exec/exec-all.h" #include "tcg-cpu.h" #include "cpu.h" +#include "internals.h" #include "pmu.h" #include "time_helper.h" #include "qapi/error.h" @@ -137,6 +138,7 @@ static const TCGCPUOps riscv_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = riscv_cpu_tlb_fill, .cpu_exec_interrupt = riscv_cpu_exec_interrupt, + .cpu_exec_halt = riscv_cpu_has_work, .do_interrupt = riscv_cpu_do_interrupt, .do_transaction_failed = riscv_cpu_do_transaction_failed, .do_unaligned_access = riscv_cpu_do_unaligned_access, diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 8a584f0a11..36d2a6f189 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -192,6 +192,7 @@ static const TCGCPUOps rx_tcg_ops = { #ifndef CONFIG_USER_ONLY .cpu_exec_interrupt = rx_cpu_exec_interrupt, + .cpu_exec_halt = rx_cpu_has_work, .do_interrupt = rx_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ }; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 2bbeaca36e..0fbfcd35d8 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -370,6 +370,7 @@ static const TCGCPUOps s390_tcg_ops = { #else .tlb_fill = s390_cpu_tlb_fill, .cpu_exec_interrupt = s390_cpu_exec_interrupt, + .cpu_exec_halt = s390_cpu_has_work, .do_interrupt = s390_cpu_do_interrupt, .debug_excp_handler = s390x_cpu_debug_excp_handler, .do_unaligned_access = s390x_cpu_do_unaligned_access, diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 618aa7154e..8f07261dcf 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -254,6 +254,7 @@ static const TCGCPUOps superh_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = superh_cpu_tlb_fill, .cpu_exec_interrupt = superh_cpu_exec_interrupt, + .cpu_exec_halt = superh_cpu_has_work, .do_interrupt = superh_cpu_do_interrupt, .do_unaligned_access = superh_cpu_do_unaligned_access, .io_recompile_replay_branch = superh_io_recompile_replay_branch, diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 9bacfb68cb..54cb269e0a 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -926,6 +926,7 @@ static const TCGCPUOps sparc_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = sparc_cpu_tlb_fill, .cpu_exec_interrupt = sparc_cpu_exec_interrupt, + .cpu_exec_halt = sparc_cpu_has_work, .do_interrupt = sparc_cpu_do_interrupt, .do_transaction_failed = sparc_cpu_do_transaction_failed, .do_unaligned_access = sparc_cpu_do_unaligned_access, diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index de907cfeb1..a08c7a0b1f 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -234,6 +234,7 @@ static const TCGCPUOps xtensa_tcg_ops = { #ifndef CONFIG_USER_ONLY .tlb_fill = xtensa_cpu_tlb_fill, .cpu_exec_interrupt = xtensa_cpu_exec_interrupt, + .cpu_exec_halt = xtensa_cpu_has_work, .do_interrupt = xtensa_cpu_do_interrupt, .do_transaction_failed = xtensa_cpu_do_transaction_failed, .do_unaligned_access = xtensa_cpu_do_unaligned_access, From patchwork Tue Jun 18 16:00:18 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:06:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Richard Henderson Subject: [PULL 56/76] accel/tcg: Make TCGCPUOps::cpu_exec_halt mandatory Date: Tue, 18 Jun 2024 18:00:18 +0200 Message-ID: <20240618160039.36108-57-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Peter Maydell Now that all targets set TCGCPUOps::cpu_exec_halt, we can make it mandatory and remove the fallback handling that calls cpu_has_work. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-ID: <20240603160933.1141717-4-peter.maydell@linaro.org> [PMD: Add assert(cpu_exec_halt) call in tcg_exec_realizefn] Signed-off-by: Philippe Mathieu-Daudé --- include/hw/core/tcg-cpu-ops.h | 9 ++++++--- accel/tcg/cpu-exec.c | 12 ++++++------ 2 files changed, 12 insertions(+), 9 deletions(-) diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index 099de3375e..34318cf0e6 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -122,10 +122,13 @@ struct TCGCPUOps { * to do when the CPU is in the halted state. * * Return true to indicate that the CPU should now leave halt, false - * if it should remain in the halted state. + * if it should remain in the halted state. (This should generally + * be the same value that cpu_has_work() would return.) * - * If this method is not provided, the default is to do nothing, and - * to leave halt if cpu_has_work() returns true. + * This method must be provided. If the target does not need to + * do anything special for halt, the same function used for its + * CPUClass::has_work method can be used here, as they have the + * same function signature. */ bool (*cpu_exec_halt)(CPUState *cpu); /** diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 6711b58e0b..f7f8683a1b 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -682,13 +682,8 @@ static inline bool cpu_handle_halt(CPUState *cpu) #ifndef CONFIG_USER_ONLY if (cpu->halted) { const TCGCPUOps *tcg_ops = cpu->cc->tcg_ops; - bool leave_halt; + bool leave_halt = tcg_ops->cpu_exec_halt(cpu); - if (tcg_ops->cpu_exec_halt) { - leave_halt = tcg_ops->cpu_exec_halt(cpu); - } else { - leave_halt = cpu_has_work(cpu); - } if (!leave_halt) { return true; } @@ -1082,6 +1077,11 @@ bool tcg_exec_realizefn(CPUState *cpu, Error **errp) static bool tcg_target_initialized; if (!tcg_target_initialized) { + /* Check mandatory TCGCPUOps handlers */ +#ifndef CONFIG_USER_ONLY + assert(cpu->cc->tcg_ops->cpu_exec_halt); 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Xu Message-Id: <20240612132532.85928-2-philmd@linaro.org> --- include/exec/memory.h | 2 +- system/memory.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 1be58f694c..2bf5e23b6a 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1852,7 +1852,7 @@ void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, * range. */ void memory_region_notify_iommu_one(IOMMUNotifier *notifier, - IOMMUTLBEvent *event); + const IOMMUTLBEvent *event); /** * memory_region_unmap_iommu_notifier_range: notify a unmap for an IOMMU diff --git a/system/memory.c b/system/memory.c index 74cd73ebc7..f3a37c97c1 100644 --- a/system/memory.c +++ b/system/memory.c @@ -2006,9 +2006,9 @@ void memory_region_unregister_iommu_notifier(MemoryRegion *mr, } void memory_region_notify_iommu_one(IOMMUNotifier *notifier, - IOMMUTLBEvent *event) + const IOMMUTLBEvent *event) { - IOMMUTLBEntry *entry = &event->entry; + const IOMMUTLBEntry *entry = &event->entry; hwaddr entry_end = entry->iova + entry->addr_mask; IOMMUTLBEntry tmp = *entry; From patchwork Tue Jun 18 16:00:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702627 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 17FDCC27C4F for ; Tue, 18 Jun 2024 16:11:39 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbLl-0007dt-0U; Tue, 18 Jun 2024 12:06:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbLi-0007M8-Gy for qemu-devel@nongnu.org; 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Xu Message-Id: <20240612132532.85928-3-philmd@linaro.org> --- include/exec/memory.h | 2 +- system/memory.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 2bf5e23b6a..2d7c278b9f 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -1837,7 +1837,7 @@ uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr); */ void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, int iommu_idx, - IOMMUTLBEvent event); + const IOMMUTLBEvent event); /** * memory_region_notify_iommu_one: notify a change in an IOMMU translation diff --git a/system/memory.c b/system/memory.c index f3a37c97c1..47c600df63 100644 --- a/system/memory.c +++ b/system/memory.c @@ -2052,7 +2052,7 @@ void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *notifier) void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, int iommu_idx, - IOMMUTLBEvent event) + const IOMMUTLBEvent event) { IOMMUNotifier *iommu_notifier; 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Tue, 18 Jun 2024 09:06:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Peter Xu Subject: [PULL 59/76] hw/i386/iommu: Constify IOMMUTLBEvent in vtd_page_walk_hook prototype Date: Tue, 18 Jun 2024 18:00:21 +0200 Message-ID: <20240618160039.36108-60-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12d; envelope-from=philmd@linaro.org; helo=mail-lf1-x12d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org @event access is read-only. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Xu Message-Id: <20240612132532.85928-4-philmd@linaro.org> --- hw/i386/intel_iommu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index cc8e59674e..c4350e0ff0 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1170,7 +1170,7 @@ static int vtd_iova_to_slpte(IntelIOMMUState *s, VTDContextEntry *ce, } } -typedef int (*vtd_page_walk_hook)(IOMMUTLBEvent *event, void *private); +typedef int (*vtd_page_walk_hook)(const IOMMUTLBEvent *event, void *private); /** * Constant information used during page walking @@ -1533,7 +1533,7 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s, uint8_t bus_num, return 0; } -static int vtd_sync_shadow_page_hook(IOMMUTLBEvent *event, +static int vtd_sync_shadow_page_hook(const IOMMUTLBEvent *event, void *private) { memory_region_notify_iommu(private, 0, *event); @@ -2219,7 +2219,7 @@ static void vtd_iotlb_page_invalidate_notify(IntelIOMMUState *s, * page tables. We just deliver the PSI down to * invalidate caches. */ - IOMMUTLBEvent event = { + const IOMMUTLBEvent event = { .type = IOMMU_NOTIFIER_UNMAP, .entry = { .target_as = &address_space_memory, @@ -3889,7 +3889,7 @@ static void vtd_address_space_refresh_all(IntelIOMMUState *s) vtd_switch_address_space_all(s); } -static int vtd_replay_hook(IOMMUTLBEvent *event, void *private) +static int vtd_replay_hook(const IOMMUTLBEvent *event, void *private) { memory_region_notify_iommu_one(private, event); return 0; From patchwork Tue Jun 18 16:00:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702630 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F915C41513 for ; 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Tue, 18 Jun 2024 09:06:30 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-422874e71dcsm227153835e9.44.2024.06.18.09.06.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:06:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , =?utf-8?q?D?= =?utf-8?q?aniel_P_=2E_Berrang=C3=A9?= Subject: [PULL 60/76] hw/usb: Remove unused 'host.h' header Date: Tue, 18 Jun 2024 18:00:22 +0200 Message-ID: <20240618160039.36108-61-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Since commit 99761176ee ("usb: Remove legacy -usbdevice options (host, serial, disk and net)") hw/usb/host.h is not used, remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel P. Berrangé Message-Id: <20240611102305.60735-2-philmd@linaro.org> --- hw/usb/host.h | 44 -------------------------------------------- 1 file changed, 44 deletions(-) delete mode 100644 hw/usb/host.h diff --git a/hw/usb/host.h b/hw/usb/host.h deleted file mode 100644 index 048ff3b482..0000000000 --- a/hw/usb/host.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Linux host USB redirector - * - * Copyright (c) 2005 Fabrice Bellard - * - * Copyright (c) 2008 Max Krasnyansky - * Support for host device auto connect & disconnect - * Major rewrite to support fully async operation - * - * Copyright 2008 TJ - * Added flexible support for /dev/bus/usb /sys/bus/usb/devices in addition - * to the legacy /proc/bus/usb USB device discovery and handling - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ - -#ifndef QEMU_USB_HOST_H -#define QEMU_USB_HOST_H - -struct USBAutoFilter { - uint32_t bus_num; - uint32_t addr; - char *port; - uint32_t vendor_id; - uint32_t product_id; -}; - -#endif /* QEMU_USB_HOST_H */ From patchwork Tue Jun 18 16:00:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702631 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1FA32C2BB85 for ; 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Tue, 18 Jun 2024 09:06:35 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3621a4a17e6sm1580858f8f.19.2024.06.18.09.06.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:06:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Fabio D'Urso , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 61/76] hw/usb/dev-mtp: Correctly report free space Date: Tue, 18 Jun 2024 18:00:23 +0200 Message-ID: <20240618160039.36108-62-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philmd@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Fabio D'Urso In order to compute the amount of free space (in bytes), the number of available blocks (f_bavail) should be multiplied by the block size (f_frsize) instead of the total number of blocks (f_blocks). Signed-off-by: Fabio D'Urso Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240618003657.3344685-1-fdurso@google.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/usb/dev-mtp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c index 7e4a0765ae..554b397e88 100644 --- a/hw/usb/dev-mtp.c +++ b/hw/usb/dev-mtp.c @@ -886,7 +886,7 @@ static MTPData *usb_mtp_get_storage_info(MTPState *s, MTPControl *c) rc = statvfs(s->root, &buf); if (rc == 0) { usb_mtp_add_u64(d, (uint64_t)buf.f_frsize * buf.f_blocks); - usb_mtp_add_u64(d, (uint64_t)buf.f_bavail * buf.f_blocks); + usb_mtp_add_u64(d, (uint64_t)buf.f_frsize * buf.f_bavail); usb_mtp_add_u32(d, buf.f_ffree); } else { usb_mtp_add_u64(d, 0xffffffff); From patchwork Tue Jun 18 16:00:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702636 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94CFAC2BB85 for ; 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Tue, 18 Jun 2024 09:06:40 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-422869d4f2esm231014525e9.0.2024.06.18.09.06.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:06:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Song Gao , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 62/76] hw/intc: Remove loongarch_ipi.c Date: Tue, 18 Jun 2024 18:00:24 +0200 Message-ID: <20240618160039.36108-63-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22b; envelope-from=philmd@linaro.org; helo=mail-lj1-x22b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Jiaxun Yang It was missed out in previous commit. Fixes: b4a12dfc2132 ("hw/intc/loongarch_ipi: Rename as loongson_ipi") Signed-off-by: Jiaxun Yang Reviewed-by: Song Gao Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240605-loongson3-ipi-v3-1-ddd2c0e03fa3@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/loongarch_ipi.c | 347 ---------------------------------------- 1 file changed, 347 deletions(-) delete mode 100644 hw/intc/loongarch_ipi.c diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c deleted file mode 100644 index 44b3b9c138..0000000000 --- a/hw/intc/loongarch_ipi.c +++ /dev/null @@ -1,347 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * LoongArch ipi interrupt support - * - * Copyright (C) 2021 Loongson Technology Corporation Limited - */ - -#include "qemu/osdep.h" -#include "hw/boards.h" -#include "hw/sysbus.h" -#include "hw/intc/loongarch_ipi.h" -#include "hw/irq.h" -#include "hw/qdev-properties.h" -#include "qapi/error.h" -#include "qemu/log.h" -#include "exec/address-spaces.h" -#include "migration/vmstate.h" -#include "target/loongarch/cpu.h" -#include "trace.h" - -static MemTxResult loongarch_ipi_readl(void *opaque, hwaddr addr, - uint64_t *data, - unsigned size, MemTxAttrs attrs) -{ - IPICore *s; - LoongArchIPI *ipi = opaque; - uint64_t ret = 0; - int index = 0; - - s = &ipi->cpu[attrs.requester_id]; - addr &= 0xff; - switch (addr) { - case CORE_STATUS_OFF: - ret = s->status; - break; - case CORE_EN_OFF: - ret = s->en; - break; - case CORE_SET_OFF: - ret = 0; - break; - case CORE_CLEAR_OFF: - ret = 0; - break; - case CORE_BUF_20 ... CORE_BUF_38 + 4: - index = (addr - CORE_BUF_20) >> 2; - ret = s->buf[index]; - break; - default: - qemu_log_mask(LOG_UNIMP, "invalid read: %x", (uint32_t)addr); - break; - } - - trace_loongarch_ipi_read(size, (uint64_t)addr, ret); - *data = ret; - return MEMTX_OK; -} - -static void send_ipi_data(CPULoongArchState *env, uint64_t val, hwaddr addr, - MemTxAttrs attrs) -{ - int i, mask = 0, data = 0; - - /* - * bit 27-30 is mask for byte writing, - * if the mask is 0, we need not to do anything. - */ - if ((val >> 27) & 0xf) { - data = address_space_ldl(env->address_space_iocsr, addr, - attrs, NULL); - for (i = 0; i < 4; i++) { - /* get mask for byte writing */ - if (val & (0x1 << (27 + i))) { - mask |= 0xff << (i * 8); - } - } - } - - data &= mask; - data |= (val >> 32) & ~mask; - address_space_stl(env->address_space_iocsr, addr, - data, attrs, NULL); -} - -static int archid_cmp(const void *a, const void *b) -{ - CPUArchId *archid_a = (CPUArchId *)a; - CPUArchId *archid_b = (CPUArchId *)b; - - return archid_a->arch_id - archid_b->arch_id; -} - -static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id) -{ - CPUArchId apic_id, *found_cpu; - - apic_id.arch_id = id; - found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus, - ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus), - archid_cmp); - - return found_cpu; -} - -static CPUState *ipi_getcpu(int arch_id) -{ - MachineState *machine = MACHINE(qdev_get_machine()); - CPUArchId *archid; - - archid = find_cpu_by_archid(machine, arch_id); - if (archid) { - return CPU(archid->cpu); - } - - return NULL; -} - -static MemTxResult mail_send(uint64_t val, MemTxAttrs attrs) -{ - uint32_t cpuid; - hwaddr addr; - CPUState *cs; - - cpuid = extract32(val, 16, 10); - cs = ipi_getcpu(cpuid); - if (cs == NULL) { - return MEMTX_DECODE_ERROR; - } - - /* override requester_id */ - addr = SMP_IPI_MAILBOX + CORE_BUF_20 + (val & 0x1c); - attrs.requester_id = cs->cpu_index; - send_ipi_data(&LOONGARCH_CPU(cs)->env, val, addr, attrs); - return MEMTX_OK; -} - -static MemTxResult any_send(uint64_t val, MemTxAttrs attrs) -{ - uint32_t cpuid; - hwaddr addr; - CPUState *cs; - - cpuid = extract32(val, 16, 10); - cs = ipi_getcpu(cpuid); - if (cs == NULL) { - return MEMTX_DECODE_ERROR; - } - - /* override requester_id */ - addr = val & 0xffff; - attrs.requester_id = cs->cpu_index; - send_ipi_data(&LOONGARCH_CPU(cs)->env, val, addr, attrs); - return MEMTX_OK; -} - -static MemTxResult loongarch_ipi_writel(void *opaque, hwaddr addr, uint64_t val, - unsigned size, MemTxAttrs attrs) -{ - LoongArchIPI *ipi = opaque; - IPICore *s; - int index = 0; - uint32_t cpuid; - uint8_t vector; - CPUState *cs; - - s = &ipi->cpu[attrs.requester_id]; - addr &= 0xff; - trace_loongarch_ipi_write(size, (uint64_t)addr, val); - switch (addr) { - case CORE_STATUS_OFF: - qemu_log_mask(LOG_GUEST_ERROR, "can not be written"); - break; - case CORE_EN_OFF: - s->en = val; - break; - case CORE_SET_OFF: - s->status |= val; - if (s->status != 0 && (s->status & s->en) != 0) { - qemu_irq_raise(s->irq); - } - break; - case CORE_CLEAR_OFF: - s->status &= ~val; - if (s->status == 0 && s->en != 0) { - qemu_irq_lower(s->irq); - } - break; - case CORE_BUF_20 ... CORE_BUF_38 + 4: - index = (addr - CORE_BUF_20) >> 2; - s->buf[index] = val; - break; - case IOCSR_IPI_SEND: - cpuid = extract32(val, 16, 10); - /* IPI status vector */ - vector = extract8(val, 0, 5); - cs = ipi_getcpu(cpuid); - if (cs == NULL) { - return MEMTX_DECODE_ERROR; - } - - /* override requester_id */ - attrs.requester_id = cs->cpu_index; - loongarch_ipi_writel(ipi, CORE_SET_OFF, BIT(vector), 4, attrs); - break; - default: - qemu_log_mask(LOG_UNIMP, "invalid write: %x", (uint32_t)addr); - break; - } - - return MEMTX_OK; -} - -static const MemoryRegionOps loongarch_ipi_ops = { - .read_with_attrs = loongarch_ipi_readl, - .write_with_attrs = loongarch_ipi_writel, - .impl.min_access_size = 4, - .impl.max_access_size = 4, - .valid.min_access_size = 4, - .valid.max_access_size = 8, - .endianness = DEVICE_LITTLE_ENDIAN, -}; - -/* mail send and any send only support writeq */ -static MemTxResult loongarch_ipi_writeq(void *opaque, hwaddr addr, uint64_t val, - unsigned size, MemTxAttrs attrs) -{ - MemTxResult ret = MEMTX_OK; - - addr &= 0xfff; - switch (addr) { - case MAIL_SEND_OFFSET: - ret = mail_send(val, attrs); - break; - case ANY_SEND_OFFSET: - ret = any_send(val, attrs); - break; - default: - break; - } - - return ret; -} - -static const MemoryRegionOps loongarch_ipi64_ops = { - .write_with_attrs = loongarch_ipi_writeq, - .impl.min_access_size = 8, - .impl.max_access_size = 8, - .valid.min_access_size = 8, - .valid.max_access_size = 8, - .endianness = DEVICE_LITTLE_ENDIAN, -}; - -static void loongarch_ipi_realize(DeviceState *dev, Error **errp) -{ - LoongArchIPI *s = LOONGARCH_IPI(dev); - SysBusDevice *sbd = SYS_BUS_DEVICE(dev); - int i; - - if (s->num_cpu == 0) { - error_setg(errp, "num-cpu must be at least 1"); - return; - } - - memory_region_init_io(&s->ipi_iocsr_mem, OBJECT(dev), &loongarch_ipi_ops, - s, "loongarch_ipi_iocsr", 0x48); - - /* loongarch_ipi_iocsr performs re-entrant IO through ipi_send */ - s->ipi_iocsr_mem.disable_reentrancy_guard = true; - - sysbus_init_mmio(sbd, &s->ipi_iocsr_mem); - - memory_region_init_io(&s->ipi64_iocsr_mem, OBJECT(dev), - &loongarch_ipi64_ops, - s, "loongarch_ipi64_iocsr", 0x118); - sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem); - - s->cpu = g_new0(IPICore, s->num_cpu); - if (s->cpu == NULL) { - error_setg(errp, "Memory allocation for ExtIOICore faile"); - return; - } - - for (i = 0; i < s->num_cpu; i++) { - qdev_init_gpio_out(dev, &s->cpu[i].irq, 1); - } -} - -static const VMStateDescription vmstate_ipi_core = { - .name = "ipi-single", - .version_id = 2, - .minimum_version_id = 2, - .fields = (const VMStateField[]) { - VMSTATE_UINT32(status, IPICore), - VMSTATE_UINT32(en, IPICore), - VMSTATE_UINT32(set, IPICore), - VMSTATE_UINT32(clear, IPICore), - VMSTATE_UINT32_ARRAY(buf, IPICore, IPI_MBX_NUM * 2), - VMSTATE_END_OF_LIST() - } -}; - -static const VMStateDescription vmstate_loongarch_ipi = { - .name = TYPE_LOONGARCH_IPI, - .version_id = 2, - .minimum_version_id = 2, - .fields = (const VMStateField[]) { - VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchIPI, num_cpu, - vmstate_ipi_core, IPICore), - VMSTATE_END_OF_LIST() - } -}; - -static Property ipi_properties[] = { - DEFINE_PROP_UINT32("num-cpu", LoongArchIPI, num_cpu, 1), - DEFINE_PROP_END_OF_LIST(), -}; - -static void loongarch_ipi_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc = DEVICE_CLASS(klass); - - dc->realize = loongarch_ipi_realize; - device_class_set_props(dc, ipi_properties); - dc->vmsd = &vmstate_loongarch_ipi; -} - -static void loongarch_ipi_finalize(Object *obj) -{ - LoongArchIPI *s = LOONGARCH_IPI(obj); - - g_free(s->cpu); -} - -static const TypeInfo loongarch_ipi_info = { - .name = TYPE_LOONGARCH_IPI, - .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(LoongArchIPI), - .class_init = loongarch_ipi_class_init, - .instance_finalize = loongarch_ipi_finalize, -}; - -static void loongarch_ipi_register_types(void) -{ - type_register_static(&loongarch_ipi_info); -} - -type_init(loongarch_ipi_register_types) From patchwork Tue Jun 18 16:00:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702682 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5676C2BA18 for ; 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Tue, 18 Jun 2024 09:06:46 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-360917c264bsm7145160f8f.56.2024.06.18.09.06.45 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:06:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Song Gao , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 63/76] hw/intc/loongson_ipi: Provide per core MMIO address spaces Date: Tue, 18 Jun 2024 18:00:25 +0200 Message-ID: <20240618160039.36108-64-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=philmd@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Jiaxun Yang The real IPI hardware have dedicated MMIO registers mapped into memory address space for every core. This is not used by LoongArch guest software but it is essential for CPU without IOCSR such as Loongson-3A1000. Implement it with existing infrastructure. Acked-by: Song Gao Signed-off-by: Jiaxun Yang Message-ID: <20240605-loongson3-ipi-v3-2-ddd2c0e03fa3@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/intc/loongson_ipi.h | 2 + hw/intc/loongson_ipi.c | 86 +++++++++++++++++++++++++--------- 2 files changed, 67 insertions(+), 21 deletions(-) diff --git a/include/hw/intc/loongson_ipi.h b/include/hw/intc/loongson_ipi.h index 2c0e8820f5..3f795edbf3 100644 --- a/include/hw/intc/loongson_ipi.h +++ b/include/hw/intc/loongson_ipi.h @@ -34,6 +34,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(LoongsonIPI, LOONGSON_IPI) typedef struct IPICore { + LoongsonIPI *ipi; + MemoryRegion *ipi_mmio_mem; uint32_t status; uint32_t en; uint32_t set; diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 93cc50a37a..08a74a0b4f 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -23,16 +23,14 @@ #endif #include "trace.h" -static MemTxResult loongson_ipi_readl(void *opaque, hwaddr addr, - uint64_t *data, - unsigned size, MemTxAttrs attrs) +static MemTxResult loongson_ipi_core_readl(void *opaque, hwaddr addr, + uint64_t *data, + unsigned size, MemTxAttrs attrs) { - IPICore *s; - LoongsonIPI *ipi = opaque; + IPICore *s = opaque; uint64_t ret = 0; int index = 0; - s = &ipi->cpu[attrs.requester_id]; addr &= 0xff; switch (addr) { case CORE_STATUS_OFF: @@ -61,6 +59,21 @@ static MemTxResult loongson_ipi_readl(void *opaque, hwaddr addr, return MEMTX_OK; } +static MemTxResult loongson_ipi_iocsr_readl(void *opaque, hwaddr addr, + uint64_t *data, + unsigned size, MemTxAttrs attrs) +{ + LoongsonIPI *ipi = opaque; + IPICore *s; + + if (attrs.requester_id >= ipi->num_cpu) { + return MEMTX_DECODE_ERROR; + } + + s = &ipi->cpu[attrs.requester_id]; + return loongson_ipi_core_readl(s, addr, data, size, attrs); +} + static AddressSpace *get_cpu_iocsr_as(CPUState *cpu) { #ifdef TARGET_LOONGARCH64 @@ -174,17 +187,17 @@ static MemTxResult any_send(uint64_t val, MemTxAttrs attrs) return send_ipi_data(cs, val, addr, attrs); } -static MemTxResult loongson_ipi_writel(void *opaque, hwaddr addr, uint64_t val, - unsigned size, MemTxAttrs attrs) +static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, + uint64_t val, unsigned size, + MemTxAttrs attrs) { - LoongsonIPI *ipi = opaque; - IPICore *s; + IPICore *s = opaque; + LoongsonIPI *ipi = s->ipi; int index = 0; uint32_t cpuid; uint8_t vector; CPUState *cs; - s = &ipi->cpu[attrs.requester_id]; addr &= 0xff; trace_loongson_ipi_write(size, (uint64_t)addr, val); switch (addr) { @@ -215,13 +228,11 @@ static MemTxResult loongson_ipi_writel(void *opaque, hwaddr addr, uint64_t val, /* IPI status vector */ vector = extract8(val, 0, 5); cs = ipi_getcpu(cpuid); - if (cs == NULL) { + if (cs == NULL || cs->cpu_index >= ipi->num_cpu) { return MEMTX_DECODE_ERROR; } - - /* override requester_id */ - attrs.requester_id = cs->cpu_index; - loongson_ipi_writel(ipi, CORE_SET_OFF, BIT(vector), 4, attrs); + loongson_ipi_core_writel(&ipi->cpu[cs->cpu_index], CORE_SET_OFF, + BIT(vector), 4, attrs); break; default: qemu_log_mask(LOG_UNIMP, "invalid write: %x", (uint32_t)addr); @@ -231,9 +242,34 @@ static MemTxResult loongson_ipi_writel(void *opaque, hwaddr addr, uint64_t val, return MEMTX_OK; } -static const MemoryRegionOps loongson_ipi_ops = { - .read_with_attrs = loongson_ipi_readl, - .write_with_attrs = loongson_ipi_writel, +static MemTxResult loongson_ipi_iocsr_writel(void *opaque, hwaddr addr, + uint64_t val, unsigned size, + MemTxAttrs attrs) +{ + LoongsonIPI *ipi = opaque; + IPICore *s; + + if (attrs.requester_id >= ipi->num_cpu) { + return MEMTX_DECODE_ERROR; + } + + s = &ipi->cpu[attrs.requester_id]; + return loongson_ipi_core_writel(s, addr, val, size, attrs); +} + +static const MemoryRegionOps loongson_ipi_core_ops = { + .read_with_attrs = loongson_ipi_core_readl, + .write_with_attrs = loongson_ipi_core_writel, + .impl.min_access_size = 4, + .impl.max_access_size = 4, + .valid.min_access_size = 4, + .valid.max_access_size = 8, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +static const MemoryRegionOps loongson_ipi_iocsr_ops = { + .read_with_attrs = loongson_ipi_iocsr_readl, + .write_with_attrs = loongson_ipi_iocsr_writel, .impl.min_access_size = 4, .impl.max_access_size = 4, .valid.min_access_size = 4, @@ -282,7 +318,8 @@ static void loongson_ipi_realize(DeviceState *dev, Error **errp) return; } - memory_region_init_io(&s->ipi_iocsr_mem, OBJECT(dev), &loongson_ipi_ops, + memory_region_init_io(&s->ipi_iocsr_mem, OBJECT(dev), + &loongson_ipi_iocsr_ops, s, "loongson_ipi_iocsr", 0x48); /* loongson_ipi_iocsr performs re-entrant IO through ipi_send */ @@ -297,11 +334,18 @@ static void loongson_ipi_realize(DeviceState *dev, Error **errp) s->cpu = g_new0(IPICore, s->num_cpu); if (s->cpu == NULL) { - error_setg(errp, "Memory allocation for ExtIOICore faile"); + error_setg(errp, "Memory allocation for IPICore faile"); return; } for (i = 0; i < s->num_cpu; i++) { + s->cpu[i].ipi = s; + s->cpu[i].ipi_mmio_mem = g_new0(MemoryRegion, 1); + g_autofree char *name = g_strdup_printf("loongson_ipi_cpu%d_mmio", i); + memory_region_init_io(s->cpu[i].ipi_mmio_mem, OBJECT(dev), + &loongson_ipi_core_ops, &s->cpu[i], name, 0x48); + sysbus_init_mmio(sbd, s->cpu[i].ipi_mmio_mem); + qdev_init_gpio_out(dev, &s->cpu[i].irq, 1); } } From patchwork Tue Jun 18 16:00:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702612 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 23DC8C2BBCA for ; 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Tue, 18 Jun 2024 09:06:52 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-422f641a633sm193554665e9.43.2024.06.18.09.06.51 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:06:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Song Gao , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 64/76] hw/intc/loongson_ipi: Replace ipi_getcpu with cpu_by_arch_id Date: Tue, 18 Jun 2024 18:00:26 +0200 Message-ID: <20240618160039.36108-65-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Jiaxun Yang cpu_by_arch_id is doing the same thing as our ipi_getcpu logic. Signed-off-by: Jiaxun Yang Reviewed-by: Song Gao Message-ID: <20240605-loongson3-ipi-v3-4-ddd2c0e03fa3@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/loongson_ipi.c | 39 +++------------------------------------ 1 file changed, 3 insertions(+), 36 deletions(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 08a74a0b4f..e6a7142480 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -118,39 +118,6 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr, return MEMTX_OK; } -static int archid_cmp(const void *a, const void *b) -{ - CPUArchId *archid_a = (CPUArchId *)a; - CPUArchId *archid_b = (CPUArchId *)b; - - return archid_a->arch_id - archid_b->arch_id; -} - -static CPUArchId *find_cpu_by_archid(MachineState *ms, uint32_t id) -{ - CPUArchId apic_id, *found_cpu; - - apic_id.arch_id = id; - found_cpu = bsearch(&apic_id, ms->possible_cpus->cpus, - ms->possible_cpus->len, sizeof(*ms->possible_cpus->cpus), - archid_cmp); - - return found_cpu; -} - -static CPUState *ipi_getcpu(int arch_id) -{ - MachineState *machine = MACHINE(qdev_get_machine()); - CPUArchId *archid; - - archid = find_cpu_by_archid(machine, arch_id); - if (archid) { - return CPU(archid->cpu); - } - - return NULL; -} - static MemTxResult mail_send(uint64_t val, MemTxAttrs attrs) { uint32_t cpuid; @@ -158,7 +125,7 @@ static MemTxResult mail_send(uint64_t val, MemTxAttrs attrs) CPUState *cs; cpuid = extract32(val, 16, 10); - cs = ipi_getcpu(cpuid); + cs = cpu_by_arch_id(cpuid); if (cs == NULL) { return MEMTX_DECODE_ERROR; } @@ -176,7 +143,7 @@ static MemTxResult any_send(uint64_t val, MemTxAttrs attrs) CPUState *cs; cpuid = extract32(val, 16, 10); - cs = ipi_getcpu(cpuid); + cs = cpu_by_arch_id(cpuid); if (cs == NULL) { return MEMTX_DECODE_ERROR; } @@ -227,7 +194,7 @@ static MemTxResult loongson_ipi_core_writel(void *opaque, hwaddr addr, cpuid = extract32(val, 16, 10); /* IPI status vector */ vector = extract8(val, 0, 5); - cs = ipi_getcpu(cpuid); + cs = cpu_by_arch_id(cpuid); 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Tue, 18 Jun 2024 09:06:57 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3631488c450sm49823f8f.60.2024.06.18.09.06.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:06:57 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Song Gao , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 65/76] hw/mips/loongson3_virt: Wire up loongson_ipi device Date: Tue, 18 Jun 2024 18:00:27 +0200 Message-ID: <20240618160039.36108-66-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=philmd@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Jiaxun Yang Wire up loongson_ipi device for loongson3_virt machine, so we can have SMP support for TCG backend as well. Signed-off-by: Jiaxun Yang Acked-by: Song Gao Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240605-loongson3-ipi-v3-3-ddd2c0e03fa3@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/loongson3_bootp.h | 3 +++ hw/mips/loongson3_bootp.c | 2 -- hw/mips/loongson3_virt.c | 39 +++++++++++++++++++++++++++++++++++++-- hw/mips/Kconfig | 1 + 4 files changed, 41 insertions(+), 4 deletions(-) diff --git a/hw/mips/loongson3_bootp.h b/hw/mips/loongson3_bootp.h index 1b0dd3b591..9091265df7 100644 --- a/hw/mips/loongson3_bootp.h +++ b/hw/mips/loongson3_bootp.h @@ -200,6 +200,8 @@ struct boot_params { struct efi_reset_system_t reset_system; }; +#define LOONGSON3_CORE_PER_NODE 4 + /* Overall MMIO & Memory layout */ enum { VIRT_LOWMEM, @@ -211,6 +213,7 @@ enum { VIRT_BIOS_ROM, VIRT_UART, VIRT_LIOINTC, + VIRT_IPI, VIRT_PCIE_MMIO, VIRT_HIGHMEM }; diff --git a/hw/mips/loongson3_bootp.c b/hw/mips/loongson3_bootp.c index 03a10b63c1..b97b81903b 100644 --- a/hw/mips/loongson3_bootp.c +++ b/hw/mips/loongson3_bootp.c @@ -25,8 +25,6 @@ #include "hw/boards.h" #include "hw/mips/loongson3_bootp.h" -#define LOONGSON3_CORE_PER_NODE 4 - static void init_cpu_info(void *g_cpuinfo, uint64_t cpu_freq) { struct efi_cpuinfo_loongson *c = g_cpuinfo; diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c index 440268a074..4ad36f0c5b 100644 --- a/hw/mips/loongson3_virt.c +++ b/hw/mips/loongson3_virt.c @@ -36,6 +36,7 @@ #include "hw/mips/loongson3_bootp.h" #include "hw/misc/unimp.h" #include "hw/intc/i8259.h" +#include "hw/intc/loongson_ipi.h" #include "hw/loader.h" #include "hw/isa/superio.h" #include "hw/pci/msi.h" @@ -74,6 +75,7 @@ const MemMapEntry virt_memmap[] = { [VIRT_PCIE_ECAM] = { 0x1a000000, 0x2000000 }, [VIRT_BIOS_ROM] = { 0x1fc00000, 0x200000 }, [VIRT_UART] = { 0x1fe001e0, 0x8 }, + [VIRT_IPI] = { 0x3ff01000, 0x400 }, [VIRT_LIOINTC] = { 0x3ff01400, 0x64 }, [VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 }, [VIRT_HIGHMEM] = { 0x80000000, 0x0 }, /* Variable */ @@ -485,6 +487,7 @@ static void mips_loongson3_virt_init(MachineState *machine) Clock *cpuclk; CPUMIPSState *env; DeviceState *liointc; + DeviceState *ipi = NULL; char *filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *kernel_filename = machine->kernel_filename; @@ -494,6 +497,7 @@ static void mips_loongson3_virt_init(MachineState *machine) MemoryRegion *ram = g_new(MemoryRegion, 1); MemoryRegion *bios = g_new(MemoryRegion, 1); MemoryRegion *iomem = g_new(MemoryRegion, 1); + MemoryRegion *iocsr = g_new(MemoryRegion, 1); /* TODO: TCG will support all CPU types */ if (!kvm_enabled()) { @@ -527,6 +531,19 @@ static void mips_loongson3_virt_init(MachineState *machine) create_unimplemented_device("mmio fallback 0", 0x10000000, 256 * MiB); create_unimplemented_device("mmio fallback 1", 0x30000000, 256 * MiB); + memory_region_init(iocsr, OBJECT(machine), "loongson3.iocsr", UINT32_MAX); + + /* IPI controller is in kernel for KVM */ + if (!kvm_enabled()) { + ipi = qdev_new(TYPE_LOONGSON_IPI); + qdev_prop_set_uint32(ipi, "num-cpu", machine->smp.cpus); + sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); + memory_region_add_subregion(iocsr, SMP_IPI_MAILBOX, + sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0)); + memory_region_add_subregion(iocsr, MAIL_SEND_ADDR, + sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); + } + liointc = qdev_new("loongson.liointc"); sysbus_realize_and_unref(SYS_BUS_DEVICE(liointc), &error_fatal); @@ -543,6 +560,8 @@ static void mips_loongson3_virt_init(MachineState *machine) clock_set_hz(cpuclk, DEF_LOONGSON3_FREQ); for (i = 0; i < machine->smp.cpus; i++) { + int node = i / LOONGSON3_CORE_PER_NODE; + int core = i % LOONGSON3_CORE_PER_NODE; int ip; /* init CPUs */ @@ -553,12 +572,28 @@ static void mips_loongson3_virt_init(MachineState *machine) cpu_mips_clock_init(cpu); qemu_register_reset(main_cpu_reset, cpu); - if (i >= 4) { + if (ipi) { + hwaddr base = ((hwaddr)node << 44) + virt_memmap[VIRT_IPI].base; + base += core * 0x100; + qdev_connect_gpio_out(ipi, i, cpu->env.irq[6]); + sysbus_mmio_map(SYS_BUS_DEVICE(ipi), i + 2, base); + } + + if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) { + MemoryRegion *core_iocsr = g_new(MemoryRegion, 1); + g_autofree char *name = g_strdup_printf("core%d_iocsr", i); + memory_region_init_alias(core_iocsr, OBJECT(cpu), name, + iocsr, 0, UINT32_MAX); + memory_region_add_subregion(&MIPS_CPU(cpu)->env.iocsr.mr, + 0, core_iocsr); + } + + if (node > 0) { continue; /* Only node-0 can be connected to LIOINTC */ } for (ip = 0; ip < 4 ; ip++) { - int pin = i * 4 + ip; + int pin = core * LOONGSON3_CORE_PER_NODE + ip; sysbus_connect_irq(SYS_BUS_DEVICE(liointc), pin, cpu->env.irq[ip + 2]); } diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index a7f26edebe..692bede538 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@ -67,6 +67,7 @@ config LOONGSON3V imply USB_OHCI_PCI select SERIAL select GOLDFISH_RTC + select LOONGSON_IPI select LOONGSON_LIOINTC select PCI_EXPRESS_GENERIC_BRIDGE select MSI_NONBROKEN From patchwork Tue Jun 18 16:00:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702609 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 29A26C27C4F for ; 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Tue, 18 Jun 2024 09:07:02 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3607a43eedfsm12693341f8f.78.2024.06.18.09.07.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:07:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Thomas Huth , Paolo Bonzini Subject: [PULL 66/76] hw/s390x: Introduce s390_skeys_get|set() helpers Date: Tue, 18 Jun 2024 18:00:28 +0200 Message-ID: <20240618160039.36108-67-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org s390_skeys_set() dispatch to S390SKeysClass::set_skeys(), and s390_skeys_get() to S390SKeysClass::get_skeys(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Paolo Bonzini Message-Id: <20240613104415.9643-2-philmd@linaro.org> --- include/hw/s390x/storage-keys.h | 10 ++++++++++ hw/s390x/s390-skeys.c | 27 +++++++++++++++++++++++++++ hw/s390x/trace-events | 4 ++++ 3 files changed, 41 insertions(+) diff --git a/include/hw/s390x/storage-keys.h b/include/hw/s390x/storage-keys.h index aa2ec2aae5..976ffb2039 100644 --- a/include/hw/s390x/storage-keys.h +++ b/include/hw/s390x/storage-keys.h @@ -111,6 +111,16 @@ struct QEMUS390SKeysState { }; void s390_skeys_init(void); +/** + * @s390_skeys_get: See S390SKeysClass::get_skeys() + */ +int s390_skeys_get(S390SKeysState *ks, uint64_t start_gfn, + uint64_t count, uint8_t *keys); +/** + * @s390_skeys_set: See S390SKeysClass::set_skeys() + */ +int s390_skeys_set(S390SKeysState *ks, uint64_t start_gfn, + uint64_t count, uint8_t *keys); S390SKeysState *s390_get_skeys_device(void); diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c index 5c535d483e..bf22d6863e 100644 --- a/hw/s390x/s390-skeys.c +++ b/hw/s390x/s390-skeys.c @@ -23,6 +23,7 @@ #include "sysemu/kvm.h" #include "migration/qemu-file-types.h" #include "migration/register.h" +#include "trace.h" #define S390_SKEYS_BUFFER_SIZE (128 * KiB) /* Room for 128k storage keys */ #define S390_SKEYS_SAVE_FLAG_EOS 0x01 @@ -54,6 +55,32 @@ void s390_skeys_init(void) qdev_realize(DEVICE(obj), NULL, &error_fatal); } +int s390_skeys_get(S390SKeysState *ks, uint64_t start_gfn, + uint64_t count, uint8_t *keys) +{ + S390SKeysClass *kc = S390_SKEYS_GET_CLASS(ks); + int rc; + + rc = kc->get_skeys(ks, start_gfn, count, keys); + if (rc) { + trace_s390_skeys_get_nonzero(rc); + } + return rc; +} + +int s390_skeys_set(S390SKeysState *ks, uint64_t start_gfn, + uint64_t count, uint8_t *keys) +{ + S390SKeysClass *kc = S390_SKEYS_GET_CLASS(ks); + int rc; + + rc = kc->set_skeys(ks, start_gfn, count, keys); + if (rc) { + trace_s390_skeys_set_nonzero(rc); + } + return rc; +} + static void write_keys(FILE *f, uint8_t *keys, uint64_t startgfn, uint64_t count, Error **errp) { diff --git a/hw/s390x/trace-events b/hw/s390x/trace-events index 34da5ea323..4e74bf4484 100644 --- a/hw/s390x/trace-events +++ b/hw/s390x/trace-events @@ -36,3 +36,7 @@ s390_pci_unknown(const char *msg, uint32_t cmd) "%s unknown command 0x%x" s390_pci_bar(uint32_t bar, uint32_t addr, uint64_t size, uint32_t barsize) "bar %d addr 0x%x size 0x%" PRIx64 "barsize 0x%x" s390_pci_nodev(const char *cmd, uint32_t fh) "%s no pci dev fh 0x%x" s390_pci_invalid(const char *cmd, uint32_t fh) "%s invalid space fh 0x%x" + +# s390-skeys.c +s390_skeys_get_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d" +s390_skeys_set_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d" From patchwork Tue Jun 18 16:00:29 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:07:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , Thomas Huth , Paolo Bonzini Subject: [PULL 67/76] target/s390x: Use s390_skeys_get|set() helper Date: Tue, 18 Jun 2024 18:00:29 +0200 Message-ID: <20240618160039.36108-68-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=philmd@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Commit c9274b6bf0 ("target/s390x: start moving TCG-only code to tcg/") moved mem_helper.c, but the trace-events file is still in the parent directory, so is the generated trace.h. Call the s390_skeys_get|set() helper, removing the need for the trace event shared with the tcg/ sub-directory, fixing the following build failure: In file included from ../target/s390x/tcg/mem_helper.c:33: ../target/s390x/tcg/trace.h:1:10: fatal error: 'trace/trace-target_s390x_tcg.h' file not found #include "trace/trace-target_s390x_tcg.h" Reported-by: Mark Cave-Ayland Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth Reviewed-by: Paolo Bonzini Message-Id: <20240613104415.9643-3-philmd@linaro.org> --- target/s390x/mmu_helper.c | 11 ++--------- target/s390x/tcg/mem_helper.c | 16 ++++------------ target/s390x/trace-events | 4 ---- 3 files changed, 6 insertions(+), 25 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index f3a2f25a5c..6c59d0d216 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -25,7 +25,6 @@ #include "sysemu/tcg.h" #include "exec/exec-all.h" #include "exec/page-protection.h" -#include "trace.h" #include "hw/hw.h" #include "hw/s390x/storage-keys.h" #include "hw/boards.h" @@ -303,7 +302,6 @@ static void mmu_handle_skey(target_ulong addr, int rw, int *flags) static S390SKeysClass *skeyclass; static S390SKeysState *ss; uint8_t key, old_key; - int rc; /* * We expect to be called with an absolute address that has already been @@ -341,9 +339,7 @@ static void mmu_handle_skey(target_ulong addr, int rw, int *flags) * * TODO: we have races between getting and setting the key. */ - rc = skeyclass->get_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); - if (rc) { - trace_get_skeys_nonzero(rc); + if (s390_skeys_get(ss, addr / TARGET_PAGE_SIZE, 1, &key)) { return; } old_key = key; @@ -371,10 +367,7 @@ static void mmu_handle_skey(target_ulong addr, int rw, int *flags) key |= SK_R; if (key != old_key) { - rc = skeyclass->set_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); - if (rc) { - trace_set_skeys_nonzero(rc); - } + s390_skeys_set(ss, addr / TARGET_PAGE_SIZE, 1, &key); } } diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 6a308c5553..6cdbc34178 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -30,7 +30,6 @@ #include "hw/core/tcg-cpu-ops.h" #include "qemu/int128.h" #include "qemu/atomic128.h" -#include "trace.h" #if !defined(CONFIG_USER_ONLY) #include "hw/s390x/storage-keys.h" @@ -2093,9 +2092,8 @@ uint64_t HELPER(iske)(CPUS390XState *env, uint64_t r2) } } - rc = skeyclass->get_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); + rc = s390_skeys_get(ss, addr / TARGET_PAGE_SIZE, 1, &key); if (rc) { - trace_get_skeys_nonzero(rc); return 0; } return key; @@ -2108,7 +2106,6 @@ void HELPER(sske)(CPUS390XState *env, uint64_t r1, uint64_t r2) static S390SKeysClass *skeyclass; uint64_t addr = wrap_address(env, r2); uint8_t key; - int rc; addr = mmu_real2abs(env, addr); if (!mmu_absolute_addr_valid(addr, false)) { @@ -2124,10 +2121,7 @@ void HELPER(sske)(CPUS390XState *env, uint64_t r1, uint64_t r2) } key = r1 & 0xfe; - rc = skeyclass->set_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); - if (rc) { - trace_set_skeys_nonzero(rc); - } + s390_skeys_set(ss, addr / TARGET_PAGE_SIZE, 1, &key); /* * As we can only flush by virtual address and not all the entries * that point to a physical address we have to flush the whole TLB. @@ -2157,18 +2151,16 @@ uint32_t HELPER(rrbe)(CPUS390XState *env, uint64_t r2) } } - rc = skeyclass->get_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); + rc = s390_skeys_get(ss, addr / TARGET_PAGE_SIZE, 1, &key); if (rc) { - trace_get_skeys_nonzero(rc); return 0; } re = key & (SK_R | SK_C); key &= ~SK_R; - rc = skeyclass->set_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); + rc = s390_skeys_set(ss, addr / TARGET_PAGE_SIZE, 1, &key); if (rc) { - trace_set_skeys_nonzero(rc); return 0; } /* diff --git a/target/s390x/trace-events b/target/s390x/trace-events index 729cb012b4..d371ef71b9 100644 --- a/target/s390x/trace-events +++ b/target/s390x/trace-events @@ -1,9 +1,5 @@ # See docs/devel/tracing.rst for syntax documentation. -# mmu_helper.c -get_skeys_nonzero(int rc) "SKEY: Call to get_skeys unexpectedly returned %d" -set_skeys_nonzero(int rc) "SKEY: Call to set_skeys unexpectedly returned %d" - # ioinst.c ioinst(const char *insn) "IOINST: %s" ioinst_sch_id(const char *insn, int cssid, int ssid, int schid) "IOINST: %s (%x.%x.%04x)" From patchwork Tue Jun 18 16:00:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702619 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44641C2BC81 for ; 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Tue, 18 Jun 2024 09:07:13 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3615d7a1a0csm1929801f8f.23.2024.06.18.09.07.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:07:13 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Manos Pitsidianakis , =?utf-8?q?Marc-And?= =?utf-8?q?r=C3=A9_Lureau?= , =?utf-8?q?Philipp?= =?utf-8?q?e_Mathieu-Daud=C3=A9?= Subject: [PULL 68/76] util/readline: Fix lints for readline_handle_byte Date: Tue, 18 Jun 2024 18:00:30 +0200 Message-ID: <20240618160039.36108-69-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Manos Pitsidianakis While they do not give warnings under our current buildsystem configuration, my clang's language server daemon was complaining about missing default: labels in switch statements. While at it, add /* fallthrough */ annotations where appropriate. This is a purely style and not functional change. Signed-off-by: Manos Pitsidianakis Reviewed-by: Marc-André Lureau Message-ID: <16f745ac7f5fef74498709ffd98857e76edff6aa.1718265822.git.manos.pitsidianakis@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- util/readline.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/util/readline.c b/util/readline.c index 494a3d924e..ded31b04b7 100644 --- a/util/readline.c +++ b/util/readline.c @@ -405,7 +405,7 @@ void readline_handle_byte(ReadLineState *rs, int ch) case 12: readline_clear_screen(rs); break; - case 10: + case 10: /* fallthrough */ case 13: rs->cmd_buf[rs->cmd_buf_size] = '\0'; if (!rs->read_password) { @@ -425,7 +425,7 @@ void readline_handle_byte(ReadLineState *rs, int ch) case 27: rs->esc_state = IS_ESC; break; - case 127: + case 127: /* fallthrough */ case 8: readline_backspace(rs); break; @@ -452,11 +452,11 @@ void readline_handle_byte(ReadLineState *rs, int ch) break; case IS_CSI: switch (ch) { - case 'A': + case 'A': /* fallthrough */ case 'F': readline_up_char(rs); break; - case 'B': + case 'B': /* fallthrough */ case 'E': readline_down_char(rs); break; @@ -480,12 +480,15 @@ void readline_handle_byte(ReadLineState *rs, int ch) case 4: readline_eol(rs); break; + default: + break; } break; default: break; } rs->esc_state = IS_NORM; + /* fallthrough */ the_end: break; case IS_SS3: @@ -496,9 +499,13 @@ void readline_handle_byte(ReadLineState *rs, int ch) case 'H': readline_bol(rs); break; + default: + break; } rs->esc_state = IS_NORM; break; + default: + break; } readline_update(rs); } From patchwork Tue Jun 18 16:00:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702623 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5F721C2BB85 for ; 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Tue, 18 Jun 2024 09:07:18 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-422874de68asm232231605e9.29.2024.06.18.09.07.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:07:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Manos Pitsidianakis , =?utf-8?q?Marc-And?= =?utf-8?q?r=C3=A9_Lureau?= , =?utf-8?q?Philipp?= =?utf-8?q?e_Mathieu-Daud=C3=A9?= Subject: [PULL 69/76] util/readline: Add C-n, C-p shortcuts Date: Tue, 18 Jun 2024 18:00:31 +0200 Message-ID: <20240618160039.36108-70-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12e; envelope-from=philmd@linaro.org; helo=mail-lf1-x12e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Manos Pitsidianakis C-n and C-p are the default bindings for readline's next-history and previous-history respectively. They have the same functionality as the Down and Up arrow keys. Signed-off-by: Manos Pitsidianakis Reviewed-by: Marc-André Lureau Message-ID: <9876594132d1f2e7210ab3f7ca01a82f95206447.1718265822.git.manos.pitsidianakis@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- util/readline.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/util/readline.c b/util/readline.c index ded31b04b7..0b627d62ad 100644 --- a/util/readline.c +++ b/util/readline.c @@ -418,6 +418,14 @@ void readline_handle_byte(ReadLineState *rs, int ch) rs->last_cmd_buf_size = 0; rs->readline_func(rs->opaque, rs->cmd_buf, rs->readline_opaque); break; + case 14: + /* ^N Next line in history */ + readline_down_char(rs); + break; + case 16: + /* ^P Prev line in history */ + readline_up_char(rs); + break; case 23: /* ^W */ readline_backword(rs); From patchwork Tue Jun 18 16:00:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702624 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40438C27C4F for ; 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Tue, 18 Jun 2024 09:07:24 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3607509c9a0sm14398446f8f.27.2024.06.18.09.07.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:07:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Manos Pitsidianakis , =?utf-8?q?Marc-And?= =?utf-8?q?r=C3=A9_Lureau?= , =?utf-8?q?Philipp?= =?utf-8?q?e_Mathieu-Daud=C3=A9?= Subject: [PULL 70/76] util/readline: Add C-u shortcut Date: Tue, 18 Jun 2024 18:00:32 +0200 Message-ID: <20240618160039.36108-71-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::429; envelope-from=philmd@linaro.org; helo=mail-wr1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Manos Pitsidianakis Add support for the unix-line-discard readline action, which erases from the cursor position up to the beginning of the line. The default binding, C-u, was chosen. This is useful to quickly erase command input while working on the monitor interface. Signed-off-by: Manos Pitsidianakis Reviewed-by: Marc-André Lureau Message-ID: <6772067e1c0d4b1c5310e5446e9e3e1c6b3b5bc0.1718265822.git.manos.pitsidianakis@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- util/readline.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/util/readline.c b/util/readline.c index 0b627d62ad..0f19674f52 100644 --- a/util/readline.c +++ b/util/readline.c @@ -271,6 +271,14 @@ static void readline_hist_add(ReadLineState *rs, const char *cmdline) rs->hist_entry = -1; } +static void readline_kill_line(ReadLineState *rs) +{ + while (rs->cmd_buf_index > 0) { + readline_backward_char(rs); + readline_delete_char(rs); + } +} + /* completion support */ void readline_add_completion(ReadLineState *rs, const char *str) @@ -426,6 +434,10 @@ void readline_handle_byte(ReadLineState *rs, int ch) /* ^P Prev line in history */ readline_up_char(rs); break; + case 21: + /* ^U Kill backward from point to the beginning of the line. */ + readline_kill_line(rs); + break; case 23: /* ^W */ readline_backword(rs); From patchwork Tue Jun 18 16:00:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702635 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9C2D1C41513 for ; Tue, 18 Jun 2024 16:11:59 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sJbN3-0004IV-6U; Tue, 18 Jun 2024 12:07:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sJbMr-0003ot-0S for qemu-devel@nongnu.org; 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Tue, 18 Jun 2024 09:07:29 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-422870e986asm233111365e9.27.2024.06.18.09.07.28 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:07:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Gerd Hoffmann , Manos Pitsidianakis , =?utf-8?q?Philippe_Ma?= =?utf-8?q?thieu-Daud=C3=A9?= Subject: [PULL 71/76] MAINTAINERS: drop virtio-gpu maintainership Date: Tue, 18 Jun 2024 18:00:33 +0200 Message-ID: <20240618160039.36108-72-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Gerd Hoffmann Remove myself from virtio-gpu entries. Flip status to "Orphan" for entries which have nobody else listed. Signed-off-by: Gerd Hoffmann Reviewed-by: Manos Pitsidianakis Message-ID: <20240528083858.836262-4-kraxel@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 0f63bcdc7d..7cc6421e3b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2579,8 +2579,7 @@ F: hw/display/ramfb*.c F: include/hw/display/ramfb.h virtio-gpu -M: Gerd Hoffmann -S: Odd Fixes +S: Orphan F: hw/display/virtio-gpu* F: hw/display/virtio-vga.* F: include/hw/virtio/virtio-gpu.h @@ -2602,7 +2601,6 @@ F: include/hw/virtio/virtio-blk-common.h vhost-user-gpu M: Marc-André Lureau -R: Gerd Hoffmann S: Maintained F: docs/interop/vhost-user-gpu.rst F: contrib/vhost-user-gpu From patchwork Tue Jun 18 16:00:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702614 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E965EC27C4F for ; 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Tue, 18 Jun 2024 09:07:35 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3607509c785sm14365407f8f.34.2024.06.18.09.07.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:07:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Gerd Hoffmann , Manos Pitsidianakis , =?utf-8?q?Philippe_Ma?= =?utf-8?q?thieu-Daud=C3=A9?= Subject: [PULL 72/76] MAINTAINERS: drop spice+ui maintainership Date: Tue, 18 Jun 2024 18:00:34 +0200 Message-ID: <20240618160039.36108-73-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=philmd@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Gerd Hoffmann Remove myself from spice and ui entries. Flip status to "Orphan" for entries which have nobody else listed. Signed-off-by: Gerd Hoffmann Reviewed-by: Manos Pitsidianakis Message-ID: <20240528083858.836262-5-kraxel@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 7cc6421e3b..cef54de759 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3058,8 +3058,7 @@ F: stubs/memory_device.c F: docs/nvdimm.txt SPICE -M: Gerd Hoffmann -S: Odd Fixes +S: Orphan F: include/ui/qemu-spice.h F: include/ui/spice-display.h F: ui/spice-*.c @@ -3069,7 +3068,6 @@ F: qapi/ui.json F: docs/spice-port-fqdn.txt Graphics -M: Gerd Hoffmann M: Marc-André Lureau S: Odd Fixes F: ui/ From patchwork Tue Jun 18 16:00:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 13702679 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 099B3C2BBCA for ; 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Tue, 18 Jun 2024 09:07:40 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-36075104a8fsm14332891f8f.110.2024.06.18.09.07.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:07:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Akihiko Odaki , Phil Dennis-Jordan , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PULL 73/76] ui/cocoa: Use qemu_add_mouse_change_notifier Date: Tue, 18 Jun 2024 18:00:35 +0200 Message-ID: <20240618160039.36108-74-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=philmd@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Akihiko Odaki This eliminates the polling in cocoa_refresh and implements the propagation of the mouse mode change from absolute to relative. Signed-off-by: Akihiko Odaki Reviewed-by: Phil Dennis-Jordan Tested-by: Phil Dennis-Jordan Message-ID: <20240322-mouse-v1-1-0b7d4d9bdfbf@daynix.com> Signed-off-by: Philippe Mathieu-Daudé --- ui/cocoa.m | 62 +++++++++++++++++++++++++++++++++--------------------- 1 file changed, 38 insertions(+), 24 deletions(-) diff --git a/ui/cocoa.m b/ui/cocoa.m index 981615a8b9..2935247cdd 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -296,6 +296,14 @@ @interface QemuCocoaView : NSView { QEMUScreen screen; pixman_image_t *pixman_image; + /* The state surrounding mouse grabbing is potentially confusing. + * isAbsoluteEnabled tracks qemu_input_is_absolute() [ie "is the emulated + * pointing device an absolute-position one?"], but is only updated on + * next refresh. + * isMouseGrabbed tracks whether GUI events are directed to the guest; + * it controls whether special keys like Cmd get sent to the guest, + * and whether we capture the mouse when in non-absolute mode. + */ BOOL isMouseGrabbed; BOOL isAbsoluteEnabled; CFMachPortRef eventsTap; @@ -307,17 +315,8 @@ - (void) setFullGrab:(id)sender; - (void) handleMonitorInput:(NSEvent *)event; - (bool) handleEvent:(NSEvent *)event; - (bool) handleEventLocked:(NSEvent *)event; -- (void) setAbsoluteEnabled:(BOOL)tIsAbsoluteEnabled; -/* The state surrounding mouse grabbing is potentially confusing. - * isAbsoluteEnabled tracks qemu_input_is_absolute() [ie "is the emulated - * pointing device an absolute-position one?"], but is only updated on - * next refresh. - * isMouseGrabbed tracks whether GUI events are directed to the guest; - * it controls whether special keys like Cmd get sent to the guest, - * and whether we capture the mouse when in non-absolute mode. - */ +- (void) notifyMouseModeChange; - (BOOL) isMouseGrabbed; -- (BOOL) isAbsoluteEnabled; - (QEMUScreen) gscreen; - (void) raiseAllKeys; @end @@ -404,6 +403,7 @@ - (void) selectConsoleLocked:(unsigned int)index qkbd_state_switch_console(kbd, con); dcl.con = con; register_displaychangelistener(&dcl); + [self notifyMouseModeChange]; [self updateUIInfo]; } @@ -1109,14 +1109,26 @@ - (void) ungrabMouse [self raiseAllButtons]; } -- (void) setAbsoluteEnabled:(BOOL)tIsAbsoluteEnabled { +- (void) notifyMouseModeChange { + bool tIsAbsoluteEnabled = bool_with_bql(^{ + return qemu_input_is_absolute(dcl.con); + }); + + if (tIsAbsoluteEnabled == isAbsoluteEnabled) { + return; + } + isAbsoluteEnabled = tIsAbsoluteEnabled; + if (isMouseGrabbed) { - CGAssociateMouseAndMouseCursorPosition(isAbsoluteEnabled); + if (isAbsoluteEnabled) { + [self ungrabMouse]; + } else { + CGAssociateMouseAndMouseCursorPosition(isAbsoluteEnabled); + } } } - (BOOL) isMouseGrabbed {return isMouseGrabbed;} -- (BOOL) isAbsoluteEnabled {return isAbsoluteEnabled;} - (QEMUScreen) gscreen {return screen;} /* @@ -1791,6 +1803,17 @@ static void addRemovableDevicesMenuItems(void) qapi_free_BlockInfoList(pointerToFree); } +static void cocoa_mouse_mode_change_notify(Notifier *notifier, void *data) +{ + dispatch_async(dispatch_get_main_queue(), ^{ + [cocoaView notifyMouseModeChange]; + }); +} + +static Notifier mouse_mode_change_notifier = { + .notify = cocoa_mouse_mode_change_notify +}; + @interface QemuCocoaPasteboardTypeOwner : NSObject @end @@ -1975,17 +1998,6 @@ static void cocoa_refresh(DisplayChangeListener *dcl) COCOA_DEBUG("qemu_cocoa: cocoa_refresh\n"); graphic_hw_update(dcl->con); - if (qemu_input_is_absolute(dcl->con)) { - dispatch_async(dispatch_get_main_queue(), ^{ - if (![cocoaView isAbsoluteEnabled]) { - if ([cocoaView isMouseGrabbed]) { - [cocoaView ungrabMouse]; - } - } - [cocoaView setAbsoluteEnabled:YES]; - }); - } - if (cbchangecount != [[NSPasteboard generalPasteboard] changeCount]) { qemu_clipboard_info_unref(cbinfo); cbinfo = qemu_clipboard_info_new(&cbpeer, QEMU_CLIPBOARD_SELECTION_CLIPBOARD); @@ -2062,6 +2074,8 @@ static void cocoa_display_init(DisplayState *ds, DisplayOptions *opts) // register vga output callbacks register_displaychangelistener(&dcl); + qemu_add_mouse_mode_change_notifier(&mouse_mode_change_notifier); + [cocoaView notifyMouseModeChange]; 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Tue, 18 Jun 2024 09:07:47 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-422f6320b11sm193452445e9.29.2024.06.18.09.07.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:07:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Gerd Hoffmann , qemu-stable@nongnu.org, =?utf-8?q?Mar?= =?utf-8?q?c-Andr=C3=A9_Lureau?= , =?utf-8?q?Ph?= =?utf-8?q?ilippe_Mathieu-Daud=C3=A9?= Subject: [PULL 74/76] stdvga: fix screen blanking Date: Tue, 18 Jun 2024 18:00:36 +0200 Message-ID: <20240618160039.36108-75-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::232; envelope-from=philmd@linaro.org; helo=mail-lj1-x232.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Gerd Hoffmann In case the display surface uses a shared buffer (i.e. uses vga vram directly instead of a shadow) go unshare the buffer before clearing it. This avoids vga memory corruption, which in turn fixes unblanking not working properly with X11. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2067 Signed-off-by: Gerd Hoffmann Reviewed-by: Marc-André Lureau Message-ID: <20240605131444.797896-2-kraxel@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/display/vga.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/hw/display/vga.c b/hw/display/vga.c index 30facc6c8e..be2b19b839 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -1762,6 +1762,13 @@ static void vga_draw_blank(VGACommonState *s, int full_update) if (s->last_scr_width <= 0 || s->last_scr_height <= 0) return; + if (is_buffer_shared(surface)) { + /* unshare buffer, otherwise the blanking corrupts vga vram */ + surface = qemu_create_displaysurface(s->last_scr_width, + s->last_scr_height); + dpy_gfx_replace_surface(s->con, surface); + } + w = s->last_scr_width * surface_bytes_per_pixel(surface); d = surface_data(surface); for(i = 0; i < s->last_scr_height; i++) { From patchwork Tue Jun 18 16:00:37 2024 Content-Type: text/plain; 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Tue, 18 Jun 2024 09:07:52 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Gerd Hoffmann , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 75/76] ui+display: rename is_placeholder() -> surface_is_placeholder() Date: Tue, 18 Jun 2024 18:00:37 +0200 Message-ID: <20240618160039.36108-76-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=philmd@linaro.org; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Gerd Hoffmann No functional change. Signed-off-by: Gerd Hoffmann Reviewed-by: Marc-André Lureau Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20240605131444.797896-3-kraxel@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/ui/surface.h | 2 +- ui/console.c | 2 +- ui/sdl2-2d.c | 2 +- ui/sdl2-gl.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/include/ui/surface.h b/include/ui/surface.h index 4244e0ca4a..273bb4769a 100644 --- a/include/ui/surface.h +++ b/include/ui/surface.h @@ -50,7 +50,7 @@ static inline int is_buffer_shared(DisplaySurface *surface) return !(surface->flags & QEMU_ALLOCATED_FLAG); } -static inline int is_placeholder(DisplaySurface *surface) +static inline int surface_is_placeholder(DisplaySurface *surface) { return surface->flags & QEMU_PLACEHOLDER_FLAG; } diff --git a/ui/console.c b/ui/console.c index 1b2cd0c736..c2173fc0b1 100644 --- a/ui/console.c +++ b/ui/console.c @@ -1510,7 +1510,7 @@ void qemu_console_resize(QemuConsole *s, int width, int height) assert(QEMU_IS_GRAPHIC_CONSOLE(s)); if ((s->scanout.kind != SCANOUT_SURFACE || - (surface && !is_buffer_shared(surface) && !is_placeholder(surface))) && + (surface && !is_buffer_shared(surface) && !surface_is_placeholder(surface))) && qemu_console_get_width(s, -1) == width && qemu_console_get_height(s, -1) == height) { return; diff --git a/ui/sdl2-2d.c b/ui/sdl2-2d.c index 06468cd493..73052383c2 100644 --- a/ui/sdl2-2d.c +++ b/ui/sdl2-2d.c @@ -72,7 +72,7 @@ void sdl2_2d_switch(DisplayChangeListener *dcl, scon->texture = NULL; } - if (is_placeholder(new_surface) && qemu_console_get_index(dcl->con)) { + if (surface_is_placeholder(new_surface) && qemu_console_get_index(dcl->con)) { sdl2_window_destroy(scon); return; } diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c index 28d796607c..91b7ee2419 100644 --- a/ui/sdl2-gl.c +++ b/ui/sdl2-gl.c @@ -89,7 +89,7 @@ void sdl2_gl_switch(DisplayChangeListener *dcl, scon->surface = new_surface; - if (is_placeholder(new_surface) && qemu_console_get_index(dcl->con)) { + if (surface_is_placeholder(new_surface) && qemu_console_get_index(dcl->con)) { qemu_gl_fini_shader(scon->gls); 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Tue, 18 Jun 2024 09:07:58 -0700 (PDT) Received: from m1x-phil.lan ([176.187.212.55]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-422f602ee95sm196723925e9.13.2024.06.18.09.07.57 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 18 Jun 2024 09:07:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Gerd Hoffmann , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paul Durrant , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 76/76] ui+display: rename is_buffer_shared() -> surface_is_allocated() Date: Tue, 18 Jun 2024 18:00:38 +0200 Message-ID: <20240618160039.36108-77-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240618160039.36108-1-philmd@linaro.org> References: <20240618160039.36108-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Gerd Hoffmann Boolean return value is reversed, to align with QEMU_ALLOCATED_FLAG, so all callers must be adapted. Also rename share_surface variable in vga_draw_graphic() to reduce confusion. No functional change. Suggested-by: Marc-André Lureau Signed-off-by: Gerd Hoffmann Reviewed-by: Paul Durrant Reviewed-by: Marc-André Lureau Message-ID: <20240605131444.797896-4-kraxel@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/ui/surface.h | 4 ++-- hw/display/qxl-render.c | 2 +- hw/display/vga.c | 20 ++++++++++---------- hw/display/xenfb.c | 5 +++-- ui/console.c | 3 ++- 5 files changed, 18 insertions(+), 16 deletions(-) diff --git a/include/ui/surface.h b/include/ui/surface.h index 273bb4769a..345b19169d 100644 --- a/include/ui/surface.h +++ b/include/ui/surface.h @@ -45,9 +45,9 @@ void qemu_displaysurface_win32_set_handle(DisplaySurface *surface, DisplaySurface *qemu_create_displaysurface(int width, int height); void qemu_free_displaysurface(DisplaySurface *surface); -static inline int is_buffer_shared(DisplaySurface *surface) +static inline int surface_is_allocated(DisplaySurface *surface) { - return !(surface->flags & QEMU_ALLOCATED_FLAG); + return surface->flags & QEMU_ALLOCATED_FLAG; } static inline int surface_is_placeholder(DisplaySurface *surface) diff --git a/hw/display/qxl-render.c b/hw/display/qxl-render.c index ec99ec887a..8daae72c8d 100644 --- a/hw/display/qxl-render.c +++ b/hw/display/qxl-render.c @@ -31,7 +31,7 @@ static void qxl_blit(PCIQXLDevice *qxl, QXLRect *rect) uint8_t *src; int len, i; - if (is_buffer_shared(surface)) { + if (!surface_is_allocated(surface)) { return; } trace_qxl_render_blit(qxl->guest_primary.qxl_stride, diff --git a/hw/display/vga.c b/hw/display/vga.c index be2b19b839..892fedc8dc 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -1487,7 +1487,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) uint8_t *d; uint32_t v, addr1, addr; vga_draw_line_func *vga_draw_line = NULL; - bool share_surface, force_shadow = false; + bool allocate_surface, force_shadow = false; pixman_format_code_t format; #if HOST_BIG_ENDIAN bool byteswap = !s->big_endian_fb; @@ -1609,10 +1609,10 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) */ format = qemu_default_pixman_format(depth, !byteswap); if (format) { - share_surface = dpy_gfx_check_format(s->con, format) - && !s->force_shadow && !force_shadow; + allocate_surface = !dpy_gfx_check_format(s->con, format) + || s->force_shadow || force_shadow; } else { - share_surface = false; + allocate_surface = true; } if (s->params.line_offset != s->last_line_offset || @@ -1620,7 +1620,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) height != s->last_height || s->last_depth != depth || s->last_byteswap != byteswap || - share_surface != is_buffer_shared(surface)) { + allocate_surface != surface_is_allocated(surface)) { /* display parameters changed -> need new display surface */ s->last_scr_width = disp_width; s->last_scr_height = height; @@ -1635,14 +1635,14 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) full_update = 1; } if (surface_data(surface) != s->vram_ptr + (s->params.start_addr * 4) - && is_buffer_shared(surface)) { + && !surface_is_allocated(surface)) { /* base address changed (page flip) -> shared display surfaces * must be updated with the new base address */ full_update = 1; } if (full_update) { - if (share_surface) { + if (!allocate_surface) { surface = qemu_create_displaysurface_from(disp_width, height, format, s->params.line_offset, s->vram_ptr + (s->params.start_addr * 4)); @@ -1655,7 +1655,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) vga_draw_line = vga_draw_line_table[v]; - if (!is_buffer_shared(surface) && s->cursor_invalidate) { + if (surface_is_allocated(surface) && s->cursor_invalidate) { s->cursor_invalidate(s); } @@ -1707,7 +1707,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) if (update) { if (y_start < 0) y_start = y; - if (!(is_buffer_shared(surface))) { + if (surface_is_allocated(surface)) { uint8_t *p; p = vga_draw_line(s, d, addr, width, hpel); if (p) { @@ -1762,7 +1762,7 @@ static void vga_draw_blank(VGACommonState *s, int full_update) if (s->last_scr_width <= 0 || s->last_scr_height <= 0) return; - if (is_buffer_shared(surface)) { + if (!surface_is_allocated(surface)) { /* unshare buffer, otherwise the blanking corrupts vga vram */ surface = qemu_create_displaysurface(s->last_scr_width, s->last_scr_height); diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c index ff442ced1a..314d378a1b 100644 --- a/hw/display/xenfb.c +++ b/hw/display/xenfb.c @@ -638,7 +638,7 @@ static void xenfb_guest_copy(struct XenFB *xenfb, int x, int y, int w, int h) int linesize = surface_stride(surface); uint8_t *data = surface_data(surface); - if (!is_buffer_shared(surface)) { + if (surface_is_allocated(surface)) { switch (xenfb->depth) { case 8: if (bpp == 16) { @@ -756,7 +756,8 @@ static void xenfb_update(void *opaque) xen_pv_printf(&xenfb->c.xendev, 1, "update: resizing: %dx%d @ %d bpp%s\n", xenfb->width, xenfb->height, xenfb->depth, - is_buffer_shared(surface) ? " (shared)" : ""); + surface_is_allocated(surface) + ? " (allocated)" : " (borrowed)"); xenfb->up_fullscreen = 1; } diff --git a/ui/console.c b/ui/console.c index c2173fc0b1..e67c5dae2b 100644 --- a/ui/console.c +++ b/ui/console.c @@ -1510,7 +1510,8 @@ void qemu_console_resize(QemuConsole *s, int width, int height) assert(QEMU_IS_GRAPHIC_CONSOLE(s)); if ((s->scanout.kind != SCANOUT_SURFACE || - (surface && !is_buffer_shared(surface) && !surface_is_placeholder(surface))) && + (surface && surface_is_allocated(surface) && + !surface_is_placeholder(surface))) && qemu_console_get_width(s, -1) == width && qemu_console_get_height(s, -1) == height) { return;