From patchwork Tue Jun 18 16:51:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nishanth Menon X-Patchwork-Id: 13702756 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 655C9C2BA18 for ; Tue, 18 Jun 2024 16:51:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=Lskly1cpf/KK45sXXzIGa0MObnom7s5TrJAIodueiVc=; b=UHzmj5n6s8RZ3bZVfnqPFNKvzW bE+6qkheaUp7EJWmacWJUspbOMvdlySjMb8pjzFAknDq1KZtqF9Q+i6XfRqPHJduumQFwXouRGYiy M8eFONguoxxL2IFRw2krWtJvNyi331gFSuHOgKXRI3uu/SNgDmIWzakAHLUBR9qRkteRYKlYdZ47z AKUvMxQWFcOIaitx5VgyM5F3r/XCZRgGO56dx0fY4shrCTky4aH+yS3TKLcJEUj80bhNjP7UKvaYT 46G0e5iUMnSn+jevh1z25kJA3M7HjzjyD+0L6t6QYtGDMRHnFAp/s08JB+YdoujEi+62i24+RX0yh S4YUYlMA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJc3M-0000000Fvdr-1KX4; Tue, 18 Jun 2024 16:51:28 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sJc3F-0000000Fvb2-4AYz for linux-arm-kernel@lists.infradead.org; Tue, 18 Jun 2024 16:51:24 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 45IGpDMF076556; Tue, 18 Jun 2024 11:51:13 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1718729473; bh=Lskly1cpf/KK45sXXzIGa0MObnom7s5TrJAIodueiVc=; h=From:To:CC:Subject:Date; b=peWq96JOt2s62Np7PdA1WTiiX3iRmEThy5SJtE28l8lEq/RCwP/HJQfCPRIYfHLFI 0cEICnC4gsAlmI+O1E0RuNcBvJ74NdE0vfgGZnIOVYinKhuJOk7OVvNKhzQdECYkEg 0x5Zo59rVI+1/tbmLABybEPYOGqdnqPP41iNpl44= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 45IGpDGA003937 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 18 Jun 2024 11:51:13 -0500 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 18 Jun 2024 11:51:13 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 18 Jun 2024 11:51:13 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 45IGpDWx008333; Tue, 18 Jun 2024 11:51:13 -0500 From: Nishanth Menon To: Tony Lindgren , Conor Dooley , Krzysztof Kozlowski , Rob Herring , Linus Walleij CC: , , , , Nishanth Menon Subject: [PATCH] dt-bindings: pinctrl: pinctrl-single: Define a max count for "pinctrl-single,gpio-range" Date: Tue, 18 Jun 2024 11:51:02 -0500 Message-ID: <20240618165102.2380159-1-nm@ti.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Organization: Texas Instruments, Inc. X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240618_095122_147410_55F3005C X-CRM114-Status: GOOD ( 12.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org "pinctrl-single,gpio-range" allows us to define a dis-contiguous range of pinctrl registers that can have different mux settings for GPIO mode of operation. However, the maxItems seem to be set to 1 in processed schema for some reason. This is incorrect. For example: arch/arm64/boot/dts/hisilicon/hi6220.dtsi and others have more than one dis-contiguous range. Arbitrarily define a max 100 count to override the defaults. Signed-off-by: Nishanth Menon --- I am not sure if I should call this RFC or not.. and if this is even the right solution.. I am on 2024.05 dt-schema for this check. I noticed this when adding gpio-ranges for am62p platform: https://gist.github.com/nmenon/7019cd2f24be47997640df5db60a7544 It is possible that this is a bug in dt-schema, but I have'nt been able to track it down either. behavior seen is the following: pinctrl-single,gpio-range = <&mcu_pmx_range 0 21 7>; generates no warning However, pinctrl-single,gpio-range = <&mcu_pmx_range 0 21 7>, <&mcu_pmx_range 32 2 7>; generates "is too long" warning. Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml | 1 + 1 file changed, 1 insertion(+) base-commit: 76db4c64526c5e8ba0f56ad3d890dce8f9b00bbc diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml index c11495524dd2..416a70db14af 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.yaml @@ -74,6 +74,7 @@ properties: pinctrl-single,gpio-range: description: Optional list of pin base, nr pins & gpio function $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 100 items: - items: - description: phandle of a gpio-range node