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[209.91.167.254]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-6b2a5bf2546sm83012256d6.14.2024.06.19.18.33.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jun 2024 18:33:46 -0700 (PDT) From: Trevor Woerner To: linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Jonas Karlman , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-rockchip@lists.infradead.org (open list:ARM/Rockchip SoC support) Subject: [PATCH] arm64: dts: rockchip: add gpio-line-names to radxa-zero-3 Date: Wed, 19 Jun 2024 21:32:49 -0400 Message-ID: <20240620013301.33653-1-twoerner@gmail.com> X-Mailer: git-send-email 2.44.0.501.g19981daefd7c MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240619_183349_320414_4D8B4114 X-CRM114-Status: UNSURE ( 9.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add names to the pins of the general-purpose expansion header as given in the Radxa documentation[1] following the conventions in the kernel[2] to make it easier for users to correlate pins with functions when using utilities such as 'gpioinfo'. [1] https://docs.radxa.com/en/zero/zero3/hardware-design/hardware-interface [2] https://www.kernel.org/doc/Documentation/devicetree/bindings/gpio/gpio.txt Signed-off-by: Trevor Woerner --- .../dts/rockchip/rk3566-radxa-zero-3.dtsi | 72 +++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi index 623d5939d194..b72d75b908a2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi @@ -109,6 +109,78 @@ &cpu3 { cpu-supply = <&vdd_cpu>; }; +&gpio0 { + gpio-line-names = + /* GPIO0_A0 - A7 */ + "", "", "", "", "", "", "", "", + /* GPIO0_B0 - B7 */ + "", "", "", "", "", "", "", "", + /* GPIO0_C0 - C7 */ + "", "", "", "", "", "", "", "", + /* GPIO0_D0 - D7 */ + "pin-10 [GPIO0_D0]", "pin-08 [GPIO0_D1]", "", + "", "", "", "", ""; +}; + +&gpio1 { + gpio-line-names = + /* GPIO1_A0 - A7 */ + "pin-03 [GPIO1_A0]", "pin-05 [GPIO1_A1]", "", + "", "pin-37 [GPIO1_A4]", "", + "", "", + /* GPIO1_B0 - B7 */ + "", "", "", "", "", "", "", "", + /* GPIO1_C0 - C7 */ + "", "", "", "", "", "", "", "", + /* GPIO1_D0 - D7 */ + "", "", "", "", "", "", "", ""; +}; + +&gpio2 { + gpio-line-names = + /* GPIO2_A0 - A7 */ + "", "", "", "", "", "", "", "", + /* GPIO2_B0 - B7 */ + "", "", "", "", "", "", "", "", + /* GPIO2_C0 - C7 */ + "", "", "", "", "", "", "", "", + /* GPIO2_D0 - D7 */ + "", "", "", "", "", "", "", ""; +}; + +&gpio3 { + gpio-line-names = + /* GPIO3_A0 - A7 */ + "", "pin-11 [GPIO3_A1]", "pin-13 [GPIO3_A2]", + "pin-12 [GPIO3_A3]", "pin-35 [GPIO3_A4]", "pin-40 [GPIO3_A5]", + "pin-38 [GPIO3_A6]", "pin-36 [GPIO3_A7]", + /* GPIO3_B0 - B7 */ + "pin-15 [GPIO3_B0]", "pin-16 [GPIO3_B1]", "pin-18 [GPIO3_B2]", + "pin-29 [GPIO3_B3]", "pin-31 [GPIO3_B4]", "", + "", "", + /* GPIO3_C0 - C7 */ + "", "pin-22 [GPIO3_C1]", "pin-32 [GPIO3_C2]", + "pin-33 [GPIO3_C3]", "pin-07 [GPIO3_C4]", "", + "", "", + /* GPIO3_D0 - D7 */ + "", "", "", "", "", "", "", ""; +}; + +&gpio4 { + gpio-line-names = + /* GPIO4_A0 - A7 */ + "", "", "", "", "", "", "", "", + /* GPIO4_B0 - B7 */ + "", "", "pin-27 [GPIO4_B2]", + "pin-28 [GPIO4_B3]", "", "", "", "", + /* GPIO4_C0 - C7 */ + "", "", "pin-23 [GPIO4_C2]", + "pin-19 [GPIO4_C3]", "", "pin-21 [GPIO4_C5]", + "pin-24 [GPIO4_C6]", "", + /* GPIO4_D0 - D7 */ + "", "", "", "", "", "", "", ""; +}; + &gpu { mali-supply = <&vdd_gpu_npu>; status = "okay";