From patchwork Thu Jun 20 12:01:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13705301 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E280C1A4F3D; Thu, 20 Jun 2024 12:06:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718885208; cv=none; b=biRQURLEId2FgJd+twg6gSvS8hMj3XMdrJTZi0T+yKpzaqH2y4/Q3QqNxiU1Cj09WfX2jzrIpuxqZt9tGldvidBK3eEZ18JLMiiRvLqeBKhilyEy5GE9VhZz3I1/CJ7zzSZJYWa+VP7hjg+dRDff68eMIgJGmcR4utOOGK/uLQY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718885208; c=relaxed/simple; bh=OvvuAY6JJeKz8HMylM8rgAQ3tTJmQ8c69rhKOwcV0/o=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=GufGnpEzMEFebHEpCKUiOZYAh6pQCam6DDOaAfKgT4KBFXajRACJht1VFxuJDyfvCUJzAo7+BGzlJoo0SHpO2YYr7FTu4Fbpl1RrG8ZkEeaN8xtNsAjuJ1rghtPHU3mdwkzKnsk0kRcvxmdMzKzxNmyfSIPA8TBpFPPL1Ojowr4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=fRO7UO76; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="fRO7UO76" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 45K9v8Ie016880; Thu, 20 Jun 2024 12:06:42 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 5tRKl3MbIlCDWeWB/RY5B88txA5Kn3AKNMxA1n/Auy0=; b=fRO7UO76xzdewTIR unnfobTROV7xE6ZkTMnFCf+mkcUsIuv3Q5jDHZehTv61css+XyKX+08pSpDO0zRh RLUCqOp2bV/bjwrDxGOMwT2rMALWD5cR13iD2o6B3FAJPvhpP7QfDUs+HjALRv5P /agj1quBvnBIhAEx58H2VUN29Al0hFqKtSJtCQ397S8Ao77Vy6L+MCX+rKwLO63p fY3wUq2GUA7DMPX/JEl6bdeA70y2LLHDUNN2ElrHQZ6A+35QN3JRfMUHNmfDR22i p68joYAx4x2N7tN3TKkRZGWEWpSoj2McPpseJbvvaZ6S0Jad1j6snDVFqvThTqui L6AkGQ== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3yuj9x4dpe-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 20 Jun 2024 12:06:42 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 45KC6fUc019754 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 20 Jun 2024 12:06:41 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 20 Jun 2024 05:06:37 -0700 From: Komal Bajaj To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , , Melody Olvera , Komal Bajaj Subject: [PATCH v3 1/4] dt-bindings: remoteproc: mpss: Document QDU1000/QRU1000 mpss devices Date: Thu, 20 Jun 2024 17:31:40 +0530 Message-ID: <20240620120143.12375-2-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240620120143.12375-1-quic_kbajaj@quicinc.com> References: <20240620120143.12375-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 18-OQiEz8jUQkypsXdJLhjO3Y92KtTfj X-Proofpoint-GUID: 18-OQiEz8jUQkypsXdJLhjO3Y92KtTfj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-20_07,2024-06-20_03,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=999 impostorscore=0 priorityscore=1501 suspectscore=0 mlxscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 bulkscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406200087 From: Melody Olvera Document the compatible for the component used to boot the MPSS on the QDU1000 and QRU1000 SoCs. The QDU1000 and QRU1000 mpss boot process now requires the specification of an RMB register space to complete the handshake needed to start or attach the mpss. Signed-off-by: Melody Olvera Signed-off-by: Komal Bajaj --- .../remoteproc/qcom,qdu1000-mpss-pas.yaml | 129 ++++++++++++++++++ 1 file changed, 129 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml -- 2.42.0 diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml new file mode 100644 index 000000000000..71c5a85b679e --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,qdu1000-mpss-pas.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,qdu1000-mpss-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm QDU1000 Modem Peripheral Authentication Service + +maintainers: + - Melody Olvera + - Komal Bajaj + +description: + Qualcomm QDU1000 SoC Peripheral Authentication Service loads and boots firmware + on the Qualcomm DSP Hexagon core. + +properties: + compatible: + enum: + - qcom,qdu1000-mpss-pas + + reg: + items: + - description: Address offset and size for MPSS PAS register set + - description: Address offset and size for MPSS RMB register set + + reg-names: + items: + - const: base + - const: rmb + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + firmware-name: + items: + - description: Firmware name of the Hexagon core + - description: Firmware name of the Hexagon Devicetree + + memory-region: + items: + - description: Memory region for main Firmware authentication + - description: Memory region for Devicetree Firmware authentication + - description: DSM Memory region + + power-domains: + items: + - description: CX power domain + - description: MSS power domain + + power-domain-names: + items: + - const: cx + - const: mss + +required: + - compatible + - reg + - reg-names + - memory-region + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + #include + #include + #include + + remoteproc@4080000 { + compatible = "qcom,qdu1000-mpss-pas"; + reg = <0x4080000 0x4040>, + <0x4180000 0x1000>; + reg-names = "base", "rmb"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 3 IRQ_TYPE_EDGE_RISING>, + <&smp2p_modem_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", "handover", + "stop-ack", "shutdown-ack"; + + memory-region = <&mpss_mem>, <&dtb_mpss_mem>, <&mpss_dsm_mem>; + + firmware-name = "qcom/qdu1000/modem.mbn", + "qcom/qdu1000/modem_dtb.mbn"; + + power-domains = <&rpmhpd QDU1000_CX>, + <&rpmhpd QDU1000_MSS>; + power-domain-names = "cx", "mss"; + + interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; + + qcom,qmp = <&aoss_qmp>; + + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_MPSS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "modem"; + qcom,remote-pid = <2>; + }; From patchwork Thu Jun 20 12:01:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13705302 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84D581AC79E; Thu, 20 Jun 2024 12:06:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718885213; cv=none; b=UU2s1sEGBtRDNE12TOgNJougP/GWc2RMGq34bECaFVmTYFfpG0ZR9iXp/wp0xCVTcv77XcFk+WVsYBA+ToHLfU9+CMdpKtIhPGQHREWLEMythM6HRhaEjVnCh/L4e55vBSwonYevYe/tBlPulTfRQKJy28Fr6X7DukwTc3bzd8o= ARC-Message-Signature: i=1; a=rsa-sha256; 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Thu, 20 Jun 2024 12:06:46 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 20 Jun 2024 05:06:42 -0700 From: Komal Bajaj To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , , Melody Olvera , Komal Bajaj Subject: [PATCH v3 2/4] remoteproc: qcom: q6v5: Add support for q6 rmb registers Date: Thu, 20 Jun 2024 17:31:41 +0530 Message-ID: <20240620120143.12375-3-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240620120143.12375-1-quic_kbajaj@quicinc.com> References: <20240620120143.12375-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: oAqG3KT74XTbgax34CDC89hW0cmA2xNT X-Proofpoint-ORIG-GUID: oAqG3KT74XTbgax34CDC89hW0cmA2xNT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-20_07,2024-06-20_03,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 impostorscore=0 suspectscore=0 mlxlogscore=877 spamscore=0 lowpriorityscore=0 priorityscore=1501 clxscore=1015 adultscore=0 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406200087 From: Melody Olvera When attaching a running Q6, the remoteproc driver needs a way to communicate with the Q6 using rmb registers, so allow the rmb register to be gotten from the device tree if present. Signed-off-by: Melody Olvera Signed-off-by: Komal Bajaj --- drivers/remoteproc/qcom_q6v5.h | 8 ++++++++ drivers/remoteproc/qcom_q6v5_pas.c | 4 ++++ 2 files changed, 12 insertions(+) -- 2.42.0 diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h index 5a859c41896e..95824d5b64ce 100644 --- a/drivers/remoteproc/qcom_q6v5.h +++ b/drivers/remoteproc/qcom_q6v5.h @@ -7,6 +7,12 @@ #include #include +#define RMB_BOOT_WAIT_REG 0x8 +#define RMB_BOOT_CONT_REG 0xC +#define RMB_Q6_BOOT_STATUS_REG 0x10 + +#define RMB_POLL_MAX_TIMES 250 + struct icc_path; struct rproc; struct qcom_smem_state; @@ -16,6 +22,8 @@ struct qcom_q6v5 { struct device *dev; struct rproc *rproc; + void __iomem *rmb_base; + struct qcom_smem_state *state; struct qmp *qmp; diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 8458bcfe9e19..b9759f6b2283 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -770,6 +770,10 @@ static int adsp_probe(struct platform_device *pdev) goto free_rproc; adsp->proxy_pd_count = ret; + adsp->q6v5.rmb_base = devm_platform_ioremap_resource_byname(pdev, "rmb"); + if (IS_ERR(adsp->q6v5.rmb_base)) + adsp->q6v5.rmb_base = NULL; + ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state, qcom_pas_handover); if (ret) From patchwork Thu Jun 20 12:01:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13705303 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3E1C1AC79E; Thu, 20 Jun 2024 12:06:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718885218; cv=none; b=mXLsNM9U8YK+tPTpt4K7mFlitYMy+U+pwE68gQRuvMbb3CW+GzJbKUpXcfgF7seBFPGVr+CupXJ9nBVCuLah/bpPKWmQDe8AZwQCfAsXvJ2ObAvuKWDnVaVXmPWE2wdo3p+6McS/HEo4sAH2aa4Ez9p7DRz6iRICZrpnXGZcuGg= ARC-Message-Signature: i=1; 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Thu, 20 Jun 2024 12:06:51 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 20 Jun 2024 05:06:47 -0700 From: Komal Bajaj To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , , Melody Olvera , Komal Bajaj Subject: [PATCH v3 3/4] remoteproc: qcom_q6v5_pas: Add support to attach a DSP Date: Thu, 20 Jun 2024 17:31:42 +0530 Message-ID: <20240620120143.12375-4-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240620120143.12375-1-quic_kbajaj@quicinc.com> References: <20240620120143.12375-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: p_PohCwMGe9Gv3U7DkX05K6Hp43cnmTD X-Proofpoint-GUID: p_PohCwMGe9Gv3U7DkX05K6Hp43cnmTD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-20_07,2024-06-20_03,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 suspectscore=0 priorityscore=1501 phishscore=0 mlxlogscore=841 mlxscore=0 malwarescore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406200087 From: Melody Olvera Some chipsets will have DSPs which will have begun running prior to linux booting, so add support to late attach these DSPs by adding support for: - run-time checking of an offline or running DSP via rmb register - a late attach framework to attach to the running DSP - a handshake mechanism to ensure full and proper booting via rmb Signed-off-by: Melody Olvera Signed-off-by: Komal Bajaj --- drivers/remoteproc/qcom_q6v5_pas.c | 102 +++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) -- 2.42.0 diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index b9759f6b2283..32d45c18e15e 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -258,6 +259,94 @@ static int adsp_load(struct rproc *rproc, const struct firmware *fw) return ret; } +static int adsp_signal_q6v5(struct qcom_adsp *adsp) +{ + unsigned int val; + int ret; + + if (adsp->q6v5.rmb_base) { + ret = readl_poll_timeout(adsp->q6v5.rmb_base + RMB_BOOT_WAIT_REG, + val, val, 20000, + RMB_POLL_MAX_TIMES * 20000); + if (ret < 0) + return ret; + + writel_relaxed(1, adsp->q6v5.rmb_base + RMB_BOOT_CONT_REG); + } + + return 0; +} + +static int adsp_attach(struct rproc *rproc) +{ + struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; + int ret; + + ret = qcom_q6v5_prepare(&adsp->q6v5); + if (ret) + return ret; + + ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); + if (ret < 0) + goto disable_irqs; + + ret = clk_prepare_enable(adsp->xo); + if (ret) + goto disable_proxy_pds; + + ret = clk_prepare_enable(adsp->aggre2_clk); + if (ret) + goto disable_xo_clk; + + if (adsp->cx_supply) { + ret = regulator_enable(adsp->cx_supply); + if (ret) + goto disable_aggre2_clk; + } + + if (adsp->px_supply) { + ret = regulator_enable(adsp->px_supply); + if (ret) + goto disable_cx_supply; + } + + /* if needed, signal Q6 to continute booting */ + ret = adsp_signal_q6v5(adsp); + if (ret < 0) { + dev_err(adsp->dev, "Didn't get rmb signal from %s\n", rproc->name); + goto disable_px_supply; + }; + + ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); + if (ret == -ETIMEDOUT) { + dev_err(adsp->dev, "start timed out\n"); + qcom_scm_pas_shutdown(adsp->pas_id); + goto disable_px_supply; + } + + return 0; + +disable_px_supply: + if (adsp->px_supply) + regulator_disable(adsp->px_supply); +disable_cx_supply: + if (adsp->cx_supply) + regulator_disable(adsp->cx_supply); +disable_aggre2_clk: + clk_disable_unprepare(adsp->aggre2_clk); +disable_xo_clk: + clk_disable_unprepare(adsp->xo); +disable_proxy_pds: + adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); +disable_irqs: + qcom_q6v5_unprepare(&adsp->q6v5); + + /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ + adsp->firmware = NULL; + + return ret; +} + static int adsp_start(struct rproc *rproc) { struct qcom_adsp *adsp = rproc->priv; @@ -320,6 +409,13 @@ static int adsp_start(struct rproc *rproc) goto release_pas_metadata; } + /* if needed, signal Q6 to continute booting */ + ret = adsp_signal_q6v5(adsp); + if (ret < 0) { + dev_err(adsp->dev, "Didn't get rmb signal from %s\n", rproc->name); + goto release_pas_metadata; + } + ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); if (ret == -ETIMEDOUT) { dev_err(adsp->dev, "start timed out\n"); @@ -432,6 +528,7 @@ static unsigned long adsp_panic(struct rproc *rproc) static const struct rproc_ops adsp_ops = { .unprepare = adsp_unprepare, .start = adsp_start, + .attach = adsp_attach, .stop = adsp_stop, .da_to_va = adsp_da_to_va, .parse_fw = qcom_register_dump_segments, @@ -442,6 +539,7 @@ static const struct rproc_ops adsp_ops = { static const struct rproc_ops adsp_minidump_ops = { .unprepare = adsp_unprepare, .start = adsp_start, + .attach = adsp_attach, .stop = adsp_stop, .da_to_va = adsp_da_to_va, .parse_fw = qcom_register_dump_segments, @@ -779,6 +877,10 @@ static int adsp_probe(struct platform_device *pdev) if (ret) goto detach_proxy_pds; + if (adsp->q6v5.rmb_base && + readl_relaxed(adsp->q6v5.rmb_base + RMB_Q6_BOOT_STATUS_REG)) + rproc->state = RPROC_DETACHED; + qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name); qcom_add_smd_subdev(rproc, &adsp->smd_subdev); adsp->sysmon = qcom_add_sysmon_subdev(rproc, From patchwork Thu Jun 20 12:01:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Komal Bajaj X-Patchwork-Id: 13705304 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 543DD200AF; Thu, 20 Jun 2024 12:07:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718885221; cv=none; b=B7SmsvCqDyAGRJWo0VcHQUiXNoUnAmsSonBUqNFiDcICWNoX2oQ3dW0kO7uAVEjJwpKQLqIQVNDcKA+wtcV6JssBffwLLVV3vxQ0NqsvP7WWsHtgWW9BUV2DRe8p2TDU2x4BBrK2ngZVnDO3Oc5NIvPnZTOXHsSZ7TkRgi5sWW8= ARC-Message-Signature: i=1; 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Thu, 20 Jun 2024 12:06:56 GMT Received: from hu-kbajaj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 20 Jun 2024 05:06:52 -0700 From: Komal Bajaj To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , , Melody Olvera , Komal Bajaj Subject: [PATCH v3 4/4] remoteproc: qcom_q6v5_pas: Add QDU1000/QRU1000 mpss compatible Date: Thu, 20 Jun 2024 17:31:43 +0530 Message-ID: <20240620120143.12375-5-quic_kbajaj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20240620120143.12375-1-quic_kbajaj@quicinc.com> References: <20240620120143.12375-1-quic_kbajaj@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: NOKW4OqSe_3M1EyIDZMwcwqub5SvmCO9 X-Proofpoint-GUID: NOKW4OqSe_3M1EyIDZMwcwqub5SvmCO9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-20_07,2024-06-20_03,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 mlxlogscore=999 impostorscore=0 suspectscore=0 mlxscore=0 malwarescore=0 adultscore=0 priorityscore=1501 spamscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405170001 definitions=main-2406200087 Add the compatible for the mpss found in the QDU1000 and QRU1000 SoCs. These platforms require the driver to complete a modem handshake using the RMB registers provided. Signed-off-by: Melody Olvera Signed-off-by: Komal Bajaj --- drivers/remoteproc/qcom_q6v5_pas.c | 1 + 1 file changed, 1 insertion(+) -- 2.42.0 diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index 32d45c18e15e..d543fa2572f8 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -1432,6 +1432,7 @@ static const struct of_device_id adsp_of_match[] = { { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init }, { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init }, { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init }, + { .compatible = "qcom,qdu1000-mpss-pas", .data = &sm8550_mpss_resource }, { .compatible = "qcom,sc7180-adsp-pas", .data = &sm8250_adsp_resource}, { .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init}, { .compatible = "qcom,sc7280-adsp-pas", .data = &sm8350_adsp_resource},