From patchwork Sat Jun 22 12:06:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5B207C27C53 for ; Sat, 22 Jun 2024 12:07:46 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWB-0007lw-CP; Sat, 22 Jun 2024 08:06:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW6-0007k4-Lp for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:50 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW4-0000JB-2A for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:49 -0400 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-35f2c9e23d3so2442389f8f.0 for ; Sat, 22 Jun 2024 05:06:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058006; x=1719662806; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=eWHSPGQ4OpgUOQnB0NTDT0+Cwh6MYZ+vbNYocaAOsiE=; b=zGA/CoOkJLs6A3+/Ziuajk72PZbmKI4HXTpAhQBqIas2U1ROZeMjoBhpGM98bdZ4eB 92aiGZSRVt2pJrXMwXH217QjsLLa/Za/8DXQNPTVuGTHHCBqK40Ox+IlpE2c6n6Z/huW EhMltvx9xHXVX3OzMg/M3E/5pp9qs21CHqNVstGxMRCOTmqmb3CrXAETvtc2tN77g/1X l1xsDHOMSOcaP1X+2EK2fdtxY8DSI4T8YxJdqvmmyQAkfX4bis2QgwhgxAD/Z0CTLWix cmxR8K8nv0Sz/NH5xvqqwxdayKF+23O6Ku6bp2NhL11KGSJ3vC3gDnHz3wc5kWIm1vqc aaNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058006; x=1719662806; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eWHSPGQ4OpgUOQnB0NTDT0+Cwh6MYZ+vbNYocaAOsiE=; b=cclfhpwb6nfbiP2GWjgbIM1v15mv71JpR2Q2RlrmI8uXwURjELuP37SD6eY18zOAwl M3Ugxro0JC3ltG50TCxHdRsHErCrJP0sTcHxhPPRT3cd7ryl9w+VzaT3Mzz3ARAGpyFw uZmPXl7mQ5AzwE+Q+P3VSZAeq1uXngvQz1qFeXGXFcsilDLWPjCJtn4B/XZM4jBudgI1 skRxa1VhIn1AB6STwirXEx96Kjo1BPH20jaHFgJ29Xdbt0ezic9IQUdpg/cyr+k6D+i/ Ln47MpeFd789X6r+27MqH8frfcZx6O5hKbk8zUnTxYJSdlYCRUxL5JmLme2Q/ef0khsF JtRQ== X-Gm-Message-State: AOJu0YxbSH7+QFPBHE7Gmh+fYdcT03DOxKVoR8JjoXFDJs/id/rH7+dx /YyzD4ENLbcx4iGf/9vKUP3tAsKdQ+7KMKSIT/930WHwivsUid2b2tzH2KHqOEq96n9eztt/lcE JKog= X-Google-Smtp-Source: AGHT+IHJ1cJtSx0r6XZSn7BemioWS7NiSOd58bUwtRO0y6LGequNK6i1cTHzeXf0euLWeGdoR9uvaA== X-Received: by 2002:a05:6000:1a8c:b0:360:728d:8439 with SMTP id ffacd0b85a97d-366e36491b7mr1214622f8f.2.1719058005778; Sat, 22 Jun 2024 05:06:45 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:45 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/18] hw/net/can/xlnx-versal-canfd: Fix sorting of the tx queue Date: Sat, 22 Jun 2024 13:06:26 +0100 Message-Id: <20240622120643.3797539-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Shiva sagar Myana Returning an uint32_t casted to a gint from g_cmp_ids causes the tx queue to become wrongly sorted when executing g_slist_sort. Fix this by always returning -1 or 1 from g_cmp_ids based on the ID comparison instead. Also, if two message IDs are the same, sort them by using their index and transmit the message at the lowest index first. Signed-off-by: Shiva sagar Myana Reviewed-by: Francisco Iglesias Message-id: 20240603051732.3334571-1-Shivasagar.Myana@amd.com Signed-off-by: Peter Maydell --- hw/net/can/xlnx-versal-canfd.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/net/can/xlnx-versal-canfd.c b/hw/net/can/xlnx-versal-canfd.c index 47a14cfe633..5f083c21e93 100644 --- a/hw/net/can/xlnx-versal-canfd.c +++ b/hw/net/can/xlnx-versal-canfd.c @@ -1312,7 +1312,10 @@ static gint g_cmp_ids(gconstpointer data1, gconstpointer data2) tx_ready_reg_info *tx_reg_1 = (tx_ready_reg_info *) data1; tx_ready_reg_info *tx_reg_2 = (tx_ready_reg_info *) data2; - return tx_reg_1->can_id - tx_reg_2->can_id; + if (tx_reg_1->can_id == tx_reg_2->can_id) { + return (tx_reg_1->reg_num < tx_reg_2->reg_num) ? -1 : 1; + } + return (tx_reg_1->can_id < tx_reg_2->can_id) ? -1 : 1; } static void free_list(GSList *list) From patchwork Sat Jun 22 12:06:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708300 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2812C27C53 for ; Sat, 22 Jun 2024 12:08:11 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWC-0007pa-Co; Sat, 22 Jun 2024 08:06:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW7-0007kG-0D for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:51 -0400 Received: from mail-wr1-x436.google.com ([2a00:1450:4864:20::436]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW4-0000JD-9y for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:50 -0400 Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-363bbd51050so2084493f8f.0 for ; Sat, 22 Jun 2024 05:06:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058006; x=1719662806; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=QdEbEVs429MCQSS+xvirVRecsUYVa5N98xC7KwBFFig=; b=IvheSQufPLTb94SbDF7bQHG/Di8UxMHjDXvg6yhS0oHlqPFqabr/aK+W83kuYJ0rO3 Z/W7tqTGPvk9H7esxVJzNOP5M/XJBS+vvc5/o4VTuHL+cS2Smc53Ahtuo0k4YshZG+xV ohdpLFGno9t1wv0Dn4HLZvayZP3zhtceGo1NLfXs8CDz4hyA1i72OnCJSucC8o1bfXMG uOVRH45UFEiJGDjntFAqPVXpqmXKLeEF4q3MHwg7ifdaJ2K3sbAtfX/w8/tD6AYmpofZ wr9pFr3nnOjO6QHpkju3nk2mUSsPbfHdlkMPOFrDY7K4nj5wbveZ2RpqzeYQtlHF5VrC HW7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058006; x=1719662806; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QdEbEVs429MCQSS+xvirVRecsUYVa5N98xC7KwBFFig=; b=clWL39PI9qdIFaDAl0y4RGDdviO6S0BfT3PtrkwoHV1HRB1IFO74Ub1s4JIezoYrxd pJ2Imm6m8p5NaMbf4z+QB7RGM1Zi8XUh0PK3ja2+P0ZYWBC3Dv8y/70ODhb7e9xore6Q 41Vi5UC4uwS3DbNx+9gVpJZmLL/w8FRkdG8LiWZlj2yBxuSz0SmExlNRcN+ce2mM0fo6 z8gzrEzDeXs3tGXOouNCspO9k6bajxpN8Cy7PeOz0us3b52emNL5YQzrjfiwHOwC8DOZ oLSpk7+oUROaYZqhbESVWE7C2Jal9JgW4IT4fQ91lVDCh+HLBFvqtXOkMfr2SS0gfq/Q tnwg== X-Gm-Message-State: AOJu0YwYz4VSQx9qn37DPwxJjT0roU4GkOlMLtnkzK4Rn9aTzOcITnRA rzGzWSyOxzSd0lyWpZfyEeKR/vyUfit4pflNoHy5m3aOxqzAkgvGheci6PLKXKM9SZErh//W38w +/Ng= X-Google-Smtp-Source: AGHT+IHGQ2ILAHvekV1Vy5WQyxgetM5qhgQAeCyqsfxJWWfWd2XbK6dlufc2q+/1i1vSZOISKoDcSg== X-Received: by 2002:a5d:6a48:0:b0:362:8ea3:a3a3 with SMTP id ffacd0b85a97d-366e4ed2deamr603128f8f.17.1719058006259; Sat, 22 Jun 2024 05:06:46 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:45 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 02/18] hw/arm/sbsa-ref: switch to 1GHz timer frequency Date: Sat, 22 Jun 2024 13:06:27 +0100 Message-Id: <20240622120643.3797539-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Marcin Juszkiewicz Updated firmware for QEMU CI is already in merge queue so we can move platform to be future proof. All supported cpus work fine with 1GHz timer frequency when firmware is fresh enough. Signed-off-by: Marcin Juszkiewicz Reviewed-by: Leif Lindholm Message-id: 20240531093729.220758-2-marcin.juszkiewicz@linaro.org Signed-off-by: Peter Maydell --- hw/arm/sbsa-ref.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index e884692f07f..87884400e30 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -62,16 +62,12 @@ /* * Generic timer frequency in Hz (which drives both the CPU generic timers - * and the SBSA watchdog-timer). Older versions of the TF-A firmware - * typically used with sbsa-ref (including the binaries in our Avocado test - * Aarch64SbsarefMachine.test_sbsaref_alpine_linux_max_pauth_impdef - * assume it is this value. + * and the SBSA watchdog-timer). Older (<2.11) versions of the TF-A firmware + * assumed 62.5MHz here. * - * TODO: this value is not architecturally correct for an Armv8.6 or - * better CPU, so we should move to 1GHz once the TF-A fix above has - * made it into a release and into our Avocado test. + * Starting with Armv8.6 CPU 1GHz timer frequency is mandated. */ -#define SBSA_GTIMER_HZ 62500000 +#define SBSA_GTIMER_HZ 1000000000 enum { SBSA_FLASH, From patchwork Sat Jun 22 12:06:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708303 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4254CC27C78 for ; Sat, 22 Jun 2024 12:08:23 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWI-0007wz-14; Sat, 22 Jun 2024 08:07:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW7-0007kf-Qg for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:53 -0400 Received: from mail-lj1-x236.google.com ([2a00:1450:4864:20::236]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW5-0000JJ-2D for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:50 -0400 Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2ec1620a956so32478871fa.1 for ; Sat, 22 Jun 2024 05:06:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058007; x=1719662807; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=hDzCMQj4Kz45odIGKOYD91iUsefbCW1gBNGz5HSGeJo=; b=o1/Fd2+ePMxG9PQ8pXdfvYzxnpljP7Zdcv3WXJQFp61pRQHc6bjO+FdLgXjLAee8vI Zr+LSY0AfK+6+N4jxKamn2lySx8d8GhyXOgZkJF7BhaRI24DCXA+O9SzIhfxwOF6ckl6 BXIdoxjPUDr4QbNQcKxJSdCsaF3Ej1LRoso1NPMh8mQYTO3oN4Yhed+M3945SQ31zrOe dRhPNMhcLG0qEUeRrNCFFfseCf37j4cIBiUzuU5tDpZmQYrzXej5YnovamYqgxSMb2fB F4CB74QqO1s3ezUx28s39G0bVaQ/k9yvF/GSXWEd0aHIDgm7fGdkP7M9WX4Mi8MN1TUe 6cAA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058007; x=1719662807; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hDzCMQj4Kz45odIGKOYD91iUsefbCW1gBNGz5HSGeJo=; b=hwJGVqczXLOm566Kekbg3Sm6W+NuSDSPYtvLcOJyTN55ZdufL+im9G0AYaBPnMmvyw AakTQ8uLlDPLrY8BKnB1V8VC9Vinm/LhpbdADqNw3GSdlsL3Ok4FKEpDszkgVrjokTGU f0sBfuZs16DzL/D93CpXVW+yKbu+EPnY65gZnfX42QFgeQPFvgTrf8ecsenAeSvxFyQE n/Kbmd+bEbWT78Oh2PIRL400Gc4BZksv6F5pDdjsf/1QHd2L1022df+xa1pxWpvvXs0l LtY8hSfJKdINm1iktkw2yFi1aD1a+3jeUA1L14f0Afe0C111uFd+L2Kr3n8tpPz3dKNZ oDXA== X-Gm-Message-State: AOJu0Yybn6PYDoD4b70FMX1hVHjudEu9JyJ5I2wpr1Pz+J67AiLigsqE +oHjr7wzZPUaIuPhHYG3+B7yXtcMZXiOC0IWYoL+xUKY/HPlyQEYngdtncjDNhn+HsckxMTY7WJ OZo0= X-Google-Smtp-Source: AGHT+IGNz/KFpBvKqbrAkBmqoQ+0XXSx1w+LGM0VVE4sbpTArZZm30yV8uQCXzgXUG6vzGCqAlquRg== X-Received: by 2002:a05:6512:3441:b0:52c:dc70:ebf8 with SMTP id 2adb3069b0e04-52cdc70ef1emr1281076e87.19.1719058006742; Sat, 22 Jun 2024 05:06:46 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:46 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 03/18] hw/intc/arm_gic: Fix deactivation of SPI lines Date: Sat, 22 Jun 2024 13:06:28 +0100 Message-Id: <20240622120643.3797539-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=peter.maydell@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: "Edgar E. Iglesias" Julien reported that he has seen strange behaviour when running Xen on QEMU using GICv2. When Xen migrates a guest's vCPU from one pCPU to another while the vCPU is handling an interrupt, the guest is unable to properly deactivate interrupts. Looking at it a little closer, our GICv2 model treats deactivation of SPI lines as if they were PPI's, i.e banked per CPU core. The state for active interrupts should only be banked for PPI lines, not for SPI lines. Make deactivation of SPI lines unbanked, similar to how we handle writes to GICD_ICACTIVER. Reported-by: Julien Grall Signed-off-by: Edgar E. Iglesias Message-id: 20240605143044.2029444-2-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/intc/gic_internal.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h index 8d29b40ca10..8ddbf554c69 100644 --- a/hw/intc/gic_internal.h +++ b/hw/intc/gic_internal.h @@ -280,6 +280,8 @@ static inline void gic_set_active(GICState *s, int irq, int cpu) static inline void gic_clear_active(GICState *s, int irq, int cpu) { + unsigned int cm; + if (gic_is_vcpu(cpu)) { uint32_t *entry = gic_get_lr_entry(s, irq, cpu); GICH_LR_CLEAR_ACTIVE(*entry); @@ -301,11 +303,13 @@ static inline void gic_clear_active(GICState *s, int irq, int cpu) * the GIC is secure. */ if (!s->security_extn || GIC_DIST_TEST_GROUP(phys_irq, 1 << rcpu)) { - GIC_DIST_CLEAR_ACTIVE(phys_irq, 1 << rcpu); + cm = phys_irq < GIC_INTERNAL ? 1 << rcpu : ALL_CPU_MASK; + GIC_DIST_CLEAR_ACTIVE(phys_irq, cm); } } } else { - GIC_DIST_CLEAR_ACTIVE(irq, 1 << cpu); + cm = irq < GIC_INTERNAL ? 1 << cpu : ALL_CPU_MASK; + GIC_DIST_CLEAR_ACTIVE(irq, cm); } } From patchwork Sat Jun 22 12:06:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708295 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9741FC27C53 for ; Sat, 22 Jun 2024 12:07:54 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWG-0007vl-Uy; Sat, 22 Jun 2024 08:07:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW7-0007kg-RQ for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:53 -0400 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW4-0000JO-On for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:50 -0400 Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-362b32fbb3bso1973550f8f.2 for ; Sat, 22 Jun 2024 05:06:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058007; x=1719662807; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=azdAp+TG1VIrt8vW4aIFwdtaw2axsecfAU0t9ommjDQ=; b=fe/sJd00w6WZoe3L+ZqeiSeHHiL4/XjmzNua9iKzYSN/zjAaOELw+ncxqjy03Ov10u PbbbN+xvYH9/8iUn8q7EcBL3WL53mi7vI5c4ePGk29fCgEFj44hgxw2AQIatpl3ho7R3 3U2N9XcyUMH/MQwRVCTiHfuM+R3OsSdElP/5qG16FdFpFZTBciKLacBpKIoIS3nqEBIo I88/uYxe5RfQvt2hN1h69LIPAs5oeVuC7UTT9vsiztSAHsBtj/L9gm8Nfo3CFXqBlHo/ orwNOOtkR2r3KRS9fIjzQxc/C6OOnft4UIaaXNNwwtzrFalB92jaQonN0cxNkOGwaIAR 0MHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058007; x=1719662807; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=azdAp+TG1VIrt8vW4aIFwdtaw2axsecfAU0t9ommjDQ=; b=QsJyOJnvs5EIsr4WFQ0ifKe40eUCNNwCwJIRnX4mj4okVi0RDzVLuRQ99Vcf2RjJK9 Segn1jdlaCo3aUAkwk2GyjJURxN814FW9Y8OBOKp5soS79J5svoNH4ARjObTRp/GfmT2 Ndxqd+FlCE/vVMte/zywVHFXDwRx8xL1DxWrYsXroF+W6/STmtW9e0oefC2W6yYzSfAa 5MIX+F6oLHz48Np1DtitjNiq09bGaodovjD1OSQEmPka2FgMK/B9Gb8sqNZNrrKicilI B98UC14xt1GSsFQhbBIydlBZ0TYFOW3JjnXcXyuK+3nx60h2bHLPSs15S1wnFvNtxwhx b3iw== X-Gm-Message-State: AOJu0YxhYjbaaj1cEsnN0jlI825XfOqRYqdMbGGT6KE7qZ0jpCdmPTGQ U/BdGFl2/eAZsRlgWCrGs9UgJ3DqCUurg3Gd2ywQMM4wNxFX6zG9TemqDw7BKL5qMHEAgoM2tex oqjM= X-Google-Smtp-Source: AGHT+IF/CpnDyouPRGM3H4ujTJ4PcLUGBQJa5HieelbmPV71js6ArmKpsvzXlNYwKmcbjEOzm3DVUQ== X-Received: by 2002:a05:6000:10d:b0:35f:2f3b:ba90 with SMTP id ffacd0b85a97d-366e7a1955amr247498f8f.18.1719058007260; Sat, 22 Jun 2024 05:06:47 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.46 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:47 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 04/18] hw/arm/xilinx_zynq: Fix IRQ/FIQ routing Date: Sat, 22 Jun 2024 13:06:29 +0100 Message-Id: <20240622120643.3797539-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Sebastian Huber Fix the system bus interrupt line to CPU core assignment. Fixes: ddcf58e044ce0 ("hw/arm/xilinx_zynq: Support up to two CPU cores") Signed-off-by: Sebastian Huber Reviewed-by: Philippe Mathieu-Daudé Message-id: 20240610052906.4432-1-sebastian.huber@embedded-brains.de Signed-off-by: Peter Maydell --- hw/arm/xilinx_zynq.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 7f7a3d23fbe..c79661bbc1b 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -252,10 +252,11 @@ static void zynq_init(MachineState *machine) zynq_binfo.gic_cpu_if_addr = MPCORE_PERIPHBASE + 0x100; sysbus_create_varargs("l2x0", MPCORE_PERIPHBASE + 0x2000, NULL); for (n = 0; n < smp_cpus; n++) { + /* See "hw/intc/arm_gic.h" for the IRQ line association */ DeviceState *cpudev = DEVICE(zynq_machine->cpu[n]); - sysbus_connect_irq(busdev, (2 * n) + 0, + sysbus_connect_irq(busdev, n, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ)); - sysbus_connect_irq(busdev, (2 * n) + 1, + sysbus_connect_irq(busdev, smp_cpus + n, qdev_get_gpio_in(cpudev, ARM_CPU_FIQ)); } From patchwork Sat Jun 22 12:06:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708294 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A8B43C41513 for ; Sat, 22 Jun 2024 12:07:46 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWK-0007zV-OF; Sat, 22 Jun 2024 08:07:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW8-0007lN-90 for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:53 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW6-0000JT-1C for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:52 -0400 Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-3627ef1fc07so2171509f8f.3 for ; Sat, 22 Jun 2024 05:06:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058008; x=1719662808; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=q80ETzRCCkCb3DcVGTIB+XWfmYB7D+9l5kess+RF8D4=; b=bQxtYzMBazJ2/9gpWUJa8htFChCyM0nnIJNxAE8PeJ12vf+bdPCeWwaZZttCKKzKr2 nkUd41gS0MycbXlJqvXQsGzsBDmDYN42Z1PAvIK69hhtMncT8sir5wpD7xJgr+t6fJLx cko8GxHkcXUSuEIKvz2g3nsY3cVwiVtKFf2fGtFvz58BE7Bz1uP6BGJT2bqvT50V3s8R LOCaRTgnreZAPNxOQQfA8U+AvwYrHKL0I+QNkIKBBiw/Km5zgUB9d6hkzJUjwdq/hbKy aKa+PQmWpHujqHJ+WR12nuxL1mx5mZqSWPsWGK4pTDzf9t+3ZaOl4lRFCegX53VawqKA dyjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058008; x=1719662808; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=q80ETzRCCkCb3DcVGTIB+XWfmYB7D+9l5kess+RF8D4=; b=mWaBNhKgP5+ySAPKYFMheYEMR/0jn6fb5bgfrUI+MN/WRMmas7XxC8xQ9/PnopxD47 BinIBGpqb27cvVvNAjnjfugFaTYL8c4p/F7lOK/93jqDgP4f7IkyWmyHQlFbz0f1wB3t aoDSF4fGm6Iz80vBBtIRZh48yAFCvJ3/blSD2K3NcF26DmyJoWgnOtZj1i8j77knl6Dx XW1ZH+T34nzUeTdqwaUzy5nEAnY6Q62bz94nNTfhJQm6SuP9Uag2kmBaOsuDDPIjEBNq YqbfmIWkvMdBkDF4QQOg4mISz/I6VLqEi+5vqkXKaIduo05Tq3ZtuXgcA56ppxgoeDnM 1dgA== X-Gm-Message-State: AOJu0Yzysn3Veza21BGb42izH6GY/iA+OcqINLfVApyieuRvGz+gprId 3O8WgGtPDpeRRA/UoJo29P5uykd24AeDQR4q9e0XLpHp3V77QQCTdmMrF5PwQNRWG9qFry6rCLu dgdg= X-Google-Smtp-Source: AGHT+IExwuWBoGhx24f+Fq8mTGZfliIsOz33+VDEzSjoAxAyf2Cefc1CoVhiJ1oCVJdnbdyAtKQehw== X-Received: by 2002:adf:e9cc:0:b0:354:c483:a469 with SMTP id ffacd0b85a97d-363170ed457mr7401920f8f.1.1719058007726; Sat, 22 Jun 2024 05:06:47 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:47 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 05/18] scripts/coverity-scan/COMPONENTS.md: Update paths to match gitlab CI Date: Sat, 22 Jun 2024 13:06:30 +0100 Message-Id: <20240622120643.3797539-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Since commit 83aa1baa069c we have been running the build for Coverity Scan as a Gitlab CI job, rather than the old setup where it was run on a local developer's machine. This is working well, but the absolute paths of files are different for the Gitlab CI job, which means that the regexes we use to identify Coverity components no longer work. With Gitlab CI builds the file paths are of the form /builds/qemu-project/qemu/accel/kvm/kvm-all.c rather than the old /qemu/accel/kvm/kvm-all.c and our regexes all don't match. Update all the regexes to start with .*/qemu/ . This will hopefully avoid the need to change them again in future if the build path changes again. This change was made with a search-and-replace of (/qemu)? to .*/qemu . Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-id: 20240604145934.1230583-2-peter.maydell@linaro.org --- scripts/coverity-scan/COMPONENTS.md | 104 ++++++++++++++-------------- 1 file changed, 52 insertions(+), 52 deletions(-) diff --git a/scripts/coverity-scan/COMPONENTS.md b/scripts/coverity-scan/COMPONENTS.md index 1537e49cd5a..98d4bcd6a50 100644 --- a/scripts/coverity-scan/COMPONENTS.md +++ b/scripts/coverity-scan/COMPONENTS.md @@ -1,157 +1,157 @@ This is the list of currently configured Coverity components: alpha - ~ (/qemu)?((/include)?/hw/alpha/.*|/target/alpha/.*) + ~ .*/qemu((/include)?/hw/alpha/.*|/target/alpha/.*) arm - ~ (/qemu)?((/include)?/hw/arm/.*|(/include)?/hw/.*/(arm|allwinner-a10|bcm28|digic|exynos|imx|omap|stellaris|pxa2xx|versatile|zynq|cadence).*|/hw/net/xgmac.c|/hw/ssi/xilinx_spips.c|/target/arm/.*) + ~ .*/qemu((/include)?/hw/arm/.*|(/include)?/hw/.*/(arm|allwinner-a10|bcm28|digic|exynos|imx|omap|stellaris|pxa2xx|versatile|zynq|cadence).*|/hw/net/xgmac.c|/hw/ssi/xilinx_spips.c|/target/arm/.*) avr - ~ (/qemu)?((/include)?/hw/avr/.*|/target/avr/.*) + ~ .*/qemu((/include)?/hw/avr/.*|/target/avr/.*) cris - ~ (/qemu)?((/include)?/hw/cris/.*|/target/cris/.*) + ~ .*/qemu((/include)?/hw/cris/.*|/target/cris/.*) hexagon-gen (component should be ignored in analysis) - ~ (/qemu)?(/target/hexagon/.*generated.*) + ~ .*/qemu(/target/hexagon/.*generated.*) hexagon - ~ (/qemu)?(/target/hexagon/.*) + ~ .*/qemu(/target/hexagon/.*) hppa - ~ (/qemu)?((/include)?/hw/hppa/.*|/target/hppa/.*) + ~ .*/qemu((/include)?/hw/hppa/.*|/target/hppa/.*) i386 - ~ (/qemu)?((/include)?/hw/i386/.*|/target/i386/.*|/hw/intc/[^/]*apic[^/]*\.c) + ~ .*/qemu((/include)?/hw/i386/.*|/target/i386/.*|/hw/intc/[^/]*apic[^/]*\.c) loongarch - ~ (/qemu)?((/include)?/hw/(loongarch/.*|.*/loongarch.*)|/target/loongarch/.*) + ~ .*/qemu((/include)?/hw/(loongarch/.*|.*/loongarch.*)|/target/loongarch/.*) m68k - ~ (/qemu)?((/include)?/hw/m68k/.*|/target/m68k/.*|(/include)?/hw(/.*)?/mcf.*|(/include)?/hw/nubus/.*) + ~ .*/qemu((/include)?/hw/m68k/.*|/target/m68k/.*|(/include)?/hw(/.*)?/mcf.*|(/include)?/hw/nubus/.*) microblaze - ~ (/qemu)?((/include)?/hw/microblaze/.*|/target/microblaze/.*) + ~ .*/qemu((/include)?/hw/microblaze/.*|/target/microblaze/.*) mips - ~ (/qemu)?((/include)?/hw/mips/.*|/target/mips/.*) + ~ .*/qemu((/include)?/hw/mips/.*|/target/mips/.*) openrisc - ~ (/qemu)?((/include)?/hw/openrisc/.*|/target/openrisc/.*) + ~ .*/qemu((/include)?/hw/openrisc/.*|/target/openrisc/.*) ppc - ~ (/qemu)?((/include)?/hw/ppc/.*|/target/ppc/.*|/hw/pci-host/(uninorth.*|dec.*|prep.*|ppc.*)|/hw/misc/macio/.*|(/include)?/hw/.*/(xics|openpic|spapr).*) + ~ .*/qemu((/include)?/hw/ppc/.*|/target/ppc/.*|/hw/pci-host/(uninorth.*|dec.*|prep.*|ppc.*)|/hw/misc/macio/.*|(/include)?/hw/.*/(xics|openpic|spapr).*) riscv - ~ (/qemu)?((/include)?/hw/riscv/.*|/target/riscv/.*|/hw/.*/(riscv_|ibex_|sifive_).*) + ~ .*/qemu((/include)?/hw/riscv/.*|/target/riscv/.*|/hw/.*/(riscv_|ibex_|sifive_).*) rx - ~ (/qemu)?((/include)?/hw/rx/.*|/target/rx/.*) + ~ .*/qemu((/include)?/hw/rx/.*|/target/rx/.*) s390 - ~ (/qemu)?((/include)?/hw/s390x/.*|/target/s390x/.*|/hw/.*/s390_.*) + ~ .*/qemu((/include)?/hw/s390x/.*|/target/s390x/.*|/hw/.*/s390_.*) sh4 - ~ (/qemu)?((/include)?/hw/sh4/.*|/target/sh4/.*) + ~ .*/qemu((/include)?/hw/sh4/.*|/target/sh4/.*) sparc - ~ (/qemu)?((/include)?/hw/sparc(64)?.*|/target/sparc/.*|/hw/.*/grlib.*|/hw/display/cg3.c) + ~ .*/qemu((/include)?/hw/sparc(64)?.*|/target/sparc/.*|/hw/.*/grlib.*|/hw/display/cg3.c) tricore - ~ (/qemu)?((/include)?/hw/tricore/.*|/target/tricore/.*) + ~ .*/qemu((/include)?/hw/tricore/.*|/target/tricore/.*) xtensa - ~ (/qemu)?((/include)?/hw/xtensa/.*|/target/xtensa/.*) + ~ .*/qemu((/include)?/hw/xtensa/.*|/target/xtensa/.*) 9pfs - ~ (/qemu)?(/hw/9pfs/.*|/fsdev/.*) + ~ .*/qemu(/hw/9pfs/.*|/fsdev/.*) audio - ~ (/qemu)?((/include)?/(audio|hw/audio)/.*) + ~ .*/qemu((/include)?/(audio|hw/audio)/.*) block - ~ (/qemu)?(/block.*|(/include?)/(block|storage-daemon)/.*|(/include)?/hw/(block|ide|nvme)/.*|/qemu-(img|io).*|/util/(aio|async|thread-pool).*) + ~ .*/qemu(/block.*|(/include?)/(block|storage-daemon)/.*|(/include)?/hw/(block|ide|nvme)/.*|/qemu-(img|io).*|/util/(aio|async|thread-pool).*) char - ~ (/qemu)?(/qemu-char\.c|/include/sysemu/char\.h|(/include)?/hw/char/.*) + ~ .*/qemu(/qemu-char\.c|/include/sysemu/char\.h|(/include)?/hw/char/.*) crypto - ~ (/qemu)?((/include)?/crypto/.*|/hw/.*/.*crypto.*|(/include/sysemu|/backends)/cryptodev.*) + ~ .*/qemu((/include)?/crypto/.*|/hw/.*/.*crypto.*|(/include/sysemu|/backends)/cryptodev.*) disas - ~ (/qemu)?((/include)?/disas.*) + ~ .*/qemu((/include)?/disas.*) fpu - ~ (/qemu)?((/include)?(/fpu|/libdecnumber)/.*) + ~ .*/qemu((/include)?(/fpu|/libdecnumber)/.*) io - ~ (/qemu)?((/include)?/io/.*) + ~ .*/qemu((/include)?/io/.*) ipmi - ~ (/qemu)?((/include)?/hw/ipmi/.*) + ~ .*/qemu((/include)?/hw/ipmi/.*) migration - ~ (/qemu)?((/include)?/migration/.*) + ~ .*/qemu((/include)?/migration/.*) monitor - ~ (/qemu)?(/qapi.*|/qobject/.*|/monitor\..*|/[hq]mp\..*) + ~ .*/qemu(/qapi.*|/qobject/.*|/monitor\..*|/[hq]mp\..*) nbd - ~ (/qemu)?(/nbd/.*|/include/block/nbd.*|/qemu-nbd\.c) + ~ .*/qemu(/nbd/.*|/include/block/nbd.*|/qemu-nbd\.c) net - ~ (/qemu)?((/include)?(/hw)?/(net|rdma)/.*) + ~ .*/qemu((/include)?(/hw)?/(net|rdma)/.*) pci - ~ (/qemu)?(/include)?/hw/(cxl/|pci).* + ~ .*/qemu(/include)?/hw/(cxl/|pci).* qemu-ga - ~ (/qemu)?(/qga/.*) + ~ .*/qemu(/qga/.*) scsi - ~ (/qemu)?(/scsi/.*|/hw/scsi/.*|/include/hw/scsi/.*) + ~ .*/qemu(/scsi/.*|/hw/scsi/.*|/include/hw/scsi/.*) trace - ~ (/qemu)?(/.*trace.*\.[ch]) + ~ .*/qemu(/.*trace.*\.[ch]) ui - ~ (/qemu)?((/include)?(/ui|/hw/display|/hw/input)/.*) + ~ .*/qemu((/include)?(/ui|/hw/display|/hw/input)/.*) usb - ~ (/qemu)?(/hw/usb/.*|/include/hw/usb/.*) + ~ .*/qemu(/hw/usb/.*|/include/hw/usb/.*) user - ~ (/qemu)?(/linux-user/.*|/bsd-user/.*|/user-exec\.c|/thunk\.c|/include/user/.*) + ~ .*/qemu(/linux-user/.*|/bsd-user/.*|/user-exec\.c|/thunk\.c|/include/user/.*) util - ~ (/qemu)?(/util/.*|/include/qemu/.*) + ~ .*/qemu(/util/.*|/include/qemu/.*) vfio - ~ (/qemu)?(/include)?/hw/vfio/.* + ~ .*/qemu(/include)?/hw/vfio/.* virtio - ~ (/qemu)?(/include)?/hw/virtio/.* + ~ .*/qemu(/include)?/hw/virtio/.* xen - ~ (/qemu)?(.*/xen.*) + ~ .*/qemu(.*/xen.*) hvf - ~ (/qemu)?(.*/hvf.*) + ~ .*/qemu(.*/hvf.*) kvm - ~ (/qemu)?(.*/kvm.*) + ~ .*/qemu(.*/kvm.*) tcg - ~ (/qemu)?(/accel/tcg|/replay|/tcg)/.* + ~ .*/qemu(/accel/tcg|/replay|/tcg)/.* sysemu - ~ (/qemu)?(/system/.*|/accel/.*) + ~ .*/qemu(/system/.*|/accel/.*) (headers) - ~ (/qemu)?(/include/.*) + ~ .*/qemu(/include/.*) testlibs - ~ (/qemu)?(/tests/qtest(/libqos/.*|/libqtest.*)) + ~ .*/qemu(/tests/qtest(/libqos/.*|/libqtest.*)) tests - ~ (/qemu)?(/tests/.*) + ~ .*/qemu(/tests/.*) From patchwork Sat Jun 22 12:06:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708305 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1FE7C27C53 for ; Sat, 22 Jun 2024 12:08:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWI-0007xg-Iv; Sat, 22 Jun 2024 08:07:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW8-0007lP-Ah for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:53 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW6-0000JZ-BB for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:52 -0400 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-362b32fbb3bso1973553f8f.2 for ; Sat, 22 Jun 2024 05:06:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058008; x=1719662808; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=DVbTZOyZta6M5LkIwrmlcuQhcUPezx++RwXTce04VCs=; b=SygzxSMCAIocIudRMYZM+Ibh6ZkGV7IeIshgXqpyIfX038E9WdFdIHlRk4Wxec1+Gz qWNTWXCzllv6l4jSr6hPqpxhLH/kY0BpnGYa2D+4JWM6gJamr1rYHq0tYq68IDYMSJf1 R1ZBIK1NYQTGSMy8/jq1CVUCTqJuHb6xF6BIaCqR/8FUp4Ttp1K8Fc5lJa17DxQUaAtJ 9aIPjo6C27gjFAot2w4RyaP3kgIXUNRCAgjEGJm6EoJ+OfsnXCx6g7c6cUrZ8AWdWY/7 ptS0rbLlJQPGO7SYWbX1c4rdIsWuei1vfwbalI86h4+NBuilVAilAh4xUI0xYqnQEwe9 1exA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058008; x=1719662808; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DVbTZOyZta6M5LkIwrmlcuQhcUPezx++RwXTce04VCs=; b=fHPTATB49pc/KJMSWMF21wsV7KM5DuroLTkdGmvXNBSI5MVXb0f0SazjWcj5d4R9An 5L6LjoZ+tYthezRAJXQbcYELU2dHlsQjG21u50hIMwBRG4Jz9x31vJmFXWqBXONZMiAM QwZ1JnYvG6xuosSmQZoCgmZQu5KT8Gh+0cN6mssZY+tAqZn0RFcBI/lbEgovf/sFPNtg we6iUVD9FO6c1eOwAciw6aM2NzmEcYtBsytMyr2mIzbDK5rPT/a3jVWR3rSAtcuSlwbP 7HdA5YVeff+O1y37ym/JItiw5gLBJjgqy0EeCUbNSzxCcREI6Arcuj1780NbZGZSJ++4 SUuQ== X-Gm-Message-State: AOJu0YyIY7ZFg68SG2VofoJwgndWpCFu3JIpPB/2DjAIbGfhYAJxX/4A Yn19j8OciiL6dhdHLh5CtIvZlQuZWdnnmiuEBJDTVtTtvCMPqLH9SyTdH9bH6Fg1GnvrEAQsoM5 qunw= X-Google-Smtp-Source: AGHT+IH1PB/xu5GeslIrTU6A+aC1/z7/7RZ2uDq9Gx6Hj2qXOv6H2ymw9dCSGf+SD2YzNZ7/y0AMUw== X-Received: by 2002:adf:e383:0:b0:364:3ba5:c5af with SMTP id ffacd0b85a97d-366e7a63425mr243570f8f.61.1719058008226; Sat, 22 Jun 2024 05:06:48 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.47 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:47 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 06/18] scripts/coverity-scan/COMPONENTS.md: Fix 'char' component Date: Sat, 22 Jun 2024 13:06:31 +0100 Message-Id: <20240622120643.3797539-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The 'char' component: * includes the no-longer-present qemu-char.c, which has been long since split into the chardev/ backend code * also includes the hw/char devices Split it into two components: * char is the hw/char devices * chardev is the chardev backends with regexes matching our current sources. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-id: 20240604145934.1230583-3-peter.maydell@linaro.org --- scripts/coverity-scan/COMPONENTS.md | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/scripts/coverity-scan/COMPONENTS.md b/scripts/coverity-scan/COMPONENTS.md index 98d4bcd6a50..fb081a59265 100644 --- a/scripts/coverity-scan/COMPONENTS.md +++ b/scripts/coverity-scan/COMPONENTS.md @@ -73,7 +73,10 @@ block ~ .*/qemu(/block.*|(/include?)/(block|storage-daemon)/.*|(/include)?/hw/(block|ide|nvme)/.*|/qemu-(img|io).*|/util/(aio|async|thread-pool).*) char - ~ .*/qemu(/qemu-char\.c|/include/sysemu/char\.h|(/include)?/hw/char/.*) + ~ .*/qemu((/include)?/hw/char/.*) + +chardev + ~ .*/qemu((/include)?/chardev/.*) crypto ~ .*/qemu((/include)?/crypto/.*|/hw/.*/.*crypto.*|(/include/sysemu|/backends)/cryptodev.*) From patchwork Sat Jun 22 12:06:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91C75C2BD05 for ; Sat, 22 Jun 2024 12:08:33 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWC-0007pZ-Ar; Sat, 22 Jun 2024 08:06:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW8-0007lR-N6 for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:53 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW6-0000Je-BM for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:52 -0400 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-3632a6437d7so1646048f8f.0 for ; Sat, 22 Jun 2024 05:06:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058009; x=1719662809; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=S6scBZe6eKXFZ2uoGKEj8e/OcZjXe1rGfVYARHRdKps=; b=sYOxj6bmixfUgkekGrDjtwYwK1stO6KUv3zfAeCtA7L6FidwKXt/baKSLezR8FAiCV o5USarl4P8NwHBwpKJq1umPPjew6LAFBoKnfU1o18NKZyzm9aJ0yXWtwIrnQFLNf04bW u5t0AHLwxItiTgaTRgrogDlWf3rlKxUELNG1eXwstR2CLraK7XLpFTISGJPey1C85f+h oYfJfbIqrUmfebEwIbqO4pC6pRyuOd+VDjnzhh0B7onif/JFeZqA0nHOHdrlSKM21xsK CFfN5Ydq0NPSv1o+0KzFxonZoO1eGdbhfSDgBIos+72xJx1Oc1pzDpgtV6FU/PR4PUOY MAGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058009; x=1719662809; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=S6scBZe6eKXFZ2uoGKEj8e/OcZjXe1rGfVYARHRdKps=; b=R2ZWJKO5DEvptBO3iwmj3CnLIZID2Wz9C7p9s5U/y4+gm1jaq4hwR5eY/zlA7o3n2t PmkT8Ev0SWtzEUROs13r7E6wRwVMJ60ue7pSin/wRcrPSJcaB4Nin5g8aarCLJVP8eV2 4aDLs0fwTzAS+8eH5STcXUAhoHG/HpukCC6xZ4z7gQAoepZpqEzZ9908eK66xo6uYUJd cxKkyMHTrd2hMByWPPHnOnX5bcc2PRlpXWexIroladNWl65vx8v8iA/ZkVcOq8DKAyry 9Ko5qipclh9yEKkoT6lYiW0Nxd/hEFQiCsGbaj2+lumavMcEAj0iWC8Imx1S/A1Rc2V/ XI4g== X-Gm-Message-State: AOJu0YxGbtN9kh240OL+/lCzPZLgvcfvRAorMnFBSwSqgZofeq/w/vLs eySTUogNV4iuCT0Dy4SYlNwz8lo5zLSBqJO2MhpnZgNNipSecjG4x3HWigQqeSjWEQCYkFc9x+V 9uco= X-Google-Smtp-Source: AGHT+IG08rTDwlsDK6dpbDyHnUU0GLa++V60uk7AiySKPa5qQ5R9+MPws4c9qS3SV8MAYfMiTlf+Dg== X-Received: by 2002:a05:6000:d09:b0:360:7856:fa62 with SMTP id ffacd0b85a97d-366e3291345mr905788f8f.15.1719058008725; Sat, 22 Jun 2024 05:06:48 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:48 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 07/18] scripts/coverity-scan/COMPONENTS.md: Add crypto headers in host/include to the crypto component Date: Sat, 22 Jun 2024 13:06:32 +0100 Message-Id: <20240622120643.3797539-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org host/include/*/host/crypto/ are relatively new headers; add them to the crypto component. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-id: 20240604145934.1230583-4-peter.maydell@linaro.org --- scripts/coverity-scan/COMPONENTS.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/coverity-scan/COMPONENTS.md b/scripts/coverity-scan/COMPONENTS.md index fb081a59265..205ab23b280 100644 --- a/scripts/coverity-scan/COMPONENTS.md +++ b/scripts/coverity-scan/COMPONENTS.md @@ -79,7 +79,7 @@ chardev ~ .*/qemu((/include)?/chardev/.*) crypto - ~ .*/qemu((/include)?/crypto/.*|/hw/.*/.*crypto.*|(/include/sysemu|/backends)/cryptodev.*) + ~ .*/qemu((/include)?/crypto/.*|/hw/.*/.*crypto.*|(/include/sysemu|/backends)/cryptodev.*|/host/include/.*/host/crypto/.*) disas ~ .*/qemu((/include)?/disas.*) From patchwork Sat Jun 22 12:06:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708310 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 48119C27C53 for ; Sat, 22 Jun 2024 12:09:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWH-0007wx-Vo; Sat, 22 Jun 2024 08:07:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW8-0007lQ-MV for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:53 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW6-0000Jo-J7 for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:52 -0400 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-361b376236fso2038305f8f.3 for ; Sat, 22 Jun 2024 05:06:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058009; x=1719662809; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=6E/MYKEkb0DMERGi+2DNA1yRwtK5eQJJPT+gNFpw4l8=; b=VptqaLFBGfPrAa/kwgjtfmxwLAuYAYtuMNi/WxdKVgxVHxez4pInqIc9GCmeEN2cUv R90/r4tABn8cz61xg2QH5EDfo+F/lCH9m19YPctLbt/XiUvwYat3g714/+p5fiX0pfy4 RA5s/JN2vXzko+Rb2KrY6MZS53wGnO00X63auLekxzdO832f2+Pp/K1UoiYdXBEhvVU1 udRb66gwZpQn+VgFdF8w+7xlYUz43uKINc40j0wUkbV6QX30Zq4M41jizjmqVzsFG40O Bj0H9OMOrvtlQj2qQjOy75u3BQtFkVhjrFL+1sxviq8IoXu7OMg2w6ZTRQLz0SJEQXZH sBMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058009; x=1719662809; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6E/MYKEkb0DMERGi+2DNA1yRwtK5eQJJPT+gNFpw4l8=; b=MRSiGuEa7LbJRtXriDcMl454PEAUvIrT7ju5IoXBVyKykVZbHT8uYsXpryvPvHh2mc V4hG+nhLAWwTvPRJrByfvZSiGwjWv1xMf8wzyX96+OCsejxR6FQ5K14fD4b9GY+qvdP+ 6gvCMM19QJ/5k9VB3EDWcNl8ssOIQyq3o5TvFf/Z04LhbAZ/AFWfYHjFTvnzTHUfWcPq GiMdikcO0u+q16hvDTj0ULDdkNfYPwfs/zHrEJ5Wpa1DeijbaV8+E5G45IKHCP9182OO b9tdyzJ9xgN8aa6Lf+lNh6Ye3i5op9WTo/GjniJZfbwAa08sV+PMfMnzBATtQcjSMq5k H8cw== X-Gm-Message-State: AOJu0YzF4uOS7HgS3AlHAt22vwQivuqKsQlV3AFOHr7urx//Wc6KLV1/ bk/HSQ5D8eSum1Ocf6j3TZ5gRucs7Vky39P8S9zTilt6wws13+Wz8nbif1IHVdo/gFLZjaosrHR 5OGY= X-Google-Smtp-Source: AGHT+IF3meglMdsaLZsfubTWaKrlu9frC8BQ07fzr0M9VYX5Pu4Y3XRnzZyRAViKgJ367Ut+OWXe0w== X-Received: by 2002:a05:6000:1363:b0:362:dbc2:9486 with SMTP id ffacd0b85a97d-36319c6f86emr6856978f8f.68.1719058009172; Sat, 22 Jun 2024 05:06:49 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:48 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 08/18] scripts/coverity-scan/COMPONENTS.md: Fix monitor component Date: Sat, 22 Jun 2024 13:06:33 +0100 Message-Id: <20240622120643.3797539-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Update the 'monitor' component: * qapi/ and monitor/ are now subdirectories * add job-qmp.c Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-id: 20240604145934.1230583-5-peter.maydell@linaro.org --- scripts/coverity-scan/COMPONENTS.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/coverity-scan/COMPONENTS.md b/scripts/coverity-scan/COMPONENTS.md index 205ab23b280..3864f8eda07 100644 --- a/scripts/coverity-scan/COMPONENTS.md +++ b/scripts/coverity-scan/COMPONENTS.md @@ -97,7 +97,7 @@ migration ~ .*/qemu((/include)?/migration/.*) monitor - ~ .*/qemu(/qapi.*|/qobject/.*|/monitor\..*|/[hq]mp\..*) + ~ .*/qemu((/include)?/(qapi|qobject|monitor)/.*|/job-qmp.c) nbd ~ .*/qemu(/nbd/.*|/include/block/nbd.*|/qemu-nbd\.c) From patchwork Sat Jun 22 12:06:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708311 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 847D3C27C78 for ; Sat, 22 Jun 2024 12:09:23 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWH-0007wh-Pr; Sat, 22 Jun 2024 08:07:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW9-0007lU-2J for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:53 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW6-0000Ju-Qs for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:52 -0400 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-3658197cdbbso1338314f8f.3 for ; Sat, 22 Jun 2024 05:06:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058009; x=1719662809; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=hJXw18R+LAKc75qOpzY4VoPBavys2Xc3dbvQaGAdCEg=; b=vUCmSNcqAQDdq/9EPZZPvZaJtkXkJqBVQzuaS2ZdHF3OEbMDfLJe6FGcMWXMiqX/kV 0NS79lClnkLoNCqPwCLMVXVl1T2BDPYn5yd4VHFrMARaFsk3zURmMHNHj7mA33WyXJGT 0s5FhBXbyE0YRCSB8D3Rm3spumV6whuJE5XjRmzQ6seoRGKK/hP4B0OURIChGWiqwh21 YainjFZzHLlW2DjGtLzt66xcDLf0DzxGF/Mh+3BeB97zXm/PoOBdju1Dxcfwj9oxWiHG xQwFMffKPR6xHDhEZddArTdIxb+JNQ0u/D6KoBjqlPd86HyASVkmr//vjZf8iwcfWQTB qQ6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058009; x=1719662809; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hJXw18R+LAKc75qOpzY4VoPBavys2Xc3dbvQaGAdCEg=; b=wedgqB73hTRbCigeZNpwh31O98+jXgqweSERtWPPEWYUgtAgFFDExepKvqtdoB0eCp zHELjZc02Y6CZgosMlZmKeXBAzIRlyuzrmYMevF3YARErzHwXH0BjFF//WGEFuRaBVsr 36KZdbwduro7UyHXyID9yteBOnoCAquLLZSln1eObVd2MZzO/S3QlRyAGBb/CThHODgh mNPcJKZtj2rNQ8bG27c6wL8wmZ+wDZiFQEsYJEi0IgddACESEIlYabS5CyLLdDcMYmXI ILGFN9gMws/uYEXem5S+1JA1r9ksgyNHZD3UykwwkmjLdrmKjBUqXFyO9U1Y4+r9lVgF myAA== X-Gm-Message-State: AOJu0Yz/wNlGodvYKpu2DpjZFd4kTnbCVNSZCLgr/nx+ZH5iCXkLGJwe ririonPYUFmGdidf7imIIQrtCBKaqT1wn/G9rK9uJCV2AKPC2tY1b5JCUW26bgbYuCOXSIMaK9s vnPw= X-Google-Smtp-Source: AGHT+IF+U24xzRH+md7HIfGh3LoslqJkD30l8YMZlStdJ/4t81Wl+3lyQx5ZbMbwtJ73hV/qniE09g== X-Received: by 2002:a5d:4b4b:0:b0:362:e71:9268 with SMTP id ffacd0b85a97d-363171e23d8mr7559688f8f.6.1719058009552; Sat, 22 Jun 2024 05:06:49 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:49 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 09/18] scripts/coverity-scan/COMPONENTS.md: Include libqmp in testlibs Date: Sat, 22 Jun 2024 13:06:34 +0100 Message-Id: <20240622120643.3797539-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add libqmp to the testlibs component. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-id: 20240604145934.1230583-6-peter.maydell@linaro.org --- scripts/coverity-scan/COMPONENTS.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/scripts/coverity-scan/COMPONENTS.md b/scripts/coverity-scan/COMPONENTS.md index 3864f8eda07..858190be097 100644 --- a/scripts/coverity-scan/COMPONENTS.md +++ b/scripts/coverity-scan/COMPONENTS.md @@ -154,7 +154,7 @@ sysemu ~ .*/qemu(/include/.*) testlibs - ~ .*/qemu(/tests/qtest(/libqos/.*|/libqtest.*)) + ~ .*/qemu(/tests/qtest(/libqos/.*|/libqtest.*|/libqmp.*)) tests ~ .*/qemu(/tests/.*) From patchwork Sat Jun 22 12:06:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708308 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A9446C27C53 for ; Sat, 22 Jun 2024 12:08:59 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWM-00081Q-T9; Sat, 22 Jun 2024 08:07:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW9-0007lx-SA for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:54 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW7-0000Jy-JJ for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:53 -0400 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-36279cf6414so2235572f8f.3 for ; Sat, 22 Jun 2024 05:06:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058010; x=1719662810; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=WZEwtz/pwjMa4zwtaeGl8+Ie8svZn5Th6HSPtyByswE=; b=P6t6gJLiVVo5H5kU3Jh9+AZXAZqeS6eV9Z30vu+NbmCSM+8W1t9q8X5m4sccfAQNTE 1sgB/ssiL2g13yDMndeMOnLbvdCgm6xh0NOzCciGnvb2gXw1w5A3ZVXz3VBll4qc1yz1 4Un6lwSRut5nnpy9kTuxvbExGg1EiyVIWVIW/eGqeKZq1/yZQIg6lxtfrSpbI5jorKrE EbhO/I0t0hDR/3RKEZBi0yOei3pQAW81Kob77s2tifTye1cx+UlYl1T+HJNRRY+lf0SU UAEibwFm1YXdv065JEcABRNTJBX8r1J0/69gGxMec+oaFv+sC0/IpWiaMxIQNLntoqeA I3nA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058010; x=1719662810; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WZEwtz/pwjMa4zwtaeGl8+Ie8svZn5Th6HSPtyByswE=; b=rf+geEHiU7W/Atc5/Sx/dcQRMfmT4kXEutzmmOlogPLG4bIPTyE19ekTQvc2J6IgJx TSnPElCIPok+48ihdFjUOVxNal7dpmj61815dKVoQtsRZOEXY7M0gWEwiwq7qdqbvmIT ExUg0h31xYNlG9wG2IJsO5AzpP0/wonr8iyN3YtNhY1Kffgm162vRZ1nk+00Ppkt2j+0 3Dw1YunY0UA8kgvE8BUEo/6sUHASx/rCjCnjCNaPjGrMEYRHcOybwGECt3OFCx9PujBm 0hPhRsFPaQ9caBlrqdyGmhs/Wu5PcL9uv2fPwrH97Ghk5RnhxgDN2HYhG0AIGU557IA6 DHBA== X-Gm-Message-State: AOJu0YxjPU87o20J09gIyFhG58kf9EQdFKxqj5Dtc84EuZmaxKTDot1P k7hsHLOF7bLUBjEw9BoFxyfGELwEtIlMa3RMDAODng9hFkU4w4siK7DBsPQag+K8AEO5NLsRqoh DLng= X-Google-Smtp-Source: AGHT+IEOVruQ/93GjvDrXo+Ij8CnMJJrieNseZnvTV1tQbwup/xuVUq/e7mOlWjsb4n2Kjyw7VZWYw== X-Received: by 2002:adf:ce87:0:b0:35f:209b:c10f with SMTP id ffacd0b85a97d-3631998ffcbmr7275862f8f.68.1719058009927; Sat, 22 Jun 2024 05:06:49 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.49 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:49 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 10/18] hw/timer/a9gtimer: Handle QTest mode in a9_gtimer_get_current_cpu Date: Sat, 22 Jun 2024 13:06:35 +0100 Message-Id: <20240622120643.3797539-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Zheyu Ma This commit updates the a9_gtimer_get_current_cpu() function to handle cases where QTest is enabled. When QTest is used, it returns 0 instead of dereferencing the current_cpu, which can be NULL. This prevents the program from crashing during QTest runs. Reproducer: cat << EOF | qemu-system-aarch64 -display \ none -machine accel=qtest, -m 512M -machine npcm750-evb -qtest stdio writel 0xf03fe20c 0x26d7468c EOF Signed-off-by: Zheyu Ma Reviewed-by: Philippe Mathieu-Daudé Message-id: 20240618144009.3137806-1-zheyuma97@gmail.com Signed-off-by: Peter Maydell --- hw/timer/a9gtimer.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/timer/a9gtimer.c b/hw/timer/a9gtimer.c index a2ac5bdfb99..64d80cdf6a3 100644 --- a/hw/timer/a9gtimer.c +++ b/hw/timer/a9gtimer.c @@ -32,6 +32,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "hw/core/cpu.h" +#include "sysemu/qtest.h" #ifndef A9_GTIMER_ERR_DEBUG #define A9_GTIMER_ERR_DEBUG 0 @@ -48,6 +49,10 @@ static inline int a9_gtimer_get_current_cpu(A9GTimerState *s) { + if (qtest_enabled()) { + return 0; + } + if (current_cpu->cpu_index >= s->num_cpu) { hw_error("a9gtimer: num-cpu %d but this cpu is %d!\n", s->num_cpu, current_cpu->cpu_index); From patchwork Sat Jun 22 12:06:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708306 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DA95EC27C78 for ; Sat, 22 Jun 2024 12:08:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWJ-0007yR-0B; Sat, 22 Jun 2024 08:07:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzW9-0007lv-Rp for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:54 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW7-0000KI-QA for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:53 -0400 Received: by mail-wr1-x432.google.com with SMTP id ffacd0b85a97d-3650f2e540dso1784679f8f.0 for ; Sat, 22 Jun 2024 05:06:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058010; x=1719662810; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=H5GU695wBqzPlnCl6LHUjaUC9nnJlhbb4hAcQcaW5AI=; b=TBeHo6WgviJWAIPm15E1oZf0XAMqc//2DkLk42dhLfMBckqACrcPGI3+zPDmx056c9 UMYzH8+fktQ0DIj1i8YU5R/A9OgmgwIm8mT6D8pEpPen9dxvqhYwyViH4XPRj5BUddie h7d6reermiV5LytqdPge8KlGOoc4yjBAUPyQpCm5pMJMGLQsJ68W2dJOF2rlxcZtbEWW btfKtodlF22pfU9SXMyEMzQLfzvP/SFwASpcZi4XR4AMhxWtioSURccCwGn6aKqFINH5 FYc8r/liifnbPz/dZZwxqCVjsS9AepykQwu5zeBNASh0CuQsZ/MF4x+FHWAXKJdIwnMk /Njg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058010; x=1719662810; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=H5GU695wBqzPlnCl6LHUjaUC9nnJlhbb4hAcQcaW5AI=; b=O+ovcbWiWgonfq6RRGbv3lVrh1MrFkeVr+kiDcPPfWUc0foU6CQaYWqewbx2fUAh6a +4Z3QNohTvWcKpiUle+bUAMO7hmoWsCGQW4XfYYRXFHmOYR3rGixHDF4AbvSaUES5nwG 4J/McwJ2uhYX5dIZvkTo+hEwOrfV6m4ICDStiQx2BfcvTmIAgvQq7hOp3IfAIoVocJjJ q7UXOK99MDej8QFHm8ieVCCOTHcH+cJYlm5A1vV6BepZej/a14618FVqDixtwoNhGwHM 0xFUUF/JU1gPDolNVAjeGH56/s+EB6D1wOojBAyx20DsY4o57Md7WTSWCuOABbuJERk4 PQgQ== X-Gm-Message-State: AOJu0YzMWhZ9tBvBeb4JFHaBXK61frRDv8wIRU9nZ61WuIBLPI7hhLCl yjIs3LRAOpFI+WamGNetBoGpjPulkC5wbNhDyF5jcFZ0a2Vu/6Uouog/dEMr3GgwuIN+9zWWZGq 0BmQ= X-Google-Smtp-Source: AGHT+IHDCQdx19ltFCec4XM6j5axiyLYFm0QD87HSCNLJ2E1piNtv+/72zZLAyYbTFwVt0Y/Q66CKw== X-Received: by 2002:adf:e441:0:b0:362:c237:5569 with SMTP id ffacd0b85a97d-363170eccc5mr7900219f8f.2.1719058010381; Sat, 22 Jun 2024 05:06:50 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:50 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 11/18] hw/usb/hcd-dwc2: Handle invalid address access in read and write functions Date: Sat, 22 Jun 2024 13:06:36 +0100 Message-Id: <20240622120643.3797539-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Zheyu Ma This commit modifies the dwc2_hsotg_read() and dwc2_hsotg_write() functions to handle invalid address access gracefully. Instead of using g_assert_not_reached(), which causes the program to abort, the functions now log an error message and return a default value for reads or do nothing for writes. This change prevents the program from aborting and provides clear log messages indicating when an invalid memory address is accessed. Reproducer: cat << EOF | qemu-system-aarch64 -display none \ -machine accel=qtest, -m 512M -machine raspi2b -m 1G -nodefaults \ -usb -drive file=null-co://,if=none,format=raw,id=disk0 -device \ usb-storage,port=1,drive=disk0 -qtest stdio readl 0x3f980dfb EOF Signed-off-by: Zheyu Ma Reviewed-by: Paul Zimmerman Message-id: 20240618135610.3109175-1-zheyuma97@gmail.com Signed-off-by: Peter Maydell --- hw/usb/hcd-dwc2.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/usb/hcd-dwc2.c b/hw/usb/hcd-dwc2.c index 8cac9c0a062..b4f0652c7d2 100644 --- a/hw/usb/hcd-dwc2.c +++ b/hw/usb/hcd-dwc2.c @@ -1128,7 +1128,10 @@ static uint64_t dwc2_hsotg_read(void *ptr, hwaddr addr, unsigned size) val = dwc2_pcgreg_read(ptr, addr, (addr - HSOTG_REG(0xe00)) >> 2, size); break; default: - g_assert_not_reached(); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", + __func__, addr); + val = 0; + break; } return val; @@ -1160,7 +1163,9 @@ static void dwc2_hsotg_write(void *ptr, hwaddr addr, uint64_t val, dwc2_pcgreg_write(ptr, addr, (addr - HSOTG_REG(0xe00)) >> 2, val, size); break; default: - g_assert_not_reached(); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n", + __func__, addr); + break; } } From patchwork Sat Jun 22 12:06:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708296 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B5008C27C53 for ; Sat, 22 Jun 2024 12:07:58 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWI-0007yF-Rn; Sat, 22 Jun 2024 08:07:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzWB-0007oE-Hb for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:55 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW8-0000KN-Fx for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:53 -0400 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-366df217347so593720f8f.0 for ; Sat, 22 Jun 2024 05:06:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058011; x=1719662811; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=mDo+JBOeUoxcIeTzZxYoC2qPYwPf30n/5YLwDLvTy9M=; b=rAUu1e6elmoz90v1TjVdDP1nucpWZVfF45YIvU60+asxdoizaaGjb2mi0rigdV3McZ fZtEFfkEVXln/8pY7DtB2yz5PQ7dlUfRVOgVznPDzYaOhJ3QwD7vdcUdh+RA8eMg6p0F H4kgfc/jvQFA26tXEIp8SXxCagRRUcSEEeQV9PBZegLXI9DFwM2Np9NTEKgZ8Nr39eF6 Vo+oMsrBSlh0JKZLLrMcochQ1fFcnqAVpFD3lvhpuC1lJVHifCve/Rmj+wFF5Oq1qXhy 0VHzb8oDndFe0EbaWn69Vgcln7opTuzkDZb4QuCxxKM/FxDyX5o40ZNiBFn1k9MfchCT xvRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058011; x=1719662811; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mDo+JBOeUoxcIeTzZxYoC2qPYwPf30n/5YLwDLvTy9M=; b=QzKNO2QeMv1XpNuIaN2RiBloUXEW+zoiqstMle17GYwykF5R2tSfx0sSPU7oKrqGKU L+tVUZC53TBLjXSPyjp1/tur/h1NOjw4TSRgP2Q8LzgNs4CHr5lCmmwir2m0akAYl+c+ gh19q7BMUtZQI+ItS+vacmzczlAgF749ji4azIu0x5QBeLzeocaZMSyt9N3fZGGhUP/T ZvUYYbGhQtO4vYpbFwWZTXbNyR2gc7q8NyoBS/+LXUm/j8s/YUTEnq3SEk3+rCgNHZHT T/BUuFt2mqr7AFCEvIxwTbakhUVmf8AI0qJDWT+Ml79BKbFKy35R8c5O9kmQHSP5h3Qw SvWg== X-Gm-Message-State: AOJu0YwwLuV3OgdjKoEK5QaMsp+uAumpx3b6WSyC4u3Y8dqAhuVP35IP aC0w8cBlsUuT+bgLmDNa+n/osTblRFslkhZAUdUpbPQSOx8pA5+j8gFCko+3yM/GPzN6698Q25L lHAA= X-Google-Smtp-Source: AGHT+IHw19iEyk5fa6bKXJg1UTU2hfIu5EdfPb3B+hdsW1pjAiHSVc8j/Y0Jru1erXXau7yJMC66Rg== X-Received: by 2002:a05:6000:143:b0:362:93f9:cb7f with SMTP id ffacd0b85a97d-36317c7eb8cmr8363263f8f.29.1719058010855; Sat, 22 Jun 2024 05:06:50 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:50 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 12/18] hw/arm/virt: Add serial aliases in DTB Date: Sat, 22 Jun 2024 13:06:37 +0100 Message-Id: <20240622120643.3797539-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org If there is more than one UART in the DTB, then there is no guarantee on which order a guest is supposed to initialise them. The standard solution to this is "serialN" entries in the "/aliases" node of the dtb which give the nodename of the UARTs. At the moment we only have two UARTs in the DTB when one is for the Secure world and one for the Non-Secure world, so this isn't really a problem. However if we want to add a second NS UART we'll need the aliases to ensure guests pick the right one. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-id: 20240610162343.2131524-2-peter.maydell@linaro.org --- hw/arm/virt.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index c7a1f754e72..61a9d47c026 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -284,6 +284,8 @@ static void create_fdt(VirtMachineState *vms) } } + qemu_fdt_add_subnode(fdt, "/aliases"); + /* Clock node, for the benefit of the UART. The kernel device tree * binding documentation claims the PL011 node clock properties are * optional but in practice if you omit them the kernel refuses to @@ -939,7 +941,9 @@ static void create_uart(const VirtMachineState *vms, int uart, if (uart == VIRT_UART) { qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename); + qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", nodename); } else { + qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial1", nodename); /* Mark as not usable by the normal world */ qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"); From patchwork Sat Jun 22 12:06:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708297 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ED649C27C53 for ; Sat, 22 Jun 2024 12:08:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWP-00082d-Dd; Sat, 22 Jun 2024 08:07:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzWB-0007nz-Gl for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:55 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW8-0000Kc-Rj for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:54 -0400 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-3645e9839b3so2111472f8f.3 for ; Sat, 22 Jun 2024 05:06:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058011; x=1719662811; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=xCNfvcSWrjHCXWaKRrShOIu0eKkr1O98HL8t2iVY3hU=; b=j4I+1UNMTfoJoRxGOwZLPVK1K7Hq9ABR+Ze/E0lvDkVT5YjuIc8Rb/Ga4eNi+sD2g5 IgOrCxtxLYPaYp8ZtiWIpFfuBqm7dbwTzmj4gr0dcDvTylXGSPOl+FpM9bYnMKH7PW+T e5DvipameysDK+WZ4JypFGQnV4Tk0rs4CKVzpQSVP6mK3NbsqGl/zGvzGZ+wtVhroawJ mXF56DujZ1uG9dUJ31V2yLDtHFZEHk0zHuzbfP9Yn1HdXETli387kY9p3vUz0dlvkVn2 cgpYAnXanYZva6CXHwzuWsbov1gJZAPiK4qhN227RlJG8qeVXPuSPgJTUXd+bELQSzg4 aecw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058011; x=1719662811; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xCNfvcSWrjHCXWaKRrShOIu0eKkr1O98HL8t2iVY3hU=; b=H4ddmlHgCOyUCi+evcd7EtKxMYtaaqZLNal3goE36R8YDdk714DzaY4sF94lncR8At vdtkVUDUL4vQMk9J2NOOXoIeTmUsg7Gim+vtyrhHuPZxUm1P7aa3ATAWuD77+ZqrdNFs 0pf7VgSsFn/SNoUAPN9XI6pMApzsJ1qAl/IcuzuuAfWJezoYlk79hVzmlPOmnBaeGwtw 1JlujSn5yfvAgPL1kQM8db8soTAt9Or7l//1ESOsJwWmWvb+wWYtg937Q8x/CubeWyJN Kh+JE7ax7kSFOkQzF9pVrX6C/eIwYd4qpD9024qLhsVVWwYyyEkgMPKJRofOmog/wxDs eikQ== X-Gm-Message-State: AOJu0Yx5lMlUGiOn8wFihubr6t9W0KH7Hg1yAmgfxedX5k/VwN1++G7D JahmDsGrBhZnGB8xFG6gX/5/2ICjfdC8z4fM9ivNk/OjXfCl6BVh2TjCyDqVnGK99seN/edYt88 RSm0= X-Google-Smtp-Source: AGHT+IH7K9kue7XvNSKoeI08u2tDgtv9z8n0Y+Z12kB2XWPxNhJyLTHh5wlATJQScB2un8CbQKqKlA== X-Received: by 2002:adf:ec8b:0:b0:362:c7b3:764c with SMTP id ffacd0b85a97d-366e7a479d4mr217737f8f.48.1719058011308; Sat, 22 Jun 2024 05:06:51 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.50 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:51 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 13/18] hw/arm/virt: Rename VIRT_UART and VIRT_SECURE_UART to VIRT_UART[01] Date: Sat, 22 Jun 2024 13:06:38 +0100 Message-Id: <20240622120643.3797539-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org We're going to make the second UART not always a secure-only device. Rename the constants VIRT_UART and VIRT_SECURE_UART to VIRT_UART0 and VIRT_UART1 accordingly. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Message-id: 20240610162343.2131524-3-peter.maydell@linaro.org --- include/hw/arm/virt.h | 4 ++-- hw/arm/virt-acpi-build.c | 12 ++++++------ hw/arm/virt.c | 14 +++++++------- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index bb486d36b14..1227e7f7f08 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -59,7 +59,7 @@ enum { VIRT_GIC_ITS, VIRT_GIC_REDIST, VIRT_SMMU, - VIRT_UART, + VIRT_UART0, VIRT_MMIO, VIRT_RTC, VIRT_FW_CFG, @@ -69,7 +69,7 @@ enum { VIRT_PCIE_ECAM, VIRT_PLATFORM_BUS, VIRT_GPIO, - VIRT_SECURE_UART, + VIRT_UART1, VIRT_SECURE_MEM, VIRT_SECURE_GPIO, VIRT_PCDIMM_ACPI, diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index c3ccfef026f..eb5796e309b 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -440,10 +440,10 @@ spcr_setup(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) .base_addr.width = 32, .base_addr.offset = 0, .base_addr.size = 3, - .base_addr.addr = vms->memmap[VIRT_UART].base, + .base_addr.addr = vms->memmap[VIRT_UART0].base, .interrupt_type = (1 << 3),/* Bit[3] ARMH GIC interrupt*/ .pc_interrupt = 0, /* IRQ */ - .interrupt = (vms->irqmap[VIRT_UART] + ARM_SPI_BASE), + .interrupt = (vms->irqmap[VIRT_UART0] + ARM_SPI_BASE), .baud_rate = 3, /* 9600 */ .parity = 0, /* No Parity */ .stop_bits = 1, /* 1 Stop bit */ @@ -631,11 +631,11 @@ build_dbg2(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) /* BaseAddressRegister[] */ build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 32, 0, 3, - vms->memmap[VIRT_UART].base); + vms->memmap[VIRT_UART0].base); /* AddressSize[] */ build_append_int_noprefix(table_data, - vms->memmap[VIRT_UART].size, 4); + vms->memmap[VIRT_UART0].size, 4); /* NamespaceString[] */ g_array_append_vals(table_data, name, namespace_length); @@ -816,8 +816,8 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) */ scope = aml_scope("\\_SB"); acpi_dsdt_add_cpus(scope, vms); - acpi_dsdt_add_uart(scope, &memmap[VIRT_UART], - (irqmap[VIRT_UART] + ARM_SPI_BASE)); + acpi_dsdt_add_uart(scope, &memmap[VIRT_UART0], + (irqmap[VIRT_UART0] + ARM_SPI_BASE)); if (vmc->acpi_expose_flash) { acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]); } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 61a9d47c026..ffb4983885f 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -165,11 +165,11 @@ static const MemMapEntry base_memmap[] = { [VIRT_GIC_ITS] = { 0x08080000, 0x00020000 }, /* This redistributor space allows up to 2*64kB*123 CPUs */ [VIRT_GIC_REDIST] = { 0x080A0000, 0x00F60000 }, - [VIRT_UART] = { 0x09000000, 0x00001000 }, + [VIRT_UART0] = { 0x09000000, 0x00001000 }, [VIRT_RTC] = { 0x09010000, 0x00001000 }, [VIRT_FW_CFG] = { 0x09020000, 0x00000018 }, [VIRT_GPIO] = { 0x09030000, 0x00001000 }, - [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 }, + [VIRT_UART1] = { 0x09040000, 0x00001000 }, [VIRT_SMMU] = { 0x09050000, 0x00020000 }, [VIRT_PCDIMM_ACPI] = { 0x09070000, MEMORY_HOTPLUG_IO_LEN }, [VIRT_ACPI_GED] = { 0x09080000, ACPI_GED_EVT_SEL_LEN }, @@ -212,11 +212,11 @@ static MemMapEntry extended_memmap[] = { }; static const int a15irqmap[] = { - [VIRT_UART] = 1, + [VIRT_UART0] = 1, [VIRT_RTC] = 2, [VIRT_PCIE] = 3, /* ... to 6 */ [VIRT_GPIO] = 7, - [VIRT_SECURE_UART] = 8, + [VIRT_UART1] = 8, [VIRT_ACPI_GED] = 9, [VIRT_MMIO] = 16, /* ...to 16 + NUM_VIRTIO_TRANSPORTS - 1 */ [VIRT_GIC_V2M] = 48, /* ...to 48 + NUM_GICV2M_SPIS - 1 */ @@ -939,7 +939,7 @@ static void create_uart(const VirtMachineState *vms, int uart, qemu_fdt_setprop(ms->fdt, nodename, "clock-names", clocknames, sizeof(clocknames)); - if (uart == VIRT_UART) { + if (uart == VIRT_UART0) { qemu_fdt_setprop_string(ms->fdt, "/chosen", "stdout-path", nodename); qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", nodename); } else { @@ -2317,11 +2317,11 @@ static void machvirt_init(MachineState *machine) fdt_add_pmu_nodes(vms); - create_uart(vms, VIRT_UART, sysmem, serial_hd(0)); + create_uart(vms, VIRT_UART0, sysmem, serial_hd(0)); if (vms->secure) { create_secure_ram(vms, secure_sysmem, secure_tag_sysmem); - create_uart(vms, VIRT_SECURE_UART, secure_sysmem, serial_hd(1)); + create_uart(vms, VIRT_UART1, secure_sysmem, serial_hd(1)); } if (tag_sysmem) { From patchwork Sat Jun 22 12:06:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708302 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CD079C27C53 for ; Sat, 22 Jun 2024 12:08:18 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWJ-0007yZ-QT; Sat, 22 Jun 2024 08:07:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzWB-0007oF-Hb for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:55 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW9-0000Kt-6v for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:55 -0400 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-3636c572257so2544605f8f.0 for ; Sat, 22 Jun 2024 05:06:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058012; x=1719662812; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=zaC8IIbLHsxQsiW8y62vNZ0UWZAgeZUGk/0zUMHijyY=; b=Ye0VkwoBdmj+K2q2Pj9tVSqGVx/TJAH9Y4oOWWBRThWOZvQURV2Vkajd1LegSO3SIH IRUWZ+9e7ETF98ZXmb3N4By6wM37IOebH4sKM95skbC5vCOBG4Q8Dj0Lr5tBftNQ/2SU Tr3ks8WmVqX1il2Q/R4jXWEzSNrW14qOPk8W7VWhS/M6GvWqqXwmcKOwAk1POfYsms4J U5HLTy3ey3tMlb6NsYuK8o9bucWIWAi6lnPKX5UR9LCL8ucCtWpUrWTEmLB8dzQaTExj TvPL+HoRpLv01i1VPf9vTbcf+Ph+QJQ+G8etJfCv0DX1ge96C3h0AtzrBjo6yp8QFH2J /Flw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058012; x=1719662812; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zaC8IIbLHsxQsiW8y62vNZ0UWZAgeZUGk/0zUMHijyY=; b=R3mM1MCfuO55NzcwkheICOwVUEQe1yLhZcS1wAm2X1zQrLh7eOFjhYOLJUwGhNcbhE V7+U4WK3Xpmp4djxbBVgxbhCGsAo+kwvlSemD2DWrvXq9SfFdd9+I90exW3EDBBB4LMG YSBAcwaUHMxsUUEapm89iNu7HLsGQhNrs+SS7BdsswBsa71J2RW7sl96RvdMs3cR0s8k lX+qvC4BVsXJ1onNz6RXdhEqBp6Fw+V5LJ5w1jydZXLVWTblg6B+0P2IHWDMPmU2ycQo vZbmp4hlvBlqy3TfN//8xKAT3qdRYvPnSGWHwWQLZuvcHAXKKGG065rxJVHWt/O2RaH9 mlGw== X-Gm-Message-State: AOJu0YytQKabuFX8tIQPfz1/kdRKfUEblCmrdGgTVT21yTkk88e5/SWz N+jOiosYRXAVzKO9oKtvvAlMcZhbPAGky6gWT71dJlyX5YHBOifaJPf8Q7/7I3K05GHx6XQE2eN afa8= X-Google-Smtp-Source: AGHT+IGGZx5BStVf/USUskI0NbjEQN/PdTOWbbWZTTyeHFbeXal1l2ys5OlySePbd1EDD1nWEwQoWw== X-Received: by 2002:adf:e6c9:0:b0:360:712e:3610 with SMTP id ffacd0b85a97d-36317c79b42mr10139005f8f.38.1719058011730; Sat, 22 Jun 2024 05:06:51 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:51 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 14/18] hw/arm/virt: allow creation of a second NonSecure UART Date: Sat, 22 Jun 2024 13:06:39 +0100 Message-Id: <20240622120643.3797539-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For some use-cases, it is helpful to have more than one UART available to the guest. If the second UART slot is not already used for a TrustZone Secure-World-only UART, create it as a NonSecure UART only when the user provides a serial backend (e.g. via a second -serial command line option). This avoids problems where existing guest software only expects a single UART, and gets confused by the second UART in the DTB. The major example of this is older EDK2 firmware, which will send the GRUB bootloader output to UART1 and the guest serial output to UART0. Users who want to use both UARTs with a guest setup including EDK2 are advised to update to EDK2 release edk2-stable202311 or newer. (The prebuilt EDK2 blobs QEMU upstream provides are new enough.) The relevant EDK2 changes are the ones described here: https://bugzilla.tianocore.org/show_bug.cgi?id=4577 Inspired-by: Axel Heider Signed-off-by: Peter Maydell Tested-by: Laszlo Ersek Reviewed-by: Philippe Mathieu-Daudé Message-id: 20240610162343.2131524-4-peter.maydell@linaro.org --- docs/system/arm/virt.rst | 6 +++++- include/hw/arm/virt.h | 1 + hw/arm/virt-acpi-build.c | 12 ++++++++---- hw/arm/virt.c | 38 +++++++++++++++++++++++++++++++++++--- 4 files changed, 49 insertions(+), 8 deletions(-) diff --git a/docs/system/arm/virt.rst b/docs/system/arm/virt.rst index 26fcba00b76..e67e7f0f7c5 100644 --- a/docs/system/arm/virt.rst +++ b/docs/system/arm/virt.rst @@ -26,7 +26,7 @@ The virt board supports: - PCI/PCIe devices - Flash memory -- One PL011 UART +- Either one or two PL011 UARTs for the NonSecure World - An RTC - The fw_cfg device that allows a guest to obtain data from QEMU - A PL061 GPIO controller @@ -48,6 +48,10 @@ The virt board supports: - A secure flash memory - 16MB of secure RAM +The second NonSecure UART only exists if a backend is configured +explicitly (e.g. with a second -serial command line option) and +TrustZone emulation is not enabled. + Supported guest CPU types: - ``cortex-a7`` (32-bit) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 1227e7f7f08..ab961bb6a9b 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -151,6 +151,7 @@ struct VirtMachineState { bool ras; bool mte; bool dtb_randomness; + bool second_ns_uart_present; OnOffAuto acpi; VirtGICType gic_version; VirtIOMMUType iommu; diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index eb5796e309b..b2366f24f96 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -79,11 +79,11 @@ static void acpi_dsdt_add_cpus(Aml *scope, VirtMachineState *vms) } static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap, - uint32_t uart_irq) + uint32_t uart_irq, int uartidx) { - Aml *dev = aml_device("COM0"); + Aml *dev = aml_device("COM%d", uartidx); aml_append(dev, aml_name_decl("_HID", aml_string("ARMH0011"))); - aml_append(dev, aml_name_decl("_UID", aml_int(0))); + aml_append(dev, aml_name_decl("_UID", aml_int(uartidx))); Aml *crs = aml_resource_template(); aml_append(crs, aml_memory32_fixed(uart_memmap->base, @@ -817,7 +817,11 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms) scope = aml_scope("\\_SB"); acpi_dsdt_add_cpus(scope, vms); acpi_dsdt_add_uart(scope, &memmap[VIRT_UART0], - (irqmap[VIRT_UART0] + ARM_SPI_BASE)); + (irqmap[VIRT_UART0] + ARM_SPI_BASE), 0); + if (vms->second_ns_uart_present) { + acpi_dsdt_add_uart(scope, &memmap[VIRT_UART1], + (irqmap[VIRT_UART1] + ARM_SPI_BASE), 1); + } if (vmc->acpi_expose_flash) { acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]); } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ffb4983885f..85556152563 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -906,7 +906,7 @@ static void create_gic(VirtMachineState *vms, MemoryRegion *mem) } static void create_uart(const VirtMachineState *vms, int uart, - MemoryRegion *mem, Chardev *chr) + MemoryRegion *mem, Chardev *chr, bool secure) { char *nodename; hwaddr base = vms->memmap[uart].base; @@ -944,6 +944,8 @@ static void create_uart(const VirtMachineState *vms, int uart, qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial0", nodename); } else { qemu_fdt_setprop_string(ms->fdt, "/aliases", "serial1", nodename); + } + if (secure) { /* Mark as not usable by the normal world */ qemu_fdt_setprop_string(ms->fdt, nodename, "status", "disabled"); qemu_fdt_setprop_string(ms->fdt, nodename, "secure-status", "okay"); @@ -2317,11 +2319,41 @@ static void machvirt_init(MachineState *machine) fdt_add_pmu_nodes(vms); - create_uart(vms, VIRT_UART0, sysmem, serial_hd(0)); + /* + * The first UART always exists. If the security extensions are + * enabled, the second UART also always exists. Otherwise, it only exists + * if a backend is configured explicitly via '-serial '. + * This avoids potentially breaking existing user setups that expect + * only one NonSecure UART to be present (for instance, older EDK2 + * binaries). + * + * The nodes end up in the DTB in reverse order of creation, so we must + * create UART0 last to ensure it appears as the first node in the DTB, + * for compatibility with guest software that just iterates through the + * DTB to find the first UART, as older versions of EDK2 do. + * DTB readers that follow the spec, as Linux does, should honour the + * aliases node information and /chosen/stdout-path regardless of + * the order that nodes appear in the DTB. + * + * For similar back-compatibility reasons, if UART1 is the secure UART + * we create it second (and so it appears first in the DTB), because + * that's what QEMU has always done. + */ + if (!vms->secure) { + Chardev *serial1 = serial_hd(1); + + if (serial1) { + vms->second_ns_uart_present = true; + create_uart(vms, VIRT_UART1, sysmem, serial1, false); + } + } + create_uart(vms, VIRT_UART0, sysmem, serial_hd(0), false); + if (vms->secure) { + create_uart(vms, VIRT_UART1, secure_sysmem, serial_hd(1), true); + } if (vms->secure) { create_secure_ram(vms, secure_sysmem, secure_tag_sysmem); - create_uart(vms, VIRT_UART1, secure_sysmem, serial_hd(1)); } if (tag_sysmem) { From patchwork Sat Jun 22 12:06:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708298 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93F13C2BD05 for ; Sat, 22 Jun 2024 12:08:06 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWJ-0007yW-Al; Sat, 22 Jun 2024 08:07:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzWC-0007pj-DY for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:56 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzW9-0000L6-Kj for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:56 -0400 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-3621ac606e1so2295435f8f.1 for ; Sat, 22 Jun 2024 05:06:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058012; x=1719662812; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=TDROnXRZm4HJC9JeBRZrJ0oXuZuLpT1NFzYgwIqZIyc=; b=qsywLHptiZPIMrx5aOcuE5zEyAXkOqCmZyplmINlHRXnl5IhI5w5AtpmtgtpkmbptH DtsisbWHAXIwq8sx3kXVRruj/jwvZN0GotJ1gclxsB769OMaJx7mJAOBgoYjLR40aD6X 9lT8WPf0GFNr8V9pswma8wSX6UCKFj4IRiqPv+GgBGlpGUGte/xhIAz3yqsXSI2bEdAe PuKfK3fMQqrIMQGL1Igdq/dVlDNBus5fjw7Wx6WozkA5GDscreeSpAbTLd0luhgWPHFn 51q1BvLrzeMdHauv2dpSZUFYP3tUElJK3u/Q9PAeBfR1evbRxeg3sN+kYnyez9ofTF/n gQYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058012; x=1719662812; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TDROnXRZm4HJC9JeBRZrJ0oXuZuLpT1NFzYgwIqZIyc=; b=cyzLSXtT7rqx6TzeQ5Rqw7AvMsydrRd9nSrHxStJ+yvr96UW47PZgxt22dji5hW8NH IWnL+vFIjyvu+UaPJQ2oj7w+cMUxFtcY2KDjiFUOilF2Af/poG+qe7PYSBcUruEeqK8Q 7ctR9dPBfVRIj8ZEFTlqA/Z+htO277OmwsQS+hxpxu8DbtVy1KVA4btnucHTFqnRQW0F YtyBZ8ef7IbbMENUMDbHrCIJUi5usgufmxkHidWwywDHvZPuo3AEySJcJrxKBEU8+3i8 udWmrVFBCvpUAJ8p+NcB9F9KTTd3q2HH62oE76cWD4PV3zDT1i3eqB2Kd9GLmfqB82Nu IJUQ== X-Gm-Message-State: AOJu0YzwO8z7P/cpEgVfcXSq8LCfhOBWPGKotasoJeo9vtbd+Y3rnyry Mm3Vz/Y7A/BvINS+xzR1GXVUekuUx6rIb4nD1hKQbiLIE4Pjp+hTq/k0wISXlxYWfhIpIyPyEfO tm3g= X-Google-Smtp-Source: AGHT+IEPV/FMnvpm2m3zzc5vvt71nl6AtSxR9OHd+4dcFQeGJvVX6/kCqiFPFnFH/ubOclAuBWr7Dw== X-Received: by 2002:adf:e789:0:b0:360:8281:71ef with SMTP id ffacd0b85a97d-366e3649591mr1037910f8f.4.1719058012270; Sat, 22 Jun 2024 05:06:52 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:51 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 15/18] hw/arm/virt: Avoid unexpected warning from Linux guest on host with Fujitsu CPUs Date: Sat, 22 Jun 2024 13:06:40 +0100 Message-Id: <20240622120643.3797539-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Zhenyu Zhang Multiple warning messages and corresponding backtraces are observed when Linux guest is booted on the host with Fujitsu CPUs. One of them is shown as below. [ 0.032443] ------------[ cut here ]------------ [ 0.032446] uart-pl011 9000000.pl011: ARCH_DMA_MINALIGN smaller than CTR_EL0.CWG (128 < 256) [ 0.032454] WARNING: CPU: 0 PID: 1 at arch/arm64/mm/dma-mapping.c:54 arch_setup_dma_ops+0xbc/0xcc [ 0.032470] Modules linked in: [ 0.032475] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.14.0-452.el9.aarch64 [ 0.032481] Hardware name: linux,dummy-virt (DT) [ 0.032484] pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 0.032490] pc : arch_setup_dma_ops+0xbc/0xcc [ 0.032496] lr : arch_setup_dma_ops+0xbc/0xcc [ 0.032501] sp : ffff80008003b860 [ 0.032503] x29: ffff80008003b860 x28: 0000000000000000 x27: ffffaae4b949049c [ 0.032510] x26: 0000000000000000 x25: 0000000000000000 x24: 0000000000000000 [ 0.032517] x23: 0000000000000100 x22: 0000000000000000 x21: 0000000000000000 [ 0.032523] x20: 0000000100000000 x19: ffff2f06c02ea400 x18: ffffffffffffffff [ 0.032529] x17: 00000000208a5f76 x16: 000000006589dbcb x15: ffffaae4ba071c89 [ 0.032535] x14: 0000000000000000 x13: ffffaae4ba071c84 x12: 455f525443206e61 [ 0.032541] x11: 68742072656c6c61 x10: 0000000000000029 x9 : ffffaae4b7d21da4 [ 0.032547] x8 : 0000000000000029 x7 : 4c414e494d5f414d x6 : 0000000000000029 [ 0.032553] x5 : 000000000000000f x4 : ffffaae4b9617a00 x3 : 0000000000000001 [ 0.032558] x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff2f06c029be40 [ 0.032564] Call trace: [ 0.032566] arch_setup_dma_ops+0xbc/0xcc [ 0.032572] of_dma_configure_id+0x138/0x300 [ 0.032591] amba_dma_configure+0x34/0xc0 [ 0.032600] really_probe+0x78/0x3dc [ 0.032614] __driver_probe_device+0x108/0x160 [ 0.032619] driver_probe_device+0x44/0x114 [ 0.032624] __device_attach_driver+0xb8/0x14c [ 0.032629] bus_for_each_drv+0x88/0xe4 [ 0.032634] __device_attach+0xb0/0x1e0 [ 0.032638] device_initial_probe+0x18/0x20 [ 0.032643] bus_probe_device+0xa8/0xb0 [ 0.032648] device_add+0x4b4/0x6c0 [ 0.032652] amba_device_try_add.part.0+0x48/0x360 [ 0.032657] amba_device_add+0x104/0x144 [ 0.032662] of_amba_device_create.isra.0+0x100/0x1c4 [ 0.032666] of_platform_bus_create+0x294/0x35c [ 0.032669] of_platform_populate+0x5c/0x150 [ 0.032672] of_platform_default_populate_init+0xd0/0xec [ 0.032697] do_one_initcall+0x4c/0x2e0 [ 0.032701] do_initcalls+0x100/0x13c [ 0.032707] kernel_init_freeable+0x1c8/0x21c [ 0.032712] kernel_init+0x28/0x140 [ 0.032731] ret_from_fork+0x10/0x20 [ 0.032735] ---[ end trace 0000000000000000 ]--- In Linux, a check is applied to every device which is exposed through device-tree node. The warning message is raised when the device isn't DMA coherent and the cache line size is larger than ARCH_DMA_MINALIGN (128 bytes). The cache line is sorted from CTR_EL0[CWG], which corresponds to 256 bytes on the guest CPUs. The DMA coherent capability is claimed through 'dma-coherent' in their device-tree nodes or parent nodes. This happens even when the device doesn't implement or use DMA at all, for legacy reasons. Fix the issue by adding 'dma-coherent' property to the device-tree root node, meaning all devices are capable of DMA coherent by default. This both suppresses the spurious kernel warnings and also guards against possible future QEMU bugs where we add a DMA-capable device and forget to mark it as dma-coherent. Signed-off-by: Zhenyu Zhang Reviewed-by: Gavin Shan Reviewed-by: Donald Dutile Message-id: 20240612020506.307793-1-zhenyzha@redhat.com [PMM: tweaked commit message] Signed-off-by: Peter Maydell --- hw/arm/virt.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 85556152563..0784ee7f466 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -271,6 +271,17 @@ static void create_fdt(VirtMachineState *vms) qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x2); qemu_fdt_setprop_string(fdt, "/", "model", "linux,dummy-virt"); + /* + * For QEMU, all DMA is coherent. Advertising this in the root node + * has two benefits: + * + * - It avoids potential bugs where we forget to mark a DMA + * capable device as being dma-coherent + * - It avoids spurious warnings from the Linux kernel about + * devices which can't do DMA at all + */ + qemu_fdt_setprop(fdt, "/", "dma-coherent", NULL, 0); + /* /chosen must exist for load_dtb to fill in necessary properties later */ qemu_fdt_add_subnode(fdt, "/chosen"); if (vms->dtb_randomness) { From patchwork Sat Jun 22 12:06:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708299 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C509C27C78 for ; Sat, 22 Jun 2024 12:08:07 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWK-0007zo-Vi; Sat, 22 Jun 2024 08:07:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzWG-0007vp-VE for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:07:00 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzWA-0000LH-M2 for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:56 -0400 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-42108856c33so23050215e9.1 for ; Sat, 22 Jun 2024 05:06:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058012; x=1719662812; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=WwqCJKx+EEHLRl2w5KthXnNV4TeYWMHzkPurEgLrTbU=; b=j117ZqU73RG9mgkA4m88kkRb1rdB1nKY9IlHhjXiv4q3VaLCr7qv2d1klwvWua87FY W5F+P3UiI0pLVTZbg4zN9SQKWOSc3G3y+YTBFMZRGrQSgJaiPjJil8honkCBQg64CIql x1LAWNmr+cBUn+pshlIlxJFUTfjJkgy2MtBTlTd1xBJ2ROmMF+t9xHr00PJIPNMEw90v PLnSiqZOqVg3A+t4Ahb3noY4BjItUowqylp6eaIu9ZUPlrYpWwO11jyBhvBcpZUyL6tk uw8GGApxh9RuRKypQ6AY76o9+vAQFsGgdyjYTAQeTRnBmQK21xhTZJn6Ll/1RunYCA5J Ppig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058013; x=1719662813; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WwqCJKx+EEHLRl2w5KthXnNV4TeYWMHzkPurEgLrTbU=; b=Cq/uKTPRRi9y0WMZYBV7bljpQHvmL5fJGmrm4d8F/MjH2tE40VsJoC/uUmC5MoaV05 EIOGvRQheusINFHsfWGJxkuf4T6wOTdZvu/vzZuLSqvYyaX8mpdKfRZOJKtO5o6erCeO ZdePu3knOa9CnoZXA1bvCDyR/oTKLPE8Tsz7n4CmW3obe6jsId5SXKxJxiRF8v/Ilje7 xkhEQGcGzX308LQ01c+AMOTF19R7L2npo6zJMKhB7GazCHrDStJZY9vgg3oWIMutgs6F RDQzbbPXKQUC3zJq5U2zLVBdxhhsapJAqeUQk91MEvp7Cy7F8C7wWeAXGI0TBxSf6Sqg ARcA== X-Gm-Message-State: AOJu0YwWMVv4zb8mb5FOP0thOVdHTi1DMlwVgmL5yPJvpJZwUTPVKJ6V /2tW8BZ0NBmXSiQgU4ZUS9lfwvfua7WfI9TJyzXdAj6+KkOGjP7T9LkECZt+kyrpL4zmSrAWjfZ Fypo= X-Google-Smtp-Source: AGHT+IFjkhJfLxQgFeS6oxglr9jNWDEzISf9RyqBxToUJBWUJeHIi9b6h3PjAr9ACBufFQI7VsoH1A== X-Received: by 2002:a5d:4988:0:b0:362:f0a6:4d55 with SMTP id ffacd0b85a97d-366e3685c21mr743363f8f.18.1719058012703; Sat, 22 Jun 2024 05:06:52 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:52 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 16/18] hw/misc: Set valid access size for Exynos4210 RNG Date: Sat, 22 Jun 2024 13:06:41 +0100 Message-Id: <20240622120643.3797539-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Zheyu Ma The Exynos4210 RNG module requires 32-bit (4-byte) accesses to its registers. According to the User Manual Section 25.3[1], the registers for RNG operations are 32-bit. This change ensures that the memory region operations for the RNG module enforce the correct access sizes, preventing invalid memory accesses. [1] http://www.mediafire.com/view/8ly2fqls3c9c31c/Exynos_4412_SCP_Users_Manual_Ver.0.10.00_Preliminary0.pdf Reproducer: cat << EOF | qemu-system-aarch64 -display none \ -machine accel=qtest, -m 512M -machine smdkc210 -qtest stdio readb 0x10830454 EOF Suggested-by: Philippe Mathieu-Daudé Signed-off-by: Zheyu Ma Message-id: 20240618163701.3204975-1-zheyuma97@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/misc/exynos4210_rng.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/misc/exynos4210_rng.c b/hw/misc/exynos4210_rng.c index 0756bd32059..674d8eece5f 100644 --- a/hw/misc/exynos4210_rng.c +++ b/hw/misc/exynos4210_rng.c @@ -217,6 +217,8 @@ static const MemoryRegionOps exynos4210_rng_ops = { .read = exynos4210_rng_read, .write = exynos4210_rng_write, .endianness = DEVICE_NATIVE_ENDIAN, + .valid.min_access_size = 4, + .valid.max_access_size = 4, }; static void exynos4210_rng_reset(DeviceState *dev) From patchwork Sat Jun 22 12:06:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708309 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 36308C27C78 for ; Sat, 22 Jun 2024 12:09:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWN-00081h-Hk; Sat, 22 Jun 2024 08:07:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzWG-0007vq-Ve for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:07:00 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzWB-0000LL-8l for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:57 -0400 Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-36226e98370so1740883f8f.3 for ; Sat, 22 Jun 2024 05:06:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058013; x=1719662813; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=jve18Aw+DXElxImmNe3vbSqsQnw0nVV2aO+SXUToPbM=; b=sbw789IcYF3R8wzS31wP0RDIyyGSMcepyBcofqor9WEGE4HRaU/AdUGhmjKEmO8wqr H514et12k7O8li8jc6BG1EoIdEjjGW8bI+ymPzz/9PQodvo3iAyYR0SB8rHuhZhxkXIH Soj8bCoAU5G3QOT4RBeUkMoqIi9oE7tqdp5WctEErH7VVh6w17eG644Z3YfvqCk7dHKz mwQ2pl7s7r75eWL5maVjWJGsnnvVkzzprLeEzG+S5+V1CKa2SjIt1XXzELtPhi6p27ke 9qRkFSbo2gydnPG+DlieBglW+/hOu7xgP1lfVC0qcQEjKfrZXFWZEleL9GqKa+OmFDeC /pYQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058013; x=1719662813; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jve18Aw+DXElxImmNe3vbSqsQnw0nVV2aO+SXUToPbM=; b=vAYrOCJ/Kz7wDhfK7w0l37qBoE1z81r/d11FjtVNDRsqbt3gIQcQfNwbRmtHgkf4KO OSO1Em4r71PD0d0yAYF2UJowNiruwL8uAObwljCKFB3YQQ76NM2/7VWRSdhpgjDmHG8w 46hmF3Kyz2xSMv1F6OYUhrhv0yc8/7wJjuruILJRgyyBfDW2cslv2dtmfEhF+io3CjBe 6qaHSWV3MJMC5569HNbMbo8P8UWiATztS36kUdMLeoG0BFdGOWzlgNr6oE9ZC3QWA2gW DKcibJOX9jHteuCnRdHpTZnvvbxfFD9q2Q+Nn9PVUI8YaWgsomV4BY0cpB2I+mRBrKXM 1xMw== X-Gm-Message-State: AOJu0YwjQpF6PDTE7mD8MfMMhkkDv5PkdNU4n7574rPniHecDILT6gt6 /o3EBAc1ucAOlzbFst25pg64fRAgcOJqnsYkPuOvgZ4pCq64AbhaLthb6zd94ELFs1X08WjgEZl ZA30= X-Google-Smtp-Source: AGHT+IGS+laLieagrKLQYNNUzqTRRlO/ERjiD26KXil9cLAvRRkTpBocgWsMqKrZV6psScvYJeBbng== X-Received: by 2002:adf:fc11:0:b0:35f:2364:f1d9 with SMTP id ffacd0b85a97d-363199906fbmr7478812f8f.61.1719058013115; Sat, 22 Jun 2024 05:06:53 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.52 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:52 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 17/18] hw/usb/hcd-ohci: Fix ohci_service_td: accept zero-length TDs where CBP=BE+1 Date: Sat, 22 Jun 2024 13:06:42 +0100 Message-Id: <20240622120643.3797539-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: David Hubbard This changes the way the ohci emulation handles a Transfer Descriptor with "Buffer End" set to "Current Buffer Pointer" - 1, specifically in the case of a zero-length packet. The OHCI spec 4.3.1.2 Table 4-2 specifies td.cbp to be zero for a zero-length packet. Peter Maydell tracked down commit 1328fe0c32 (hw: usb: hcd-ohci: check len and frame_number variables) where qemu started checking this according to the spec. What this patch does is loosen the qemu ohci implementation to allow a zero-length packet if td.be (Buffer End) is set to td.cbp - 1, and with a non-zero td.cbp value. The spec is unclear whether this is valid or not -- it is not the clearly documented way to send a zero length TD (which is CBP=BE=0), but it isn't specifically forbidden. Actual hw seems to be ok with it. Does any OS rely on this behavior? There have been no reports to qemu-devel of this problem. This is attempting to have qemu behave like actual hardware, but this is just a minor change. With a tiny OS[1] that boots and executes a test, the issue can be seen: * OS that sends USB requests to a USB mass storage device but sends td.cbp = td.be + 1 * qemu 4.2 * qemu HEAD (4e66a0854) * Actual OHCI controller (hardware) Command line: qemu-system-x86_64 -m 20 \ -device pci-ohci,id=ohci \ -drive if=none,format=raw,id=d,file=testmbr.raw \ -device usb-storage,bus=ohci.0,drive=d \ --trace "usb_*" --trace "ohci_*" -D qemu.log Results are: qemu 4.2 | qemu HEAD | actual HW -----------+------------+----------- works fine | ohci_die() | works fine Tip: if the flags "-serial pty -serial stdio" are added to the command line the test will output USB requests like this: Testing qemu HEAD: > Free mem 2M ohci port2 conn FS > setup { 80 6 0 1 0 0 8 0 } > ED info=80000 { mps=8 en=0 d=0 } tail=c20920 > td0 c20880 nxt=c20960 f2000000 setup cbp=c20900 be=c20907 > td1 c20960 nxt=c20980 f3140000 in cbp=c20908 be=c2090f > td2 c20980 nxt=c20920 f3080000 out cbp=c20910 be=c2090f ohci20 host err > usb stopped And in qemu.log: usb_ohci_iso_td_bad_cc_overrun ISO_TD start_offset=0x00c20910 > next_offset=0x00c2090f Testing qemu 4.2: > Free mem 2M ohci port2 conn FS > setup { 80 6 0 1 0 0 8 0 } > ED info=80000 { mps=8 en=0 d=0 } tail=620920 > td0 620880 nxt=620960 f2000000 setup cbp=620900 be=620907 cbp=0 be=620907 > td1 620960 nxt=620980 f3140000 in cbp=620908 be=62090f cbp=0 be=62090f > td2 620980 nxt=620920 f3080000 out cbp=620910 be=62090f cbp=0 be=62090f > rx { 12 1 0 2 0 0 0 8 } > setup { 0 5 1 0 0 0 0 0 } tx {} > ED info=80000 { mps=8 en=0 d=0 } tail=620880 > td0 620920 nxt=620960 f2000000 setup cbp=620900 be=620907 cbp=0 be=620907 > td1 620960 nxt=620880 f3100000 in cbp=620908 be=620907 cbp=0 be=620907 > setup { 80 6 0 1 0 0 12 0 } > ED info=80001 { mps=8 en=0 d=1 } tail=620960 > td0 620880 nxt=6209c0 f2000000 setup cbp=620920 be=620927 cbp=0 be=620927 > td1 6209c0 nxt=6209e0 f3140000 in cbp=620928 be=620939 cbp=0 be=620939 > td2 6209e0 nxt=620960 f3080000 out cbp=62093a be=620939 cbp=0 be=620939 > rx { 12 1 0 2 0 0 0 8 f4 46 1 0 0 0 1 2 3 1 } > setup { 80 6 0 2 0 0 0 1 } > ED info=80001 { mps=8 en=0 d=1 } tail=620880 > td0 620960 nxt=6209a0 f2000000 setup cbp=620a20 be=620a27 cbp=0 be=620a27 > td1 6209a0 nxt=6209c0 f3140004 in cbp=620a28 be=620b27 cbp=620a48 be=620b27 > td2 6209c0 nxt=620880 f3080000 out cbp=620b28 be=620b27 cbp=0 be=620b27 > rx { 9 2 20 0 1 1 4 c0 0 9 4 0 0 2 8 6 50 0 7 5 81 2 40 0 0 7 5 2 2 40 0 0 } > setup { 0 9 1 0 0 0 0 0 } tx {} > ED info=80001 { mps=8 en=0 d=1 } tail=620900 > td0 620880 nxt=620940 f2000000 setup cbp=620a00 be=620a07 cbp=0 be=620a07 > td1 620940 nxt=620900 f3100000 in cbp=620a08 be=620a07 cbp=0 be=620a07 [1] The OS disk image has been emailed to philmd@linaro.org, mjt@tls.msk.ru, and kraxel@redhat.com: * testCbpOffBy1.img.xz * sha256: f87baddcb86de845de12f002c698670a426affb40946025cc32694f9daa3abed Signed-off-by: David Hubbard Reviewed-by: Alex Bennée Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/usb/hcd-ohci.c | 4 ++-- hw/usb/trace-events | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index acd60169802..71b54914d32 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -941,8 +941,8 @@ static int ohci_service_td(OHCIState *ohci, struct ohci_ed *ed) if ((td.cbp & 0xfffff000) != (td.be & 0xfffff000)) { len = (td.be & 0xfff) + 0x1001 - (td.cbp & 0xfff); } else { - if (td.cbp > td.be) { - trace_usb_ohci_iso_td_bad_cc_overrun(td.cbp, td.be); + if (td.cbp - 1 > td.be) { /* rely on td.cbp != 0 */ + trace_usb_ohci_td_bad_buf(td.cbp, td.be); ohci_die(ohci); return 1; } diff --git a/hw/usb/trace-events b/hw/usb/trace-events index 46732717a95..dd04f14add1 100644 --- a/hw/usb/trace-events +++ b/hw/usb/trace-events @@ -29,6 +29,7 @@ usb_ohci_iso_td_data_underrun(int ret) "DataUnderrun %d" usb_ohci_iso_td_nak(int ret) "got NAK/STALL %d" usb_ohci_iso_td_bad_response(int ret) "Bad device response %d" usb_ohci_td_bad_pid(const char *s, uint32_t edf, uint32_t tdf) "Bad pid %s: ed.flags 0x%x td.flags 0x%x" +usb_ohci_td_bad_buf(uint32_t cbp, uint32_t be) "Bad cbp = 0x%x > be = 0x%x" usb_ohci_port_attach(int index) "port #%d" usb_ohci_port_detach(int index) "port #%d" usb_ohci_port_wakeup(int index) "port #%d" From patchwork Sat Jun 22 12:06:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13708304 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 12996C27C53 for ; Sat, 22 Jun 2024 12:08:24 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWM-000814-9J; Sat, 22 Jun 2024 08:07:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzWG-0007vu-W2 for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:07:01 -0400 Received: from mail-lj1-x236.google.com ([2a00:1450:4864:20::236]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzWB-0000LZ-EP for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:57 -0400 Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2ec3c0dada3so36589761fa.0 for ; Sat, 22 Jun 2024 05:06:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058014; x=1719662814; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=y/peQK2HWWhn2ma2SjoOX9PrYOZzJnJW241P1DXKLDo=; b=M/ap3v1FDFzv52L9BGdMKUQNQMK/seFFXNZ0/qnK1Ce2cZjPAUeog8/XBeTXEktBqs CWvqt807w5jAB1vgWVSsmwKeVy17uQwnkZ/3RkqwDKWjqFfffJFZ1Syw47ddrMONpIFc AXTeT3PrCFMK/Ov/tTpC3OZmUJd+24H/kP/FDWOeO4Q+R7CwZCCCrtl2sUzFmy1EBqLa OR0r8glw5fD/x7UTrjHoxc9bmdlM+MfbbvinC1ZqjZQFO21HQbdhza1FswjETyTVqX8S CByEhtMZ4LXZgmCRHQgKZPNYnVplsdrphZuhp/ZGOUo1Q8BxVzPCV4O3aFwIP/m86lN4 cqlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058014; x=1719662814; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=y/peQK2HWWhn2ma2SjoOX9PrYOZzJnJW241P1DXKLDo=; b=v2ulQSSCQhMXKEkmXrylWE+/EzhEYvV02Kdaz9tZNTcRoKgLzuNuPiDE/KVLIKdWDv k4jERUBxiJWtibb4gQV1+9D/XJ5XQt4zVvU1dvNwYz1cNCfZdcHSWRwlAN5iu6OudzTi 49GNGXmdQukFXdRuPpmDhbAImkhuBfLJqYk8c88zijPTpmtBvOoJVRJX7qabP1if26ja n0QtAlUnCybeiGqRudm2OeAvcDuDmZG+6SCAumdPIpzYjsjeLpUGPGcbhSBDnsBAw8sN k/NrdKDxvBVYTTi8ZpucZDsVZEY3lMCfgSHJDvkt+tWg3869NzSRR6XmRbfIJlM7axf9 j3zw== X-Gm-Message-State: AOJu0YydNV8Y20bY/R6lOtwQlndVrZcwPPMMzDSl7EegL0R67ceu8LTo 8FvNgWYIaoxZbkoySNY0JXtIyYiu6J2kVK9yhU7kvRrGtCmO4LFm8ow/F0goxcIkV6LoFMX85Mg pa2A= X-Google-Smtp-Source: AGHT+IH6BamVDuq5uANDGDgTnK6QF93UssX1lloTzUE3S4rJJMLgmIUC4uCQZGTM1BJZ76pFq5QH6A== X-Received: by 2002:ac2:4e8d:0:b0:52c:df4e:3343 with SMTP id 2adb3069b0e04-52cdf4e346emr803123e87.16.1719058013586; Sat, 22 Jun 2024 05:06:53 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:53 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/18] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa machine Date: Sat, 22 Jun 2024 13:06:43 +0100 Message-Id: <20240622120643.3797539-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=peter.maydell@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Xiong Yining Enable CPU cluster support on SbsaQemu platform, so that users can specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this topology can be passed to the firmware through /cpus/topology Device Tree. Signed-off-by: Xiong Yining Reviewed-by: Marcin Juszkiewicz Reviewed-by: Leif Lindholm Message-id: 20240607103825.1295328-2-xiongyining1480@phytium.com.cn Tested-by: Marcin Juszkiewicz Signed-off-by: Peter Maydell --- docs/system/arm/sbsa.rst | 4 ++++ hw/arm/sbsa-ref.c | 11 ++++++++++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst index 2bf22a1d0b0..2bf3fc8d59d 100644 --- a/docs/system/arm/sbsa.rst +++ b/docs/system/arm/sbsa.rst @@ -62,6 +62,7 @@ The devicetree reports: - platform version - GIC addresses - NUMA node id for CPUs and memory + - CPU topology information Platform version '''''''''''''''' @@ -88,3 +89,6 @@ Platform version changes: 0.3 The USB controller is an XHCI device, not EHCI. + +0.4 + CPU topology information is present in devicetree. diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 87884400e30..ae37a923015 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -219,7 +219,7 @@ static void create_fdt(SBSAMachineState *sms) * fw compatibility. */ qemu_fdt_setprop_cell(fdt, "/", "machine-version-major", 0); - qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 3); + qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 4); if (ms->numa_state->have_numa_distance) { int size = nb_numa_nodes * nb_numa_nodes * 3 * sizeof(uint32_t); @@ -276,6 +276,14 @@ static void create_fdt(SBSAMachineState *sms) g_free(nodename); } + /* Add CPU topology description through fdt node topology. */ + qemu_fdt_add_subnode(sms->fdt, "/cpus/topology"); + + qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "sockets", ms->smp.sockets); + qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "clusters", ms->smp.clusters); + qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "cores", ms->smp.cores); + qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "threads", ms->smp.threads); + sbsa_fdt_add_gic_node(sms); } @@ -898,6 +906,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data) mc->default_ram_size = 1 * GiB; mc->default_ram_id = "sbsa-ref.ram"; mc->default_cpus = 4; + mc->smp_props.clusters_supported = true; mc->possible_cpu_arch_ids = sbsa_ref_possible_cpu_arch_ids; mc->cpu_index_to_instance_props = sbsa_ref_cpu_index_to_props; mc->get_default_cpu_node_id = sbsa_ref_get_default_cpu_node_id;