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Sun, 23 Jun 2024 13:03:25 -0700 (PDT) From: Krzysztof Kozlowski Date: Sun, 23 Jun 2024 22:03:00 +0200 Subject: [PATCH v2 1/4] dt-bindings: display/msm/gpu: constrain clocks in top-level MIME-Version: 1.0 Message-Id: <20240623-qcom-adreno-dts-bindings-driver-v2-1-9496410de992@linaro.org> References: <20240623-qcom-adreno-dts-bindings-driver-v2-0-9496410de992@linaro.org> In-Reply-To: <20240623-qcom-adreno-dts-bindings-driver-v2-0-9496410de992@linaro.org> To: Rob Clark , Sean Paul , Konrad Dybcio , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley , Krzysztof Kozlowski X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1071; i=krzysztof.kozlowski@linaro.org; h=from:subject:message-id; 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This is more readable and also makes binding stricter, if there is no "if:then:" block for given variant. Acked-by: Conor Dooley Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/display/msm/gpu.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 40b5c6bd11f8..253e68d92779 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -32,9 +32,13 @@ properties: - pattern: '^amd,imageon-200\.[0-1]$' - const: amd,imageon - clocks: true + clocks: + minItems: 2 + maxItems: 7 - clock-names: true + clock-names: + minItems: 2 + maxItems: 7 reg: minItems: 1 From patchwork Sun Jun 23 20:03:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 13708733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E6E9C27C4F for ; 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a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" All devices should (and actually do) have same order of entries, if possible. That's the case for reg/reg-names, so define the reg-names in top-level to enforce that. Acked-by: Conor Dooley Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/display/msm/gpu.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 253e68d92779..baea1946c65d 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -46,7 +46,10 @@ properties: reg-names: minItems: 1 - maxItems: 3 + items: + - const: kgsl_3d0_reg_memory + - const: cx_mem + - const: cx_dbgc interrupts: maxItems: 1 From patchwork Sun Jun 23 20:03:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 13708735 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D228C27C4F for ; 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a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Regex for newer Adreno compatibles can be simpler. Suggested-by: Conor Dooley Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/display/msm/gpu.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index baea1946c65d..03aaced1abda 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -17,7 +17,7 @@ properties: The driver is parsing the compat string for Adreno to figure out the chip-id. items: - - pattern: '^qcom,adreno-[0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f][0-9a-f]$' + - pattern: '^qcom,adreno-[0-9a-f]{8}$' - const: qcom,adreno - description: | The driver is parsing the compat string for Adreno to From patchwork Sun Jun 23 20:03:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 13708734 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4FDB2C2BD05 for ; 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a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" dtschema v2024.4, v2024.5 and maybe earlier do not select device nodes for given binding validation if the schema contains compatible list with pattern and a const fallback. This leads to binding being a no-op - not being applied at all. Issue should be fixed in the dtschema but for now add a work-around do the binding can be used against DTS validation. Signed-off-by: Krzysztof Kozlowski --- This will uncover issues with DTS, which is expected and fixed in: 1. Incorrect AMD compatible: https://lore.kernel.org/linux-arm-msm/20240623193420.333735-1-krzysztof.kozlowski@linaro.org/T/#t 2. alwayson clock: https://lore.kernel.org/linux-arm-msm/20240121194221.13513-6-a39.skl@gmail.com/ --- Documentation/devicetree/bindings/display/msm/gpu.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 03aaced1abda..6ddc72fd85b0 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -10,6 +10,18 @@ title: Adreno or Snapdragon GPUs maintainers: - Rob Clark +# dtschema does not select nodes based on pattern+const, so add custom select +# as a work-around: +select: + properties: + compatible: + contains: + enum: + - qcom,adreno + - amd,imageon + required: + - compatible + properties: compatible: oneOf: