From patchwork Sun Jun 23 23:22:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Chan via B4 Relay X-Patchwork-Id: 13708774 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 54C89185096; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184976; cv=none; b=XmP4iPqp7FsB76e8un/v5odO3Uz50HhA9ODI214PABFiFXWNZgRbNH8HdZmUeaEQeuTp6SrtYfJgRNyBbtAa60JCy6FpqsaYlsnBmGPrYavkkEfA3uSgIhX0lvkj+i7i5AO44dk7wTmjZJpC3hb+2wywr7RGWpA804gtx/CzpCA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184976; c=relaxed/simple; bh=ksN48cxaAFR3/GTcpjVDr3FPaWV1YUWsRi1Xiv4/KVc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Mw8jmC5RVWzqSP3/gz32Ldu/kh6rGxmdhZAmWlNxKiO0cwlgAFshtgAkAoSJ8PBIabzEUKq0gqJccap3iXX9dMjw/omY2j2kCaN01/PWytDTJU0GnVB77uLE1WGB5wvEhaV0jMNoh4AeDX5mEWUjcJAlhDF0XnDnXtodKi+GUMQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=i8Doaeg1; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="i8Doaeg1" Received: by smtp.kernel.org (Postfix) with ESMTPS id 2AE5EC32781; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719184976; bh=ksN48cxaAFR3/GTcpjVDr3FPaWV1YUWsRi1Xiv4/KVc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=i8Doaeg1gU/DwlSsvwcCPE5MqRiSz2VQIhToFIqpOjsffC5gw9dOdhuEP8rPHT/RZ sOpgz5/3xw3aWIMIJOi/YGzF3x87f42UbfuOZozXq5eZIZ52dcqe19Yz1Qdufr4iic 8E2S97qwHmOv6cChWpYion+wONMvUhNZxJTtHlStDlIObYx8uZPGxaRz88u0mRLBFc tr+NJtx62r20M9gOStu9F8hIKtvnfaBG8oNDXzx4Jk/gPU1doJG/HELn/r7DfyvWAs ycHETI++aV+N9nfStVOiU5Q7WR/2EXpabO4VJQwE1Y8mpzjKBhL+x6fdWvM5J/wlKD E9Y34mitVXLwg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A199C2BD05; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) From: George Chan via B4 Relay Date: Mon, 24 Jun 2024 07:22:40 +0800 Subject: [PATCH v2 1/8] Add qcom,sc7180-camss Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240624-b4-sc7180-camss-v2-1-0dfecdc50073@gmail.com> References: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> In-Reply-To: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Chan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1719184973; l=10043; i=gchan9527@gmail.com; s=20240621; h=from:subject:message-id; bh=Hw0kE/GI/DLkLMnNSfBQEwSffJKstvKcClOBJs+yRlU=; b=Vn/NxtT24bT02VEuYlqZt7RGdpn/0+SyPlHvqt1+xIEwWyEBgA9WCFceluE4uqUTqp3r02k78 k16XS0MGUBZCCQprS4do+pAv/7+N4NiLkpMJnI+2o5B5O/Lv78V1vzv X-Developer-Key: i=gchan9527@gmail.com; a=ed25519; pk=Ac2fkTqgUBlj2sns9hRIWJTYhWHO1BsmHbdBb5UpUUY= X-Endpoint-Received: by B4 Relay for gchan9527@gmail.com/20240621 with auth_id=176 X-Original-From: George Chan Reply-To: gchan9527@gmail.com From: George Chan Add bindings for qcom,sc7180-camss in order to support the camera subsystem for sm7125 as found in the Xiaomi Redmi 9 Pro cellphone. Signed-off-by: George Chan --- .../bindings/media/qcom,sc7180-camss.yaml | 327 +++++++++++++++++++++ 1 file changed, 327 insertions(+) diff --git a/Documentation/devicetree/bindings/media/qcom,sc7180-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc7180-camss.yaml new file mode 100644 index 000000000000..baebe22fac0a --- /dev/null +++ b/Documentation/devicetree/bindings/media/qcom,sc7180-camss.yaml @@ -0,0 +1,327 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/qcom,sc7180-camss.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Camera SubSystem + +maintainers: + - Bryan O'Donoghue + +description: + The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms + +properties: + compatible: + const: qcom,sc7180-camss + + clocks: + maxItems: 24 + + clock-names: + items: + - const: camnoc_axi + - const: cpas_ahb + - const: csi0 + - const: csi1 + - const: csi2 + - const: csiphy0 + - const: csiphy0_timer + - const: csiphy1 + - const: csiphy1_timer + - const: csiphy2 + - const: csiphy2_timer + - const: csiphy3 + - const: csiphy3_timer + - const: gcc_camera_ahb + - const: gcc_camera_axi + - const: soc_ahb + - const: vfe0_axi + - const: vfe0 + - const: vfe0_cphy_rx + - const: vfe1_axi + - const: vfe1 + - const: vfe1_cphy_rx + - const: vfe_lite + - const: vfe_lite_cphy_rx + + interrupts: + maxItems: 10 + + interrupt-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy3 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + iommus: + maxItems: 3 + + power-domains: + items: + - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller. + - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller. + - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller. + + power-domain-names: + items: + - const: ife0 + - const: ife1 + - const: top + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + description: + CSI input ports. + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + maxItems: 4 + + required: + - data-lanes + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + maxItems: 4 + + required: + - data-lanes + + port@2: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + maxItems: 4 + + required: + - data-lanes + + port@3: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port for receiving CSI data. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + data-lanes: + maxItems: 4 + + required: + - data-lanes + + reg: + maxItems: 10 + + reg-names: + items: + - const: csid0 + - const: csid1 + - const: csid2 + - const: csiphy0 + - const: csiphy1 + - const: csiphy2 + - const: csiphy3 + - const: vfe0 + - const: vfe1 + - const: vfe_lite + + vdda-phy-supply: + description: + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. + +required: + - clock-names + - clocks + - compatible + - interrupt-names + - interrupts + - iommus + - power-domains + - power-domain-names + - reg + - reg-names + - vdda-phy-supply + - vdda-pll-supply + +additionalProperties: false + +examples: + - | + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + camss: camss@acb3000 { + compatible = "qcom,sc7180-camss"; + + reg = <0 0xacb3000 0 0x1000>, + <0 0xacba000 0 0x1000>, + <0 0xacc8000 0 0x1000>, + <0 0xac65000 0 0x1000>, + <0 0xac66000 0 0x1000>, + <0 0xac67000 0 0x1000>, + <0 0xac68000 0 0x1000>, + <0 0xacaf000 0 0x4000>, + <0 0xacb6000 0 0x4000>, + <0 0xacc4000 0 0x4000>; + + reg-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy3", + "csiphy3_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + interrupts = , + , + , + , + , + , + , + , + , + ; + + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "vfe0", + "vfe1", + "vfe_lite"; + + iommus = <&apps_smmu 0x820 0x0>, + <&apps_smmu 0x840 0x0>, + <&apps_smmu 0x860 0x0>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + + power-domain-names = "ife0", + "ife1", + "top"; + + vdda-phy-supply = <&vreg_l1a_0p875>; + vdda-pll-supply = <&vreg_l26a_1p2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; + }; + }; From patchwork Sun Jun 23 23:22:41 2024 Content-Type: text/plain; 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Sun, 23 Jun 2024 23:22:56 +0000 (UTC) From: George Chan via B4 Relay Date: Mon, 24 Jun 2024 07:22:41 +0800 Subject: [PATCH v2 2/8] Add Gen2 v1.2.2 two-phase MIPI CSI-2 DPHY init Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240624-b4-sc7180-camss-v2-2-0dfecdc50073@gmail.com> References: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> In-Reply-To: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Chan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1719184973; l=7706; i=gchan9527@gmail.com; s=20240621; h=from:subject:message-id; bh=HW/e+55Yhxnsc82eoJwFhI5h31x5/hKFq16FY80+iOg=; b=JyT7Zc4jrDrJaXOp7YgvBRiCFuQqSA/iUD7c18vYULpsW2qryn9SpZQ5FpSZ+WQViVNmaCldY w6b6CwzOlKFDeCUkVZngMtnn0AOsnGCtttfKYOG9nD9ChA9WS7N6qAp X-Developer-Key: i=gchan9527@gmail.com; a=ed25519; pk=Ac2fkTqgUBlj2sns9hRIWJTYhWHO1BsmHbdBb5UpUUY= X-Endpoint-Received: by B4 Relay for gchan9527@gmail.com/20240621 with auth_id=176 X-Original-From: George Chan Reply-To: gchan9527@gmail.com From: George Chan Add a PHY configuration sequence for the sc7180 which uses a Qualcomm Gen 2 version 1.2.2 CSI-2 PHY. The PHY can be configured as two phase or three phase in C-PHY or D-PHY mode. This configuration supports two-phase D-PHY mode. Signed-off-by: George Chan --- .../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 135 +++++++++++++++++++++ drivers/media/platform/qcom/camss/camss.h | 1 + 2 files changed, 136 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c index df7e93a5a4f6..e2dd9b23f857 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c @@ -348,6 +348,136 @@ csiphy_reg_t lane_regs_sm8250[5][20] = { }, }; +/* GEN2 1.2.2 2PH */ +struct +csiphy_reg_t lane_regs_sc7180[5][23] = { + { + {0x0030, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0904, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0910, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0900, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0908, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0904, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x002c, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0034, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0010, 0x50, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x001c, 0x0a, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0028, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x003c, 0xb8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0000, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0004, 0x0c, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0020, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0038, 0xfe, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x005c, 0xc0, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0060, 0x0d, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + }, + { + {0x0730, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c84, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c90, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c80, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c88, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c84, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x072c, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0734, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0710, 0x50, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x071c, 0x0a, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0714, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0728, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x073c, 0xb8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0700, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0704, 0x0c, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0720, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0708, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x070c, 0xff, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0738, 0x1f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + }, + { + {0x0230, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0a04, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0a10, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0a00, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0a08, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0a04, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x022c, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0234, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0210, 0x50, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x021c, 0x0a, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0214, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0228, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x023c, 0xb8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0200, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0204, 0x0c, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0220, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0208, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0238, 0xfe, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x025c, 0xc0, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0260, 0x0d, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + }, + { + {0x0430, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0b04, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0b10, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0b00, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0b08, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0b04, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x042c, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0434, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0410, 0x50, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x041c, 0x0a, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0428, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x043c, 0xb8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0400, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0404, 0x0c, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0420, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0408, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0438, 0xfe, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x045c, 0xc0, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0460, 0x0d, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + }, + { + {0x0630, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c04, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c10, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c00, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c08, 0x06, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0c04, 0x07, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x062c, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0634, 0x0f, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0610, 0x50, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x061c, 0x0a, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0614, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0628, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x063c, 0xb8, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0600, 0x91, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0604, 0x0c, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0620, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0608, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, + {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0638, 0xfe, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x065c, 0xc0, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0660, 0x0d, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, + {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, + }, +}; + static void csiphy_hw_version_read(struct csiphy_device *csiphy, struct device *dev) { @@ -509,6 +639,10 @@ static void csiphy_gen2_config_lanes(struct csiphy_device *csiphy, r = &lane_regs_sdm845[0][0]; array_size = ARRAY_SIZE(lane_regs_sdm845[0]); break; + case CAMSS_7180: + r = &lane_regs_sc7180[0][0]; + array_size = ARRAY_SIZE(lane_regs_sc7180[0]); + break; case CAMSS_8250: r = &lane_regs_sm8250[0][0]; array_size = ARRAY_SIZE(lane_regs_sm8250[0]); @@ -558,6 +692,7 @@ static bool csiphy_is_gen2(u32 version) switch (version) { case CAMSS_845: + case CAMSS_7180: case CAMSS_8250: case CAMSS_8280XP: ret = true; diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index ac15fe23a702..5e750c481b74 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -76,6 +76,7 @@ enum camss_version { CAMSS_8x96, CAMSS_660, CAMSS_845, + CAMSS_7180, CAMSS_8250, CAMSS_8280XP, }; From patchwork Sun Jun 23 23:22:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Chan via B4 Relay X-Patchwork-Id: 13708776 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A61C918509E; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184976; cv=none; b=RbbdPNOVUuc/+fNXrDcG8ML8JV6R16WHfo/hze5bSCfo3COLcHeF7DLV+emhSn4txogjqMWJb2O+B3v7L+421iotkh4Sez/TjHt/Oejh+E0nORqaZbUhwwV1ACbmBdvyxptJzzSOlsI3pnhGKO6lrCsz4F2mfWcxcE/vEuTQxlo= ARC-Message-Signature: i=1; a=rsa-sha256; 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<20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Chan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1719184973; l=2308; i=gchan9527@gmail.com; s=20240621; h=from:subject:message-id; bh=YnPxfplUpyI7adL5KPtpIXi5NQhvsVScDtSlkhPHhXI=; b=/I0M+vj7t9R6giw6FMrUFghs4X9YNXcj0LsjgRByu9J+GnalPu2StVVD8L/ZsoE5udfElUsVG QN/Ww/Gug2JB/X+ZxyS0S9TrHXWz6iq+yolczpEXeYHBRFE7/xxVH5X X-Developer-Key: i=gchan9527@gmail.com; a=ed25519; pk=Ac2fkTqgUBlj2sns9hRIWJTYhWHO1BsmHbdBb5UpUUY= X-Endpoint-Received: by B4 Relay for gchan9527@gmail.com/20240621 with auth_id=176 X-Original-From: George Chan Reply-To: gchan9527@gmail.com From: George Chan Add in functional logic throughout the code to support the sc7180. Signed-off-by: George Chan --- drivers/media/platform/qcom/camss/camss-csiphy.c | 1 + drivers/media/platform/qcom/camss/camss-vfe.c | 3 +++ drivers/media/platform/qcom/camss/camss-video.c | 1 + 3 files changed, 5 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss-csiphy.c b/drivers/media/platform/qcom/camss/camss-csiphy.c index 45b3a8e5dea4..1fb08b5ee01b 100644 --- a/drivers/media/platform/qcom/camss/camss-csiphy.c +++ b/drivers/media/platform/qcom/camss/camss-csiphy.c @@ -577,6 +577,7 @@ int msm_csiphy_subdev_init(struct camss *camss, csiphy->nformats = ARRAY_SIZE(csiphy_formats_8x96); break; case CAMSS_845: + case CAMSS_7180: case CAMSS_8250: case CAMSS_8280XP: csiphy->formats = csiphy_formats_sdm845; diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index d875237cf244..05fa1adc1661 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -224,6 +224,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code, case CAMSS_8x96: case CAMSS_660: case CAMSS_845: + case CAMSS_7180: case CAMSS_8250: case CAMSS_8280XP: switch (sink_code) { @@ -1518,6 +1519,7 @@ int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe, } break; case CAMSS_845: + case CAMSS_7180: case CAMSS_8250: case CAMSS_8280XP: l->formats = formats_rdi_845; @@ -1603,6 +1605,7 @@ static int vfe_bpl_align(struct vfe_device *vfe) switch (vfe->camss->res->version) { case CAMSS_845: + case CAMSS_7180: case CAMSS_8250: case CAMSS_8280XP: ret = 16; diff --git a/drivers/media/platform/qcom/camss/camss-video.c b/drivers/media/platform/qcom/camss/camss-video.c index 54cd82f74115..5b7f3fba938c 100644 --- a/drivers/media/platform/qcom/camss/camss-video.c +++ b/drivers/media/platform/qcom/camss/camss-video.c @@ -1027,6 +1027,7 @@ int msm_video_register(struct camss_video *video, struct v4l2_device *v4l2_dev, } break; case CAMSS_845: + case CAMSS_7180: case CAMSS_8250: case CAMSS_8280XP: video->formats = formats_rdi_845; From patchwork Sun Jun 23 23:22:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Chan via B4 Relay X-Patchwork-Id: 13708778 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8EC6185E70; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GdoxwzIg" Received: by smtp.kernel.org (Postfix) with ESMTPS id 532C6C4AF14; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719184976; bh=qoe4zeVEEi+STk5gxxMg7Ue33w5bLBVqmmVRNs5lIPk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=GdoxwzIg0IB4zqVaw/fqaH+ieDpgjwn9ji8c/qqRXZfS4PB7TA2pO87LVlHg2Gdly HLbP6perQlNMyGqUEsTVvMmMaMlhRxrjmsPyJwqZSSoFHnnG6sXMTXyg9LhOVRiwCj fsHRm/i16rVu6uLZTYOxyRRuCpWGOoaZGnIJs7akirDfl+++CDBZSPjxs2w1lXBRPB jXtDLCztjEXb24+XZK4YSVVno5VCcwkHy4UPJ2JQ38dhEz0GEd4zyx15iSVxtix7Wv vw95LoNpAAWBpEAY585EW+/whfWlCAqRxBw2Fr7QMDjfjmzR4n5YqeGVKNPlBPEhsB y4cZ7P/dyMemQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4572EC2D0D1; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) From: George Chan via B4 Relay Date: Mon, 24 Jun 2024 07:22:43 +0800 Subject: [PATCH v2 4/8] Add sc7180 resources Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240624-b4-sc7180-camss-v2-4-0dfecdc50073@gmail.com> References: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> In-Reply-To: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Chan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1719184974; l=5971; i=gchan9527@gmail.com; s=20240621; h=from:subject:message-id; bh=eYOdfLNfRsR/Y0mGhFjRJip/UgmhUUZf9hPbYPKEjak=; b=i7ZRKHlI9DdJ5G+7EtxDj3+i4xLJDLUjdxubzGk6kl1k3SIPzbFhOwBddGUw7OyUr4Si/JzRh jxkMDlBypHcBNSakfYm7FNv10p3EoFP/UdHKrd1oKirzNmMRIbMWn1J X-Developer-Key: i=gchan9527@gmail.com; a=ed25519; pk=Ac2fkTqgUBlj2sns9hRIWJTYhWHO1BsmHbdBb5UpUUY= X-Endpoint-Received: by B4 Relay for gchan9527@gmail.com/20240621 with auth_id=176 X-Original-From: George Chan Reply-To: gchan9527@gmail.com From: George Chan This commit describes the hardware layout for the sc7180 for the following hardware blocks: - 2 x VFE - 1 x VFE Lite - 2 x CSID - 1 x CSID Lite - 4 x CSI PHY Signed-off-by: George Chan --- drivers/media/platform/qcom/camss/camss.c | 216 ++++++++++++++++++++++++++++++ 1 file changed, 216 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 1923615f0eea..86ba80c47188 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -713,6 +713,210 @@ static const struct camss_subdev_resources vfe_res_845[] = { } }; +static const struct camss_subdev_resources csiphy_res_7180[] = { + /* CSIPHY0 */ + { + .regulators = {}, + .clock = { + "csiphy0", + "csiphy0_timer" + }, + .clock_rate = { + { 150000000, 270000000, 360000000 }, + { 300000000 }, + }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .ops = &csiphy_ops_3ph_1_0 + }, + /* CSIPHY1 */ + { + .regulators = {}, + .clock = { + "csiphy1", + "csiphy1_timer" + }, + .clock_rate = { + { 150000000, 270000000, 360000000 }, + { 300000000 }, + }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .ops = &csiphy_ops_3ph_1_0 + }, + /* CSIPHY2 */ + { + .regulators = {}, + .clock = { + "csiphy2", + "csiphy2_timer" + }, + .clock_rate = { + { 150000000, 270000000, 360000000 }, + { 300000000 }, + }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .ops = &csiphy_ops_3ph_1_0 + }, + /* CSIPHY3 */ + { + .regulators = {}, + .clock = { + "csiphy3", + "csiphy3_timer" + }, + .clock_rate = { + { 150000000, 270000000, 360000000 }, + { 300000000 }, + }, + .reg = { "csiphy3" }, + .interrupt = { "csiphy3" }, + .ops = &csiphy_ops_3ph_1_0 + } +}; + +static const struct camss_subdev_resources csid_res_7180[] = { + /* CSID0 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { + "soc_ahb", + "vfe0", + "vfe0_cphy_rx", + "csi0" + }, + .clock_rate = { + { 0 }, + { 240000000, 360000000, 432000000, 600000000 }, + { 150000000, 270000000, 360000000 }, + { 150000000, 270000000, 360000000, 480000000 }, + }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .ops = &csid_ops_gen2 + }, + + /* CSID1 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { + "soc_ahb", + "vfe1", + "vfe1_cphy_rx", + "csi1", + }, + .clock_rate = { + { 0 }, + { 240000000, 360000000, 432000000, 600000000 }, + { 150000000, 270000000, 360000000 }, + { 150000000, 270000000, 360000000, 480000000 }, + }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .ops = &csid_ops_gen2 + }, + + /* CSID2 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { + "soc_ahb", + "vfe_lite", + "vfe_lite_cphy_rx", + "csi2", + }, + .clock_rate = { + { 0 }, + { 240000000, 360000000, 432000000, 600000000 }, + { 150000000, 270000000, 360000000 }, + { 150000000, 270000000, 360000000, 480000000 }, + }, + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .is_lite = true, + .ops = &csid_ops_gen2 + } +}; + +static const struct camss_subdev_resources vfe_res_7180[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { + "camnoc_axi", + "cpas_ahb", + "soc_ahb", + "vfe0", + "vfe0_axi", + "csi0", + }, + .clock_rate = { + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 360000000, 432000000, 600000000 }, + { 0 }, + { 150000000, 270000000, 360000000, 480000000 }, + }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .pd_name = "ife0", + .line_num = 4, + .has_pd = true, + .ops = &vfe_ops_170 + }, + /* VFE1 */ + { + .regulators = {}, + .clock = { + "camnoc_axi", + "cpas_ahb", + "soc_ahb", + "vfe1", + "vfe1_axi", + "csi1", + }, + .clock_rate = { + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 360000000, 432000000, 600000000 }, + { 0 }, + { 150000000, 270000000, 360000000, 480000000 }, + }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .pd_name = "ife1", + .line_num = 4, + .has_pd = true, + .ops = &vfe_ops_170 + }, + /* VFE-lite */ + { + .regulators = {}, + .clock = { + "camnoc_axi", + "cpas_ahb", + "soc_ahb", + "vfe_lite", + "csi2", + }, + .clock_rate = { + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 360000000, 432000000, 600000000 }, + { 150000000, 270000000, 360000000, 480000000 }, + }, + .reg = { "vfe_lite" }, + .interrupt = { "vfe_lite" }, + .is_lite = true, + .line_num = 4, + .ops = &vfe_ops_170 + } +}; + static const struct camss_subdev_resources csiphy_res_8250[] = { /* CSIPHY0 */ { @@ -2105,6 +2309,17 @@ static const struct camss_resources sdm845_resources = { .vfe_num = ARRAY_SIZE(vfe_res_845), }; +static const struct camss_resources sc7180_resources = { + .version = CAMSS_7180, + .pd_name = "top", + .csiphy_res = csiphy_res_7180, + .csid_res = csid_res_7180, + .vfe_res = vfe_res_7180, + .csiphy_num = ARRAY_SIZE(csiphy_res_7180), + .csid_num = ARRAY_SIZE(csid_res_7180), + .vfe_num = ARRAY_SIZE(vfe_res_7180), +}; + static const struct camss_resources sm8250_resources = { .version = CAMSS_8250, .pd_name = "top", @@ -2137,6 +2352,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, + { .compatible = "qcom,sc7180-camss", .data = &sc7180_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources }, { } From patchwork Sun Jun 23 23:22:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Chan via B4 Relay X-Patchwork-Id: 13708779 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7B81185E79; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184976; cv=none; b=unUXm4jscJ/jRQT9l8azxwyAir+rr0A4mBd5CFSdbfKT71A7XQRqIJ3eEkbADZWxFU6waZFAkIAmNPvJNe3X5m3pHjbv2tUS9/Ywb1bB44fgSQ6up1hqjx9PCQmDnoyicBdeAkFEdF4qjiD64MzX5EQYjEoTUHpHK7/B7xTlodY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184976; c=relaxed/simple; bh=uxZoWyiS5m1gdIZqkbwAMcPfbU2bzkn3jcszmCTrfeE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Sun, 23 Jun 2024 23:22:56 +0000 (UTC) From: George Chan via B4 Relay Date: Mon, 24 Jun 2024 07:22:44 +0800 Subject: [PATCH v2 5/8] Add debug log info to camss_enable_clocks function Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240624-b4-sc7180-camss-v2-5-0dfecdc50073@gmail.com> References: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> In-Reply-To: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Chan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1719184974; l=811; i=gchan9527@gmail.com; s=20240621; h=from:subject:message-id; bh=6aIAhDdR6ba+wStFSXsVTf8OUMR91nQ2Q2sdegpU84I=; b=nVTVcI2zBFK7DgJRrC8BySXVYzj3UDol6nS+rZRiLKHFSruoRZAaoPj/RVDpwaaZjiSJ8UH13 R+aGtDssKe2CEuw3x9gprS7qtANiic5xi8BKZXDNpjHPc9BCfBim+/G X-Developer-Key: i=gchan9527@gmail.com; a=ed25519; pk=Ac2fkTqgUBlj2sns9hRIWJTYhWHO1BsmHbdBb5UpUUY= X-Endpoint-Received: by B4 Relay for gchan9527@gmail.com/20240621 with auth_id=176 X-Original-From: George Chan Reply-To: gchan9527@gmail.com From: George Chan Print out missing clock's name when doing camss_enable_clocks(). Signed-off-by: George Chan Acked-by: Bryan O'Donoghue --- drivers/media/platform/qcom/camss/camss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 86ba80c47188..d50f98565531 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -1467,7 +1467,7 @@ int camss_enable_clocks(int nclocks, struct camss_clock *clock, for (i = 0; i < nclocks; i++) { ret = clk_prepare_enable(clock[i].clk); if (ret) { - dev_err(dev, "clock enable failed: %d\n", ret); + dev_err(dev, "clock enable failed: %s %d\n", clock[i].name, ret); goto error; } } From patchwork Sun Jun 23 23:22:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Chan via B4 Relay X-Patchwork-Id: 13708781 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D0B22186296; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184976; cv=none; b=MT/5TWdFJdJf5mHXKIwTqVTFECp9IMx7rul+VtqHbvvt9eU4/VY2FS5Cgdv3DfRj9/yBjKCdKOwDk1MqtNWufjoEg12QaFI2otbgm26vb79vxDbZ1y6bUT0O1tEzm5STGf4Q2P+WSr1jwAear6uT7uh1P0/d5wuopUfNvy7VFso= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184976; c=relaxed/simple; bh=rOgR1WW/xbL4EEwa12yEe1zcnoAEtvtUA085CcCmHOY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=c2UqXTziI2HTLPYTw2zDWAeTAZQaVnoDRRjeXtYZc9GtTAv0/5yIEzvfULkqsIlAj4fCX/Ubc736UY/qn28L8odHDgrwDF8EQWGD/AIp73faNYIIIpYqK76eiJzMD56Bbtwer8CnCk7kDQQ5Q/iVrQ9S3nRy/cSZbUqe8TL0FUA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=rUe8V2b3; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="rUe8V2b3" Received: by smtp.kernel.org (Postfix) with ESMTPS id 67B3EC4AF48; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719184976; bh=rOgR1WW/xbL4EEwa12yEe1zcnoAEtvtUA085CcCmHOY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=rUe8V2b3Gqo+eOQyt0maQvzm9SZBdKbLBlcYn/1UsVf7VYIASIRjqz8MAKO/wNP6C x2lHGxm3ObhKiD92F+j19HZ5q1FD7LeBux7JVzWyJozL1PLkYlcZJi09zMP037rFih DpLGPz3wnGa7N5RFsmlEyCxvgOpuOsC2QNCPiAfgy7ZxiUlmo7FUxWw0PZ93kWwcFF rMmztbqS4ks5HCwJaQGphRGUUQewPtT5HwHPbPubsKQXB1FdFINxvpS9+kLRNS6hTf hNP6GOhdJcMTt2q6AMRQb+qlr42pU1TSQSUyAyyf3ofwP4yNNcEAvDx7T4RN5/K5vl 3dpDwTyaEpnkw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5DAE7C30659; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) From: George Chan via B4 Relay Date: Mon, 24 Jun 2024 07:22:45 +0800 Subject: [PATCH v2 6/8] Add debug log info to msm_csid_subdev_init function Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240624-b4-sc7180-camss-v2-6-0dfecdc50073@gmail.com> References: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> In-Reply-To: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Chan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1719184974; l=892; i=gchan9527@gmail.com; s=20240621; h=from:subject:message-id; bh=xalkNP77MBkGfMNCvE+EDKlSV1hYrIaNytEu+tgrW+s=; b=DhNwZ3i0n2A6g2xn04mAHFVW0aP5PSgdJNKSdD6r8n7PdY51bQlsdfAHt0/VTvjyyOGrFvgk5 uUUNtXfX8LJDriZKfAHFJuTMZBWqB+oFnKpt1uCkzKvd9nzn0D+PPp+ X-Developer-Key: i=gchan9527@gmail.com; a=ed25519; pk=Ac2fkTqgUBlj2sns9hRIWJTYhWHO1BsmHbdBb5UpUUY= X-Endpoint-Received: by B4 Relay for gchan9527@gmail.com/20240621 with auth_id=176 X-Original-From: George Chan Reply-To: gchan9527@gmail.com From: George Chan Print out missing clock's name when doing msm_csid_subdev_init(). Signed-off-by: George Chan Reviewed-by: Bryan O'Donoghue --- drivers/media/platform/qcom/camss/camss-csid.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c index eb27d69e89a1..02162bf9dbc0 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -628,8 +628,10 @@ int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid, struct camss_clock *clock = &csid->clock[i]; clock->clk = devm_clk_get(dev, res->clock[i]); - if (IS_ERR(clock->clk)) + if (IS_ERR(clock->clk)) { + dev_err(dev, "missing clk %s", res->clock[i]); return PTR_ERR(clock->clk); + } clock->name = res->clock[i]; From patchwork Sun Jun 23 23:22:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Chan via B4 Relay X-Patchwork-Id: 13708780 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC18618628E; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184976; cv=none; b=m0FKgYpnACCQGUGJQIQfkmzmHlGSJXNDgjkFckkZNYT8oNG3w+KRYgZ6hX+OtJ+RiVQ7eYdIrs5wVZnUk/Lqn+h8VmnSu5ERmI7iba9mmEXaQ8ZesTJF0EFugOq3F96BZYG/4glym/6fb1Wn0H245Ib8ztipTrn2r+tBYF9gzxw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184976; c=relaxed/simple; bh=74S0E60M85VDOHydsBO6YWmb+q/SFEbCocOPAUBA84w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hz0Ev60uDWaq6OU6f08DgsVabhphgaEwz5SwOvRjIVCv7ydUvyP7Sadxl0cdOh/7X34rTZtkpskyIeGWE5oOkrWe8PsJ3iS3nnq7Gf2tStaNCcQlwUqvuwBkU/KKGw1i60Y5AfvEXD0XYeFQT5tRQdoPzh/yl/FzzmNapJq9ddY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=aqzOi34Q; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="aqzOi34Q" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7AB4CC4AF68; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719184976; bh=74S0E60M85VDOHydsBO6YWmb+q/SFEbCocOPAUBA84w=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=aqzOi34QC9MkRw2YUGm2aOgbELRpRnR7yf+9kuWcdblnuIIQrWyIpOUaDPpd6rkmI pTO5ivl9/tr63Ksn/bNgRPIS0W47OsSE1eNZ1uUYGt9GMQ6221Ph4cnQ1rCUYUF8ES gF4Myq8n9y8bBKcx90+9PDcUyiVcbQukKolnswyNX5J5PlVNmoD6oYB8MCrMEh8Vd8 QUUiNB+GsDZ/L61ZAP55FHnd23RICqQXY+Hf7vNLAOSkGfqkn3t0LbFxWqP5bNjdiu klAQgk/rwVC0VNFNIsKNFEV2TE0Y0BpGMrz5qOHh4XuD/Obei9Y/FgHF4a4hJwyoPM VxKQJ7r44jmLg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 701D3C2BD05; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) From: George Chan via B4 Relay Date: Mon, 24 Jun 2024 07:22:46 +0800 Subject: [PATCH v2 7/8] Add debug log info to vfe block init and set clock rate Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240624-b4-sc7180-camss-v2-7-0dfecdc50073@gmail.com> References: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> In-Reply-To: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Chan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1719184974; l=1258; i=gchan9527@gmail.com; s=20240621; h=from:subject:message-id; bh=8g7c7y+bobDHCG87OSB8UdNx46oyvLYRoK1ecGyKT60=; b=TQ85B/lPVHtG5nfsfD/pB0LTzbsLt1MHncCyWrQ3FK94pgtLdjUZPMXrjQjqsl/oP1xoIEzpr cdAKlEFnX8XDxvX/NCQ0S70zYUWLQwaLrj0ruJRcZlNelKi6x0NHgFd X-Developer-Key: i=gchan9527@gmail.com; a=ed25519; pk=Ac2fkTqgUBlj2sns9hRIWJTYhWHO1BsmHbdBb5UpUUY= X-Endpoint-Received: by B4 Relay for gchan9527@gmail.com/20240621 with auth_id=176 X-Original-From: George Chan Reply-To: gchan9527@gmail.com From: George Chan Print out missing clock's name when doing msm_vfe_subdev_init(). Also print out min clock rate required at vfe_set_clock_rates(). Signed-off-by: George Chan --- drivers/media/platform/qcom/camss/camss-vfe.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c index 05fa1adc1661..fbbf38755c0e 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -579,7 +579,8 @@ static int vfe_set_clock_rates(struct vfe_device *vfe) if (j == clock->nfreqs) { dev_err(dev, - "Pixel clock is too high for VFE"); + "Pixel clock(%s) is too high for VFE, at least set to %lld", + clock->name, min_rate); return -EINVAL; } @@ -1452,8 +1453,10 @@ int msm_vfe_subdev_init(struct camss *camss, struct vfe_device *vfe, struct camss_clock *clock = &vfe->clock[i]; clock->clk = devm_clk_get(dev, res->clock[i]); - if (IS_ERR(clock->clk)) + if (IS_ERR(clock->clk)) { + dev_err(dev, "missing clk %s", res->clock[i]); return PTR_ERR(clock->clk); + } clock->name = res->clock[i]; From patchwork Sun Jun 23 23:22:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: George Chan via B4 Relay X-Patchwork-Id: 13708782 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3C37186E45; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184977; cv=none; b=Dr61DumG6N/WPpIyL99yZl/hrXSMHZNHk4roVP53dg0SJi1fu2Kf751t/SxYmyjl9clp34JmHB2MlVIvftrEYq7IYb4I6cwNhQ9lcSuaO5UpYhkJm+lFXyz7yJYs4gLR3SgdCC4lLx86wYynt87nrhlUHkvtCdVCdyHD/nBe+GM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719184977; c=relaxed/simple; bh=SZzhgIdKajwWjYEpdD7fdRefbWwv2wM+lm7g39cQ37s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dsqxiWJ/wsvYv9lbjqHi8bDWZD/WXnTPBeuB+u5CChwxAjoCg6owYJ/jRV6As9upkEz5PfcYYMn1jPJ7b8oYnTdh8Bs9fRyraEBzPZC5L3kx0sXbxOWi2ZUR0IEJqoFZJx4cwJkLbfZXAc7+tIdz6uaMbbH8JZGLDHPklm6Od7A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=q1zbK8+r; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="q1zbK8+r" Received: by smtp.kernel.org (Postfix) with ESMTPS id 87D26C4DDE1; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719184976; bh=SZzhgIdKajwWjYEpdD7fdRefbWwv2wM+lm7g39cQ37s=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=q1zbK8+rs2YmfxCl10E6JjeAuq07BlhwS7PMOKhoYvJ4uT6t70MET5Sg6GIYNPEdJ 1uWeAr/7Paqqvg9QcmAVcS0pipGMzzo9Od66QVWNTk02sUMWrtug6Utj81qrrk+KR1 L87Vtju6K/7jI8BbkY5DSwytWBhH9j/FfnhNEOr4sZj/H8rOS/WgZFwyBv7+WeI3LR ChhGTUO8+UGL5GRGmXCO3jHADojO458vhvmzdzXEHJzNBhOLHQJbJZz3bEJwKcMWVJ QqaWwVZuFOSvNgmEdRRW1ioghMZgwsUZoU/nOoxGK4l8UOC7FGU0V7N/Kjdv4oicD7 Fp9JHRdDxHXpQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F758C27C4F; Sun, 23 Jun 2024 23:22:56 +0000 (UTC) From: George Chan via B4 Relay Date: Mon, 24 Jun 2024 07:22:47 +0800 Subject: [PATCH RFT v2 8/8] Add support for sc7180 camss subsys Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240624-b4-sc7180-camss-v2-8-0dfecdc50073@gmail.com> References: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> In-Reply-To: <20240624-b4-sc7180-camss-v2-0-0dfecdc50073@gmail.com> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org, Bjorn Andersson , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, George Chan X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1719184974; l=4445; i=gchan9527@gmail.com; s=20240621; h=from:subject:message-id; bh=X2+frU2LDNyw6wyGPbsG3VQnH0Ks5wg8+nWA/3AbbKA=; b=486ns1YCIRPWUKHR3RW3pjJAqPdpMC27AnFtZYpn533ry2RHOfDBoo7UwodTxw5nIxfR0JDm3 8VnWoIa2JyPAR6PFrTukoOKqon4zQ591tg5PI+noJbEkzZiNf5TTvuO X-Developer-Key: i=gchan9527@gmail.com; a=ed25519; pk=Ac2fkTqgUBlj2sns9hRIWJTYhWHO1BsmHbdBb5UpUUY= X-Endpoint-Received: by B4 Relay for gchan9527@gmail.com/20240621 with auth_id=176 X-Original-From: George Chan Reply-To: gchan9527@gmail.com From: George Chan Introduce camss subsys support to sc7180 family soc. Signed-off-by: George Chan --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 135 +++++++++++++++++++++++++++++++++++ 1 file changed, 135 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index b5ebf8980325..c2180d52452c 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -5,6 +5,7 @@ * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved. */ +#include #include #include #include @@ -3150,6 +3151,140 @@ camnoc_virt: interconnect@ac00000 { qcom,bcm-voters = <&apps_bcm_voter>; }; + camss: camss@acb3000 { + compatible = "qcom,sc7180-camss"; + + reg = <0 0xacb3000 0 0x1000>, + <0 0xacba000 0 0x1000>, + <0 0xacc8000 0 0x1000>, + <0 0xac65000 0 0x1000>, + <0 0xac66000 0 0x1000>, + <0 0xac67000 0 0x1000>, + <0 0xac68000 0 0x1000>, + <0 0xacaf000 0 0x4000>, + <0 0xacb6000 0 0x4000>, + <0 0xacc4000 0 0x4000>; + + reg-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "vfe0", + "vfe1", + "vfe_lite"; + + clocks = <&camcc CAM_CC_CAMNOC_AXI_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_IFE_0_CSID_CLK>, + <&camcc CAM_CC_IFE_1_CSID_CLK>, + <&camcc CAM_CC_IFE_LITE_CSID_CLK>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_HF_AXI_CLK>, + <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_IFE_0_AXI_CLK>, + <&camcc CAM_CC_IFE_0_CLK>, + <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_1_AXI_CLK>, + <&camcc CAM_CC_IFE_1_CLK>, + <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>, + <&camcc CAM_CC_IFE_LITE_CLK>, + <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>; + + clock-names = "camnoc_axi", + "cpas_ahb", + "csi0", + "csi1", + "csi2", + "csiphy0", + "csiphy0_timer", + "csiphy1", + "csiphy1_timer", + "csiphy2", + "csiphy2_timer", + "csiphy3", + "csiphy3_timer", + "gcc_camera_ahb", + "gcc_camera_axi", + "soc_ahb", + "vfe0_axi", + "vfe0", + "vfe0_cphy_rx", + "vfe1_axi", + "vfe1", + "vfe1_cphy_rx", + "vfe_lite", + "vfe_lite_cphy_rx"; + + interrupts = , + , + , + , + , + , + , + , + , + ; + + interrupt-names = "csid0", + "csid1", + "csid2", + "csiphy0", + "csiphy1", + "csiphy2", + "csiphy3", + "vfe0", + "vfe1", + "vfe_lite"; + + iommus = <&apps_smmu 0x820 0x0>, + <&apps_smmu 0x840 0x0>, + <&apps_smmu 0x860 0x0>; + + power-domains = <&camcc IFE_0_GDSC>, + <&camcc IFE_1_GDSC>, + <&camcc TITAN_TOP_GDSC>; + + power-domain-names = "ife0", "ife1", "top"; + + required-opps = <&rpmhpd_opp_low_svs>; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; + + port@1 { + reg = <1>; + }; + + port@2 { + reg = <2>; + }; + + port@3 { + reg = <3>; + }; + + }; + }; + camcc: clock-controller@ad00000 { compatible = "qcom,sc7180-camcc"; reg = <0 0x0ad00000 0 0x10000>;