From patchwork Mon Jun 24 22:11:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxwell Bland X-Patchwork-Id: 13710198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64C33C30653 for ; Mon, 24 Jun 2024 22:11:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Mon, 24 Jun 2024 22:11:13 +0000 (UTC) Received: from ilclasset02 (ilclasset02.mot.com [100.64.49.13]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: mbland) by ilclmmrp01.lenovo.com (Postfix) with ESMTPSA id 4W7McK1zL8z3nd8L; Mon, 24 Jun 2024 22:11:13 +0000 (UTC) Date: Mon, 24 Jun 2024 17:11:12 -0500 From: Maxwell Bland To: linux-mm@kvack.org Cc: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Ard Biesheuvel , Mark Rutland , Christophe Leroy , Maxwell Bland , Alexandre Ghiti , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 1/6] mm: add ARCH_SUPPORTS_NON_LEAF_PTDUMP Message-ID: References: <2bcb3htsjhepxdybpw2bwot2jnuezl3p5mnj5rhjwgitlsufe7@xzhkyntridw3> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2bcb3htsjhepxdybpw2bwot2jnuezl3p5mnj5rhjwgitlsufe7@xzhkyntridw3> X-Proofpoint-ORIG-GUID: aFZWZNnXyYrEtj8CTtxn_sgc6qmXaZgc X-Proofpoint-GUID: aFZWZNnXyYrEtj8CTtxn_sgc6qmXaZgc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-24_19,2024-06-24_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 malwarescore=0 lowpriorityscore=0 mlxlogscore=615 priorityscore=1501 clxscore=1015 impostorscore=0 bulkscore=0 mlxscore=0 phishscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406240177 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240624_151134_013001_786D6164 X-CRM114-Status: GOOD ( 16.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Provide a Kconfig option indicating if note_page can be called for intermediate page directories during ptdump. Signed-off-by: Maxwell Bland --- mm/Kconfig.debug | 8 ++++++++ mm/ptdump.c | 26 ++++++++++++++++++-------- 2 files changed, 26 insertions(+), 8 deletions(-) diff --git a/mm/Kconfig.debug b/mm/Kconfig.debug index afc72fde0f03..41071539bf9e 100644 --- a/mm/Kconfig.debug +++ b/mm/Kconfig.debug @@ -201,6 +201,14 @@ config PTDUMP_DEBUGFS If in doubt, say N. +config ARCH_SUPPORTS_NON_LEAF_PTDUMP + bool "Include intermediate directory entries in pagetable dumps" + help + Enable the inclusion of intermediate page directory entries in calls + to the ptdump API. Once an architecture defines correct ptdump + behavior for PGD, PUD, P4D, and PMD entries, this config can be + selected. + config HAVE_DEBUG_KMEMLEAK bool diff --git a/mm/ptdump.c b/mm/ptdump.c index 106e1d66e9f9..3c8eea232282 100644 --- a/mm/ptdump.c +++ b/mm/ptdump.c @@ -26,6 +26,11 @@ static inline int note_kasan_page_table(struct mm_walk *walk, } #endif +static inline bool has_non_leaf_ptdump(void) +{ + return IS_ENABLED(CONFIG_ARCH_SUPPORTS_NON_LEAF_PTDUMP); +} + static int ptdump_pgd_entry(pgd_t *pgd, unsigned long addr, unsigned long next, struct mm_walk *walk) { @@ -41,10 +46,11 @@ static int ptdump_pgd_entry(pgd_t *pgd, unsigned long addr, if (st->effective_prot) st->effective_prot(st, 0, pgd_val(val)); - if (pgd_leaf(val)) { + if (has_non_leaf_ptdump() || pgd_leaf(val)) st->note_page(st, addr, 0, pgd_val(val)); + + if (pgd_leaf(val)) walk->action = ACTION_CONTINUE; - } return 0; } @@ -64,10 +70,11 @@ static int ptdump_p4d_entry(p4d_t *p4d, unsigned long addr, if (st->effective_prot) st->effective_prot(st, 1, p4d_val(val)); - if (p4d_leaf(val)) { + if (has_non_leaf_ptdump() || p4d_leaf(val)) st->note_page(st, addr, 1, p4d_val(val)); + + if (p4d_leaf(val)) walk->action = ACTION_CONTINUE; - } return 0; } @@ -87,10 +94,11 @@ static int ptdump_pud_entry(pud_t *pud, unsigned long addr, if (st->effective_prot) st->effective_prot(st, 2, pud_val(val)); - if (pud_leaf(val)) { + if (has_non_leaf_ptdump() || pud_leaf(val)) st->note_page(st, addr, 2, pud_val(val)); + + if (pud_leaf(val)) walk->action = ACTION_CONTINUE; - } return 0; } @@ -108,10 +116,12 @@ static int ptdump_pmd_entry(pmd_t *pmd, unsigned long addr, if (st->effective_prot) st->effective_prot(st, 3, pmd_val(val)); - if (pmd_leaf(val)) { + + if (has_non_leaf_ptdump() || pmd_leaf(val)) st->note_page(st, addr, 3, pmd_val(val)); + + if (pmd_leaf(val)) walk->action = ACTION_CONTINUE; - } return 0; } From patchwork Mon Jun 24 22:12:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxwell Bland X-Patchwork-Id: 13710199 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 32C11C30653 for ; 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Mon, 24 Jun 2024 22:12:22 +0000 (GMT) Received: from va32lmmrp02.lenovo.com (va32lmmrp02.mot.com [10.62.176.191]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ilclpfpp01.lenovo.com (Postfix) with ESMTPS id 4W7Mdd4Wdszcxq9; Mon, 24 Jun 2024 22:12:21 +0000 (UTC) Received: from ilclasset02 (ilclasset02.mot.com [100.64.49.13]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: mbland) by va32lmmrp02.lenovo.com (Postfix) with ESMTPSA id 4W7Mdd16g3z2VbbV; Mon, 24 Jun 2024 22:12:21 +0000 (UTC) Date: Mon, 24 Jun 2024 17:12:19 -0500 From: Maxwell Bland To: linux-mm@kvack.org Cc: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Ard Biesheuvel , Mark Rutland , Christophe Leroy , Maxwell Bland , Alexandre Ghiti , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 2/6] arm64: add APTable encoding to pagetable defs Message-ID: References: <2bcb3htsjhepxdybpw2bwot2jnuezl3p5mnj5rhjwgitlsufe7@xzhkyntridw3> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2bcb3htsjhepxdybpw2bwot2jnuezl3p5mnj5rhjwgitlsufe7@xzhkyntridw3> X-Proofpoint-ORIG-GUID: cBD7-o-fMElZ7gAEi_7CTo0KFY4fieW1 X-Proofpoint-GUID: cBD7-o-fMElZ7gAEi_7CTo0KFY4fieW1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-24_19,2024-06-24_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 bulkscore=0 mlxscore=0 priorityscore=1501 adultscore=0 phishscore=0 clxscore=1015 mlxlogscore=715 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406240177 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240624_151234_707585_ADF30847 X-CRM114-Status: GOOD ( 12.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add in the APTable permission bit encoding to describe table-level hierarchical access control Signed-off-by: Maxwell Bland --- arch/arm64/include/asm/pgtable-hwdef.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index 9943ff0af4c9..8c229fc96c0a 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -146,6 +146,11 @@ #define PMD_SECT_UXN (_AT(pmdval_t, 1) << 54) #define PMD_TABLE_PXN (_AT(pmdval_t, 1) << 59) #define PMD_TABLE_UXN (_AT(pmdval_t, 1) << 60) +/* + * APTable[1:0] encoding for hierarchical data access control + */ +#define PMD_TABLE_KERN (_AT(pmdval_t, 1) << 61) +#define PMD_TABLE_PRDONLY (_AT(pmdval_t, 1) << 62) /* * AttrIndx[2:0] encoding (mapping attributes defined in the MAIR* registers). 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Mon, 24 Jun 2024 22:13:17 +0000 (UTC) Received: from ilclasset02 (ilclasset02.mot.com [100.64.49.13]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: mbland) by va32lmmrp02.lenovo.com (Postfix) with ESMTPSA id 4W7Mfj4N4Fz2VbbV; Mon, 24 Jun 2024 22:13:17 +0000 (UTC) Date: Mon, 24 Jun 2024 17:13:16 -0500 From: Maxwell Bland To: linux-mm@kvack.org Cc: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Ard Biesheuvel , Mark Rutland , Christophe Leroy , Maxwell Bland , Alexandre Ghiti , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 3/6] arm64: table descriptor ptdump support Message-ID: <3z4hwt3fcvscs7zu767vp33tp2mqjor5edfnpgmd2s5p66sg6j@elmhqmeujb5m> References: <2bcb3htsjhepxdybpw2bwot2jnuezl3p5mnj5rhjwgitlsufe7@xzhkyntridw3> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2bcb3htsjhepxdybpw2bwot2jnuezl3p5mnj5rhjwgitlsufe7@xzhkyntridw3> X-Proofpoint-GUID: T8uRFtf4Po_E6S6YwRNJ3KsUezkw0neA X-Proofpoint-ORIG-GUID: T8uRFtf4Po_E6S6YwRNJ3KsUezkw0neA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-24_19,2024-06-24_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 mlxlogscore=999 lowpriorityscore=0 mlxscore=0 bulkscore=0 spamscore=0 malwarescore=0 suspectscore=0 adultscore=0 impostorscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406240178 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240624_151334_011959_BC57CD04 X-CRM114-Status: GOOD ( 25.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Distinguish between table and block descriptor attribute bitfields, enable the Kconfig option to print table descriptors and intermediate page table entries, and support printing of attributes specific to table descriptors, such as PXNTable. This is useful when debugging protection systems that leverage hierarchical access control. Signed-off-by: Maxwell Bland --- arch/arm64/Kconfig | 1 + arch/arm64/mm/ptdump.c | 142 +++++++++++++++++++++++++++++++---------- 2 files changed, 108 insertions(+), 35 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 5d91259ee7b5..f4c3290160db 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -98,6 +98,7 @@ config ARM64 select ARCH_SUPPORTS_NUMA_BALANCING select ARCH_SUPPORTS_PAGE_TABLE_CHECK select ARCH_SUPPORTS_PER_VMA_LOCK + select ARCH_SUPPORTS_NON_LEAF_PTDUMP select ARCH_WANT_BATCHED_UNMAP_TLB_FLUSH select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT select ARCH_WANT_DEFAULT_BPF_JIT diff --git a/arch/arm64/mm/ptdump.c b/arch/arm64/mm/ptdump.c index 6986827e0d64..33ca6d182a6a 100644 --- a/arch/arm64/mm/ptdump.c +++ b/arch/arm64/mm/ptdump.c @@ -24,6 +24,7 @@ #include #include #include +#include #define pt_dump_seq_printf(m, fmt, args...) \ @@ -64,7 +65,7 @@ struct prot_bits { const char *clear; }; -static const struct prot_bits pte_bits[] = { +static const struct prot_bits blk_bits[] = { { .mask = PTE_VALID, .val = PTE_VALID, @@ -78,13 +79,13 @@ static const struct prot_bits pte_bits[] = { }, { .mask = PTE_RDONLY, .val = PTE_RDONLY, - .set = "ro", + .set = "RO", .clear = "RW", }, { .mask = PTE_PXN, .val = PTE_PXN, .set = "NX", - .clear = "x ", + .clear = "X ", }, { .mask = PTE_SHARED, .val = PTE_SHARED, @@ -142,44 +143,101 @@ static const struct prot_bits pte_bits[] = { .set = "MEM/NORMAL-TAGGED", } }; +static const size_t num_blk_bits = ARRAY_SIZE(blk_bits); + +static const struct prot_bits tbl_bits[] = { + { + .mask = PTE_VALID, + .val = PTE_VALID, + .set = " ", + .clear = "F", + }, { + .mask = PMD_TABLE_BIT, + .val = PMD_TABLE_BIT, + .set = "TBL", + .clear = " ", + }, { + .mask = PTE_AF, + .val = PTE_AF, + .set = "AF", + .clear = " ", + }, { + .mask = PMD_TABLE_PXN, + .val = PMD_TABLE_PXN, + .set = "NX", + .clear = " ", + }, { + .mask = PMD_TABLE_UXN, + .val = PMD_TABLE_UXN, + .set = "UXN", + .clear = " ", + }, { + .mask = PMD_TABLE_KERN, + .val = PMD_TABLE_KERN, + .set = "KRN", + .clear = " " + }, { + .mask = PMD_TABLE_PRDONLY, + .val = PMD_TABLE_PRDONLY, + .set = "RO", + .clear = "RW" + } +}; +static const size_t num_tbl_bits = ARRAY_SIZE(tbl_bits); struct pg_level { - const struct prot_bits *bits; + const struct prot_bits *blk_bits; + const struct prot_bits *tbl_bits; char name[4]; - int num; u64 mask; + unsigned long size; }; static struct pg_level pg_level[] __ro_after_init = { { /* pgd */ - .name = "PGD", - .bits = pte_bits, - .num = ARRAY_SIZE(pte_bits), + .name = "PGD", + .blk_bits = blk_bits, + .size = PGDIR_SIZE, + .tbl_bits = tbl_bits }, { /* p4d */ - .name = "P4D", - .bits = pte_bits, - .num = ARRAY_SIZE(pte_bits), + .name = "P4D", + .blk_bits = blk_bits, + .size = P4D_SIZE, + .tbl_bits = tbl_bits }, { /* pud */ - .name = "PUD", - .bits = pte_bits, - .num = ARRAY_SIZE(pte_bits), + .name = "PUD", + .blk_bits = blk_bits, + .size = PUD_SIZE, + .tbl_bits = tbl_bits }, { /* pmd */ - .name = "PMD", - .bits = pte_bits, - .num = ARRAY_SIZE(pte_bits), + .name = "PMD", + .blk_bits = blk_bits, + .size = PMD_SIZE, + .tbl_bits = tbl_bits }, { /* pte */ - .name = "PTE", - .bits = pte_bits, - .num = ARRAY_SIZE(pte_bits), + .name = "PTE", + .blk_bits = blk_bits, + .size = PAGE_SIZE, + .tbl_bits = NULL }, }; -static void dump_prot(struct pg_state *st, const struct prot_bits *bits, - size_t num) +static void dump_prot(struct pg_state *st, struct pg_level level) { unsigned i; + const struct prot_bits *bits; + int num_bits; - for (i = 0; i < num; i++, bits++) { + if ((st->current_prot & PTE_TABLE_BIT) == PTE_TABLE_BIT && + level.tbl_bits) { + bits = level.tbl_bits; + num_bits = num_tbl_bits; + } else { + bits = level.blk_bits; + num_bits = num_blk_bits; + } + + for (i = 0; i < num_bits; i++, bits++) { const char *s; if ((st->current_prot & bits->mask) == bits->val) @@ -251,21 +309,30 @@ static void note_page(struct ptdump_state *pt_st, unsigned long addr, int level, note_prot_wx(st, addr); } - pt_dump_seq_printf(st->seq, "0x%016lx-0x%016lx ", - st->start_address, addr); + if (st->start_address == addr) { + if (check_add_overflow(addr, pg_level[st->level].size, + &delta)) + delta = ULONG_MAX - addr + 1; + else + delta = pg_level[st->level].size; + pt_dump_seq_printf(st->seq, "0x%016lx-0x%016lx ", + addr, addr + delta); + } else { + delta = (addr - st->start_address); + pt_dump_seq_printf(st->seq, "0x%016lx-0x%016lx ", + st->start_address, addr); + } - delta = (addr - st->start_address) >> 10; + delta >>= 10; while (!(delta & 1023) && unit[1]) { delta >>= 10; unit++; } pt_dump_seq_printf(st->seq, "%9lu%c %s", delta, *unit, pg_level[st->level].name); - if (st->current_prot && pg_level[st->level].bits) - dump_prot(st, pg_level[st->level].bits, - pg_level[st->level].num); + if (st->current_prot && pg_level[st->level].blk_bits) + dump_prot(st, pg_level[st->level]); pt_dump_seq_puts(st->seq, "\n"); - if (addr >= st->marker[1].start_address) { st->marker++; pt_dump_seq_printf(st->seq, "---[ %s ]---\n", st->marker->name); @@ -311,11 +378,16 @@ void ptdump_walk(struct seq_file *s, struct ptdump_info *info) static void __init ptdump_initialize(void) { unsigned i, j; - - for (i = 0; i < ARRAY_SIZE(pg_level); i++) - if (pg_level[i].bits) - for (j = 0; j < pg_level[i].num; j++) - pg_level[i].mask |= pg_level[i].bits[j].mask; + struct pg_level *level = pg_level; + + for (i = 0; i < ARRAY_SIZE(pg_level); i++, level++) { + if (level->blk_bits) + for (j = 0; j < num_blk_bits; j++) + level->mask |= level->blk_bits[j].mask; + if (level->tbl_bits) + for (j = 0; j < num_tbl_bits; j++) + level->mask |= level->tbl_bits[j].mask; + } } static struct ptdump_info kernel_ptdump_info __ro_after_init = { From patchwork Mon Jun 24 22:14:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxwell Bland X-Patchwork-Id: 13710201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 22DA9C30653 for ; Mon, 24 Jun 2024 22:14:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; 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Signed-off-by: Maxwell Bland --- arch/arm64/mm/ptdump.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/mm/ptdump.c b/arch/arm64/mm/ptdump.c index 33ca6d182a6a..0660b74413a2 100644 --- a/arch/arm64/mm/ptdump.c +++ b/arch/arm64/mm/ptdump.c @@ -303,6 +303,10 @@ static void note_page(struct ptdump_state *pt_st, unsigned long addr, int level, addr >= st->marker[1].start_address) { const char *unit = units; unsigned long delta; + unsigned int i; + + for (i = 0; i < st->level; i++) + pt_dump_seq_printf(st->seq, " "); if (st->current_prot) { note_prot_uxn(st, addr); @@ -323,6 +327,10 @@ static void note_page(struct ptdump_state *pt_st, unsigned long addr, int level, st->start_address, addr); } + /* Align region information regardlesss of level */ + for (i = st->level; i < 4; i++) + pt_dump_seq_printf(st->seq, " "); + delta >>= 10; while (!(delta & 1023) && unit[1]) { delta >>= 10; From patchwork Mon Jun 24 22:15:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxwell Bland X-Patchwork-Id: 13710202 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 567DCC30653 for ; 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Mon, 24 Jun 2024 22:15:09 +0000 (GMT) Received: from ilclmmrp02.lenovo.com (ilclmmrp02.mot.com [100.65.83.26]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by va32lpfpp01.lenovo.com (Postfix) with ESMTPS id 4W7Mhr3qTGzhWB7; Mon, 24 Jun 2024 22:15:08 +0000 (UTC) Received: from ilclasset02 (ilclasset02.mot.com [100.64.49.13]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: mbland) by ilclmmrp02.lenovo.com (Postfix) with ESMTPSA id 4W7Mhr2CBlz3p6jp; Mon, 24 Jun 2024 22:15:08 +0000 (UTC) Date: Mon, 24 Jun 2024 17:15:07 -0500 From: Maxwell Bland To: linux-mm@kvack.org Cc: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Ard Biesheuvel , Mark Rutland , Christophe Leroy , Maxwell Bland , Alexandre Ghiti , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 5/6] arm64: exclusive upper bound for ptdump entries Message-ID: <2e6i3jrv7mfd3athc2g4sbv5rirrukj46cnchcym4io5uhle2n@ah3viwbr5bxr> References: <2bcb3htsjhepxdybpw2bwot2jnuezl3p5mnj5rhjwgitlsufe7@xzhkyntridw3> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2bcb3htsjhepxdybpw2bwot2jnuezl3p5mnj5rhjwgitlsufe7@xzhkyntridw3> X-Proofpoint-ORIG-GUID: xJSB6QTklBwCv0gHX8X554KR7Ds_NYcO X-Proofpoint-GUID: xJSB6QTklBwCv0gHX8X554KR7Ds_NYcO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-24_19,2024-06-24_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 bulkscore=0 mlxscore=0 priorityscore=1501 adultscore=0 phishscore=0 clxscore=1015 mlxlogscore=947 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406240178 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240624_151520_951589_731DB5EB X-CRM114-Status: GOOD ( 15.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update the upper bound of all ptdump entries to not include the byte which is actually governed by the next entry. As the lowest byte is included and governed, this makes the size specifications exact. Signed-off-by: Maxwell Bland --- arch/arm64/mm/ptdump.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/mm/ptdump.c b/arch/arm64/mm/ptdump.c index 0660b74413a2..f13acf9b1cd8 100644 --- a/arch/arm64/mm/ptdump.c +++ b/arch/arm64/mm/ptdump.c @@ -320,11 +320,11 @@ static void note_page(struct ptdump_state *pt_st, unsigned long addr, int level, else delta = pg_level[st->level].size; pt_dump_seq_printf(st->seq, "0x%016lx-0x%016lx ", - addr, addr + delta); + addr, addr + delta - 1); } else { delta = (addr - st->start_address); pt_dump_seq_printf(st->seq, "0x%016lx-0x%016lx ", - st->start_address, addr); + st->start_address, addr - 1); } /* Align region information regardlesss of level */ From patchwork Mon Jun 24 22:16:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxwell Bland X-Patchwork-Id: 13710203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5A997C2BD09 for ; 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Mon, 24 Jun 2024 22:16:22 +0000 (GMT) Received: from ilclmmrp01.lenovo.com (ilclmmrp01.mot.com [100.65.83.165]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by va32lpfpp01.lenovo.com (Postfix) with ESMTPS id 4W7MkF4tV5zhWB3; Mon, 24 Jun 2024 22:16:21 +0000 (UTC) Received: from ilclasset02 (ilclasset02.mot.com [100.64.49.13]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: mbland) by ilclmmrp01.lenovo.com (Postfix) with ESMTPSA id 4W7MkF39R6z3nd8L; Mon, 24 Jun 2024 22:16:21 +0000 (UTC) Date: Mon, 24 Jun 2024 17:16:20 -0500 From: Maxwell Bland To: linux-mm@kvack.org Cc: Catalin Marinas , Will Deacon , Jonathan Corbet , Andrew Morton , Ard Biesheuvel , Mark Rutland , Christophe Leroy , Maxwell Bland , Alexandre Ghiti , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 6/6] arm64: add attrs and format to ptdump document Message-ID: References: <2bcb3htsjhepxdybpw2bwot2jnuezl3p5mnj5rhjwgitlsufe7@xzhkyntridw3> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2bcb3htsjhepxdybpw2bwot2jnuezl3p5mnj5rhjwgitlsufe7@xzhkyntridw3> X-Proofpoint-GUID: LlMeeVVbZ8SJ4SyDN-hV-5CbZZYHi3lJ X-Proofpoint-ORIG-GUID: LlMeeVVbZ8SJ4SyDN-hV-5CbZZYHi3lJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-24_19,2024-06-24_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=896 impostorscore=0 lowpriorityscore=0 mlxscore=0 phishscore=0 bulkscore=0 malwarescore=0 spamscore=0 adultscore=0 clxscore=1015 suspectscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2406140001 definitions=main-2406240178 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240624_151634_401493_CB6852AC X-CRM114-Status: GOOD ( 16.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update the ptdump content with a precise explanation of the attribute symbols and the coalescing of identical entries implicit in the code. Remove unnecessary layout example given the existing cat example, and opt instead for a precise, clear explanation of address markers, format, attributes. Update example to match the new cosmetic and intermediate-directory printing changes. Signed-off-by: Maxwell Bland Reviewed-by: Randy Dunlap --- Documentation/arch/arm64/ptdump.rst | 126 ++++++++++++++-------------- 1 file changed, 61 insertions(+), 65 deletions(-) diff --git a/Documentation/arch/arm64/ptdump.rst b/Documentation/arch/arm64/ptdump.rst index 5dcfc5d7cddf..785b96ab2e89 100644 --- a/Documentation/arch/arm64/ptdump.rst +++ b/Documentation/arch/arm64/ptdump.rst @@ -29,68 +29,64 @@ configurations and mount debugfs:: mount -t debugfs nodev /sys/kernel/debug cat /sys/kernel/debug/kernel_page_tables -On analysing the output of ``cat /sys/kernel/debug/kernel_page_tables`` -one can derive information about the virtual address range of the entry, -followed by size of the memory region covered by this entry, the -hierarchical structure of the page tables and finally the attributes -associated with each page. The page attributes provide information about -access permissions, execution capability, type of mapping such as leaf -level PTE or block level PGD, PMD and PUD, and access status of a page -within the kernel memory. Assessing these attributes can assist in -understanding the memory layout, access patterns and security -characteristics of the kernel pages. - -Kernel virtual memory layout example:: - - start address end address size attributes - +---------------------------------------------------------------------------------------+ - | ---[ Linear Mapping start ]---------------------------------------------------------- | - | .................. | - | 0xfff0000000000000-0xfff0000000210000 2112K PTE RW NX SHD AF UXN MEM/NORMAL-TAGGED | - | 0xfff0000000210000-0xfff0000001c00000 26560K PTE ro NX SHD AF UXN MEM/NORMAL | - | .................. | - | ---[ Linear Mapping end ]------------------------------------------------------------ | - +---------------------------------------------------------------------------------------+ - | ---[ Modules start ]----------------------------------------------------------------- | - | .................. | - | 0xffff800000000000-0xffff800008000000 128M PTE | - | .................. | - | ---[ Modules end ]------------------------------------------------------------------- | - +---------------------------------------------------------------------------------------+ - | ---[ vmalloc() area ]---------------------------------------------------------------- | - | .................. | - | 0xffff800008010000-0xffff800008200000 1984K PTE ro x SHD AF UXN MEM/NORMAL | - | 0xffff800008200000-0xffff800008e00000 12M PTE ro x SHD AF CON UXN MEM/NORMAL | - | .................. | - | ---[ vmalloc() end ]----------------------------------------------------------------- | - +---------------------------------------------------------------------------------------+ - | ---[ Fixmap start ]------------------------------------------------------------------ | - | .................. | - | 0xfffffbfffdb80000-0xfffffbfffdb90000 64K PTE ro x SHD AF UXN MEM/NORMAL | - | 0xfffffbfffdb90000-0xfffffbfffdba0000 64K PTE ro NX SHD AF UXN MEM/NORMAL | - | .................. | - | ---[ Fixmap end ]-------------------------------------------------------------------- | - +---------------------------------------------------------------------------------------+ - | ---[ PCI I/O start ]----------------------------------------------------------------- | - | .................. | - | 0xfffffbfffe800000-0xfffffbffff800000 16M PTE | - | .................. | - | ---[ PCI I/O end ]------------------------------------------------------------------- | - +---------------------------------------------------------------------------------------+ - | ---[ vmemmap start ]----------------------------------------------------------------- | - | .................. | - | 0xfffffc0002000000-0xfffffc0002200000 2M PTE RW NX SHD AF UXN MEM/NORMAL | - | 0xfffffc0002200000-0xfffffc0020000000 478M PTE | - | .................. | - | ---[ vmemmap end ]------------------------------------------------------------------- | - +---------------------------------------------------------------------------------------+ - -``cat /sys/kernel/debug/kernel_page_tables`` output:: - - 0xfff0000001c00000-0xfff0000080000000 2020M PTE RW NX SHD AF UXN MEM/NORMAL-TAGGED - 0xfff0000080000000-0xfff0000800000000 30G PMD - 0xfff0000800000000-0xfff0000800700000 7M PTE RW NX SHD AF UXN MEM/NORMAL-TAGGED - 0xfff0000800700000-0xfff0000800710000 64K PTE ro NX SHD AF UXN MEM/NORMAL-TAGGED - 0xfff0000800710000-0xfff0000880000000 2089920K PTE RW NX SHD AF UXN MEM/NORMAL-TAGGED - 0xfff0000880000000-0xfff0040000000000 4062G PMD - 0xfff0040000000000-0xffff800000000000 3964T PGD +``/sys/kernel/debug/kernel_page_tables`` provides a line of information +for each group of page table entries sharing the same attributes and +type of mapping, i.e. page descriptor PTE or table descriptor PGD, PMD, +and PUD. Assessing these attributes can assist in determining memory +layout, access patterns and security characteristics of the kernel +pages. + +Lines are formatted as follows:: + + - + +Note that the set of attributes, and therefore formatting, is not +equivalent between block (or page) and table descriptor entries. For +example, PMD table descriptors can support the PXNTable permission bit +and do not share that same set of attributes as PTEs. + +The following attributes are presently supported:: + +F Entry is invalid +RO Memory is read-only +RW Memory is read-write +X Memory is privileged executable +NX Memory is privileged execute never +UXN Memory is unprivileged execute never +USR Memory is unprivileged accessible +KRN Memory is unprivileged inaccessible (e.g. APTable bits) +SHD Memory is shared +AF Entry accessed flag is set +NG Entry Not-Global flag is set +CON Entry contiguous bit is set +GP Page is guarded with branch target integrity protection +TBL Entry is a table descriptor +BLK Entry is a block descriptor +DEVICE/* Entry is device memory, see ARM reference for types +MEM/* Entry is non-device memory, see ARM reference for types + +The beginning and end of each region is also delineated by a single line +tag in the following format:: + + ---[ ]--- + +With supported address markers including the kernel's linear mapping, +kasan shadow memory, kernel modules memory, vmalloc memory, PCI I/O +memory, and the kernel's fixmap region. + +Example ``cat /sys/kernel/debug/kernel_page_tables`` output:: + + ---[ Linear Mapping start ]--- + 0xffff000000000000-0xffff1affffffffff 27T PGD + 0xffff1b0000000000-0xffffffffffffffff 229T PGD TBL NX UXN RW + 0xffff1b0000000000-0xffff1b397fffffff 230G PUD + 0xffff1b3980000000-0xffff1b39bfffffff 1G PUD TBL NX UXN RW + 0xffff1b3980000000-0xffff1b39801fffff 2M PMD TBL NX UXN RW + 0xffff1b3980000000-0xffff1b39801fffff 2M PTE RW NX SHD AF NG UXN MEM/NORMAL-TAGGED + 0xffff1b3980200000-0xffff1b39803fffff 2M PMD TBL NX UXN RW + 0xffff1b3980200000-0xffff1b398020ffff 64K PTE RW NX SHD AF NG UXN MEM/NORMAL-TAGGED + 0xffff1b3980210000-0xffff1b39803fffff 1984K PTE RO NX SHD AF NG UXN MEM/NORMAL + 0xffff1b3980400000-0xffff1b3981dfffff 26M PMD RO NX SHD AF NG BLK UXN MEM/NORMAL + 0xffff1b3981e00000-0xffff1b3981ffffff 2M PMD TBL NX UXN RW + 0xffff1b3981e00000-0xffff1b3981e1ffff 128K PTE RO NX SHD AF NG UXN MEM/NORMAL + 0xffff1b3981e20000-0xffff1b3981ffffff 1920K PTE RW NX SHD AF NG UXN MEM/NORMAL-TAGGED