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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On AM62a SoCs the AUDIO_REFCLKx clocks can be used as an input to external peripherals when configured through CTRL_MMR, so add the clock nodes. Based on: Link: https://lore.kernel.org/lkml/20230807202159.13095-2-francesco@dolcini.it/ Signed-off-by: Garrett Giordano --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index bf9c2d9c6439..2a6e333f752c 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -59,6 +59,24 @@ epwm_tbclk: clock-controller@4130 { reg = <0x4130 0x4>; #clock-cells = <1>; }; + + audio_refclk0: clock-controller@82e0 { + compatible = "ti,am62-audio-refclk"; + reg = <0x82e0 0x4>; + clocks = <&k3_clks 157 0>; + assigned-clocks = <&k3_clks 157 0>; + assigned-clock-parents = <&k3_clks 157 8>; + #clock-cells = <0>; + }; + + audio_refclk1: clock-controller@82e4 { + compatible = "ti,am62-audio-refclk"; + reg = <0x82e4 0x4>; + clocks = <&k3_clks 157 10>; + assigned-clocks = <&k3_clks 157 10>; + assigned-clock-parents = <&k3_clks 157 18>; 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Signed-off-by: Garrett Giordano Reviewed-by: Wadim Egorov --- -v2 - Reformat patches using -B/-M/-C arguments --- .../dts/ti/k3-am625-phyboard-lyra-rdk.dts | 501 +----------------- ...ra-rdk.dts => k3-am62x-phyboard-lyra.dtsi} | 8 - 2 files changed, 18 insertions(+), 491 deletions(-) rewrite arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts (96%) copy arch/arm64/boot/dts/ti/{k3-am625-phyboard-lyra-rdk.dts => k3-am62x-phyboard-lyra.dtsi} (97%) -- 2.25.1 diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts dissimilarity index 96% index 50d2573c840e..4fa5efdffcd7 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts @@ -1,483 +1,18 @@ -// SPDX-License-Identifier: GPL-2.0-only OR MIT -/* - * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH - * Author: Wadim Egorov - * - * Product homepage: - * https://www.phytec.com/product/phyboard-am62x - */ - -#include -#include -#include -#include -#include "k3-am625.dtsi" -#include "k3-am62-phycore-som.dtsi" - -/ { - compatible = "phytec,am625-phyboard-lyra-rdk", - "phytec,am62-phycore-som", "ti,am625"; - model = "PHYTEC phyBOARD-Lyra AM625"; - - aliases { - serial2 = &main_uart0; - serial3 = &main_uart1; - mmc1 = &sdhci1; - usb0 = &usb0; - usb1 = &usb1; - ethernet1 = &cpsw_port2; - }; - - can_tc1: can-phy0 { - compatible = "ti,tcan1042"; - #phy-cells = <0>; - max-bitrate = <8000000>; - standby-gpios = <&gpio_exp 1 GPIO_ACTIVE_HIGH>; - }; - - hdmi0: connector-hdmi { - compatible = "hdmi-connector"; - label = "hdmi"; - type = "a"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&sii9022_out>; - }; - }; - }; - - keys { - compatible = "gpio-keys"; - autorepeat; - pinctrl-names = "default"; - pinctrl-0 = <&gpio_keys_pins_default>; - - key-home { - label = "home"; - linux,code = ; - gpios = <&main_gpio1 23 GPIO_ACTIVE_HIGH>; - }; - - key-menu { - label = "menu"; - linux,code = ; - gpios = <&gpio_exp 4 GPIO_ACTIVE_HIGH>; - }; - }; - - sound { - compatible = "simple-audio-card"; - simple-audio-card,name = "phyBOARD-Lyra"; - simple-audio-card,widgets = - "Microphone", "Mic Jack", - "Headphone", "Headphone Jack", - "Speaker", "External Speaker"; - simple-audio-card,routing = - "MIC3R", "Mic Jack", - "Mic Jack", "Mic Bias", - "Headphone Jack", "HPLOUT", - "Headphone Jack", "HPROUT", - "External Speaker", "SPOP", - "External Speaker", "SPOM"; - simple-audio-card,format = "dsp_b"; - simple-audio-card,bitclock-master = <&sound_master>; - simple-audio-card,frame-master = <&sound_master>; - simple-audio-card,bitclock-inversion; - - simple-audio-card,cpu { - sound-dai = <&mcasp2>; - }; - - sound_master: simple-audio-card,codec { - sound-dai = <&audio_codec>; - clocks = <&audio_refclk1>; - }; - }; - - leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&leds_pins_default>, <&user_leds_pins_default>; - - led-1 { - gpios = <&main_gpio0 32 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc0"; - }; - - led-2 { - gpios = <&gpio_exp 2 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "mmc1"; - }; - }; - - vcc_1v8: regulator-vcc-1v8 { - compatible = "regulator-fixed"; - regulator-name = "VCC_1V8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc_3v3_mmc: regulator-vcc-3v3-mmc { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3_MMC"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; - - vcc_3v3_sw: regulator-vcc-3v3-sw { - compatible = "regulator-fixed"; - regulator-name = "VCC_3V3_SW"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - regulator-boot-on; - }; -}; - -&main_pmx0 { - audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0a0, PIN_OUTPUT, 1) /* (K25) GPMC0_WPn.AUDIO_EXT_REFCLK1 */ - >; - }; - - gpio_keys_pins_default: gpio-keys-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x1d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */ - >; - }; - - gpio_exp_int_pins_default: gpio-exp-int-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x244, PIN_INPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */ - >; - }; - - hdmi_int_pins_default: hdmi-int-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x040, PIN_INPUT, 7) /* (N23) GPMC0_AD1.GPIO0_16 */ - >; - }; - - main_dss0_pins_default: main-dss0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */ - AM62X_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */ - AM62X_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */ - AM62X_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */ - AM62X_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */ - AM62X_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */ - AM62X_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */ - AM62X_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */ - AM62X_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */ - AM62X_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */ - AM62X_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */ - AM62X_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */ - AM62X_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */ - AM62X_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */ - AM62X_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */ - AM62X_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */ - AM62X_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */ - AM62X_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */ - AM62X_IOPAD(0x104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */ - AM62X_IOPAD(0x100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */ - >; - }; - - main_i2c1_pins_default: main-i2c1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ - AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ - >; - }; - - main_mcan0_pins_default: main-mcan0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ - AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ - >; - }; - - main_mcasp2_pins_default: main-mcasp2-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x070, PIN_INPUT, 3) /* (T24) GPMC0_AD13.MCASP2_ACLKX */ - AM62X_IOPAD(0x06c, PIN_INPUT, 3) /* (T22) GPMC0_AD12.MCASP2_AFSX */ - AM62X_IOPAD(0x064, PIN_OUTPUT, 3) /* (T25) GPMC0_AD10.MCASP2_AXR2 */ - AM62X_IOPAD(0x068, PIN_INPUT, 3) /* (R21) GPMC0_AD11.MCASP2_AXR3 */ - >; - }; - - main_mmc1_pins_default: main-mmc1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x23c, PIN_INPUT_PULLUP, 0) /* (A21) MMC1_CMD */ - AM62X_IOPAD(0x234, PIN_INPUT_PULLDOWN, 0) /* (B22) MMC1_CLK */ - AM62X_IOPAD(0x230, PIN_INPUT_PULLUP, 0) /* (A22) MMC1_DAT0 */ - AM62X_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (B21) MMC1_DAT1 */ - AM62X_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (C21) MMC1_DAT2 */ - AM62X_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (D22) MMC1_DAT3 */ - AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */ - >; - }; - - main_rgmii2_pins_default: main-rgmii2-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ - AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ - AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */ - AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */ - AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */ - AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */ - AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */ - AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */ - AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */ - AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */ - AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */ - AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */ - >; - }; - - main_uart0_pins_default: main-uart0-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */ - AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ - >; - }; - - main_uart1_pins_default: main-uart1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19) MCASP0_AXR3.UART1_CTSn */ - AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19) MCASP0_AXR2.UART1_RTSn */ - AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19) MCASP0_AFSR.UART1_RXD */ - AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20) MCASP0_ACLKR.UART1_TXD */ - >; - }; - - main_usb1_pins_default: main-usb1-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */ - >; - }; - - user_leds_pins_default: user-leds-default-pins { - pinctrl-single,pins = < - AM62X_IOPAD(0x084, PIN_OUTPUT, 7) /* (L23) GPMC0_ADVn_ALE.GPIO0_32 */ - >; - }; -}; - -&cpsw3g { - pinctrl-names = "default"; - pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>; -}; - -&cpsw_port2 { - phy-mode = "rgmii-rxid"; - phy-handle = <&cpsw3g_phy3>; -}; - -&cpsw3g_mdio { - cpsw3g_phy3: ethernet-phy@3 { - compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; - reg = <3>; - ti,clk-output-sel = ; - ti,rx-internal-delay = ; - ti,fifo-depth = ; - }; -}; - -&dss { - pinctrl-names = "default"; - pinctrl-0 = <&main_dss0_pins_default>; - status = "okay"; -}; - -&dss_ports { - #address-cells = <1>; - #size-cells = <0>; - - /* VP2: DPI/HDMI Output */ - port@1 { - reg = <1>; - - dpi1_out: endpoint { - remote-endpoint = <&sii9022_in>; - }; - }; -}; - -&main_i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&main_i2c1_pins_default>; - clock-frequency = <100000>; - status = "okay"; - - audio_codec: audio-codec@18 { - pinctrl-names = "default"; - pinctrl-0 = <&audio_ext_refclk1_pins_default>; - - #sound-dai-cells = <0>; - compatible = "ti,tlv320aic3007"; - reg = <0x18>; - ai3x-micbias-vg = <2>; - - AVDD-supply = <&vcc_3v3_sw>; - IOVDD-supply = <&vcc_3v3_sw>; - DRVDD-supply = <&vcc_3v3_sw>; - DVDD-supply = <&vcc_1v8>; - }; - - gpio_exp: gpio-expander@21 { - pinctrl-names = "default"; - pinctrl-0 = <&gpio_exp_int_pins_default>; - compatible = "nxp,pcf8574"; - reg = <0x21>; - interrupt-parent = <&main_gpio1>; - interrupts = <49 0>; - #gpio-cells = <2>; - gpio-controller; - interrupt-controller; - #interrupt-cells = <2>; - gpio-line-names = "", "GPIO1_CAN0_nEN", - "GPIO2_LED2", "GPIO3_LVDS_GPIO", - "GPIO4_BUT2", "GPIO5_LVDS_BKLT_EN", - "GPIO6_ETH1_USER_RESET", "GPIO7_AUDIO_USER_RESET"; - }; - - usb-pd@22 { - compatible = "ti,tps6598x"; - reg = <0x22>; - - connector { - compatible = "usb-c-connector"; - label = "USB-C"; - self-powered; - data-role = "dual"; - power-role = "sink"; - port { - usb_con_hs: endpoint { - remote-endpoint = <&typec_hs>; - }; - }; - }; - }; - - sii9022: bridge-hdmi@39 { - compatible = "sil,sii9022"; - reg = <0x39>; - - interrupt-parent = <&main_gpio0>; - interrupts = <16 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&hdmi_int_pins_default>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - sii9022_in: endpoint { - remote-endpoint = <&dpi1_out>; - }; - }; - - port@1 { - reg = <1>; - - sii9022_out: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; - }; - }; - }; - - eeprom@51 { - compatible = "atmel,24c02"; - pagesize = <16>; - reg = <0x51>; - }; -}; - -&main_mcan0 { - pinctrl-names = "default"; - pinctrl-0 = <&main_mcan0_pins_default>; - phys = <&can_tc1>; - status = "okay"; -}; - -&main_uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&main_uart0_pins_default>; - status = "okay"; -}; - -&main_uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&main_uart1_pins_default>; - /* Main UART1 may be used by TIFS firmware */ - status = "okay"; -}; - -&mcasp2 { - #sound-dai-cells = <0>; - - pinctrl-names = "default"; - pinctrl-0 = <&main_mcasp2_pins_default>; - - /* MCASP_IIS_MODE */ - op-mode = <0>; - tdm-slots = <2>; - - /* 0: INACTIVE, 1: TX, 2: RX */ - serial-dir = < - 0 0 1 2 - 0 0 0 0 - 0 0 0 0 - 0 0 0 0 - >; - tx-num-evt = <32>; - rx-num-evt = <32>; - status = "okay"; -}; - -&sdhci1 { - vmmc-supply = <&vcc_3v3_mmc>; - vqmmc-supply = <&vddshv5_sdio>; - pinctrl-names = "default"; - pinctrl-0 = <&main_mmc1_pins_default>; - disable-wp; - no-1-8-v; - status = "okay"; -}; - -&usbss0 { - ti,vbus-divider; - status = "okay"; -}; - -&usbss1 { - ti,vbus-divider; - status = "okay"; -}; - -&usb0 { - usb-role-switch; - - port { - typec_hs: endpoint { - remote-endpoint = <&usb_con_hs>; - }; - }; -}; - -&usb1 { - dr_mode = "host"; - pinctrl-names = "default"; - pinctrl-0 = <&main_usb1_pins_default>; -}; +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH + * Author: Wadim Egorov + * + * Product homepage: + * https://www.phytec.com/product/phyboard-am62x + */ + +#include "k3-am625.dtsi" +#include "k3-am62-phycore-som.dtsi" +#include "k3-am62x-phyboard-lyra.dtsi" + +/ { + compatible = "phytec,am625-phyboard-lyra-rdk", + "phytec,am62-phycore-som", "ti,am625"; + model = "PHYTEC phyBOARD-Lyra AM625"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi similarity index 97% copy from arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts copy to arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi index 50d2573c840e..e4633af87eb9 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-phyboard-lyra-rdk.dts +++ b/arch/arm64/boot/dts/ti/k3-am62x-phyboard-lyra.dtsi @@ -3,22 +3,14 @@ * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH * Author: Wadim Egorov * - * Product homepage: - * https://www.phytec.com/product/phyboard-am62x */ #include #include #include #include -#include "k3-am625.dtsi" -#include "k3-am62-phycore-som.dtsi" / { - compatible = "phytec,am625-phyboard-lyra-rdk", - "phytec,am62-phycore-som", "ti,am625"; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add devicetree bindings for AM62Ax based phyCORE-AM62A7 SoM and phyBOARD-Lyra RDK. Signed-off-by: Garrett Giordano Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/ti/k3.yaml | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.25.1 diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml index 52b51fd7044e..4d9c5fbb4c26 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -25,6 +25,12 @@ properties: - ti,am62a7-sk - const: ti,am62a7 + - description: K3 AM62A7 SoC PHYTEC phyBOARD-Lyra + items: + - const: phytec,am62a7-phyboard-lyra-rdk + - const: phytec,am62a-phycore-som + - const: ti,am62a7 + - description: K3 AM62P5 SoC and Boards items: - enum: From patchwork Wed Jun 26 15:52:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Garrett Giordano X-Patchwork-Id: 13713143 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ECD0FC27C4F for ; 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Received: from SJ2PR22MB4354.namprd22.prod.outlook.com (2603:10b6:a03:537::8) by MN0PR22MB5515.namprd22.prod.outlook.com (2603:10b6:208:4c7::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7698.34; Wed, 26 Jun 2024 15:53:19 +0000 Received: from SJ2PR22MB4354.namprd22.prod.outlook.com ([fe80::789c:e41e:1367:383d]) by SJ2PR22MB4354.namprd22.prod.outlook.com ([fe80::789c:e41e:1367:383d%3]) with mapi id 15.20.7698.025; Wed, 26 Jun 2024 15:53:18 +0000 From: Garrett Giordano To: nm@ti.com, vigneshr@ti.com, kristo@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, w.egorov@phytec.de Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, upstream@lists.phytec.de Subject: [PATCH v2 4/4] arm64: dts: ti: Add basic support for phyBOARD-Lyra-AM62Ax Date: Wed, 26 Jun 2024 08:52:44 -0700 Message-Id: <20240626155244.3311436-4-ggiordano@phytec.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240626155244.3311436-1-ggiordano@phytec.com> References: <20240626155244.3311436-1-ggiordano@phytec.com> X-ClientProxiedBy: CH0PR08CA0030.namprd08.prod.outlook.com (2603:10b6:610:33::35) To SJ2PR22MB4354.namprd22.prod.outlook.com (2603:10b6:a03:537::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ2PR22MB4354:EE_|MN0PR22MB5515:EE_ X-MS-Office365-Filtering-Correlation-Id: ece4a28d-b918-41a4-76c3-08dc95f8190c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230038|366014|1800799022|376012|7416012|52116012|38350700012; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NTXnGqxlE29McQgKNClxS74fwdQwNnA2AkinTCkdudnD7u/GLrC85wWwGVNvi58ksSODxwXUd9eki5oL1RR8VPUcRLbyN+Ct5cQIV+uDbBSVYfT/fEW3UexfpgJvMnimnAnLwG47lHrRpDWCVcXBLsN0ci9eGrsZ9lcFVLf3Pxk1z9BLsJVqafCCZnilEz1Qa0Y1NOIaiLv+V0WC4jHNZg2vpQGTihXERKpcQbCBXOxWP2ilL2ljyttufr/Lj5n0owHGVdRdwD8RZ/bsWX/b1McDe3M5O++ZTO8oDkatEdWWp4hrVkORszu/QPjznceMzRd8U3SOfm5khP0HFLHaGS1eRLaAKa3QrTZcZOafQ+AIBaQJvGdEStrnfZlIXB40S3n+jaFc7YOx+OjvTWahO8o+L7hzZVW/dS5FrSMVNA3QZoNorEOc/L54D0PnWB4gUGv6amjHzTv6L7PogNl1Fv9bQ2HAmC3nGgglzvpKzQJXpOyRAc5I53sCFHp1IUeF5eu44K8cIfloUo7/51ZbYQIx1q/iTGxPd0dlom4sRZw/24usRymCRhWqEH7xbw92ri5KhsiKXcJ0Kehs7Knu0MpAxnCoDoMB8gyu9ORocj9Hp3BQ2Ujjp8tFXXMzj3NAnD4IcUDlODRDN6F7AGtcxzVi+BuJV8HIE+VCUM45ola/RBfdEU/Uwmjjbnw4E8yaJCY6q9fNomK53acAu4Usg3l5L6JTVSxef6ltMKb3Yejqm/NHjDO49UpHC/5uyipzlae68nygZy7SnMIL0F4s6JjrFgp9dMj6+tH2i9o+7rvAQUqYbSDmyxcC47Cm4hV8BacSBf9gHRlMnWhJ1YEKwrkNDEqWoMubRxoU/aUVi6UoNuzkAOhE9aOpgFfzgeiLkfsBhD9lZyaJEeok4gm+9gOTxIfiumIMmabdu4Ttc+6Dw1Rlqb2iis6FcD0F7aciZx9xmhdZXZo+eBnbzsBfruJIUr95uS3eQb2Ve2nzkho0p6yKR6ReQap80YJDIcpe1VKYK+Ty1B+5O1yCl5/H0/WWpNTf6bSRaLqzA/BX0aGhR31hFYTfUZtSeXTsRjhmshWa2EojzhFgR7XHNsrctHlpXSeGSgGXFDX8VmF1vKtWOCShLwNMEkw1UhKy5zJ0WOgXOHAxzQaeroQng671/mK05OAr+SDgS7iQ8hW2VjjnP2GDwzi/zbKfd3W45EkvweltdttPze1duE4sQ890imkbYV5gl5lCT3P9g4J+OtBV6fBZnxzriEN7CQ8bwRTn2ZpH8FIK64yB/NlwKtqINCa4I17Jxw1+oYi1cSGLPl6Lfsjus1oT54uaNAsJFNzPfihxzfdvj2un8G4L6vG9Yu7xmVvmJf4lZcNjNUVpNUt7p4ALPKe6L4vuE0F86SMKy/dcCkDwEJr3cn0ogdk1KvUZZlY78JJI6QnRSe7S2CXYbRPyG71tAiDPr60HRpJbvTJX+on0wjcP2a4BS5dgs1A3rwtAGqo72y892d4JS9njiA6cpjcXXSevTC6YQnJ9L5Zv27o+tFfnuQhji+cQtFTwmT7R99MLPewPTD47NdA8FAyFeQE/3I3DT1jp6WeS X-OriginatorOrg: phytec.com X-MS-Exchange-CrossTenant-Network-Message-Id: ece4a28d-b918-41a4-76c3-08dc95f8190c X-MS-Exchange-CrossTenant-AuthSource: SJ2PR22MB4354.namprd22.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jun 2024 15:53:18.6284 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 67bcab1a-5db0-4ee8-86f4-1533d0b4b5c7 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: blGLZMmatpbLcZr9KUSn6Xs0XivIuoOgmp6+u5B3hx6tX/SYhf9RoXHYbAcDJgEiHCxgPqMv1Hyu7dKwbiO/Gw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR22MB5515 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240626_085325_685980_407411D3 X-CRM114-Status: GOOD ( 16.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The phyCORE-AM62Ax [1] is a SoM (System on Module) featuring TI's AM62Ax SoC. It can be used in combination with different carrier boards. This module can come with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM62Ax family. A development Kit, called phyBOARD-Lyra [2] is used as a carrier board reference design with a mapper board being used to allow the phyCORE-AM62Ax to fit the phyBOARD-Lyra. Supported features: * Debug UART * SPI NOR Flash * eMMC * 2x Ethernet * Micro SD card * I2C EEPROM * I2C RTC * GPIO Expander * LEDs * USB * HDMI * USB-C * Audio For more details, see: [1] Product page SoM: https://www.phytec.com/product/phycore-am62a [2] Product page CB: https://www.phytec.com/product/phyboard-am62a Signed-off-by: Garrett Giordano Reviewed-by: Wadim Egorov --- arch/arm64/boot/dts/ti/Makefile | 2 + .../boot/dts/ti/k3-am62a-phycore-som.dtsi | 330 ++++++++++++++++++ .../dts/ti/k3-am62a7-phyboard-lyra-rdk.dts | 18 + 3 files changed, 350 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi create mode 100644 arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index 2c327cc320cf..cd6e14edbbea 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -27,6 +27,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb # Boards with AM62Ax SoC dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb # Boards with AM62Px SoC dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb @@ -173,6 +174,7 @@ dtb- += k3-am625-beagleplay-csi2-ov5640.dtb \ # Enable support for device-tree overlays DTC_FLAGS_k3-am625-beagleplay += -@ DTC_FLAGS_k3-am625-phyboard-lyra-rdk += -@ +DTC_FLAGS_k3-am62a7-phyboard-lyra-rdk += -@ DTC_FLAGS_k3-am625-sk += -@ DTC_FLAGS_k3-am62-lp-sk += -@ DTC_FLAGS_k3-am62a7-sk += -@ diff --git a/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi new file mode 100644 index 000000000000..a5aceaa39670 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi @@ -0,0 +1,330 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2023 - 2024 PHYTEC America LLC + * Author: Garrett Giordano + * + * Product homepage: + * https://www.phytec.com/product/phycore-am62a + */ + +#include +#include +#include + +/ { + model = "PHYTEC phyCORE-AM62Ax"; + compatible = "phytec,am62a-phycore-som", "ti,am62a7"; + + aliases { + ethernet0 = &cpsw_port1; + gpio0 = &main_gpio0; + gpio1 = &main_gpio1; + i2c0 = &main_i2c0; + mmc0 = &sdhci0; + rtc0 = &i2c_som_rtc; + spi0 = &ospi0; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&leds_pins_default>; + + led-0 { + color = ; + gpios = <&main_gpio0 13 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + function = LED_FUNCTION_HEARTBEAT; + }; + }; + + memory@80000000 { + device_type = "memory"; + /* 2G RAM */ + reg = <0x00000000 0x80000000 0x00000000 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* global cma region */ + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x00 0x24000000>; + alloc-ranges = <0x00 0xc0000000 0x00 0x24000000>; + linux,cma-default; + }; + + secure_tfa_ddr: tfa@9e780000 { + reg = <0x00 0x9e780000 0x00 0x80000>; + alignment = <0x1000>; + no-map; + }; + + secure_ddr: optee@9e800000 { + reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ + alignment = <0x1000>; + no-map; + }; + + wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { + compatible = "shared-dma-pool"; + reg = <0x00 0x9c900000 0x00 0x01e00000>; + no-map; + }; + }; + + vcc_5v0_som: regulator-vcc-5v0-som { + compatible = "regulator-fixed"; + regulator-name = "VCC_5V0_SOM"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&main_pmx0 { + leds_pins_default: leds-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x034, PIN_OUTPUT, 7) /* (K20) OSPI0_CSN2.GPIO0_13 */ + >; + }; + + main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */ + AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */ + >; + }; + + main_mdio1_pins_default: main-mdio1-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */ + AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */ + >; + }; + + main_mmc0_pins_default: main-mmc0-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (Y6) MMC0_CMD */ + AM62AX_IOPAD(0x218, PIN_INPUT_PULLDOWN, 0) /* (AB7) MMC0_CLK */ + AM62AX_IOPAD(0x214, PIN_INPUT_PULLUP, 0) /* (AA6) MMC0_DAT0 */ + AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AB6) MMC0_DAT1 */ + AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (Y7) MMC0_DAT2 */ + AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (AA7) MMC0_DAT3 */ + AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (Y8) MMC0_DAT4 */ + AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (W7) MMC0_DAT5 */ + AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */ + AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */ + >; + }; + + main_rgmii1_pins_default: main-rgmii1-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */ + AM62AX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */ + AM62AX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */ + AM62AX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */ + AM62AX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */ + AM62AX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */ + AM62AX_IOPAD(0x134, PIN_OUTPUT, 0) /* (Y17) RGMII1_TD0 */ + AM62AX_IOPAD(0x138, PIN_OUTPUT, 0) /* (V16) RGMII1_TD1 */ + AM62AX_IOPAD(0x13c, PIN_OUTPUT, 0) /* (Y16) RGMII1_TD2 */ + AM62AX_IOPAD(0x140, PIN_OUTPUT, 0) /* (AA17) RGMII1_TD3 */ + AM62AX_IOPAD(0x130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */ + AM62AX_IOPAD(0x12c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */ + >; + }; + + ospi0_pins_default: ospi0-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x000, PIN_OUTPUT, 0) /* (L22) OSPI0_CLK */ + AM62AX_IOPAD(0x02c, PIN_OUTPUT, 0) /* (H21) OSPI0_CSn0 */ + AM62AX_IOPAD(0x038, PIN_OUTPUT, 0) /* (G20) OSPI0_CSn3 */ + AM62AX_IOPAD(0x00c, PIN_INPUT, 0) /* (J21) OSPI0_D0 */ + AM62AX_IOPAD(0x010, PIN_INPUT, 0) /* (J18) OSPI0_D1 */ + AM62AX_IOPAD(0x014, PIN_INPUT, 0) /* (J19) OSPI0_D2 */ + AM62AX_IOPAD(0x018, PIN_INPUT, 0) /* (H18) OSPI0_D3 */ + AM62AX_IOPAD(0x01c, PIN_INPUT, 0) /* (K21) OSPI0_D4 */ + AM62AX_IOPAD(0x020, PIN_INPUT, 0) /* (H19) OSPI0_D5 */ + AM62AX_IOPAD(0x024, PIN_INPUT, 0) /* (J20) OSPI0_D6 */ + AM62AX_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ + AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (L21) OSPI0_DQS */ + >; + }; + + pmic_irq_pins_default: pmic-irq-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x1f4, PIN_INPUT, 0) /* (D16) EXTINTn */ + >; + }; +}; + +&cpsw3g { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_rgmii1_pins_default>; +}; + +&cpsw_port1 { + phy-mode = "rgmii-rxid"; + phy-handle = <&cpsw3g_phy1>; +}; + +&cpsw3g_mdio { + pinctrl-names = "default"; + pinctrl-0 = <&main_mdio1_pins_default>; + + cpsw3g_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22"; + reg = <1>; + ti,clk-output-sel = ; + ti,rx-internal-delay = ; + ti,fifo-depth = ; + }; +}; + +&fss { + status = "okay"; +}; + +&main_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_i2c0_pins_default>; + clock-frequency = <400000>; + status = "okay"; + + pmic@30 { + compatible = "ti,tps65219"; + reg = <0x30>; + buck1-supply = <&vcc_5v0_som>; + buck2-supply = <&vcc_5v0_som>; + buck3-supply = <&vcc_5v0_som>; + ldo1-supply = <&vdd_3v3>; + ldo2-supply = <&vdd_1v8>; + ldo3-supply = <&vcc_5v0_som>; + ldo4-supply = <&vcc_5v0_som>; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_irq_pins_default>; + interrupt-parent = <&gic500>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + ti,power-button; + system-power-controller; + + regulators { + vdd_3v3: buck1 { + regulator-name = "VDD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vdd_1v8: buck2 { + regulator-name = "VDD_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + vdd_lpddr4: buck3 { + regulator-name = "VDD_LPDDR4"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-boot-on; + regulator-always-on; + }; + + vddshv5_sdio: ldo1 { + regulator-name = "VDDSHV5_SDIO"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-allow-bypass; + regulator-boot-on; + regulator-always-on; + }; + + vddr_core: ldo2 { + regulator-name = "VDDR_CORE"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-boot-on; + regulator-always-on; + }; + + vdda_1v8: ldo3 { + regulator-name = "VDDA_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + vdd_2v5: ldo4 { + regulator-name = "VDD_2V5"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + + eeprom@50 { + compatible = "atmel,24c32"; + pagesize = <32>; + reg = <0x50>; + }; + + i2c_som_rtc: rtc@52 { + compatible = "microcrystal,rv3028"; + reg = <0x52>; + }; +}; + +&main_gpio0 { + status = "okay"; +}; + +&main_gpio1 { + status = "okay"; +}; + +&main_gpio_intr { + status = "okay"; +}; + +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&ospi0_pins_default>; + status = "okay"; + + serial_flash: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <25000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <0>; + }; +}; + +&sdhci0 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc0_pins_default>; + disable-wp; + non-removable; + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts new file mode 100644 index 000000000000..3b93409b23e7 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am62a7-phyboard-lyra-rdk.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT +/* + * Copyright (C) 2023 - 2024 PHYTEC America LLC + * Author: Garrett Giordano + * + * Product homepage: + * https://www.phytec.com/product/phyboard-am62a + */ + +#include "k3-am62a7.dtsi" +#include "k3-am62a-phycore-som.dtsi" +#include "k3-am62x-phyboard-lyra.dtsi" + +/ { + compatible = "phytec,am62a7-phyboard-lyra-rdk", + "phytec,am62a-phycore-som", "ti,am62a7"; + model = "PHYTEC phyBOARD-Lyra AM62A7"; +};