From patchwork Thu Jun 27 06:07:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713857 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 92C09C2BD09 for ; Thu, 27 Jun 2024 06:10:10 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sMiJ0-0003wi-5a; Thu, 27 Jun 2024 02:08:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sMiIx-0003vu-Tc for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:08:23 -0400 Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sMiIw-0003af-7f for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:08:23 -0400 Received: by mail-pj1-x1029.google.com with SMTP id 98e67ed59e1d1-2c8e422c40cso857889a91.2 for ; Wed, 26 Jun 2024 23:08:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1719468501; x=1720073301; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ieGlYZw/aEKJTZ6q1XYbAOhcAsjppQh58VbHBzkEYak=; b=LTLyzCzrWQ1QZrn3sRJj0W9HaElSwBXnENS7E0qkzw9bHmbbiVjL62++hA9YP/R68s Rnad83nf/ugDm1lD6B2cwKI0qicHJFPhvxHUhoF4IXfdjxSrNNc4hOMQJCdyU0xRk4P2 XbB4i9SN8h3S9WyhtuAa4y+OU/Yw8W7KNJT+dG52zj4zsPzU98BhM0tZLVWFeXRcxGPa i0tLLUb7IkilCeJYov+vF9DSocyBGUFRWX0mASl4ikXPwMoF8lOcIODuiaCVEA6dAlF/ OVAcb2qrJdnNoSEBfNkSa1TfSIEb9x1EnHn8Ab4pnZhjvYQbquiEY4uMgY9rmXbiyIvf C5Aw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719468501; x=1720073301; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ieGlYZw/aEKJTZ6q1XYbAOhcAsjppQh58VbHBzkEYak=; b=hH0wIPKJKIt2G0V/jtd7uRTJyVSaj/SIRiZntaZtPkyanhy93cfo1a6OgFaDZ1dsE/ 7iYMDwLDv1cpXHwLeUMJUnsULlgOgQcfdbU1oJnhzyaj2EvXlrttwOm7VAPlUIt6FEh9 mmdBR7UsTDdr0xIMdOa3lT7N/lfoGn3l09vClQHFwpZeqVFdu7baaeqvCeUzrRhRQk5k ILoRhE/PE/WWPnXNGnuYR+pJcoHWosV0aem4PGrx6SPVESAJSwq50Eg267oOIvxeaZcP qLrAlfEvRvZEJhvr623WNVFvQpE1/HOB525Xv7/OAPWQGQUwW5rhLkj39Thm/FEKXskp Y/Ng== X-Gm-Message-State: AOJu0YyKDcBfJC5dgUso7TxLXZIc1H5jkEB2dkyut4awF77kCHqLqBv8 b3SCWqJ9QxOdpcHhjw3okmOWf+x9YDeD1limP+BaSwIpt6MjackRqu93Kw733Ww= X-Google-Smtp-Source: AGHT+IF3ji2YlfCwWRrrNVR+wOJ4sXz4DCH4Y9BeQyPYMe/ye+jEeZTURgsW4cyy8QfcMWJq82Y/SA== X-Received: by 2002:a17:90a:610:b0:2c3:1937:3042 with SMTP id 98e67ed59e1d1-2c8504c7eedmr11849235a91.5.1719468500794; Wed, 26 Jun 2024 23:08:20 -0700 (PDT) Received: from localhost ([157.82.204.135]) by smtp.gmail.com with UTF8SMTPSA id 98e67ed59e1d1-2c8feab530asm560673a91.36.2024.06.26.23.08.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Jun 2024 23:08:20 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:07:50 +0900 Subject: [PATCH v10 01/12] hw/pci: Rename has_power to enabled MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-1-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::1029; envelope-from=akihiko.odaki@daynix.com; helo=mail-pj1-x1029.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The renamed state will not only represent powering state of PFs, but also represent SR-IOV VF enablement in the future. Signed-off-by: Akihiko Odaki --- include/hw/pci/pci.h | 7 ++++++- include/hw/pci/pci_device.h | 2 +- hw/pci/pci.c | 14 +++++++------- hw/pci/pci_host.c | 4 ++-- 4 files changed, 16 insertions(+), 11 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index eaa3fc99d884..6c92b2f70008 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -642,6 +642,11 @@ static inline void pci_irq_pulse(PCIDevice *pci_dev) } MSIMessage pci_get_msi_message(PCIDevice *dev, int vector); -void pci_set_power(PCIDevice *pci_dev, bool state); +void pci_set_enabled(PCIDevice *pci_dev, bool state); + +static inline void pci_set_power(PCIDevice *pci_dev, bool state) +{ + pci_set_enabled(pci_dev, state); +} #endif diff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_device.h index d3dd0f64b273..d57f9ce83884 100644 --- a/include/hw/pci/pci_device.h +++ b/include/hw/pci/pci_device.h @@ -56,7 +56,7 @@ typedef struct PCIReqIDCache PCIReqIDCache; struct PCIDevice { DeviceState qdev; bool partially_hotplugged; - bool has_power; + bool enabled; /* PCI config space */ uint8_t *config; diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 324c1302d25f..295a32714a4a 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -1525,7 +1525,7 @@ static void pci_update_mappings(PCIDevice *d) continue; new_addr = pci_bar_address(d, i, r->type, r->size); - if (!d->has_power) { + if (!d->enabled) { new_addr = PCI_BAR_UNMAPPED; } @@ -1613,7 +1613,7 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val_in, int pci_update_irq_disabled(d, was_irq_disabled); memory_region_set_enabled(&d->bus_master_enable_region, (pci_get_word(d->config + PCI_COMMAND) - & PCI_COMMAND_MASTER) && d->has_power); + & PCI_COMMAND_MASTER) && d->enabled); } msi_write_config(d, addr, val_in, l); @@ -2811,18 +2811,18 @@ MSIMessage pci_get_msi_message(PCIDevice *dev, int vector) return msg; } -void pci_set_power(PCIDevice *d, bool state) +void pci_set_enabled(PCIDevice *d, bool state) { - if (d->has_power == state) { + if (d->enabled == state) { return; } - d->has_power = state; + d->enabled = state; pci_update_mappings(d); memory_region_set_enabled(&d->bus_master_enable_region, (pci_get_word(d->config + PCI_COMMAND) - & PCI_COMMAND_MASTER) && d->has_power); - if (!d->has_power) { + & PCI_COMMAND_MASTER) && d->enabled); + if (!d->enabled) { pci_device_reset(d); } } diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index dfe6fe618401..0d82727cc9dd 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -86,7 +86,7 @@ void pci_host_config_write_common(PCIDevice *pci_dev, uint32_t addr, * allowing direct removal of unexposed functions. */ if ((pci_dev->qdev.hotplugged && !pci_get_function_0(pci_dev)) || - !pci_dev->has_power || is_pci_dev_ejected(pci_dev)) { + !pci_dev->enabled || is_pci_dev_ejected(pci_dev)) { return; } @@ -111,7 +111,7 @@ uint32_t pci_host_config_read_common(PCIDevice *pci_dev, uint32_t addr, * allowing direct removal of unexposed functions. */ if ((pci_dev->qdev.hotplugged && !pci_get_function_0(pci_dev)) || - !pci_dev->has_power || is_pci_dev_ejected(pci_dev)) { + !pci_dev->enabled || is_pci_dev_ejected(pci_dev)) { return ~0x0; } From patchwork Thu Jun 27 06:07:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713855 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F19EBC3064D for ; Thu, 27 Jun 2024 06:09:59 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sMiJ3-0003yQ-I6; Thu, 27 Jun 2024 02:08:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sMiJ2-0003xz-Eh for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:08:28 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sMiJ0-0003bZ-W0 for qemu-devel@nongnu.org; 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Wed, 26 Jun 2024 23:08:25 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:07:51 +0900 Subject: [PATCH v10 02/12] hw/ppc/spapr_pci: Do not create DT for disabled PCI device MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-2-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::62a; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x62a.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Disabled means it is a disabled SR-IOV VF or it is powered off, and hidden from the guest. Signed-off-by: Akihiko Odaki --- hw/ppc/spapr_pci.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 7cf9904c3546..f63182a03c41 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1296,6 +1296,10 @@ static void spapr_dt_pci_device_cb(PCIBus *bus, PCIDevice *pdev, return; } + if (!pdev->enabled) { + return; + } + err = spapr_dt_pci_device(p->sphb, pdev, p->fdt, p->offset); if (err < 0) { p->err = err; From patchwork Thu Jun 27 06:07:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713850 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1D4EC3064D for ; Thu, 27 Jun 2024 06:09:01 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sMiJB-0003zm-G3; Thu, 27 Jun 2024 02:08:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sMiJ7-0003zC-4p for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:08:33 -0400 Received: from mail-pl1-x62b.google.com ([2607:f8b0:4864:20::62b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sMiJ5-0003cD-Kp for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:08:32 -0400 Received: by mail-pl1-x62b.google.com with SMTP id d9443c01a7336-1f9c6e59d34so61636255ad.2 for ; Wed, 26 Jun 2024 23:08:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1719468510; x=1720073310; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=LvYGkO0/34C91V8NXfef8guAibLAhiHYP0GgJQZDQZY=; b=ECwSKcrtoVjLKpv6VjhgaUxZP3+g2zyOd4RSy9m4G10rNDafFgKOkBegjAFFVXO5LN Smvv8TC75xdNwrcqJTOhwojEY36IEQQo6olnMUvwT91X+svBoxQxKnbbb13Zf2GufQbY ldyNpr6uAZezC8+eT/izMFFMAIvBmsKmxRSZ18zDTXaC286LS3XpgVrZtP6DLaw8KHal IoSjoRMRB2hxC0h3aYNfHB9I0/e8fgYZ+7UFVR9Tf7fOTbxq4pHdqXL8WoATnjC1whvn kl69gqeVwl5R9ZwlweYRHDrCuKj4lznw56I67jFMyHvnlCzCNR6K01g5KWnHarjSWOn9 jUsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719468510; x=1720073310; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LvYGkO0/34C91V8NXfef8guAibLAhiHYP0GgJQZDQZY=; b=rafIjzrH8dI+kyQCPLuUUsDbLVmjxWAglE3b/rgsQ07UyATk/p641QXrGw04UUTYT3 CwpBzCp/gPCSazY6kTg4fDKf1QZc+f70qtuV+6r0KYhpHt27A5jh55FTVT97Uozylzte UCcUf3hRk7r9n50Wag3hfZnx70hbHEACYDxAFXXLHPm49JqMMxtYTkbJS0PwWkuzdLoT pMhcTxj4EoJVjnwEpTiAZY7pF+jL95JyVCUPWZJiw9RZAfJFwM+jY/OmlHSq5FZuYlLI NAjiwSD0XOZ5kAf8pzN7IppmIcHcydAk584hpLvdhAplNZmAc9EESDszIaPZv+TyneCd ZgMA== X-Gm-Message-State: AOJu0YzRr5Zk8j1wv1N2l6Zeo1vGAfCancTxUGAIUhKDok8A9+PCyUFU EylLwgs5LzHyiTejk9ePol1fmd/l6/Bii6zWIRBScXjsfaEnySedhQd3BDAeSzA= X-Google-Smtp-Source: AGHT+IH318a4KY8MLgK1PSUEj8yob8hr3rtYkIUJVLFubZOJlm52gF9FEN9Rd6oCXvfNPtS1CAxpEw== X-Received: by 2002:a17:903:18d:b0:1f9:b4eb:ce4a with SMTP id d9443c01a7336-1fa1d51c2b4mr173842155ad.23.1719468510363; Wed, 26 Jun 2024 23:08:30 -0700 (PDT) Received: from localhost ([157.82.204.135]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-1faac9c4ec2sm4883735ad.293.2024.06.26.23.08.27 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Jun 2024 23:08:30 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:07:52 +0900 Subject: [PATCH v10 03/12] hw/ppc/spapr_pci: Do not reject VFs created after a PF MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-3-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::62b; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org A PF may automatically create VFs and the PF may be function 0. Signed-off-by: Akihiko Odaki --- hw/ppc/spapr_pci.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index f63182a03c41..ed4454bbf79e 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1573,7 +1573,9 @@ static void spapr_pci_pre_plug(HotplugHandler *plug_handler, * hotplug, we do not allow functions to be hotplugged to a * slot that already has function 0 present */ - if (plugged_dev->hotplugged && bus->devices[PCI_DEVFN(slotnr, 0)] && + if (plugged_dev->hotplugged && + !pci_is_vf(pdev) && + bus->devices[PCI_DEVFN(slotnr, 0)] && PCI_FUNC(pdev->devfn) != 0) { error_setg(errp, "PCI: slot %d function 0 already occupied by %s," " additional functions can no longer be exposed to guest.", From patchwork Thu Jun 27 06:07:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713851 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C8766C3064D for ; Thu, 27 Jun 2024 06:09:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sMiJJ-00043t-8b; Thu, 27 Jun 2024 02:08:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sMiJC-00040V-Um for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:08:39 -0400 Received: from mail-yb1-xb30.google.com ([2607:f8b0:4864:20::b30]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sMiJB-0003d6-DB for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:08:38 -0400 Received: by mail-yb1-xb30.google.com with SMTP id 3f1490d57ef6-dfb05bcc50dso6633611276.0 for ; Wed, 26 Jun 2024 23:08:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1719468516; x=1720073316; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Ja+2Rln8Aybt08irPb0En7wqcDpJy8xF+oHU5uY2BGc=; b=vWFzAReEqxJ2m39tuTNUvgHRzemSQaZjCwiy6uWsnAYghiGYX7DhXIz1UeUAyiMlOm dhON+mWpSCAsFxp8S9nvXRRkWJYtXk2nw1jN2lWY2iQ4EXnoLPuQvWsTb/HM4B/QYERZ LSh/RHG2osTV3Be0BW71W4LhEAmxL/Fghght901z/LELUcTqO6uDgVnAv0jQ5mboMVZM qZbD452zV2FzY9wAt4+JXHJysX0Bag2ItdL1qGlstirnF+xRi+5UYAE86EClP00z5iwE ouNrnISqxZ9HyaFB7avnCK4pYKpEDBCLUdeVlM+Q2nB8GrZOsmTrS+qgJajoP1yNaodm ZFcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719468516; x=1720073316; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ja+2Rln8Aybt08irPb0En7wqcDpJy8xF+oHU5uY2BGc=; b=QPohUPK3kG4n5ZRY0sbEfuXjAfCh3xigXNfLWrK9vYoQ0vS2tsk7xDxSD+A/JKegVP RchTQGv6eo7Jm0mlRQTH0PK4PIirP/g5kvy/AVrQz4Hf1Ne1+XrIUig3S2UG869xRPeQ LM0COuyTQ2/6WB7+p1ZPZXrMgGMvMz/VNruQzf1ypUUT/FBvHWXyCU1RF71layl+bsZE yIgrWLpGfYafIC38O+bujd4O5r24TiZI/cxqWjF/j2sV2RmxVLKGuMfuJ7U64CLPI0Hp C2JRC5IVIERtb2UjptHPdX2BZAMTCqCLhKMeu4PjrYRllDlwRRMVPTUfbE9EYhtt88xR 82MQ== X-Gm-Message-State: AOJu0YyyKOp4DmKKXqwQhzZiYmPriSaeYYF/sGD39eqxVSZxTjZWvTPx 2/wk2A+K0BJ77ZSvJjDWUmCwv0eIjsEH76YMsGE3f7bB8SJCpQcZau3v8UYk01Y= X-Google-Smtp-Source: AGHT+IHRAMSiA+qtNMG/28AWXc0G70gvE3PvTjO9/2O2KAZ/qARfJJxtodx1H67LwoTS3l/oxOpgEw== X-Received: by 2002:a25:7d47:0:b0:df7:8dca:1ef2 with SMTP id 3f1490d57ef6-e0303f34dd7mr12721208276.34.1719468515692; Wed, 26 Jun 2024 23:08:35 -0700 (PDT) Received: from localhost ([157.82.204.135]) by smtp.gmail.com with UTF8SMTPSA id 41be03b00d2f7-72748e84f06sm433399a12.62.2024.06.26.23.08.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Jun 2024 23:08:35 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:07:53 +0900 Subject: [PATCH v10 04/12] pcie_sriov: Do not manually unrealize MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-4-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::b30; envelope-from=akihiko.odaki@daynix.com; helo=mail-yb1-xb30.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org A device gets automatically unrealized when being unparented. Signed-off-by: Akihiko Odaki --- hw/pci/pcie_sriov.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index e9b23221d713..499becd5273f 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -204,11 +204,7 @@ static void unregister_vfs(PCIDevice *dev) trace_sriov_unregister_vfs(dev->name, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), num_vfs); for (i = 0; i < num_vfs; i++) { - Error *err = NULL; PCIDevice *vf = dev->exp.sriov_pf.vf[i]; - if (!object_property_set_bool(OBJECT(vf), "realized", false, &err)) { - error_reportf_err(err, "Failed to unplug: "); - } object_unparent(OBJECT(vf)); object_unref(OBJECT(vf)); } From patchwork Thu Jun 27 06:07:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7D711C2BD09 for ; Thu, 27 Jun 2024 06:10:50 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sMiJL-00045i-HN; Thu, 27 Jun 2024 02:08:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sMiJI-00044n-ER for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:08:44 -0400 Received: from mail-oi1-x22b.google.com ([2607:f8b0:4864:20::22b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sMiJG-0003dq-PV for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:08:44 -0400 Received: by mail-oi1-x22b.google.com with SMTP id 5614622812f47-3d55c0fadd2so1482719b6e.3 for ; Wed, 26 Jun 2024 23:08:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1719468521; x=1720073321; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=6pj7voFdpvDIUOvpvd+fwHnMb3qifigzmv4NFCmazBg=; b=GBPahay5N+0cEnaMMKTL1mkAQYl1KIcerhn3iNctyDd/CLj2iv04GTAWOwbfGkt8ee bnt/EH5Rc9kBF8B6TAgxzHfwXIAGAjYyWKC4ZReOIHTFmEuzcZKtQwmWfRQ7SmynBBsW V0C7r33kpSGoDxbwGj6lUAoKv7oj25ublEbJTlfhtSJ3tJZ7avo5LwpFlW6N/GK2n7hB Xkapz3JKIswrT4pbprfC/arU9Cr/BJhDaWU1sxLo1Yg8QRgoL8GmcxPqA1G3uRwDfVE5 7Vw0wvB8AiNs+mHvMuLLTWl12AhoyRWv4zmvMe9S1A74EhOnTq8Cwp0arIjeR5k+hptX N5RA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719468521; x=1720073321; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6pj7voFdpvDIUOvpvd+fwHnMb3qifigzmv4NFCmazBg=; b=VoLrJ00avZFJfucxUYRxiNjh1mFbKcCch6o9DJIyehMWkiI5jP9TKAsh7x45DySbe1 w+krkz7QQb9H7WXxcoFclZu4kFliOC+sbt5RefS7LrlvPd2rsx0wSnksc0IndGTzjqZ3 D1vM7MfYGUFjfEw21L+g882vHTiDV4xqWErlIOVny2W+OZ4KdscWeFuoiKu6LpTz+tfS ToVneHXI+74/8Vht7G+pW+Mut7CiSvjoMzJ1ZN4e3KtNxmbXqHcwheP3/wSdnIFFBkAd vqwb3JhqtFyTrkb9Ym/hq6Xsa+CdoYQ2ciu8URHaoj5sXIDhw2D6dkwnAz9jdK3DzTpp m1EA== X-Gm-Message-State: AOJu0Yx5MSs/PZFELMbXWNzieEaLgmC7SVBaBuT737XAp2t+8Yt1CbAz kY204wc7B+b3tVUT5iLgoSrR+hUAl40EZYr8WnYnCh7o0gqecuCQ/Sny+XG+bqc= X-Google-Smtp-Source: AGHT+IGHTNkbMAnsGKaEcfUvLBPoC8/tM9CYcLokDq7HoOhoFCxf2KgYIUNM8OCu+dCJaRIGz7I+zg== X-Received: by 2002:a05:6808:1824:b0:3d5:1f50:188b with SMTP id 5614622812f47-3d543adb0e9mr16184276b6e.23.1719468521161; Wed, 26 Jun 2024 23:08:41 -0700 (PDT) Received: from localhost ([157.82.204.135]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-706b4a3538asm511599b3a.175.2024.06.26.23.08.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Jun 2024 23:08:40 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:07:54 +0900 Subject: [PATCH v10 05/12] pcie_sriov: Ensure VF function number does not overflow MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-5-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::22b; envelope-from=akihiko.odaki@daynix.com; helo=mail-oi1-x22b.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org pci_new() aborts when creating a VF with a function number equals to or is greater than PCI_DEVFN_MAX. Signed-off-by: Akihiko Odaki --- docs/pcie_sriov.txt | 8 +++++--- include/hw/pci/pcie_sriov.h | 5 +++-- hw/net/igb.c | 13 ++++++++++--- hw/nvme/ctrl.c | 24 ++++++++++++++++-------- hw/pci/pcie_sriov.c | 19 +++++++++++++++++-- 5 files changed, 51 insertions(+), 18 deletions(-) diff --git a/docs/pcie_sriov.txt b/docs/pcie_sriov.txt index a47aad0bfab0..ab2142807f79 100644 --- a/docs/pcie_sriov.txt +++ b/docs/pcie_sriov.txt @@ -52,9 +52,11 @@ setting up a BAR for a VF. ... /* Add and initialize the SR/IOV capability */ - pcie_sriov_pf_init(d, 0x200, "your_virtual_dev", - vf_devid, initial_vfs, total_vfs, - fun_offset, stride); + if (!pcie_sriov_pf_init(d, 0x200, "your_virtual_dev", + vf_devid, initial_vfs, total_vfs, + fun_offset, stride, errp)) { + return; + } /* Set up individual VF BARs (parameters as for normal BARs) */ pcie_sriov_pf_init_vf_bar( ... ) diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index 450cbef6c201..aa704e8f9d9f 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -27,10 +27,11 @@ typedef struct PCIESriovVF { uint16_t vf_number; /* Logical VF number of this function */ } PCIESriovVF; -void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, +bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, const char *vfname, uint16_t vf_dev_id, uint16_t init_vfs, uint16_t total_vfs, - uint16_t vf_offset, uint16_t vf_stride); + uint16_t vf_offset, uint16_t vf_stride, + Error **errp); void pcie_sriov_pf_exit(PCIDevice *dev); /* Set up a VF bar in the SR/IOV bar area */ diff --git a/hw/net/igb.c b/hw/net/igb.c index 1ef6170465f1..4a19fca1c638 100644 --- a/hw/net/igb.c +++ b/hw/net/igb.c @@ -447,9 +447,16 @@ static void igb_pci_realize(PCIDevice *pci_dev, Error **errp) pcie_ari_init(pci_dev, 0x150); - pcie_sriov_pf_init(pci_dev, IGB_CAP_SRIOV_OFFSET, TYPE_IGBVF, - IGB_82576_VF_DEV_ID, IGB_MAX_VF_FUNCTIONS, IGB_MAX_VF_FUNCTIONS, - IGB_VF_OFFSET, IGB_VF_STRIDE); + if (!pcie_sriov_pf_init(pci_dev, IGB_CAP_SRIOV_OFFSET, + TYPE_IGBVF, IGB_82576_VF_DEV_ID, + IGB_MAX_VF_FUNCTIONS, IGB_MAX_VF_FUNCTIONS, + IGB_VF_OFFSET, IGB_VF_STRIDE, + errp)) { + pcie_cap_exit(pci_dev); + igb_cleanup_msix(s); + msi_uninit(pci_dev); + return; + } pcie_sriov_pf_init_vf_bar(pci_dev, IGBVF_MMIO_BAR_IDX, PCI_BASE_ADDRESS_MEM_TYPE_64 | PCI_BASE_ADDRESS_MEM_PREFETCH, diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 127c3d238346..066389e391b6 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -8048,7 +8048,8 @@ out: return pow2ceil(bar_size); } -static void nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset) +static bool nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset, + Error **errp) { uint16_t vf_dev_id = n->params.use_intel_id ? PCI_DEVICE_ID_INTEL_NVME : PCI_DEVICE_ID_REDHAT_NVME; @@ -8057,12 +8058,17 @@ static void nvme_init_sriov(NvmeCtrl *n, PCIDevice *pci_dev, uint16_t offset) le16_to_cpu(cap->vifrsm), NULL, NULL); - pcie_sriov_pf_init(pci_dev, offset, "nvme", vf_dev_id, - n->params.sriov_max_vfs, n->params.sriov_max_vfs, - NVME_VF_OFFSET, NVME_VF_STRIDE); + if (!pcie_sriov_pf_init(pci_dev, offset, "nvme", vf_dev_id, + n->params.sriov_max_vfs, n->params.sriov_max_vfs, + NVME_VF_OFFSET, NVME_VF_STRIDE, + errp)) { + return false; + } pcie_sriov_pf_init_vf_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64, bar_size); + + return true; } static int nvme_add_pm_capability(PCIDevice *pci_dev, uint8_t offset) @@ -8155,6 +8161,12 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp) return false; } + if (!pci_is_vf(pci_dev) && n->params.sriov_max_vfs && + !nvme_init_sriov(n, pci_dev, 0x120, errp)) { + msix_uninit(pci_dev, &n->bar0, &n->bar0); + return false; + } + nvme_update_msixcap_ts(pci_dev, n->conf_msix_qsize); if (n->params.cmb_size_mb) { @@ -8165,10 +8177,6 @@ static bool nvme_init_pci(NvmeCtrl *n, PCIDevice *pci_dev, Error **errp) nvme_init_pmr(n, pci_dev); } - if (!pci_is_vf(pci_dev) && n->params.sriov_max_vfs) { - nvme_init_sriov(n, pci_dev, 0x120); - } - return true; } diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index 499becd5273f..f0bde0d3fc79 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -24,14 +24,27 @@ static PCIDevice *register_vf(PCIDevice *pf, int devfn, const char *name, uint16_t vf_num); static void unregister_vfs(PCIDevice *dev); -void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, +bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, const char *vfname, uint16_t vf_dev_id, uint16_t init_vfs, uint16_t total_vfs, - uint16_t vf_offset, uint16_t vf_stride) + uint16_t vf_offset, uint16_t vf_stride, + Error **errp) { uint8_t *cfg = dev->config + offset; uint8_t *wmask; + if (total_vfs) { + uint16_t ari_cap = pcie_find_capability(dev, PCI_EXT_CAP_ID_ARI); + uint16_t first_vf_devfn = dev->devfn + vf_offset; + uint16_t last_vf_devfn = first_vf_devfn + vf_stride * (total_vfs - 1); + + if ((!ari_cap && PCI_SLOT(dev->devfn) != PCI_SLOT(last_vf_devfn)) || + last_vf_devfn >= PCI_DEVFN_MAX) { + error_setg(errp, "VF function number overflows"); + return false; + } + } + pcie_add_capability(dev, PCI_EXT_CAP_ID_SRIOV, 1, offset, PCI_EXT_CAP_SRIOV_SIZEOF); dev->exp.sriov_cap = offset; @@ -69,6 +82,8 @@ void pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, pci_set_word(wmask + PCI_SRIOV_SYS_PGSIZE, 0x553); qdev_prop_set_bit(&dev->qdev, "multifunction", true); + + return true; } void pcie_sriov_pf_exit(PCIDevice *dev) From patchwork Thu Jun 27 06:07:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713854 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4EECDC2BD09 for ; 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Wed, 26 Jun 2024 23:08:45 -0700 (PDT) Received: from localhost ([157.82.204.135]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-1faac8df8d5sm5071095ad.38.2024.06.26.23.08.42 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Jun 2024 23:08:45 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:07:55 +0900 Subject: [PATCH v10 06/12] pcie_sriov: Reuse SR-IOV VF device instances MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-6-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::42d; envelope-from=akihiko.odaki@daynix.com; helo=mail-pf1-x42d.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Disable SR-IOV VF devices by reusing code to power down PCI devices instead of removing them when the guest requests to disable VFs. This allows to realize devices and report VF realization errors at PF realization time. Signed-off-by: Akihiko Odaki --- include/hw/pci/pci.h | 5 --- include/hw/pci/pci_device.h | 15 +++++++ include/hw/pci/pcie_sriov.h | 1 - hw/pci/pci.c | 2 +- hw/pci/pcie_sriov.c | 95 +++++++++++++++++++-------------------------- 5 files changed, 56 insertions(+), 62 deletions(-) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 6c92b2f70008..442017b4865d 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -644,9 +644,4 @@ static inline void pci_irq_pulse(PCIDevice *pci_dev) MSIMessage pci_get_msi_message(PCIDevice *dev, int vector); void pci_set_enabled(PCIDevice *pci_dev, bool state); -static inline void pci_set_power(PCIDevice *pci_dev, bool state) -{ - pci_set_enabled(pci_dev, state); -} - #endif diff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_device.h index d57f9ce83884..ca151325085d 100644 --- a/include/hw/pci/pci_device.h +++ b/include/hw/pci/pci_device.h @@ -205,6 +205,21 @@ static inline uint16_t pci_get_bdf(PCIDevice *dev) return PCI_BUILD_BDF(pci_bus_num(pci_get_bus(dev)), dev->devfn); } +static inline void pci_set_power(PCIDevice *pci_dev, bool state) +{ + /* + * Don't change the enabled state of VFs when powering on/off the device. + * + * When powering on, VFs must not be enabled immediately but they must + * wait until the guest configures SR-IOV. + * When powering off, their corresponding PFs will be reset and disable + * VFs. + */ + if (!pci_is_vf(pci_dev)) { + pci_set_enabled(pci_dev, state); + } +} + uint16_t pci_requester_id(PCIDevice *dev); /* DMA access functions */ diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index aa704e8f9d9f..70649236c18a 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -18,7 +18,6 @@ typedef struct PCIESriovPF { uint16_t num_vfs; /* Number of virtual functions created */ uint8_t vf_bar_type[PCI_NUM_REGIONS]; /* Store type for each VF bar */ - const char *vfname; /* Reference to the device type used for the VFs */ PCIDevice **vf; /* Pointer to an array of num_vfs VF devices */ } PCIESriovPF; diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 295a32714a4a..c682c3dcb68e 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2822,7 +2822,7 @@ void pci_set_enabled(PCIDevice *d, bool state) memory_region_set_enabled(&d->bus_master_enable_region, (pci_get_word(d->config + PCI_COMMAND) & PCI_COMMAND_MASTER) && d->enabled); - if (!d->enabled) { + if (d->qdev.realized) { pci_device_reset(d); } } diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index f0bde0d3fc79..faadb0d2ea85 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -20,9 +20,16 @@ #include "qapi/error.h" #include "trace.h" -static PCIDevice *register_vf(PCIDevice *pf, int devfn, - const char *name, uint16_t vf_num); -static void unregister_vfs(PCIDevice *dev); +static void unparent_vfs(PCIDevice *dev, uint16_t total_vfs) +{ + for (uint16_t i = 0; i < total_vfs; i++) { + PCIDevice *vf = dev->exp.sriov_pf.vf[i]; + object_unparent(OBJECT(vf)); + object_unref(OBJECT(vf)); + } + g_free(dev->exp.sriov_pf.vf); + dev->exp.sriov_pf.vf = NULL; +} bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, const char *vfname, uint16_t vf_dev_id, @@ -30,6 +37,8 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, uint16_t vf_offset, uint16_t vf_stride, Error **errp) { + BusState *bus = qdev_get_parent_bus(&dev->qdev); + int32_t devfn = dev->devfn + vf_offset; uint8_t *cfg = dev->config + offset; uint8_t *wmask; @@ -49,7 +58,6 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, offset, PCI_EXT_CAP_SRIOV_SIZEOF); dev->exp.sriov_cap = offset; dev->exp.sriov_pf.num_vfs = 0; - dev->exp.sriov_pf.vfname = g_strdup(vfname); dev->exp.sriov_pf.vf = NULL; pci_set_word(cfg + PCI_SRIOV_VF_OFFSET, vf_offset); @@ -83,14 +91,34 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, qdev_prop_set_bit(&dev->qdev, "multifunction", true); + dev->exp.sriov_pf.vf = g_new(PCIDevice *, total_vfs); + + for (uint16_t i = 0; i < total_vfs; i++) { + PCIDevice *vf = pci_new(devfn, vfname); + vf->exp.sriov_vf.pf = dev; + vf->exp.sriov_vf.vf_number = i; + + if (!qdev_realize(&vf->qdev, bus, errp)) { + unparent_vfs(dev, i); + return false; + } + + /* set vid/did according to sr/iov spec - they are not used */ + pci_config_set_vendor_id(vf->config, 0xffff); + pci_config_set_device_id(vf->config, 0xffff); + + dev->exp.sriov_pf.vf[i] = vf; + devfn += vf_stride; + } + return true; } void pcie_sriov_pf_exit(PCIDevice *dev) { - unregister_vfs(dev); - g_free((char *)dev->exp.sriov_pf.vfname); - dev->exp.sriov_pf.vfname = NULL; + uint8_t *cfg = dev->config + dev->exp.sriov_cap; + + unparent_vfs(dev, pci_get_word(cfg + PCI_SRIOV_TOTAL_VF)); } void pcie_sriov_pf_init_vf_bar(PCIDevice *dev, int region_num, @@ -156,38 +184,11 @@ void pcie_sriov_vf_register_bar(PCIDevice *dev, int region_num, } } -static PCIDevice *register_vf(PCIDevice *pf, int devfn, const char *name, - uint16_t vf_num) -{ - PCIDevice *dev = pci_new(devfn, name); - dev->exp.sriov_vf.pf = pf; - dev->exp.sriov_vf.vf_number = vf_num; - PCIBus *bus = pci_get_bus(pf); - Error *local_err = NULL; - - qdev_realize(&dev->qdev, &bus->qbus, &local_err); - if (local_err) { - error_report_err(local_err); - return NULL; - } - - /* set vid/did according to sr/iov spec - they are not used */ - pci_config_set_vendor_id(dev->config, 0xffff); - pci_config_set_device_id(dev->config, 0xffff); - - return dev; -} - static void register_vfs(PCIDevice *dev) { uint16_t num_vfs; uint16_t i; uint16_t sriov_cap = dev->exp.sriov_cap; - uint16_t vf_offset = - pci_get_word(dev->config + sriov_cap + PCI_SRIOV_VF_OFFSET); - uint16_t vf_stride = - pci_get_word(dev->config + sriov_cap + PCI_SRIOV_VF_STRIDE); - int32_t devfn = dev->devfn + vf_offset; assert(sriov_cap > 0); num_vfs = pci_get_word(dev->config + sriov_cap + PCI_SRIOV_NUM_VF); @@ -195,18 +196,10 @@ static void register_vfs(PCIDevice *dev) return; } - dev->exp.sriov_pf.vf = g_new(PCIDevice *, num_vfs); - trace_sriov_register_vfs(dev->name, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), num_vfs); for (i = 0; i < num_vfs; i++) { - dev->exp.sriov_pf.vf[i] = register_vf(dev, devfn, - dev->exp.sriov_pf.vfname, i); - if (!dev->exp.sriov_pf.vf[i]) { - num_vfs = i; - break; - } - devfn += vf_stride; + pci_set_enabled(dev->exp.sriov_pf.vf[i], true); } dev->exp.sriov_pf.num_vfs = num_vfs; } @@ -219,12 +212,8 @@ static void unregister_vfs(PCIDevice *dev) trace_sriov_unregister_vfs(dev->name, PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn), num_vfs); for (i = 0; i < num_vfs; i++) { - PCIDevice *vf = dev->exp.sriov_pf.vf[i]; - object_unparent(OBJECT(vf)); - object_unref(OBJECT(vf)); + pci_set_enabled(dev->exp.sriov_pf.vf[i], false); } - g_free(dev->exp.sriov_pf.vf); - dev->exp.sriov_pf.vf = NULL; dev->exp.sriov_pf.num_vfs = 0; } @@ -246,14 +235,10 @@ void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, PCI_FUNC(dev->devfn), off, val, len); if (range_covers_byte(off, len, PCI_SRIOV_CTRL)) { - if (dev->exp.sriov_pf.num_vfs) { - if (!(val & PCI_SRIOV_CTRL_VFE)) { - unregister_vfs(dev); - } + if (val & PCI_SRIOV_CTRL_VFE) { + register_vfs(dev); } else { - if (val & PCI_SRIOV_CTRL_VFE) { - register_vfs(dev); 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Wed, 26 Jun 2024 23:08:51 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:07:56 +0900 Subject: [PATCH v10 07/12] pcie_sriov: Release VFs failed to realize MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-7-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::332; envelope-from=akihiko.odaki@daynix.com; helo=mail-ot1-x332.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Release VFs failed to realize just as we do in unregister_vfs(). Fixes: 7c0fa8dff811 ("pcie: Add support for Single Root I/O Virtualization (SR/IOV)") Signed-off-by: Akihiko Odaki --- hw/pci/pcie_sriov.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index faadb0d2ea85..9bd7f8acc3f4 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -99,6 +99,8 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, vf->exp.sriov_vf.vf_number = i; if (!qdev_realize(&vf->qdev, bus, errp)) { + object_unparent(OBJECT(vf)); + object_unref(vf); unparent_vfs(dev, i); return false; } From patchwork Thu Jun 27 06:07:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 644C8C3064D for ; Thu, 27 Jun 2024 06:10:36 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sMiJe-0004pC-1I; Thu, 27 Jun 2024 02:09:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sMiJc-0004gB-DM for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:09:04 -0400 Received: from mail-pf1-x434.google.com ([2607:f8b0:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sMiJX-0003fk-8U for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:09:04 -0400 Received: by mail-pf1-x434.google.com with SMTP id d2e1a72fcca58-7067435d376so1032532b3a.0 for ; Wed, 26 Jun 2024 23:08:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1719468538; x=1720073338; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=aluMVAZ460okBBrhiNZK+G3gMubw4xx6sc5IE7bE8wg=; b=ksXKsaYGEoz/uNostZdjloANNvUz+OaL/ju25HQdytb+HwGNYioCjZw/4dz9ZctLww cRArOhHC5d49Egl/7qscNEPmt7+Z8hjzXYZXj2TRMwGEs7e85u00zD7NsCtdsLm0I/H4 dtcfiBmMDpiegVeqAX4zp8N1T/2rA/EGprTQj8LgtQz6wQLe6dGqlptj7jvf9ftTcOwr BsQubKJGBTFQYXyS8wRnXfuuQ5FEpp7teQdss7IA9j92tjhVvuTevWlfZdHkvg95ABLe yQvt+HsOYz4VCtkQsIVBH95qHR1Sj6XZec3dMiqueflEUSZ9v7mdzhTVRm7gVQnFwWF5 mSCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719468538; x=1720073338; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aluMVAZ460okBBrhiNZK+G3gMubw4xx6sc5IE7bE8wg=; b=Fimu88NZDZqBx1UeozMd0ioV9UycclGbPpGU9JHAdWUIIoo8ktI0wHocpkIWRN8WBh +D9jmYOturPRjLt7HzBrHgQJFxu9hR0ZuO6Yg/Yf9i51ORcgDPUmdwmYRgNDr88btt1Y hqslFb1HJ8kNORHJi+G7uU1kVIK6CdfFciBe+yZAi39G0PAKXdSH0pYyfxXzYjEV4foW 4hbZ9JYRlLhmAVRmY2pvF2bkElU0FlOUm8cVUZqXIfYu0JnsL9RvSEVsdkGaL/1i1KJ4 MayuYvP4X9O25cTyO8XHe3pT4iH4zPTnv9K359IA3iMG5ieLop3rTvsrEMgVNFtTalj8 P0Yw== X-Gm-Message-State: AOJu0YyTO9jB9GEiLKVNCZWNwZ7E64FBYise2EkTAyUDh8mTuSooK+/e UTwXol6/Spd45X+h9MVPcW16dJeuS5ENyb52xkjhyrOU8jhkLqReCLEyF/liC9g= X-Google-Smtp-Source: AGHT+IE1NVtUfRQNajLRidemqJjjUiOSj6Sk9XwgRxYbzC2sq35JfkLu12YTlA9bFVBylQ3yurjKrQ== X-Received: by 2002:a05:6a00:189b:b0:705:cbcd:ebdc with SMTP id d2e1a72fcca58-7069140e7d8mr14154058b3a.10.1719468536748; Wed, 26 Jun 2024 23:08:56 -0700 (PDT) Received: from localhost ([157.82.204.135]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-706b48cae2csm499378b3a.29.2024.06.26.23.08.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Jun 2024 23:08:56 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:07:57 +0900 Subject: [PATCH v10 08/12] pcie_sriov: Remove num_vfs from PCIESriovPF MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-8-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::434; envelope-from=akihiko.odaki@daynix.com; helo=mail-pf1-x434.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org num_vfs is not migrated so use PCI_SRIOV_CTRL_VFE and PCI_SRIOV_NUM_VF instead. Signed-off-by: Akihiko Odaki --- include/hw/pci/pcie_sriov.h | 1 - hw/pci/pcie_sriov.c | 28 ++++++++++++++++++++-------- hw/pci/trace-events | 2 +- 3 files changed, 21 insertions(+), 10 deletions(-) diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index 70649236c18a..5148c5b77dd1 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -16,7 +16,6 @@ #include "hw/pci/pci.h" typedef struct PCIESriovPF { - uint16_t num_vfs; /* Number of virtual functions created */ uint8_t vf_bar_type[PCI_NUM_REGIONS]; /* Store type for each VF bar */ PCIDevice **vf; /* Pointer to an array of num_vfs VF devices */ } PCIESriovPF; diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index 9bd7f8acc3f4..fae6acea4acb 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -57,7 +57,6 @@ bool pcie_sriov_pf_init(PCIDevice *dev, uint16_t offset, pcie_add_capability(dev, PCI_EXT_CAP_ID_SRIOV, 1, offset, PCI_EXT_CAP_SRIOV_SIZEOF); dev->exp.sriov_cap = offset; - dev->exp.sriov_pf.num_vfs = 0; dev->exp.sriov_pf.vf = NULL; pci_set_word(cfg + PCI_SRIOV_VF_OFFSET, vf_offset); @@ -186,6 +185,12 @@ void pcie_sriov_vf_register_bar(PCIDevice *dev, int region_num, } } +static void clear_ctrl_vfe(PCIDevice *dev) +{ + uint8_t *ctrl = dev->config + dev->exp.sriov_cap + PCI_SRIOV_CTRL; + pci_set_word(ctrl, pci_get_word(ctrl) & ~PCI_SRIOV_CTRL_VFE); +} + static void register_vfs(PCIDevice *dev) { uint16_t num_vfs; @@ -195,6 +200,7 @@ static void register_vfs(PCIDevice *dev) assert(sriov_cap > 0); num_vfs = pci_get_word(dev->config + sriov_cap + PCI_SRIOV_NUM_VF); if (num_vfs > pci_get_word(dev->config + sriov_cap + PCI_SRIOV_TOTAL_VF)) { + clear_ctrl_vfe(dev); return; } @@ -203,20 +209,18 @@ static void register_vfs(PCIDevice *dev) for (i = 0; i < num_vfs; i++) { pci_set_enabled(dev->exp.sriov_pf.vf[i], true); } - dev->exp.sriov_pf.num_vfs = num_vfs; } static void unregister_vfs(PCIDevice *dev) { - uint16_t num_vfs = dev->exp.sriov_pf.num_vfs; uint16_t i; + uint8_t *cfg = dev->config + dev->exp.sriov_cap; trace_sriov_unregister_vfs(dev->name, PCI_SLOT(dev->devfn), - PCI_FUNC(dev->devfn), num_vfs); - for (i = 0; i < num_vfs; i++) { + PCI_FUNC(dev->devfn)); + for (i = 0; i < pci_get_word(cfg + PCI_SRIOV_TOTAL_VF); i++) { pci_set_enabled(dev->exp.sriov_pf.vf[i], false); } - dev->exp.sriov_pf.num_vfs = 0; } void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, @@ -242,6 +246,9 @@ void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, } else { unregister_vfs(dev); } + } else if (range_covers_byte(off, len, PCI_SRIOV_NUM_VF)) { + clear_ctrl_vfe(dev); + unregister_vfs(dev); } } @@ -304,7 +311,7 @@ PCIDevice *pcie_sriov_get_pf(PCIDevice *dev) PCIDevice *pcie_sriov_get_vf_at_index(PCIDevice *dev, int n) { assert(!pci_is_vf(dev)); - if (n < dev->exp.sriov_pf.num_vfs) { + if (n < pcie_sriov_num_vfs(dev)) { return dev->exp.sriov_pf.vf[n]; } return NULL; @@ -312,5 +319,10 @@ PCIDevice *pcie_sriov_get_vf_at_index(PCIDevice *dev, int n) uint16_t pcie_sriov_num_vfs(PCIDevice *dev) { - return dev->exp.sriov_pf.num_vfs; + uint16_t sriov_cap = dev->exp.sriov_cap; + uint8_t *cfg = dev->config + sriov_cap; + + return sriov_cap && + (pci_get_word(cfg + PCI_SRIOV_CTRL) & PCI_SRIOV_CTRL_VFE) ? + pci_get_word(cfg + PCI_SRIOV_NUM_VF) : 0; } diff --git a/hw/pci/trace-events b/hw/pci/trace-events index 19643aa8c6b0..e98f575a9d19 100644 --- a/hw/pci/trace-events +++ b/hw/pci/trace-events @@ -14,7 +14,7 @@ msix_write_config(char *name, bool enabled, bool masked) "dev %s enabled %d mask # hw/pci/pcie_sriov.c sriov_register_vfs(const char *name, int slot, int function, int num_vfs) "%s %02x:%x: creating %d vf devs" -sriov_unregister_vfs(const char *name, int slot, int function, int num_vfs) "%s %02x:%x: Unregistering %d vf devs" +sriov_unregister_vfs(const char *name, int slot, int function) "%s %02x:%x: Unregistering vf devs" sriov_config_write(const char *name, int slot, int fun, uint32_t offset, uint32_t val, uint32_t len) "%s %02x:%x: sriov offset 0x%x val 0x%x len %d" # pcie.c From patchwork Thu Jun 27 06:07:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C3D5CC2BD09 for ; Thu, 27 Jun 2024 06:09:32 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sMiJh-0005DF-SG; Thu, 27 Jun 2024 02:09:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sMiJd-0004p9-Vo for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:09:06 -0400 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sMiJb-0003gT-TO for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:09:05 -0400 Received: by mail-pl1-x62c.google.com with SMTP id d9443c01a7336-1fa55dbf2e7so29600395ad.2 for ; Wed, 26 Jun 2024 23:09:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1719468542; x=1720073342; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=BD2+P7n2MltpPV9NbpDQhfkqtNBJBJKWoF3oTQTpA+U=; b=N5WAgiaRfl7ebOaHl2yu5llTgX4xbCIyx9wvJ1U1bflnTHTIp/5PTKEaAe5sG0lUiE v+DmNhG0pcVsOiomu+UG2HbPXHEs8qgvgF049HZygD2NeDbrcD2lR2wZTqTPzVf6Vrzu B+q9JDJSGDGHAJuKQLkNg0rDoC/pMIRbZTnMfmP5pNkehSKCrMeYHCWOheiNLh3ODCeF NxXc7uIT9lbeZ1bpJZBApbJg9PRQDF/PacrvjWUCGAvAJ8ZU2k853WnAkdb9AfBRG9eG sBaGsD/6u2USkqIRj0JtFNBvRnsTWuWwzi2VKO8YGb9d9uFu43mvzwBXRQnNkLmK2azi 1fPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719468542; x=1720073342; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BD2+P7n2MltpPV9NbpDQhfkqtNBJBJKWoF3oTQTpA+U=; b=rBl0K2VXxAlpQHJE+fzr4ka/38qD9mrgJeENjrGafG1PbMjI5DgJ+8XaXk4ShRNXUg 99ZshEJFCiRCBPGnJ7UpoOdgpxtVDMs0DdFF2FFOljubWEKNt6A8OUoTE83HBje78fZH EuRwJK+cAeInt+6wHAn77+za7sMZYD29awSM4NN/khOVdzzvt4JHOSpStRmXGABAmWw9 +Xqeq1JymaD2pJr8dMynMwxH4dvUjrQOc+N/UpF14N1H1k31GgZFgHAR0cUZRverVNyE i7GR3+A0eq1Ogp+W+9bPR4DQMjWsqej9hG/LiW2BDKCW/uq+v5vmL2KnwMmpmbRuwZck Ex9g== X-Gm-Message-State: AOJu0YwagXqyLRRDV/SvYdSgrWLwA9TjYpvrt27ZRJP/4Tgl2N8fcH20 AmIL6SxCIeY/ExcDzQVhS+z0TRgyw+awnRSrB+X+1jMXL54Xry0BgHGhlJqIeLw= X-Google-Smtp-Source: AGHT+IG9QuCGdvgFO/wQTloEvdW89/n46Kf0289NynkI+nwKSgnHuv2wCkFp9AFO5LiydnF6thaDeg== X-Received: by 2002:a17:902:d505:b0:1f9:ec64:fd44 with SMTP id d9443c01a7336-1fa158e3c8emr137677545ad.27.1719468542528; Wed, 26 Jun 2024 23:09:02 -0700 (PDT) Received: from localhost ([157.82.204.135]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-1faac9806a4sm4913955ad.166.2024.06.26.23.08.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Jun 2024 23:09:02 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:07:58 +0900 Subject: [PATCH v10 09/12] pcie_sriov: Register VFs after migration MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-9-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::62c; envelope-from=akihiko.odaki@daynix.com; helo=mail-pl1-x62c.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org pcie_sriov doesn't have code to restore its state after migration, but igb, which uses pcie_sriov, naively claimed its migration capability. Add code to register VFs after migration and fix igb migration. Fixes: 3a977deebe6b ("Intrdocue igb device emulation") Signed-off-by: Akihiko Odaki --- include/hw/pci/pcie_sriov.h | 2 ++ hw/pci/pci.c | 7 +++++++ hw/pci/pcie_sriov.c | 7 +++++++ 3 files changed, 16 insertions(+) diff --git a/include/hw/pci/pcie_sriov.h b/include/hw/pci/pcie_sriov.h index 5148c5b77dd1..c5d2d318d330 100644 --- a/include/hw/pci/pcie_sriov.h +++ b/include/hw/pci/pcie_sriov.h @@ -57,6 +57,8 @@ void pcie_sriov_pf_add_sup_pgsize(PCIDevice *dev, uint16_t opt_sup_pgsize); void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, uint32_t val, int len); +void pcie_sriov_pf_post_load(PCIDevice *dev); + /* Reset SR/IOV */ void pcie_sriov_pf_reset(PCIDevice *dev); diff --git a/hw/pci/pci.c b/hw/pci/pci.c index c682c3dcb68e..af1c743611af 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -733,10 +733,17 @@ static bool migrate_is_not_pcie(void *opaque, int version_id) return !pci_is_express((PCIDevice *)opaque); } +static int pci_post_load(void *opaque, int version_id) +{ + pcie_sriov_pf_post_load(opaque); + return 0; +} + const VMStateDescription vmstate_pci_device = { .name = "PCIDevice", .version_id = 2, .minimum_version_id = 1, + .post_load = pci_post_load, .fields = (const VMStateField[]) { VMSTATE_INT32_POSITIVE_LE(version_id, PCIDevice), VMSTATE_BUFFER_UNSAFE_INFO_TEST(config, PCIDevice, diff --git a/hw/pci/pcie_sriov.c b/hw/pci/pcie_sriov.c index fae6acea4acb..56523ab4e833 100644 --- a/hw/pci/pcie_sriov.c +++ b/hw/pci/pcie_sriov.c @@ -252,6 +252,13 @@ void pcie_sriov_config_write(PCIDevice *dev, uint32_t address, } } +void pcie_sriov_pf_post_load(PCIDevice *dev) +{ + if (dev->exp.sriov_cap) { + register_vfs(dev); + } +} + /* Reset SR/IOV */ void pcie_sriov_pf_reset(PCIDevice *dev) From patchwork Thu Jun 27 06:07:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D8DD3C3064D for ; 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Wed, 26 Jun 2024 23:09:07 -0700 (PDT) Received: from localhost ([157.82.204.135]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-706b48d09fesm518292b3a.19.2024.06.26.23.09.04 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 26 Jun 2024 23:09:07 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:07:59 +0900 Subject: [PATCH v10 10/12] hw/pci: Replace -1 with UINT32_MAX for romsize MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-10-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::22e; envelope-from=akihiko.odaki@daynix.com; helo=mail-oi1-x22e.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org romsize is an uint32_t variable. Specifying -1 as an uint32_t value is obscure way to denote UINT32_MAX. Worse, if int is wider than 32-bit, it will change the behavior of a construct like the following: romsize = -1; if (romsize != -1) { ... } When -1 is assigned to romsize, -1 will be implicitly casted into uint32_t, resulting in UINT32_MAX. On contrary, when evaluating romsize != -1, romsize will be casted into int, and it will be a comparison of UINT32_MAX and -1, and result in false. Replace -1 with UINT32_MAX for statements involving the variable to clarify the intent and prevent potential breakage. Signed-off-by: Akihiko Odaki Reviewed-by: Markus Armbruster --- hw/pci/pci.c | 8 ++++---- hw/xen/xen_pt_load_rom.c | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index af1c743611af..1eb6abf534ca 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -70,7 +70,7 @@ static bool pcie_has_upstream_port(PCIDevice *dev); static Property pci_props[] = { DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1), DEFINE_PROP_STRING("romfile", PCIDevice, romfile), - DEFINE_PROP_UINT32("romsize", PCIDevice, romsize, -1), + DEFINE_PROP_UINT32("romsize", PCIDevice, romsize, UINT32_MAX), DEFINE_PROP_UINT32("rombar", PCIDevice, rom_bar, 1), DEFINE_PROP_BIT("multifunction", PCIDevice, cap_present, QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false), @@ -2073,7 +2073,7 @@ static void pci_qdev_realize(DeviceState *qdev, Error **errp) g_cmp_uint32, NULL); } - if (pci_dev->romsize != -1 && !is_power_of_2(pci_dev->romsize)) { + if (pci_dev->romsize != UINT32_MAX && !is_power_of_2(pci_dev->romsize)) { error_setg(errp, "ROM size %u is not a power of two", pci_dev->romsize); return; } @@ -2359,7 +2359,7 @@ static void pci_add_option_rom(PCIDevice *pdev, bool is_default_rom, return; } - if (load_file || pdev->romsize == -1) { + if (load_file || pdev->romsize == UINT32_MAX) { path = qemu_find_file(QEMU_FILE_TYPE_BIOS, pdev->romfile); if (path == NULL) { path = g_strdup(pdev->romfile); @@ -2378,7 +2378,7 @@ static void pci_add_option_rom(PCIDevice *pdev, bool is_default_rom, pdev->romfile); return; } - if (pdev->romsize != -1) { + if (pdev->romsize != UINT_MAX) { if (size > pdev->romsize) { error_setg(errp, "romfile \"%s\" (%u bytes) " "is too large for ROM size %u", diff --git a/hw/xen/xen_pt_load_rom.c b/hw/xen/xen_pt_load_rom.c index 03422a8a7148..6bc64acd3352 100644 --- a/hw/xen/xen_pt_load_rom.c +++ b/hw/xen/xen_pt_load_rom.c @@ -53,7 +53,7 @@ void *pci_assign_dev_load_option_rom(PCIDevice *dev, } fseek(fp, 0, SEEK_SET); - if (dev->romsize != -1) { + if (dev->romsize != UINT_MAX) { if (st.st_size > dev->romsize) { error_report("ROM BAR \"%s\" (%ld bytes) is too large for ROM size %u", rom_file, (long) st.st_size, dev->romsize); From patchwork Thu Jun 27 06:08:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93B49C2BD09 for ; Thu, 27 Jun 2024 06:10:56 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sMiJu-0005f2-L6; Thu, 27 Jun 2024 02:09:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sMiJp-0005Z7-Kx for qemu-devel@nongnu.org; Thu, 27 Jun 2024 02:09:18 -0400 Received: from mail-oi1-x229.google.com ([2607:f8b0:4864:20::229]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sMiJm-0003hs-B3 for qemu-devel@nongnu.org; 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Wed, 26 Jun 2024 23:09:12 -0700 (PDT) From: Akihiko Odaki Date: Thu, 27 Jun 2024 15:08:00 +0900 Subject: [PATCH v10 11/12] hw/pci: Convert rom_bar into OnOffAuto MIME-Version: 1.0 Message-Id: <20240627-reuse-v10-11-7ca0b8ed3d9f@daynix.com> References: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> In-Reply-To: <20240627-reuse-v10-0-7ca0b8ed3d9f@daynix.com> To: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Alex Williamson , =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= , Paolo Bonzini , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Eduardo Habkost , Sriram Yagnaraman , Jason Wang , Keith Busch , Klaus Jensen , Markus Armbruster Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::229; envelope-from=akihiko.odaki@daynix.com; helo=mail-oi1-x229.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org rom_bar is tristate but was defined as uint32_t so convert it into OnOffAuto. Signed-off-by: Akihiko Odaki --- docs/igd-assign.txt | 2 +- include/hw/pci/pci_device.h | 2 +- hw/pci/pci.c | 4 ++-- hw/vfio/pci-quirks.c | 2 +- hw/vfio/pci.c | 11 +++++------ hw/xen/xen_pt_load_rom.c | 4 ++-- tests/qtest/virtio-net-failover.c | 32 ++++++++++++++++---------------- 7 files changed, 28 insertions(+), 29 deletions(-) diff --git a/docs/igd-assign.txt b/docs/igd-assign.txt index e17bb50789ad..35c6c8e28493 100644 --- a/docs/igd-assign.txt +++ b/docs/igd-assign.txt @@ -35,7 +35,7 @@ IGD has two different modes for assignment using vfio-pci: ISA/LPC bridge device (vfio-pci-igd-lpc-bridge) on the root bus at PCI address 1f.0. * The IGD device must have a VGA ROM, either provided via the romfile - option or loaded automatically through vfio (standard). rombar=0 + option or loaded automatically through vfio (standard). rombar=off will disable legacy mode support. * Hotplug of the IGD device is not supported. * The IGD device must be a SandyBridge or newer model device. diff --git a/include/hw/pci/pci_device.h b/include/hw/pci/pci_device.h index ca151325085d..49b341ce2e27 100644 --- a/include/hw/pci/pci_device.h +++ b/include/hw/pci/pci_device.h @@ -147,7 +147,7 @@ struct PCIDevice { uint32_t romsize; bool has_rom; MemoryRegion rom; - uint32_t rom_bar; + OnOffAuto rom_bar; /* INTx routing notifier */ PCIINTxRoutingNotifier intx_routing_notifier; diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 1eb6abf534ca..901f5460d774 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -71,7 +71,7 @@ static Property pci_props[] = { DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1), DEFINE_PROP_STRING("romfile", PCIDevice, romfile), DEFINE_PROP_UINT32("romsize", PCIDevice, romsize, UINT32_MAX), - DEFINE_PROP_UINT32("rombar", PCIDevice, rom_bar, 1), + DEFINE_PROP_ON_OFF_AUTO("rombar", PCIDevice, rom_bar, ON_OFF_AUTO_AUTO), DEFINE_PROP_BIT("multifunction", PCIDevice, cap_present, QEMU_PCI_CAP_MULTIFUNCTION_BITNR, false), DEFINE_PROP_BIT("x-pcie-lnksta-dllla", PCIDevice, cap_present, @@ -2334,7 +2334,7 @@ static void pci_add_option_rom(PCIDevice *pdev, bool is_default_rom, return; } - if (!pdev->rom_bar) { + if (pdev->rom_bar == ON_OFF_AUTO_OFF) { /* * Load rom via fw_cfg instead of creating a rom bar, * for 0.11 compatibility. diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c index 39dae72497e0..0e920ed0691a 100644 --- a/hw/vfio/pci-quirks.c +++ b/hw/vfio/pci-quirks.c @@ -33,7 +33,7 @@ * execution as noticed with the BCM 57810 card for lack of a * more better way to handle such issues. * The user can still override by specifying a romfile or - * rombar=1. + * rombar=on. * Please see https://bugs.launchpad.net/qemu/+bug/1284874 * for an analysis of the 57810 card hang. When adding * a new vendor id/device id combination below, please also add diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index 74a79bdf61f9..4c4d9dc81efb 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -902,7 +902,7 @@ static void vfio_pci_load_rom(VFIOPCIDevice *vdev) error_report("vfio-pci: Cannot read device rom at " "%s", vdev->vbasedev.name); error_printf("Device option ROM contents are probably invalid " - "(check dmesg).\nSkip option ROM probe with rombar=0, " + "(check dmesg).\nSkip option ROM probe with rombar=off, " "or load from file with romfile=\n"); return; } @@ -1012,11 +1012,10 @@ static void vfio_pci_size_rom(VFIOPCIDevice *vdev) { uint32_t orig, size = cpu_to_le32((uint32_t)PCI_ROM_ADDRESS_MASK); off_t offset = vdev->config_offset + PCI_ROM_ADDRESS; - DeviceState *dev = DEVICE(vdev); char *name; int fd = vdev->vbasedev.fd; - if (vdev->pdev.romfile || !vdev->pdev.rom_bar) { + if (vdev->pdev.romfile || vdev->pdev.rom_bar == ON_OFF_AUTO_OFF) { /* Since pci handles romfile, just print a message and return */ if (vfio_opt_rom_in_denylist(vdev) && vdev->pdev.romfile) { warn_report("Device at %s is known to cause system instability" @@ -1046,17 +1045,17 @@ static void vfio_pci_size_rom(VFIOPCIDevice *vdev) } if (vfio_opt_rom_in_denylist(vdev)) { - if (dev->opts && qdict_haskey(dev->opts, "rombar")) { + if (vdev->pdev.rom_bar == ON_OFF_AUTO_ON) { warn_report("Device at %s is known to cause system instability" " issues during option rom execution", vdev->vbasedev.name); error_printf("Proceeding anyway since user specified" - " non zero value for rombar\n"); + " on for rombar\n"); } else { warn_report("Rom loading for device at %s has been disabled" " due to system instability issues", vdev->vbasedev.name); - error_printf("Specify rombar=1 or romfile to force\n"); + error_printf("Specify rombar=on or romfile to force\n"); return; } } diff --git a/hw/xen/xen_pt_load_rom.c b/hw/xen/xen_pt_load_rom.c index 6bc64acd3352..025a6b25a916 100644 --- a/hw/xen/xen_pt_load_rom.c +++ b/hw/xen/xen_pt_load_rom.c @@ -26,7 +26,7 @@ void *pci_assign_dev_load_option_rom(PCIDevice *dev, Object *owner = OBJECT(dev); /* If loading ROM from file, pci handles it */ - if (dev->romfile || !dev->rom_bar) { + if (dev->romfile || dev->rom_bar == ON_OFF_AUTO_OFF) { return NULL; } @@ -71,7 +71,7 @@ void *pci_assign_dev_load_option_rom(PCIDevice *dev, if (!fread(ptr, 1, st.st_size, fp)) { error_report("pci-assign: Cannot read from host %s", rom_file); error_printf("Device option ROM contents are probably invalid " - "(check dmesg).\nSkip option ROM probe with rombar=0, " + "(check dmesg).\nSkip option ROM probe with rombar=off, " "or load from file with romfile=\n"); goto close_rom; } diff --git a/tests/qtest/virtio-net-failover.c b/tests/qtest/virtio-net-failover.c index 73dfabc2728b..f65b97683fb6 100644 --- a/tests/qtest/virtio-net-failover.c +++ b/tests/qtest/virtio-net-failover.c @@ -568,7 +568,7 @@ static void test_hotplug_2_reverse(void) "{'bus': 'root0'," "'failover': true," "'netdev': 'hs0'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_STANDBY0"'}"); @@ -655,7 +655,7 @@ static void test_migrate_out(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -765,7 +765,7 @@ static void test_migrate_in(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -819,7 +819,7 @@ static void test_off_migrate_out(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -887,7 +887,7 @@ static void test_off_migrate_in(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -938,7 +938,7 @@ static void test_guest_off_migrate_out(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -1014,7 +1014,7 @@ static void test_guest_off_migrate_in(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -1065,7 +1065,7 @@ static void test_migrate_guest_off_abort(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -1170,7 +1170,7 @@ static void test_migrate_abort_wait_unplug(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -1259,7 +1259,7 @@ static void test_migrate_abort_active(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -1358,7 +1358,7 @@ static void test_migrate_off_abort(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -1450,7 +1450,7 @@ static void test_migrate_abort_timeout(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -1543,7 +1543,7 @@ static void test_multi_out(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -1574,7 +1574,7 @@ static void test_multi_out(gconstpointer opaque) "{'bus': 'root3'," "'failover_pair_id': 'standby1'," "'netdev': 'hs3'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY1"'}"); @@ -1713,7 +1713,7 @@ static void test_multi_in(gconstpointer opaque) "{'bus': 'root1'," "'failover_pair_id': 'standby0'," "'netdev': 'hs1'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY0"'}"); @@ -1737,7 +1737,7 @@ static void test_multi_in(gconstpointer opaque) "{'bus': 'root3'," "'failover_pair_id': 'standby1'," "'netdev': 'hs3'," - "'rombar': 0," + "'rombar': 'off'," "'romfile': ''," "'mac': '"MAC_PRIMARY1"'}"); From patchwork Thu Jun 27 06:08:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13713860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D0BC4C30658 for ; Thu, 27 Jun 2024 06:10:50 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sMiJx-0005hK-2O; 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Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Markus Armbruster --- include/hw/qdev-core.h | 4 ---- hw/core/qdev.c | 1 - system/qdev-monitor.c | 12 +++++++----- 3 files changed, 7 insertions(+), 10 deletions(-) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index 5336728a23f6..40f2d185f17c 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -237,10 +237,6 @@ struct DeviceState { * @pending_deleted_expires_ms: optional timeout for deletion events */ int64_t pending_deleted_expires_ms; - /** - * @opts: QDict of options for the device - */ - QDict *opts; /** * @hotplugged: was device added after PHASE_MACHINE_READY? */ diff --git a/hw/core/qdev.c b/hw/core/qdev.c index f3a996f57dee..2fc84699d432 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -706,7 +706,6 @@ static void device_finalize(Object *obj) dev->canonical_path = NULL; } - qobject_unref(dev->opts); g_free(dev->id); } diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c index 6af6ef7d667f..3551989d5153 100644 --- a/system/qdev-monitor.c +++ b/system/qdev-monitor.c @@ -624,6 +624,7 @@ DeviceState *qdev_device_add_from_qdict(const QDict *opts, char *id; DeviceState *dev = NULL; BusState *bus = NULL; + QDict *properties; driver = qdict_get_try_str(opts, "driver"); if (!driver) { @@ -705,13 +706,14 @@ DeviceState *qdev_device_add_from_qdict(const QDict *opts, } /* set properties */ - dev->opts = qdict_clone_shallow(opts); - qdict_del(dev->opts, "driver"); - qdict_del(dev->opts, "bus"); - qdict_del(dev->opts, "id"); + properties = qdict_clone_shallow(opts); + qdict_del(properties, "driver"); + qdict_del(properties, "bus"); + qdict_del(properties, "id"); - object_set_properties_from_keyval(&dev->parent_obj, dev->opts, from_json, + object_set_properties_from_keyval(&dev->parent_obj, properties, from_json, errp); + qobject_unref(properties); if (*errp) { goto err_del_dev; }