From patchwork Thu Jun 27 09:11:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13714017 X-Patchwork-Delegate: bhelgaas@google.com Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0939D137757; Thu, 27 Jun 2024 09:12:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479538; cv=none; b=R6iZVzX1+bGxUFXz5y1a8TKl4ZcpNIICDDaswnnczvVvqiruTMf8QL2X3Abk4Re4uv91TkAAaIjS8e9jI+giRssg3sbaYLLZTw6e1tjIksjB+ptbI42tHxg156m37wsg1jlQtiUIKi9PnVnOGvUCIV3DbDZ07k360XLSpLLCXDs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479538; c=relaxed/simple; bh=0M1Hns7CDOYJ2aLM9KSawz/vJcM90IBbHl4CqMegdlE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=d7G34EImzA715eIMU1AVIjE85A3YCFWNde+2Rxp/aGf0we9Y1RpjgXFbDTnteP8TsJsOV9o1MtAlc22ywIyvuhHNDmhyuiBswOAR1y7EcvLgiHomuhRTqIB6KpHHZ2ywiiyhXb/yyX8sDvI+YffmwKbJ9gX+diX2QlYTbdHmEZQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=jtB0QqBa; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="jtB0QqBa" Received: by mail.gandi.net (Postfix) with ESMTPA id D62E020010; Thu, 27 Jun 2024 09:12:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1719479533; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=W9+p1hma003opriOOEox9fT6iYMjtITIcW1ZIQ2QLNo=; b=jtB0QqBajMb/K4aGw9+wYE3BC7lqgwcQMBfFZsmEY2RYiPZZE9/0hqHdNKXCK16fijICm9 Aty2n9YVz6Aq4aAkabrK3217d1ZJ2jj9M7vFMoL3RI8WmNB9EFXmayoW12w75ZvHcoVVES L/PUJ8UAfgH3Z0FMAXcKC71tSx7+QRbtAvVkkPDjGbshwY7vru95d3z5Ax9AbEeY1eIS1a PuAVSV7JE7bjrJVvI1ijRP+pN0s6GJ/xsTZyQAbSs8eybLWUPL8xhLsjm6lZUH8IFYAT1N GgtDlAedw3+wW1CJnZ1KmRtxv98Eh/ZH/qJtq28KqUZk33FOFAiPfwP5RJv9sw== From: Herve Codina To: Andy Shevchenko , Simon Horman , Herve Codina , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Arnd Bergmann , UNGLinuxDriver@microchip.com, Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH v3 1/7] mfd: syscon: Add reference counting and device managed support Date: Thu, 27 Jun 2024 11:11:30 +0200 Message-ID: <20240627091137.370572-2-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240627091137.370572-1-herve.codina@bootlin.com> References: <20240627091137.370572-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger Syscon releasing is not supported. Without release function, unbinding a driver that uses syscon whether explicitly or due to a module removal left the used syscon in a in-use state. For instance a syscon_node_to_regmap() call from a consumer retrieve a syscon regmap instance. Internally, syscon_node_to_regmap() can create syscon instance and add it to the existing syscon list. No API is available to release this syscon instance, remove it from the list and free it when it is not used anymore. Introduce reference counting in syscon in order to keep track of syscon usage using syscon_{get,put}() and add a device managed version of syscon_regmap_lookup_by_phandle(), to automatically release the syscon instance on the consumer removal. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/mfd/syscon.c | 145 ++++++++++++++++++++++++++++++++++--- include/linux/mfd/syscon.h | 18 +++++ 2 files changed, 154 insertions(+), 9 deletions(-) diff --git a/drivers/mfd/syscon.c b/drivers/mfd/syscon.c index 7d0e91164cba..86898831b842 100644 --- a/drivers/mfd/syscon.c +++ b/drivers/mfd/syscon.c @@ -34,6 +34,7 @@ struct syscon { struct regmap *regmap; struct reset_control *reset; struct list_head list; + struct kref refcount; }; static const struct regmap_config syscon_regmap_config = { @@ -147,6 +148,8 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_res) syscon->regmap = regmap; syscon->np = np; + of_node_get(syscon->np); + kref_init(&syscon->refcount); spin_lock(&syscon_list_slock); list_add_tail(&syscon->list, &syscon_list); @@ -168,7 +171,30 @@ static struct syscon *of_syscon_register(struct device_node *np, bool check_res) return ERR_PTR(ret); } -static struct regmap *device_node_get_regmap(struct device_node *np, +static void syscon_free(struct kref *kref) +{ + struct syscon *syscon = container_of(kref, struct syscon, refcount); + + spin_lock(&syscon_list_slock); + list_del(&syscon->list); + spin_unlock(&syscon_list_slock); + + regmap_exit(syscon->regmap); + of_node_put(syscon->np); + kfree(syscon); +} + +static void syscon_get(struct syscon *syscon) +{ + kref_get(&syscon->refcount); +} + +static void syscon_put(struct syscon *syscon) +{ + kref_put(&syscon->refcount, syscon_free); +} + +static struct syscon *device_node_get_syscon(struct device_node *np, bool check_res) { struct syscon *entry, *syscon = NULL; @@ -183,9 +209,23 @@ static struct regmap *device_node_get_regmap(struct device_node *np, spin_unlock(&syscon_list_slock); - if (!syscon) + if (!syscon) { syscon = of_syscon_register(np, check_res); + if (IS_ERR(syscon)) + return ERR_CAST(syscon); + } else { + syscon_get(syscon); + } + + return syscon; +} +static struct regmap *device_node_get_regmap(struct device_node *np, + bool check_res) +{ + struct syscon *syscon; + + syscon = device_node_get_syscon(np, check_res); if (IS_ERR(syscon)) return ERR_CAST(syscon); @@ -198,12 +238,23 @@ struct regmap *device_node_to_regmap(struct device_node *np) } EXPORT_SYMBOL_GPL(device_node_to_regmap); -struct regmap *syscon_node_to_regmap(struct device_node *np) +static struct syscon *syscon_node_to_syscon(struct device_node *np) { if (!of_device_is_compatible(np, "syscon")) return ERR_PTR(-EINVAL); - return device_node_get_regmap(np, true); + return device_node_get_syscon(np, true); +} + +struct regmap *syscon_node_to_regmap(struct device_node *np) +{ + struct syscon *syscon; + + syscon = syscon_node_to_syscon(np); + if (IS_ERR(syscon)) + return ERR_CAST(syscon); + + return syscon->regmap; } EXPORT_SYMBOL_GPL(syscon_node_to_regmap); @@ -223,11 +274,11 @@ struct regmap *syscon_regmap_lookup_by_compatible(const char *s) } EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_compatible); -struct regmap *syscon_regmap_lookup_by_phandle(struct device_node *np, - const char *property) +static struct syscon *syscon_lookup_by_phandle(struct device_node *np, + const char *property) { struct device_node *syscon_np; - struct regmap *regmap; + struct syscon *syscon; if (property) syscon_np = of_parse_phandle(np, property, 0); @@ -237,12 +288,24 @@ struct regmap *syscon_regmap_lookup_by_phandle(struct device_node *np, if (!syscon_np) return ERR_PTR(-ENODEV); - regmap = syscon_node_to_regmap(syscon_np); + syscon = syscon_node_to_syscon(syscon_np); if (property) of_node_put(syscon_np); - return regmap; + return syscon; +} + +struct regmap *syscon_regmap_lookup_by_phandle(struct device_node *np, + const char *property) +{ + struct syscon *syscon; + + syscon = syscon_lookup_by_phandle(np, property); + if (IS_ERR(syscon)) + return ERR_CAST(syscon); + + return syscon->regmap; } EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_phandle); @@ -293,6 +356,70 @@ struct regmap *syscon_regmap_lookup_by_phandle_optional(struct device_node *np, } EXPORT_SYMBOL_GPL(syscon_regmap_lookup_by_phandle_optional); +static struct syscon *syscon_from_regmap(struct regmap *regmap) +{ + struct syscon *entry, *syscon = NULL; + + spin_lock(&syscon_list_slock); + + list_for_each_entry(entry, &syscon_list, list) + if (entry->regmap == regmap) { + syscon = entry; + break; + } + + spin_unlock(&syscon_list_slock); + + return syscon; +} + +void syscon_put_regmap(struct regmap *regmap) +{ + struct syscon *syscon; + + syscon = syscon_from_regmap(regmap); + if (!syscon) + return; + + syscon_put(syscon); +} +EXPORT_SYMBOL_GPL(syscon_put_regmap); + +static void devm_syscon_release(struct device *dev, void *res) +{ + syscon_put(*(struct syscon **)res); +} + +static struct regmap *__devm_syscon_get(struct device *dev, + struct syscon *syscon) +{ + struct syscon **ptr; + + if (IS_ERR(syscon)) + return ERR_CAST(syscon); + + ptr = devres_alloc(devm_syscon_release, sizeof(struct syscon *), GFP_KERNEL); + if (!ptr) { + syscon_put(syscon); + return ERR_PTR(-ENOMEM); + } + + *ptr = syscon; + devres_add(dev, ptr); + + return syscon->regmap; +} + +struct regmap *devm_syscon_regmap_lookup_by_phandle(struct device *dev, + struct device_node *np, + const char *property) +{ + struct syscon *syscon = syscon_lookup_by_phandle(np, property); + + return __devm_syscon_get(dev, syscon); +} +EXPORT_SYMBOL_GPL(devm_syscon_regmap_lookup_by_phandle); + static int syscon_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; diff --git a/include/linux/mfd/syscon.h b/include/linux/mfd/syscon.h index c315903f6dab..f742d865a37a 100644 --- a/include/linux/mfd/syscon.h +++ b/include/linux/mfd/syscon.h @@ -15,6 +15,7 @@ #include struct device_node; +struct device; #ifdef CONFIG_MFD_SYSCON struct regmap *device_node_to_regmap(struct device_node *np); @@ -28,6 +29,11 @@ struct regmap *syscon_regmap_lookup_by_phandle_args(struct device_node *np, unsigned int *out_args); struct regmap *syscon_regmap_lookup_by_phandle_optional(struct device_node *np, const char *property); +void syscon_put_regmap(struct regmap *regmap); + +struct regmap *devm_syscon_regmap_lookup_by_phandle(struct device *dev, + struct device_node *np, + const char *property); #else static inline struct regmap *device_node_to_regmap(struct device_node *np) { @@ -67,6 +73,18 @@ static inline struct regmap *syscon_regmap_lookup_by_phandle_optional( return NULL; } +static inline void syscon_put_regmap(struct regmap *regmap) +{ +} + +static inline +struct regmap *devm_syscon_regmap_lookup_by_phandle(struct device *dev, + struct device_node *np, + const char *property) +{ + return NULL; +} + #endif #endif /* __LINUX_MFD_SYSCON_H__ */ From patchwork Thu Jun 27 09:11:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13714018 X-Patchwork-Delegate: bhelgaas@google.com Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B61429CA; Thu, 27 Jun 2024 09:12:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479539; cv=none; b=ZbQKRscUEd0toqRlvwxsMbBAbtE30woWgBJvivamxgC4xAnPZdjRjmvKs+7XyMv4EgBYSahhDGu1aNAVw4dCOSrFtquP+sRe22Xhrt+D6CngVsC5L+FgG0JDkujxe4VEELUGZrqIWZ7PxQjT+1MxZy1ZPCmTx0m0o1YMCD37+ZY= ARC-Message-Signature: i=1; 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Thu, 27 Jun 2024 09:12:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1719479534; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8S9HiRmD7ovcxff043VP95jHFoFGaOl6oxz7Gv5SNN4=; b=Tjb9GazeY+O13PUGFdceNr2ZdiCn5fqrIBjQ4ogN0EULfK2DO9S3cxg7OyeuQqQPzhFD+v IRXKmhXpMzyz3DWLrAm4/7zUb2DQXosLN6TeaaO5QT8aSMkTKGRpEXnhh8OcQqfuLLo3Im FA41G24ZF2oY2kBW7fedEc9veGwjedD2hLjvg4ZePcJzDOEwqQAiT0XReVe7c82n32ED02 Iyc2hQAAR57iZV1toMTlDIBlSKYI6OzMm5ILfg250cJOcPyhQbOSLOfO9mxa29NWP9G9aP uIFRWWDHjb6fizgT2EuiJsLTvVbmzvLimQWHYN1rygM6jS7EJjMX+hdkOwd0PA== From: Herve Codina To: Andy Shevchenko , Simon Horman , Herve Codina , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Arnd Bergmann , UNGLinuxDriver@microchip.com, Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH v3 2/7] reset: mchp: sparx5: Remove dependencies and allow building as a module Date: Thu, 27 Jun 2024 11:11:31 +0200 Message-ID: <20240627091137.370572-3-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240627091137.370572-1-herve.codina@bootlin.com> References: <20240627091137.370572-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger The sparx5 reset controller depends on the SPARX5 architecture or the LAN966x SoC. This reset controller can be used by the LAN966x PCI device and so it needs to be available on all architectures. Also the LAN966x PCI device driver can be built as a module and this reset controller driver has no reason to be a builtin driver in that case. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/reset/Kconfig | 3 +-- drivers/reset/reset-microchip-sparx5.c | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 7112f5932609..fb9005e2f5b5 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -124,8 +124,7 @@ config RESET_LPC18XX This enables the reset controller driver for NXP LPC18xx/43xx SoCs. config RESET_MCHP_SPARX5 - bool "Microchip Sparx5 reset driver" - depends on ARCH_SPARX5 || SOC_LAN966 || COMPILE_TEST + tristate "Microchip Sparx5 reset driver" default y if SPARX5_SWITCH select MFD_SYSCON help diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 636e85c388b0..69915c7b4941 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -158,6 +158,7 @@ static const struct of_device_id mchp_sparx5_reset_of_match[] = { }, { } }; +MODULE_DEVICE_TABLE(of, mchp_sparx5_reset_of_match); static struct platform_driver mchp_sparx5_reset_driver = { .probe = mchp_sparx5_reset_probe, @@ -180,3 +181,4 @@ postcore_initcall(mchp_sparx5_reset_init); MODULE_DESCRIPTION("Microchip Sparx5 switch reset driver"); MODULE_AUTHOR("Steen Hegelund "); +MODULE_LICENSE("GPL"); From patchwork Thu Jun 27 09:11:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13714019 X-Patchwork-Delegate: bhelgaas@google.com Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E972713A259; Thu, 27 Jun 2024 09:12:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479540; cv=none; b=PkEnnBY3/FLhNg9qaXKZYcyG31VpD9m7EvDZvMRYhrFIPhGZCxnbn3mFcgjww+cwLFQjzvR1iXaV74cuJIVxUr0rSFV75t9xvjq/W0LJk+XP0hkLOH68cfVmJytO72gcnAh9Q8/8U3w/xLE/h6yMQhsn3u36XIdqmbl1tCV2YP8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479540; c=relaxed/simple; bh=wDXdXZDe5krRitdqjY8S6IfoignV9HVmYqJZDUl7H6c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=bSKBOYW40XHHSF7abUceUUmAViMDQ4FRrPY/vPD5haVrJu8aSGJXTqT9IyyAjkYULDCqBjPA7Hqf9p6xlMqdkWrlZbWpsTsm8eH99puw1wyIyg1ocz+7qbLsvGo5Jg1XFyywPFDYProM+3yKjun3dUu9/BsI5nIf6vIaA5SQvxI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=PF0YolHs; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="PF0YolHs" Received: by mail.gandi.net (Postfix) with ESMTPA id 0937B2000D; Thu, 27 Jun 2024 09:12:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1719479536; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=L6TlKweuD4lCqBxL9SdGBmVX01IhcfhXMnuiuGHqhBE=; b=PF0YolHs2RPWduLcKVo8IiDdMOd+WO07PgBDKe9DZFVzbH60i9zN+FOWbpJiTwJfcTtND/ xxwLsyh9KOsBxlWQBFOyOngRhf2JKpDLpQGskVLAp+l6SV7lEKjV/2vb7Kjh8NoJEmIQjo b2xZCduYEy1Q3016a9/AZuIBeiW61H8P3KRM3dr7nY7bN2Z227jtNVQcbmJxvvWqTxHZE1 +6MYVBlbSjNIuBTRvlwpp2VQsvrqVyj5XHVSRYC2OuzbxOLMpoWUizJoxdhzzSHw0PWKDB IlY2IsvRYNtM+KVIR0TZ47Vv33U9r+1RlKuWoQIs2bR/QKG7FH/S/wPfBeCb4Q== From: Herve Codina To: Andy Shevchenko , Simon Horman , Herve Codina , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Arnd Bergmann , UNGLinuxDriver@microchip.com, Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH v3 3/7] reset: mchp: sparx5: Release syscon when not use anymore Date: Thu, 27 Jun 2024 11:11:32 +0200 Message-ID: <20240627091137.370572-4-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240627091137.370572-1-herve.codina@bootlin.com> References: <20240627091137.370572-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger The sparx5 reset controller does not release syscon when it is not used anymore. This reset controller is used by the LAN966x PCI device driver. It can be removed from the system at runtime and needs to release its consumed syscon on removal. Use the newly introduced devm_syscon_regmap_lookup_by_phandle() in order to get the syscon and automatically release it on removal. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/reset/reset-microchip-sparx5.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index 69915c7b4941..c4fe65291a43 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -65,15 +65,11 @@ static const struct reset_control_ops sparx5_reset_ops = { static int mchp_sparx5_map_syscon(struct platform_device *pdev, char *name, struct regmap **target) { - struct device_node *syscon_np; + struct device *dev = &pdev->dev; struct regmap *regmap; int err; - syscon_np = of_parse_phandle(pdev->dev.of_node, name, 0); - if (!syscon_np) - return -ENODEV; - regmap = syscon_node_to_regmap(syscon_np); - of_node_put(syscon_np); + regmap = devm_syscon_regmap_lookup_by_phandle(dev, dev->of_node, name); if (IS_ERR(regmap)) { err = PTR_ERR(regmap); dev_err(&pdev->dev, "No '%s' map: %d\n", name, err); From patchwork Thu Jun 27 09:11:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13714020 X-Patchwork-Delegate: bhelgaas@google.com Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A0D813B780; Thu, 27 Jun 2024 09:12:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479541; cv=none; b=F50SHkxwiFYNCHXPiklLLRQ8n0twF7JaS0tQw8rTmvod/861NWWDlxWa5KOzP+VHOcsj9qb/7hwxuK0KeyupestQZY0tBMp+wPLWx6EJDNiLK/iYaPHwN6EPIxJAQAZeVl839J0PQJtLMvoIeWEPpG8TKl0w8g5xzDOuNG9onx4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479541; c=relaxed/simple; bh=E2Nmsu/7HYQLnn0sN5b1S2heBsMjF3oRWqAoBIGaDBE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=VA97XT3/2zMcCEQ/oG8xTnHmHVS7zNEWH507/Xry5AfaR4N/VqxjwhvPnrNGz/YBfMICKomiOi0088oQiaBhCMPkvyfzb1PIrAAH2GYdy+I43NwEQvos4QSh5IUjVKzCuZsOYO8Fz4JturmU5Nn+Iem530Jx7/KG+UGwO5WJhgI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=BLFoZXTU; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="BLFoZXTU" Received: by mail.gandi.net (Postfix) with ESMTPA id 8F62B20005; Thu, 27 Jun 2024 09:12:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1719479538; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bOAN8DOKAutpcJ98IdSxdr6GKYFYp22/ixh21amGeTg=; b=BLFoZXTUyOahcb22V3K5FvkqRw9RWqaUUM+SECzMK0lB6eCEOiT4uNzzDgA2xwMjwrYCM/ y0fZyBJz6gHkEzOnnpAcpN3dBYwcRdYmEbkBks85SaJLq1ncqugOfHIraS4FD1FcZt7z3z 7BXpS8PeWyiWnFfbQDspOtLfOVIDR5mDZylVVvv9zHgywwy9sh7UP+aHrSggC6YIYwqa2R 7hhY4yY3VlY5u8VHn75u9Vw9eR1x5fdM+jSAmmpP8ovdIQL4rDJr6aZwvDW5AUOlPI7avz mumzb8X+JJ2mykvehqYTKw/6JZ9NBUvDJG87BChGeV4pDrn6WtV6ApdwI74ikQ== From: Herve Codina To: Andy Shevchenko , Simon Horman , Herve Codina , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Arnd Bergmann , UNGLinuxDriver@microchip.com, Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH v3 4/7] reset: core: add get_device()/put_device on rcdev Date: Thu, 27 Jun 2024 11:11:33 +0200 Message-ID: <20240627091137.370572-5-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240627091137.370572-1-herve.codina@bootlin.com> References: <20240627091137.370572-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger Since the rcdev structure is allocated by the reset controller drivers themselves, they need to exists as long as there is a consumer. A call to module_get() is already existing but that does not work when using device-tree overlays. In order to guarantee that the underlying reset controller device does not vanish while using it, add a get_device() call when retrieving a reset control from a reset controller device and a put_device() when releasing that control. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/reset/core.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/reset/core.c b/drivers/reset/core.c index dba74e857be6..999c3c41cf21 100644 --- a/drivers/reset/core.c +++ b/drivers/reset/core.c @@ -812,6 +812,7 @@ __reset_control_get_internal(struct reset_controller_dev *rcdev, kref_init(&rstc->refcnt); rstc->acquired = acquired; rstc->shared = shared; + get_device(rcdev->dev); return rstc; } @@ -826,6 +827,7 @@ static void __reset_control_release(struct kref *kref) module_put(rstc->rcdev->owner); list_del(&rstc->list); + put_device(rstc->rcdev->dev); kfree(rstc); } From patchwork Thu Jun 27 09:11:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13714021 X-Patchwork-Delegate: bhelgaas@google.com Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 387C413C9CA; Thu, 27 Jun 2024 09:12:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479543; cv=none; b=M2qTPntWZpJKXuwgE56zIDIdn92bIUWkhwCrzzkeOF19cZJrVyGUHnBjmWBlJxORw77XJol8YL0zoyjUFUtDCALbv1C3VSIrrZHbF8RlfuJwD/6s/2W6K6k3p0kQvUfbIoaPiMv2UBW8wGcrev7AMlPkQ/mGKi3S7AXWV+Y8ewM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479543; c=relaxed/simple; bh=nhPkf7wgseJDhZAtkhb42G6JXubPm9Ki2AQx9/jbUDc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=CekabRYpf6hB6W8BreaO+b4Tba5mWLsm+QGavPjcKOeZiK+B/5Nmp1WJq4XSLMYEjLgSeASNtJnv+l+UwkQGS76GPEzb7kXTg5Fhvm2OtvmvHMKgO5G1AQjnghhcor5vuNI2+AlOx7XYtieN9AcRWl5t3nolGMu3YKE/pXhugtM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=QYuH1w86; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="QYuH1w86" Received: by mail.gandi.net (Postfix) with ESMTPA id 2B76C20003; Thu, 27 Jun 2024 09:12:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1719479539; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9I+0v1qx7CVrOS1djilPmB0cdboViIJolbKDdwWOXOM=; b=QYuH1w866emXytITZ+5ma+JAlPzWd6MSWV0GpLVavK/MMbDYTurpgsZ+WWCQgCcnMyAdDJ B9kwiExRSWUG78kmvLio3XoUufjzkfFzB8YdH/ZRjXUgcfqnZRXnmCOKoKafp4gGIiZHM6 y+zUwjBDav+xBw1yxdrLJxnZGpMTEY8a+SvnQE2KFl75MtKO5Q0uvEb2SkqgJ5pUfbx4Oz 0CfJzo643wong26sQSEit+FuzBlA9o+OCmNZMatVqTI+weP7qo/IdvZxvBSg5nXxBScg1+ PUQVK1Hqh7KqG8UkckTTRrMcCRoIAwCUJ4MN1TgbY/UuhE2dNhEy1Sl1+d9Cbw== From: Herve Codina To: Andy Shevchenko , Simon Horman , Herve Codina , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Arnd Bergmann , UNGLinuxDriver@microchip.com, Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni , =?utf-8?b?Q2zDqW1lbnQgTMOp?= =?utf-8?b?Z2Vy?= Subject: [PATCH v3 5/7] reset: mchp: sparx5: set the dev member of the reset controller Date: Thu, 27 Jun 2024 11:11:34 +0200 Message-ID: <20240627091137.370572-6-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240627091137.370572-1-herve.codina@bootlin.com> References: <20240627091137.370572-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com From: Clément Léger In order to guarantee the device will not be deleted by the reset controller consumer, set the dev member of the reset controller. Signed-off-by: Clément Léger Signed-off-by: Herve Codina --- drivers/reset/reset-microchip-sparx5.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/reset/reset-microchip-sparx5.c b/drivers/reset/reset-microchip-sparx5.c index c4fe65291a43..1ef2aa1602e3 100644 --- a/drivers/reset/reset-microchip-sparx5.c +++ b/drivers/reset/reset-microchip-sparx5.c @@ -117,6 +117,7 @@ static int mchp_sparx5_reset_probe(struct platform_device *pdev) return err; ctx->rcdev.owner = THIS_MODULE; + ctx->rcdev.dev = &pdev->dev; ctx->rcdev.nr_resets = 1; ctx->rcdev.ops = &sparx5_reset_ops; ctx->rcdev.of_node = dn; From patchwork Thu Jun 27 09:11:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13714022 X-Patchwork-Delegate: bhelgaas@google.com Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BD97713E029; Thu, 27 Jun 2024 09:12:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479545; cv=none; b=emMl1cDq7Q1pEvf8NhEyEor7QNaIExEg+/QroE9zjXrMV/aCdZA8oi0iPKGZYfhvEsWg83NFoETW6+1Mzhn4LeoKpr4o0zqfmuc795L0qWzmNa7n+F5lTysWGmjvxt3G+VVCGCaZTZ1vzX+LGhUSYgTA863hoivMGRJ6BSknyyU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719479545; c=relaxed/simple; bh=T3vFFEExt0+eWefCZWe6Sh/ZeIMcSkU/F1VGqUEN/Cc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=joWq4RHlK3cvLUUe8DqMukrPsexI7K+OMyMTyJmAKmFn0xXhGnMgGN7Hq7rfuPAjLlThZO8+CPX69exusrwPgYLz2449XxsDH40HwBaRmd+70poys0WBIMsYu62Hi4zQQtXa5eUaDvvMM5JBIgN/DKffc596nPxsf3E7fLQ1Ws4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=ncn/IM3v; arc=none smtp.client-ip=217.70.183.200 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="ncn/IM3v" Received: by mail.gandi.net (Postfix) with ESMTPA id BFE292000B; Thu, 27 Jun 2024 09:12:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1719479541; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1C1/D41Z0TBh69OsY6Ys8+EWbQgV5+BWi99TKfNz9xA=; b=ncn/IM3vGRmn1/vn5NiGtPRsiua7UaqumLrdVvbWOf8hCY+HB2jBnFo/J3rfDgCJ5H5Joi oyvpJqF5EvoFEEKhAwyZXvqxb1kIai0Das5sdAnjgYgmeAOAxDcXL2vXi2XBjg1ybADvIB qRZIY/2EjcENrhTiH7NPPvNomjqMeENNS+GFnpweu01VQuYz7yyGFGfqcqSIMpaLmxkte3 pV/MUo5lnuApUFjR4pbQY6uGIjTdw3yCpel4Stt9DWYVH4TUO/LLDPemDINwXuQ0dKu3k8 3Wk+QjJKIH3jsclOXxMKXiuEeLeAGRDw/WR5cTktyLOiRCaARN8ujC7mWC/ORQ== From: Herve Codina To: Andy Shevchenko , Simon Horman , Herve Codina , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Arnd Bergmann , UNGLinuxDriver@microchip.com, Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH v3 6/7] mfd: Add support for LAN966x PCI device Date: Thu, 27 Jun 2024 11:11:35 +0200 Message-ID: <20240627091137.370572-7-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240627091137.370572-1-herve.codina@bootlin.com> References: <20240627091137.370572-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com Add a PCI driver that handles the LAN966x PCI device using a device-tree overlay. This overlay is applied to the PCI device DT node and allows to describe components that are present in the device. The memory from the device-tree is remapped to the BAR memory thanks to "ranges" properties computed at runtime by the PCI core during the PCI enumeration. The PCI device itself acts as an interrupt controller and is used as the parent of the internal LAN966x interrupt controller to route the interrupts to the assigned PCI INTx interrupt. Signed-off-by: Herve Codina --- drivers/mfd/Kconfig | 24 ++++ drivers/mfd/Makefile | 4 + drivers/mfd/lan966x_pci.c | 229 +++++++++++++++++++++++++++++++++++ drivers/mfd/lan966x_pci.dtso | 167 +++++++++++++++++++++++++ drivers/pci/quirks.c | 1 + 5 files changed, 425 insertions(+) create mode 100644 drivers/mfd/lan966x_pci.c create mode 100644 drivers/mfd/lan966x_pci.dtso diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 266b4f54af60..15db144bc09b 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -144,6 +144,30 @@ config MFD_ATMEL_FLEXCOM by the probe function of this MFD driver according to a device tree property. +config MFD_LAN966X_PCI + tristate "Microchip LAN966x PCIe Support" + depends on PCI + select OF + select OF_OVERLAY + select IRQ_DOMAIN + help + This enables the support for the LAN966x PCIe device. + This is used to drive the LAN966x PCIe device from the host system + to which it is connected. + + This driver uses an overlay to load other drivers to support for + LAN966x internal components. + Even if this driver does not depend on these other drivers, in order + to have a fully functional board, the following drivers are needed: + - fixed-clock (COMMON_CLK) + - lan966x-oic (LAN966X_OIC) + - lan966x-cpu-syscon (MFD_SYSCON) + - lan966x-switch-reset (RESET_MCHP_SPARX5) + - lan966x-pinctrl (PINCTRL_OCELOT) + - lan966x-serdes (PHY_LAN966X_SERDES) + - lan966x-miim (MDIO_MSCC_MIIM) + - lan966x-switch (LAN966X_SWITCH) + config MFD_ATMEL_HLCDC tristate "Atmel HLCDC (High-end LCD Controller)" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index c66f07edcd0e..165a9674ff48 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -284,3 +284,7 @@ rsmu-i2c-objs := rsmu_core.o rsmu_i2c.o rsmu-spi-objs := rsmu_core.o rsmu_spi.o obj-$(CONFIG_MFD_RSMU_I2C) += rsmu-i2c.o obj-$(CONFIG_MFD_RSMU_SPI) += rsmu-spi.o + +lan966x-pci-objs := lan966x_pci.o +lan966x-pci-objs += lan966x_pci.dtbo.o +obj-$(CONFIG_MFD_LAN966X_PCI) += lan966x-pci.o diff --git a/drivers/mfd/lan966x_pci.c b/drivers/mfd/lan966x_pci.c new file mode 100644 index 000000000000..c69350449b15 --- /dev/null +++ b/drivers/mfd/lan966x_pci.c @@ -0,0 +1,229 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Microchip LAN966x PCI driver + * + * Copyright (c) 2024 Microchip Technology Inc. and its subsidiaries. + * + * Authors: + * Clément Léger + * Hervé Codina + */ + +#include +#include +#include +#include +#include +#include +#include + +/* Embedded dtbo symbols created by cmd_wrap_S_dtb in scripts/Makefile.lib */ +extern char __dtbo_lan966x_pci_begin[]; +extern char __dtbo_lan966x_pci_end[]; + +struct pci_dev_intr_ctrl { + struct pci_dev *pci_dev; + struct irq_domain *irq_domain; + int irq; +}; + +static int pci_dev_irq_domain_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw) +{ + irq_set_chip_and_handler(virq, &dummy_irq_chip, handle_simple_irq); + return 0; +} + +static const struct irq_domain_ops pci_dev_irq_domain_ops = { + .map = pci_dev_irq_domain_map, + .xlate = irq_domain_xlate_onecell, +}; + +static irqreturn_t pci_dev_irq_handler(int irq, void *data) +{ + struct pci_dev_intr_ctrl *intr_ctrl = data; + int ret; + + ret = generic_handle_domain_irq(intr_ctrl->irq_domain, 0); + return IRQ_RETVAL(!ret); +} + +static struct pci_dev_intr_ctrl *pci_dev_create_intr_ctrl(struct pci_dev *pdev) +{ + struct pci_dev_intr_ctrl *intr_ctrl; + struct fwnode_handle *fwnode; + int ret; + + if (!pdev->irq) + return ERR_PTR(-EOPNOTSUPP); + + fwnode = dev_fwnode(&pdev->dev); + if (!fwnode) + return ERR_PTR(-ENODEV); + + intr_ctrl = kmalloc(sizeof(*intr_ctrl), GFP_KERNEL); + if (!intr_ctrl) + return ERR_PTR(-ENOMEM); + + intr_ctrl->pci_dev = pdev; + + intr_ctrl->irq_domain = irq_domain_create_linear(fwnode, 1, &pci_dev_irq_domain_ops, + intr_ctrl); + if (!intr_ctrl->irq_domain) { + pci_err(pdev, "Failed to create irqdomain\n"); + ret = -ENOMEM; + goto err_free_intr_ctrl; + } + + ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_INTX); + if (ret < 0) { + pci_err(pdev, "Unable alloc irq vector (%d)\n", ret); + goto err_remove_domain; + } + intr_ctrl->irq = pci_irq_vector(pdev, 0); + ret = request_irq(intr_ctrl->irq, pci_dev_irq_handler, IRQF_SHARED, + dev_name(&pdev->dev), intr_ctrl); + if (ret) { + pci_err(pdev, "Unable to request irq %d (%d)\n", intr_ctrl->irq, ret); + goto err_free_irq_vector; + } + + return intr_ctrl; + +err_free_irq_vector: + pci_free_irq_vectors(pdev); +err_remove_domain: + irq_domain_remove(intr_ctrl->irq_domain); +err_free_intr_ctrl: + kfree(intr_ctrl); + return ERR_PTR(ret); +} + +static void pci_dev_remove_intr_ctrl(struct pci_dev_intr_ctrl *intr_ctrl) +{ + free_irq(intr_ctrl->irq, intr_ctrl); + pci_free_irq_vectors(intr_ctrl->pci_dev); + irq_dispose_mapping(irq_find_mapping(intr_ctrl->irq_domain, 0)); + irq_domain_remove(intr_ctrl->irq_domain); + kfree(intr_ctrl); +} + +static void devm_pci_dev_remove_intr_ctrl(void *data) +{ + struct pci_dev_intr_ctrl *intr_ctrl = data; + + pci_dev_remove_intr_ctrl(intr_ctrl); +} + +static int devm_pci_dev_create_intr_ctrl(struct pci_dev *pdev) +{ + struct pci_dev_intr_ctrl *intr_ctrl; + + intr_ctrl = pci_dev_create_intr_ctrl(pdev); + if (IS_ERR(intr_ctrl)) + return PTR_ERR(intr_ctrl); + + return devm_add_action_or_reset(&pdev->dev, devm_pci_dev_remove_intr_ctrl, intr_ctrl); +} + +struct lan966x_pci { + struct device *dev; + int ovcs_id; +}; + +static int lan966x_pci_load_overlay(struct lan966x_pci *data) +{ + u32 dtbo_size = __dtbo_lan966x_pci_end - __dtbo_lan966x_pci_begin; + void *dtbo_start = __dtbo_lan966x_pci_begin; + int ret; + + ret = of_overlay_fdt_apply(dtbo_start, dtbo_size, &data->ovcs_id, dev_of_node(data->dev)); + if (ret) + return ret; + + return 0; +} + +static void lan966x_pci_unload_overlay(struct lan966x_pci *data) +{ + of_overlay_remove(&data->ovcs_id); +} + +static int lan966x_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) +{ + struct device *dev = &pdev->dev; + struct lan966x_pci *data; + int ret; + + /* + * On ACPI system, fwnode can point to the ACPI node. + * This driver needs an of_node to be used as the device-tree overlay + * target. This of_node should be set by the PCI core if it succeeds in + * creating it (CONFIG_PCI_DYNAMIC_OF_NODES feature). + * Check here for the validity of this of_node. + */ + if (!dev_of_node(dev)) { + dev_err(dev, "Missing of_node for device\n"); + return -EINVAL; + } + + /* Need to be done before devm_pci_dev_create_intr_ctrl. + * It allocates an IRQ and so pdev->irq is updated. + */ + ret = pcim_enable_device(pdev); + if (ret) + return ret; + + ret = devm_pci_dev_create_intr_ctrl(pdev); + if (ret) + return ret; + + data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + pci_set_drvdata(pdev, data); + data->dev = dev; + + ret = lan966x_pci_load_overlay(data); + if (ret) + return ret; + + pci_set_master(pdev); + + ret = of_platform_default_populate(dev_of_node(dev), NULL, dev); + if (ret) + goto err_unload_overlay; + + return 0; + +err_unload_overlay: + lan966x_pci_unload_overlay(data); + return ret; +} + +static void lan966x_pci_remove(struct pci_dev *pdev) +{ + struct lan966x_pci *data = pci_get_drvdata(pdev); + + of_platform_depopulate(data->dev); + + lan966x_pci_unload_overlay(data); +} + +static struct pci_device_id lan966x_pci_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_EFAR, 0x9660) }, + { } +}; +MODULE_DEVICE_TABLE(pci, lan966x_pci_ids); + +static struct pci_driver lan966x_pci_driver = { + .name = "mchp_lan966x_pci", + .id_table = lan966x_pci_ids, + .probe = lan966x_pci_probe, + .remove = lan966x_pci_remove, +}; +module_pci_driver(lan966x_pci_driver); + +MODULE_AUTHOR("Herve Codina "); +MODULE_DESCRIPTION("Microchip LAN966x PCI driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mfd/lan966x_pci.dtso b/drivers/mfd/lan966x_pci.dtso new file mode 100644 index 000000000000..041f4319e4cd --- /dev/null +++ b/drivers/mfd/lan966x_pci.dtso @@ -0,0 +1,167 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Microchip UNG + */ + +#include +#include +#include +#include +#include + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target-path=""; + __overlay__ { + #address-cells = <3>; + #size-cells = <2>; + + pci-ep-bus@0 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + /* + * map @0xe2000000 (32MB) to BAR0 (CPU) + * map @0xe0000000 (16MB) to BAR1 (AMBA) + */ + ranges = <0xe2000000 0x00 0x00 0x00 0x2000000 + 0xe0000000 0x01 0x00 0x00 0x1000000>; + + oic: oic@e00c0120 { + compatible = "microchip,lan966x-oic"; + #interrupt-cells = <2>; + interrupt-controller; + interrupts = <0>; /* PCI INTx assigned interrupt */ + reg = <0xe00c0120 0x190>; + }; + + cpu_clk: cpu_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <600000000>; // CPU clock = 600MHz + }; + + ddr_clk: ddr_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <30000000>; // Fabric clock = 30MHz + }; + + sys_clk: sys_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <15625000>; // System clock = 15.625MHz + }; + + cpu_ctrl: syscon@e00c0000 { + compatible = "microchip,lan966x-cpu-syscon", "syscon"; + reg = <0xe00c0000 0xa8>; + }; + + reset: reset@e200400c { + compatible = "microchip,lan966x-switch-reset"; + reg = <0xe200400c 0x4>; + reg-names = "gcb"; + #reset-cells = <1>; + cpu-syscon = <&cpu_ctrl>; + }; + + gpio: pinctrl@e2004064 { + compatible = "microchip,lan966x-pinctrl"; + reg = <0xe2004064 0xb4>, + <0xe2010024 0x138>; + resets = <&reset 0>; + reset-names = "switch"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&gpio 0 0 78>; + interrupt-parent = <&oic>; + interrupt-controller; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + #interrupt-cells = <2>; + + tod_pins: tod_pins { + pins = "GPIO_36"; + function = "ptpsync_1"; + }; + + fc0_a_pins: fcb4-i2c-pins { + /* RXD, TXD */ + pins = "GPIO_9", "GPIO_10"; + function = "fc0_a"; + }; + + }; + + serdes: serdes@e202c000 { + compatible = "microchip,lan966x-serdes"; + reg = <0xe202c000 0x9c>, + <0xe2004010 0x4>; + #phy-cells = <2>; + }; + + mdio1: mdio@e200413c { + #address-cells = <1>; + #size-cells = <0>; + compatible = "microchip,lan966x-miim"; + reg = <0xe200413c 0x24>, + <0xe2010020 0x4>; + + resets = <&reset 0>; + reset-names = "switch"; + + lan966x_phy0: ethernet-lan966x_phy@1 { + reg = <1>; + }; + + lan966x_phy1: ethernet-lan966x_phy@2 { + reg = <2>; + }; + }; + + switch: switch@e0000000 { + compatible = "microchip,lan966x-switch"; + reg = <0xe0000000 0x0100000>, + <0xe2000000 0x0800000>; + reg-names = "cpu", "gcb"; + + interrupt-parent = <&oic>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, + <9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "xtr", "ana"; + + resets = <&reset 0>; + reset-names = "switch"; + + pinctrl-names = "default"; + pinctrl-0 = <&tod_pins>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + port0: port@0 { + phy-handle = <&lan966x_phy0>; + + reg = <0>; + phy-mode = "gmii"; + phys = <&serdes 0 CU(0)>; + }; + + port1: port@1 { + phy-handle = <&lan966x_phy1>; + + reg = <1>; + phy-mode = "gmii"; + phys = <&serdes 1 CU(1)>; + }; + }; + }; + }; + }; + }; +}; diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 568410e64ce6..30b64994784c 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -6241,6 +6241,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xa76e, dpc_log_size); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5020, of_pci_make_dev_node); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5021, of_pci_make_dev_node); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_REDHAT, 0x0005, of_pci_make_dev_node); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_EFAR, 0x9660, of_pci_make_dev_node); /* * Devices known to require a longer delay before first config space access From patchwork Thu Jun 27 09:11:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 13714023 X-Patchwork-Delegate: bhelgaas@google.com Received: from relay7-d.mail.gandi.net (relay7-d.mail.gandi.net [217.70.183.200]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BE821411EE; Thu, 27 Jun 2024 09:12:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.200 ARC-Seal: i=1; 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spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="cuGm4i9F" Received: by mail.gandi.net (Postfix) with ESMTPA id 3DC5620002; Thu, 27 Jun 2024 09:12:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1719479542; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=S5EWnWVm8Boacgm88RxHxweJ58Kbq8GGMqtCde3uKZI=; b=cuGm4i9FdV0sht3lBmtqJjNqJuzHBROL0Oqt4/NWUQRHmcWJ5lWDug7PWkPwxdfrLV41fF 7ErFCO9TkR+SnLIeZ0kU5JqT9aVUC7GZtGdQapA7wkTVsZblla4AXmtt8tbEgJGiwQf6PA A/vVnnfexU9TQ/PHU3EMjDkfgSh4LWit382UOIY4h4gnyIMV9ob1zOzILI9mTy/ZO4heks BCmVHfPlarK+8wBVyNY2JpB2q7fwPmOeTGgH91AJNNTqWEywe1GJD2SZufX8yQhBxUd5RS CGWqikGOU9cO+ddHrTPjgc+CzQzlJxLMF8H4xsjkp7MKNQnFJombwu3IkGrFmg== From: Herve Codina To: Andy Shevchenko , Simon Horman , Herve Codina , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Arnd Bergmann , UNGLinuxDriver@microchip.com, Saravana Kannan , Bjorn Helgaas , Philipp Zabel , Lars Povlsen , Steen Hegelund , Daniel Machon Cc: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Horatiu Vultur , Andrew Lunn , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Allan Nielsen , Steen Hegelund , Luca Ceresoli , Thomas Petazzoni Subject: [PATCH v3 7/7] MAINTAINERS: Add the Microchip LAN966x PCI driver entry Date: Thu, 27 Jun 2024 11:11:36 +0200 Message-ID: <20240627091137.370572-8-herve.codina@bootlin.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240627091137.370572-1-herve.codina@bootlin.com> References: <20240627091137.370572-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-GND-Sasl: herve.codina@bootlin.com After contributing the driver, add myself as the maintainer for the Microchip LAN966x PCI driver. Signed-off-by: Herve Codina --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index baeb307344cd..c84ec27ccbe4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14733,6 +14733,12 @@ S: Maintained F: Documentation/devicetree/bindings/interrupt-controller/microchip,lan966x-oic.yaml F: drivers/irqchip/irq-lan966x-oic.c +MICROCHIP LAN966X PCI DRIVER +M: Herve Codina +S: Maintained +F: drivers/mfd/lan966x_pci.c +F: drivers/mfd/lan966x_pci.dtso + MICROCHIP LCDFB DRIVER M: Nicolas Ferre L: linux-fbdev@vger.kernel.org