From patchwork Fri Jun 28 08:55:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Liu X-Patchwork-Id: 13715725 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33ED514EC7D for ; Fri, 28 Jun 2024 08:55:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719564945; cv=none; b=EJFpzrp/0yDkD+hDYiapHeBU1zRhKReUqSpTyAh4+KaFB2Z7tcAt0vkWr6zAJyElNjLR23sGH/R/w6pJOFDNXqczwBGz6hyL4TQVCkJChaeEysBeBjvPC6/hymVV3V1ihuFjJro/juVzuaR5F9mkTb5vQpfOB5iFEN8Qtb+0bdA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1719564945; c=relaxed/simple; bh=6SS7Fb39DoNB5c9cj+YJNOms5HfGgM/fpHR5MkoWBYA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dpr1kql9VC58ByvPBZS9aBchhA/qWZI/x6yP5XTchx/rPnQujMWofZ9S+wUzJ8+1PrkqtUQgapcvxrLI6TmnyJHkMVDjQL0y/mWGtz8zv886trBJ6sjQpae3DODcvbucyYJfk+eeLk0E2e9KJTni2XNUfWMo+zLy7IVe0Ywsqik= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=bM8dSKnm; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="bM8dSKnm" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719564942; x=1751100942; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6SS7Fb39DoNB5c9cj+YJNOms5HfGgM/fpHR5MkoWBYA=; b=bM8dSKnmHzMO1HpQ5N72y0tsBUO9d7Mxale6txItSMtus9xbuTNsfH6e YKuKM5lVKFBHN74MCYtv8FBv7JBrfG0nKk5YO+4wYFnfatNlDUnmN5pAG 5NRxBNTLprwNHfsA1rHjvDWKgtiyV854GYPiZLkNcxJPYxCeVvKlFPRIp 2k5VnBrg5Y4yhZ25QjAOXTjCyFVgKzR2NiQycaTQziPOC1p2zPBWW3+c1 QR+vopku9vBbaXvgcUWHiQBoIckHi7ee88j8GCBisp3jSPb6HZINnDiUK nO5TNcSW0HXIXdH4X7cA5RKuNApK2c9ndpGlzsmhTtIZTLMnd8dsRHRCK g==; X-CSE-ConnectionGUID: LdrTeElwSF26qUPEwIF2rQ== X-CSE-MsgGUID: ppVj+eOMQgu2o5TIlTQPjQ== X-IronPort-AV: E=McAfee;i="6700,10204,11116"; a="34277477" X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="34277477" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2024 01:55:40 -0700 X-CSE-ConnectionGUID: P+Wo46d6QluCwUdnJRSucA== X-CSE-MsgGUID: 6QQsMQ1xRdKz7ltd1PGmsQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="44584524" Received: from 984fee00a4c6.jf.intel.com ([10.165.58.231]) by orviesa010.jf.intel.com with ESMTP; 28 Jun 2024 01:55:41 -0700 From: Yi Liu To: joro@8bytes.org, jgg@nvidia.com, kevin.tian@intel.com, baolu.lu@linux.intel.com Cc: alex.williamson@redhat.com, robin.murphy@arm.com, eric.auger@redhat.com, nicolinc@nvidia.com, kvm@vger.kernel.org, chao.p.peng@linux.intel.com, yi.l.liu@intel.com, iommu@lists.linux.dev Subject: [PATCH 1/6] iommu: Pass old domain to set_dev_pasid op Date: Fri, 28 Jun 2024 01:55:33 -0700 Message-Id: <20240628085538.47049-2-yi.l.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240628085538.47049-1-yi.l.liu@intel.com> References: <20240628085538.47049-1-yi.l.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 To support domain replacement for pasid, the underlying iommu driver needs to know the old domain hence be able to clean up the existing attachment. It would be much convenient for iommu layer to pass down the old domain. Otherwise, iommu drivers would need to track domain for pasids by themselves, this would duplicate code among the iommu drivers. Or iommu drivers would rely group->pasid_array to get domain, which may not always the correct one. Suggested-by: Jason Gunthorpe Signed-off-by: Yi Liu --- drivers/iommu/amd/amd_iommu.h | 3 ++- drivers/iommu/amd/pasid.c | 3 ++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 3 ++- drivers/iommu/intel/iommu.c | 6 ++++-- drivers/iommu/intel/svm.c | 3 ++- drivers/iommu/iommu.c | 3 ++- include/linux/iommu.h | 2 +- 7 files changed, 15 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h index 2fde1302a584..31141c6bdf54 100644 --- a/drivers/iommu/amd/amd_iommu.h +++ b/drivers/iommu/amd/amd_iommu.h @@ -51,7 +51,8 @@ struct iommu_domain *amd_iommu_domain_alloc_sva(struct device *dev, struct mm_struct *mm); void amd_iommu_domain_free(struct iommu_domain *dom); int iommu_sva_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid); + struct device *dev, ioasid_t pasid, + struct iommu_domain *old); void amd_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid, struct iommu_domain *domain); diff --git a/drivers/iommu/amd/pasid.c b/drivers/iommu/amd/pasid.c index a68215f2b3e1..77bf5f5f947a 100644 --- a/drivers/iommu/amd/pasid.c +++ b/drivers/iommu/amd/pasid.c @@ -100,7 +100,8 @@ static const struct mmu_notifier_ops sva_mn = { }; int iommu_sva_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid) + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) { struct pdom_dev_data *pdom_dev_data; struct protection_domain *sva_pdom = to_pdomain(domain); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index e490ffb38015..c058949749cb 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -631,7 +631,8 @@ void arm_smmu_sva_remove_dev_pasid(struct iommu_domain *domain, } static int arm_smmu_sva_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t id) + struct device *dev, ioasid_t id, + struct iommu_domain *old) { int ret = 0; struct mm_struct *mm = domain->mm; diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 129e5b685762..288c929b3d15 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4065,7 +4065,8 @@ static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid, } static int intel_iommu_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid) + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct dmar_domain *dmar_domain = to_dmar_domain(domain); @@ -4352,7 +4353,8 @@ static int identity_domain_attach_dev(struct iommu_domain *domain, } static int identity_domain_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid) + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct intel_iommu *iommu = info->iommu; diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index ef12e95e400a..a5845ca94867 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -194,7 +194,8 @@ static const struct mmu_notifier_ops intel_mmuops = { }; static int intel_svm_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid) + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct dmar_domain *dmar_domain = to_dmar_domain(domain); diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 8212fed27e18..b3a1dabed2dd 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -3274,7 +3274,8 @@ static int __iommu_set_group_pasid(struct iommu_domain *domain, int ret; for_each_group_device(group, device) { - ret = domain->ops->set_dev_pasid(domain, device->dev, pasid); + ret = domain->ops->set_dev_pasid(domain, device->dev, + pasid, NULL); if (ret) goto err_revert; } diff --git a/include/linux/iommu.h b/include/linux/iommu.h index bff6e7e81fa3..a33f53aab61b 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -633,7 +633,7 @@ struct iommu_ops { struct iommu_domain_ops { int (*attach_dev)(struct iommu_domain *domain, struct device *dev); int (*set_dev_pasid)(struct iommu_domain *domain, struct device *dev, - ioasid_t pasid); + ioasid_t pasid, struct iommu_domain *old); int (*map_pages)(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t pgsize, size_t pgcount, From patchwork Fri Jun 28 08:55:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Liu X-Patchwork-Id: 13715724 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A02414EC7F for ; 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a="34277486" X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="34277486" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2024 01:55:41 -0700 X-CSE-ConnectionGUID: 2JMLgg2XQ4GMg/mlYwcmjg== X-CSE-MsgGUID: bIIgfXWaRpyt4seEX/VUiw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="44584529" Received: from 984fee00a4c6.jf.intel.com ([10.165.58.231]) by orviesa010.jf.intel.com with ESMTP; 28 Jun 2024 01:55:42 -0700 From: Yi Liu To: joro@8bytes.org, jgg@nvidia.com, kevin.tian@intel.com, baolu.lu@linux.intel.com Cc: alex.williamson@redhat.com, robin.murphy@arm.com, eric.auger@redhat.com, nicolinc@nvidia.com, kvm@vger.kernel.org, chao.p.peng@linux.intel.com, yi.l.liu@intel.com, iommu@lists.linux.dev Subject: [PATCH 2/6] iommu/vt-d: Move intel_drain_pasid_prq() into intel_pasid_tear_down_entry() Date: Fri, 28 Jun 2024 01:55:34 -0700 Message-Id: <20240628085538.47049-3-yi.l.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240628085538.47049-1-yi.l.liu@intel.com> References: <20240628085538.47049-1-yi.l.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Draining PRQ is needed before repurposing a PASID. It makes sense to invoke it in the intel_pasid_tear_down_entry(). Signed-off-by: Yi Liu --- drivers/iommu/intel/iommu.c | 5 ++--- drivers/iommu/intel/pasid.c | 9 ++++++++- drivers/iommu/intel/pasid.h | 5 ++--- drivers/iommu/intel/svm.c | 6 +++++- 4 files changed, 17 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 288c929b3d15..dd3de95c7122 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -3241,7 +3241,7 @@ void device_block_translation(struct device *dev) if (!dev_is_real_dma_subdevice(dev)) { if (sm_supported(iommu)) intel_pasid_tear_down_entry(iommu, dev, - IOMMU_NO_PASID, false); + IOMMU_NO_PASID, false, false); else domain_context_clear(info); } @@ -4060,8 +4060,7 @@ static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid, intel_iommu_debugfs_remove_dev_pasid(dev_pasid); kfree(dev_pasid); out_tear_down: - intel_pasid_tear_down_entry(iommu, dev, pasid, false); - intel_drain_pasid_prq(dev, pasid); + intel_pasid_tear_down_entry(iommu, dev, pasid, false, true); } static int intel_iommu_set_dev_pasid(struct iommu_domain *domain, diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index 573e1b8e3cfb..b18eebb479de 100644 --- a/drivers/iommu/intel/pasid.c +++ b/drivers/iommu/intel/pasid.c @@ -233,8 +233,12 @@ devtlb_invalidation_with_pasid(struct intel_iommu *iommu, qi_flush_dev_iotlb_pasid(iommu, sid, pfsid, pasid, qdep, 0, 64 - VTD_PAGE_SHIFT); } +/* + * Not all PASID entry destroy requires PRQ drain as it can be handled in + * the remove_dev_pasid path. Caller should be clear on it. + */ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev, - u32 pasid, bool fault_ignore) + u32 pasid, bool fault_ignore, bool drain_prq) { struct pasid_entry *pte; u16 did, pgtt; @@ -264,6 +268,9 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev, /* Device IOTLB doesn't need to be flushed in caching mode. */ if (!cap_caching_mode(iommu->cap)) devtlb_invalidation_with_pasid(iommu, dev, pasid); + + if (drain_prq) + intel_drain_pasid_prq(dev, pasid); } /* diff --git a/drivers/iommu/intel/pasid.h b/drivers/iommu/intel/pasid.h index da9978fef7ac..8b77b0d21c6e 100644 --- a/drivers/iommu/intel/pasid.h +++ b/drivers/iommu/intel/pasid.h @@ -313,9 +313,8 @@ int intel_pasid_setup_pass_through(struct intel_iommu *iommu, struct device *dev, u32 pasid); int intel_pasid_setup_nested(struct intel_iommu *iommu, struct device *dev, u32 pasid, struct dmar_domain *domain); -void intel_pasid_tear_down_entry(struct intel_iommu *iommu, - struct device *dev, u32 pasid, - bool fault_ignore); +void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev, + u32 pasid, bool fault_ignore, bool drain_prq); void intel_pasid_setup_page_snoop_control(struct intel_iommu *iommu, struct device *dev, u32 pasid); int intel_pasid_setup_sm_context(struct device *dev); diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index a5845ca94867..679e094d9f52 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -175,8 +175,12 @@ static void intel_mm_release(struct mmu_notifier *mn, struct mm_struct *mm) spin_lock_irqsave(&domain->lock, flags); list_for_each_entry(dev_pasid, &domain->dev_pasids, link_domain) { info = dev_iommu_priv_get(dev_pasid->dev); + /* + * PRQ drain would happen in the remove_dev_pasid() path, + * no need to do it here. + */ intel_pasid_tear_down_entry(info->iommu, dev_pasid->dev, - dev_pasid->pasid, true); + dev_pasid->pasid, true, false); } spin_unlock_irqrestore(&domain->lock, flags); From patchwork Fri Jun 28 08:55:35 2024 Content-Type: text/plain; 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X-CSE-ConnectionGUID: OzUAF3TsQXKDnaqBrF5OPA== X-CSE-MsgGUID: 9aCk013rS8Guf0sxLr4P4g== X-IronPort-AV: E=McAfee;i="6700,10204,11116"; a="34277496" X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="34277496" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2024 01:55:42 -0700 X-CSE-ConnectionGUID: 9X7rN3uDT0i19Qd4iS83Kg== X-CSE-MsgGUID: edarF2NlR62RyXUgx2aPDA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="44584533" Received: from 984fee00a4c6.jf.intel.com ([10.165.58.231]) by orviesa010.jf.intel.com with ESMTP; 28 Jun 2024 01:55:43 -0700 From: Yi Liu To: joro@8bytes.org, jgg@nvidia.com, kevin.tian@intel.com, baolu.lu@linux.intel.com Cc: alex.williamson@redhat.com, robin.murphy@arm.com, eric.auger@redhat.com, nicolinc@nvidia.com, kvm@vger.kernel.org, chao.p.peng@linux.intel.com, yi.l.liu@intel.com, iommu@lists.linux.dev Subject: [PATCH 3/6] iommu/vt-d: Make helpers support modifying present pasid entry Date: Fri, 28 Jun 2024 01:55:35 -0700 Message-Id: <20240628085538.47049-4-yi.l.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240628085538.47049-1-yi.l.liu@intel.com> References: <20240628085538.47049-1-yi.l.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 To handle domain replacement, set_dev_pasid op needs to modify a present pasid entry. One way is sharing the most logics of remove_dev_pasid() in the beginning of set_dev_pasid() to remove the old config. But this means the set_dev_pasid path needs to rollback to the old config if it fails to set up the new pasid entry. This needs to invoke the set_dev_pasid op of the old domain. It breaks the iommu layering a bit. Another way is implementing the set_dev_pasid() without rollback to old hardware config. This can be achieved by implementing it in the order of preparing the dev_pasid info for the new domain, modify the pasid entry, then undo the dev_pasid info of the old domain, and if failed, undo the dev_pasid info of the new domain. This would keep the old domain unchanged. Following the second way, needs to make the pasid entry set up helpers support modifying present pasid entry. Signed-off-by: Yi Liu --- drivers/iommu/intel/pasid.c | 37 ++++++++++++------------------------- 1 file changed, 12 insertions(+), 25 deletions(-) diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index b18eebb479de..5d3a12b081a2 100644 --- a/drivers/iommu/intel/pasid.c +++ b/drivers/iommu/intel/pasid.c @@ -314,6 +314,9 @@ int intel_pasid_setup_first_level(struct intel_iommu *iommu, return -EINVAL; } + /* Clear the old configuration if it already exists */ + intel_pasid_tear_down_entry(iommu, dev, pasid, false, true); + spin_lock(&iommu->lock); pte = intel_pasid_get_entry(dev, pasid); if (!pte) { @@ -321,13 +324,6 @@ int intel_pasid_setup_first_level(struct intel_iommu *iommu, return -ENODEV; } - if (pasid_pte_is_present(pte)) { - spin_unlock(&iommu->lock); - return -EBUSY; - } - - pasid_clear_entry(pte); - /* Setup the first level page table pointer: */ pasid_set_flptr(pte, (u64)__pa(pgd)); @@ -378,6 +374,9 @@ int intel_pasid_setup_second_level(struct intel_iommu *iommu, pgd_val = virt_to_phys(pgd); did = domain_id_iommu(domain, iommu); + /* Clear the old configuration if it already exists */ + intel_pasid_tear_down_entry(iommu, dev, pasid, false, true); + spin_lock(&iommu->lock); pte = intel_pasid_get_entry(dev, pasid); if (!pte) { @@ -385,12 +384,6 @@ int intel_pasid_setup_second_level(struct intel_iommu *iommu, return -ENODEV; } - if (pasid_pte_is_present(pte)) { - spin_unlock(&iommu->lock); - return -EBUSY; - } - - pasid_clear_entry(pte); pasid_set_domain_id(pte, did); pasid_set_slptr(pte, pgd_val); pasid_set_address_width(pte, domain->agaw); @@ -488,6 +481,9 @@ int intel_pasid_setup_pass_through(struct intel_iommu *iommu, u16 did = FLPT_DEFAULT_DID; struct pasid_entry *pte; + /* Clear the old configuration if it already exists */ + intel_pasid_tear_down_entry(iommu, dev, pasid, false, true); + spin_lock(&iommu->lock); pte = intel_pasid_get_entry(dev, pasid); if (!pte) { @@ -495,12 +491,6 @@ int intel_pasid_setup_pass_through(struct intel_iommu *iommu, return -ENODEV; } - if (pasid_pte_is_present(pte)) { - spin_unlock(&iommu->lock); - return -EBUSY; - } - - pasid_clear_entry(pte); pasid_set_domain_id(pte, did); pasid_set_address_width(pte, iommu->agaw); pasid_set_translation_type(pte, PASID_ENTRY_PGTT_PT); @@ -606,18 +596,15 @@ int intel_pasid_setup_nested(struct intel_iommu *iommu, struct device *dev, return -EINVAL; } + /* Clear the old configuration if it already exists */ + intel_pasid_tear_down_entry(iommu, dev, pasid, false, true); + spin_lock(&iommu->lock); pte = intel_pasid_get_entry(dev, pasid); if (!pte) { spin_unlock(&iommu->lock); return -ENODEV; } - if (pasid_pte_is_present(pte)) { - spin_unlock(&iommu->lock); - return -EBUSY; - } - - pasid_clear_entry(pte); if (s1_cfg->addr_width == ADDR_WIDTH_5LEVEL) pasid_set_flpm(pte, 1); From patchwork Fri Jun 28 08:55:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Liu X-Patchwork-Id: 13715727 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 45C3214F133 for ; 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a="34277502" X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="34277502" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2024 01:55:43 -0700 X-CSE-ConnectionGUID: 6JCx95Q2SH+ScP09XFc60w== X-CSE-MsgGUID: DTZjjOoUThmkynfC67ibFw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="44584538" Received: from 984fee00a4c6.jf.intel.com ([10.165.58.231]) by orviesa010.jf.intel.com with ESMTP; 28 Jun 2024 01:55:44 -0700 From: Yi Liu To: joro@8bytes.org, jgg@nvidia.com, kevin.tian@intel.com, baolu.lu@linux.intel.com Cc: alex.williamson@redhat.com, robin.murphy@arm.com, eric.auger@redhat.com, nicolinc@nvidia.com, kvm@vger.kernel.org, chao.p.peng@linux.intel.com, yi.l.liu@intel.com, iommu@lists.linux.dev Subject: [PATCH 4/6] iommu/vt-d: Make intel_iommu_set_dev_pasid() to handle domain replacement Date: Fri, 28 Jun 2024 01:55:36 -0700 Message-Id: <20240628085538.47049-5-yi.l.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240628085538.47049-1-yi.l.liu@intel.com> References: <20240628085538.47049-1-yi.l.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 set_dev_pasid op is going to support domain replacement and keep the old hardware config if it fails. Make the Intel iommu driver be prepared for it. Signed-off-by: Yi Liu --- drivers/iommu/intel/debugfs.c | 2 + drivers/iommu/intel/iommu.c | 94 +++++++++++++++++++++++------------ 2 files changed, 64 insertions(+), 32 deletions(-) diff --git a/drivers/iommu/intel/debugfs.c b/drivers/iommu/intel/debugfs.c index affbf4a1558d..8deb6bc262c5 100644 --- a/drivers/iommu/intel/debugfs.c +++ b/drivers/iommu/intel/debugfs.c @@ -806,5 +806,7 @@ void intel_iommu_debugfs_create_dev_pasid(struct dev_pasid_info *dev_pasid) /* Remove the device pasid debugfs directory. */ void intel_iommu_debugfs_remove_dev_pasid(struct dev_pasid_info *dev_pasid) { + if (!dev_pasid->debugfs_dentry) + return; debugfs_remove_recursive(dev_pasid->debugfs_dentry); } diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index dd3de95c7122..8ef6c06f7e73 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4031,8 +4031,8 @@ static int intel_iommu_iotlb_sync_map(struct iommu_domain *domain, return 0; } -static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid, - struct iommu_domain *domain) +static void domain_undo_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct dev_pasid_info *curr, *dev_pasid = NULL; @@ -4040,9 +4040,6 @@ static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid, struct dmar_domain *dmar_domain; unsigned long flags; - if (domain->type == IOMMU_DOMAIN_IDENTITY) - goto out_tear_down; - dmar_domain = to_dmar_domain(domain); spin_lock_irqsave(&dmar_domain->lock, flags); list_for_each_entry(curr, &dmar_domain->dev_pasids, link_domain) { @@ -4059,13 +4056,23 @@ static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid, domain_detach_iommu(dmar_domain, iommu); intel_iommu_debugfs_remove_dev_pasid(dev_pasid); kfree(dev_pasid); -out_tear_down: +} + +static void intel_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid, + struct iommu_domain *domain) +{ + struct device_domain_info *info = dev_iommu_priv_get(dev); + struct intel_iommu *iommu = info->iommu; + intel_pasid_tear_down_entry(iommu, dev, pasid, false, true); + if (domain->type == IOMMU_DOMAIN_IDENTITY) + return; + domain_undo_dev_pasid(domain, dev, pasid); } -static int intel_iommu_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid, - struct iommu_domain *old) +static struct dev_pasid_info * +domain_prepare_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct dmar_domain *dmar_domain = to_dmar_domain(domain); @@ -4074,22 +4081,13 @@ static int intel_iommu_set_dev_pasid(struct iommu_domain *domain, unsigned long flags; int ret; - if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev)) - return -EOPNOTSUPP; - - if (domain->dirty_ops) - return -EINVAL; - - if (context_copied(iommu, info->bus, info->devfn)) - return -EBUSY; - ret = prepare_domain_attach_device(domain, dev); if (ret) - return ret; + return ERR_PTR(ret); dev_pasid = kzalloc(sizeof(*dev_pasid), GFP_KERNEL); if (!dev_pasid) - return -ENOMEM; + return ERR_PTR(-ENOMEM); ret = domain_attach_iommu(dmar_domain, iommu); if (ret) @@ -4099,6 +4097,43 @@ static int intel_iommu_set_dev_pasid(struct iommu_domain *domain, if (ret) goto out_detach_iommu; + dev_pasid->dev = dev; + dev_pasid->pasid = pasid; + spin_lock_irqsave(&dmar_domain->lock, flags); + list_add(&dev_pasid->link_domain, &dmar_domain->dev_pasids); + spin_unlock_irqrestore(&dmar_domain->lock, flags); + + return dev_pasid; +out_detach_iommu: + domain_detach_iommu(dmar_domain, iommu); +out_free: + kfree(dev_pasid); + return ERR_PTR(ret); +} + +static int intel_iommu_set_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct device_domain_info *info = dev_iommu_priv_get(dev); + struct dmar_domain *dmar_domain = to_dmar_domain(domain); + struct intel_iommu *iommu = info->iommu; + struct dev_pasid_info *dev_pasid; + int ret; + + if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev)) + return -EOPNOTSUPP; + + if (domain->dirty_ops) + return -EINVAL; + + if (context_copied(iommu, info->bus, info->devfn)) + return -EBUSY; + + dev_pasid = domain_prepare_dev_pasid(domain, dev, pasid); + if (IS_ERR(dev_pasid)) + return PTR_ERR(dev_pasid); + if (dmar_domain->use_first_level) ret = domain_setup_first_level(iommu, dmar_domain, dev, pasid); @@ -4106,24 +4141,19 @@ static int intel_iommu_set_dev_pasid(struct iommu_domain *domain, ret = intel_pasid_setup_second_level(iommu, dmar_domain, dev, pasid); if (ret) - goto out_unassign_tag; + goto out_undo_dev_pasid; - dev_pasid->dev = dev; - dev_pasid->pasid = pasid; - spin_lock_irqsave(&dmar_domain->lock, flags); - list_add(&dev_pasid->link_domain, &dmar_domain->dev_pasids); - spin_unlock_irqrestore(&dmar_domain->lock, flags); + /* Undo the association between the old domain and pasid of a device */ + if (old) + domain_undo_dev_pasid(old, dev, pasid); if (domain->type & __IOMMU_DOMAIN_PAGING) intel_iommu_debugfs_create_dev_pasid(dev_pasid); return 0; -out_unassign_tag: - cache_tag_unassign_domain(dmar_domain, dev, pasid); -out_detach_iommu: - domain_detach_iommu(dmar_domain, iommu); -out_free: - kfree(dev_pasid); + +out_undo_dev_pasid: + domain_undo_dev_pasid(domain, dev, pasid); return ret; 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28 Jun 2024 01:55:44 -0700 From: Yi Liu To: joro@8bytes.org, jgg@nvidia.com, kevin.tian@intel.com, baolu.lu@linux.intel.com Cc: alex.williamson@redhat.com, robin.murphy@arm.com, eric.auger@redhat.com, nicolinc@nvidia.com, kvm@vger.kernel.org, chao.p.peng@linux.intel.com, yi.l.liu@intel.com, iommu@lists.linux.dev Subject: [PATCH 5/6] iommu/vt-d: Add set_dev_pasid callback for nested domain Date: Fri, 28 Jun 2024 01:55:37 -0700 Message-Id: <20240628085538.47049-6-yi.l.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240628085538.47049-1-yi.l.liu@intel.com> References: <20240628085538.47049-1-yi.l.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lu Baolu Extend intel_iommu_set_dev_pasid() to set a nested type domain to a PASID of a device. Signed-off-by: Lu Baolu Co-developed-by: Yi Liu Signed-off-by: Yi Liu --- drivers/iommu/intel/iommu.c | 22 +++++++++++++++++----- drivers/iommu/intel/iommu.h | 3 +++ drivers/iommu/intel/nested.c | 1 + 3 files changed, 21 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 8ef6c06f7e73..b7051d9460cd 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -284,6 +284,11 @@ static int __init intel_iommu_setup(char *str) } __setup("intel_iommu=", intel_iommu_setup); +static int domain_type_is_nested(struct dmar_domain *domain) +{ + return domain->domain.type == IOMMU_DOMAIN_NESTED; +} + static int domain_pfn_supported(struct dmar_domain *domain, unsigned long pfn) { int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT; @@ -4081,7 +4086,12 @@ domain_prepare_dev_pasid(struct iommu_domain *domain, unsigned long flags; int ret; - ret = prepare_domain_attach_device(domain, dev); + /* Nested type domain should prepare its parent domain */ + if (domain_type_is_nested(dmar_domain)) + ret = prepare_domain_attach_device( + &dmar_domain->s2_domain->domain, dev); + else + ret = prepare_domain_attach_device(domain, dev); if (ret) return ERR_PTR(ret); @@ -4111,9 +4121,9 @@ domain_prepare_dev_pasid(struct iommu_domain *domain, return ERR_PTR(ret); } -static int intel_iommu_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid, - struct iommu_domain *old) +int intel_iommu_set_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) { struct device_domain_info *info = dev_iommu_priv_get(dev); struct dmar_domain *dmar_domain = to_dmar_domain(domain); @@ -4134,7 +4144,9 @@ static int intel_iommu_set_dev_pasid(struct iommu_domain *domain, if (IS_ERR(dev_pasid)) return PTR_ERR(dev_pasid); - if (dmar_domain->use_first_level) + if (domain_type_is_nested(dmar_domain)) + ret = intel_pasid_setup_nested(iommu, dev, pasid, dmar_domain); + else if (dmar_domain->use_first_level) ret = domain_setup_first_level(iommu, dmar_domain, dev, pasid); else diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index eaf015b4353b..63ef3a8a8832 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -1104,6 +1104,9 @@ void device_block_translation(struct device *dev); int prepare_domain_attach_device(struct iommu_domain *domain, struct device *dev); void domain_update_iommu_cap(struct dmar_domain *domain); +int intel_iommu_set_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old); int dmar_ir_support(void); diff --git a/drivers/iommu/intel/nested.c b/drivers/iommu/intel/nested.c index 16a2bcf5cfeb..179868d34a4b 100644 --- a/drivers/iommu/intel/nested.c +++ b/drivers/iommu/intel/nested.c @@ -133,6 +133,7 @@ static int intel_nested_cache_invalidate_user(struct iommu_domain *domain, static const struct iommu_domain_ops intel_nested_domain_ops = { .attach_dev = intel_nested_attach_dev, + .set_dev_pasid = intel_iommu_set_dev_pasid, .free = intel_nested_domain_free, .cache_invalidate_user = intel_nested_cache_invalidate_user, }; From patchwork Fri Jun 28 08:55:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yi Liu X-Patchwork-Id: 13715729 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1ACE14F9F2 for ; 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a="34277517" X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="34277517" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Jun 2024 01:55:45 -0700 X-CSE-ConnectionGUID: FrLdcPiLSMOUbzPH/tG4OQ== X-CSE-MsgGUID: VZdZXAD+SemHanRMb3o1QQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="44584547" Received: from 984fee00a4c6.jf.intel.com ([10.165.58.231]) by orviesa010.jf.intel.com with ESMTP; 28 Jun 2024 01:55:45 -0700 From: Yi Liu To: joro@8bytes.org, jgg@nvidia.com, kevin.tian@intel.com, baolu.lu@linux.intel.com Cc: alex.williamson@redhat.com, robin.murphy@arm.com, eric.auger@redhat.com, nicolinc@nvidia.com, kvm@vger.kernel.org, chao.p.peng@linux.intel.com, yi.l.liu@intel.com, iommu@lists.linux.dev Subject: [PATCH 6/6] iommu: Make set_dev_pasid op support domain replacement Date: Fri, 28 Jun 2024 01:55:38 -0700 Message-Id: <20240628085538.47049-7-yi.l.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240628085538.47049-1-yi.l.liu@intel.com> References: <20240628085538.47049-1-yi.l.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The iommu core is going to support domain replacement for pasid, it needs to make the set_dev_pasid op support replacing domain and keep the old domain config in the failure case. Currently only the Intel iommu driver supports the latest set_dev_pasid op definition. ARM and AMD iommu driver do not support domain replacement for pasid yet, both drivers would fail the set_dev_pasid op to keep the old config if the input @old is non-NULL. Suggested-by: Jason Gunthorpe Signed-off-by: Yi Liu --- drivers/iommu/amd/pasid.c | 3 +++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 3 +++ include/linux/iommu.h | 3 ++- 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/amd/pasid.c b/drivers/iommu/amd/pasid.c index 77bf5f5f947a..30e27bda3fac 100644 --- a/drivers/iommu/amd/pasid.c +++ b/drivers/iommu/amd/pasid.c @@ -109,6 +109,9 @@ int iommu_sva_set_dev_pasid(struct iommu_domain *domain, unsigned long flags; int ret = -EINVAL; + if (old) + return -EOPNOTSUPP; + /* PASID zero is used for requests from the I/O device without PASID */ if (!is_pasid_valid(dev_data, pasid)) return ret; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index c058949749cb..a1e411c71efa 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -637,6 +637,9 @@ static int arm_smmu_sva_set_dev_pasid(struct iommu_domain *domain, int ret = 0; struct mm_struct *mm = domain->mm; + if (old) + return -EOPNOTSUPP; + if (mm_get_enqcmd_pasid(mm) != id) return -EINVAL; diff --git a/include/linux/iommu.h b/include/linux/iommu.h index a33f53aab61b..3259f77ff2e3 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -607,7 +607,8 @@ struct iommu_ops { * * EBUSY - device is attached to a domain and cannot be changed * * ENODEV - device specific errors, not able to be attached * * - treated as ENODEV by the caller. Use is discouraged - * @set_dev_pasid: set an iommu domain to a pasid of device + * @set_dev_pasid: set or replace an iommu domain to a pasid of device. The pasid of + * the device should be left in the old config in error case. * @map_pages: map a physically contiguous set of pages of the same size to * an iommu domain. * @unmap_pages: unmap a number of pages of the same size from an iommu domain