From patchwork Sat Jun 29 08:56:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13716862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25613C27C4F for ; Sat, 29 Jun 2024 08:57:54 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sNTsu-0006we-7a; Sat, 29 Jun 2024 04:56:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sNTss-0006vx-Nj for qemu-devel@nongnu.org; Sat, 29 Jun 2024 04:56:38 -0400 Received: from mail-oo1-xc2a.google.com ([2607:f8b0:4864:20::c2a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sNTsq-0008Fl-Te for qemu-devel@nongnu.org; Sat, 29 Jun 2024 04:56:38 -0400 Received: by mail-oo1-xc2a.google.com with SMTP id 006d021491bc7-5c21f1bb810so700812eaf.3 for ; Sat, 29 Jun 2024 01:56:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=daynix-com.20230601.gappssmtp.com; s=20230601; t=1719651395; x=1720256195; darn=nongnu.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=uV36Gt3F0NFarV2rkaJX1rYzyXO0vgzu3txrDL4RZ9o=; b=JjszEdY9bV0X9ugQZsnEWM2SkPBPui8twycy1COMZ2POXNXYkX5ko5hq87++PXRtkB IHDgi88kTeQSaPLc+bWMxFtYFOGuM6M3jpGuPxkziux30GMgKtMgM9O0twzUbe8zfJHI M0pxqbnmhjU0Dz5EFstmXKOScVT6ZwTIOZ/kglIxeQpR5sG9RGKvOQKKUGEfMFqaHmyp cGeb/slB2gbYFQk6dPXLd1FJY7HRKEv0PCZ44HvIQp6E0a/hQrjet/kxZVAtwz00BE41 3/ujXVbIfgVrd0jXkPL12HhYtwVcpg1Ms1fS3rOoDITsRHCKjDZCh5MG67CEoxHtYwOB pxIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719651395; x=1720256195; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uV36Gt3F0NFarV2rkaJX1rYzyXO0vgzu3txrDL4RZ9o=; b=H6TaeF+Q2sQF9SJVblBWHEDfDKm8fP6QuUDcsT80oQkR/Qatz/+K8HNe7nEUnFtOXX /S8A7UO+bswfNhZMOuIDfEOygeAmt/Q1uAFjE7I53dqlj58PRLNtdty+2eFivzm42HR0 AaYVPTW+e/eUFVtI/JG8hHbY361MZhNsi34b/VqP4z0sweeQUD9ZaTqsuVDvb76YppFL muEXwiHnaCa3EY0hg6R0hNCxqtxkQzeZa55gOS9vfsNM/WbPMYQAgS8tvoUGHMPNAlbd M6yrgxhiAQuWsOItY04pC6f57sM8mroRuj7pQY/+C/HFjUmzDBqK6+8r3d4Zh1utEqLr WU9A== X-Forwarded-Encrypted: i=1; AJvYcCVoEE++h/8vhM3wpGsM7CZ6pCEOy2/qWUWOVd5CoI2aLk+42fjrRmPI4yXM32a9D8FVoJ6nG8kK65IY/zSL/TEkdwPJ8ss= X-Gm-Message-State: AOJu0YyWWIAxthgq7xwahwqtU7BNJF0MjvvVOkLiMldIQF88gy5rXzbi +w54n64hR0T7M1oD2a1mai42qZJ/EvkKvNkqZPLJOzpRPdGp2ptOoEAYDt5JhzApPiqv42PNBC0 CGe4= X-Google-Smtp-Source: AGHT+IHp6po7/G9WybAOHrGE72hCCzpTgJQt4bM9E0JvKIFkPN+wRZh/Wsv6OaWcEj/cQJBQc/YfUg== X-Received: by 2002:a05:6358:2809:b0:19f:436b:f6b9 with SMTP id e5c5f4694b2df-1a6acef67cfmr47311755d.32.1719651395347; Sat, 29 Jun 2024 01:56:35 -0700 (PDT) Received: from localhost ([157.82.204.135]) by smtp.gmail.com with UTF8SMTPSA id 98e67ed59e1d1-2c91d3ea47asm2889625a91.53.2024.06.29.01.56.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 29 Jun 2024 01:56:34 -0700 (PDT) From: Akihiko Odaki Date: Sat, 29 Jun 2024 17:56:27 +0900 Subject: [PATCH v3 1/7] tests/tcg/aarch64: Use -fno-integrated-as MIME-Version: 1.0 Message-Id: <20240629-tcg-v3-1-fa57918bdf09@daynix.com> References: <20240629-tcg-v3-0-fa57918bdf09@daynix.com> In-Reply-To: <20240629-tcg-v3-0-fa57918bdf09@daynix.com> To: Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::c2a; envelope-from=akihiko.odaki@daynix.com; helo=mail-oo1-xc2a.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org clang version 18.1.6 does not respect -Wa,-march=armv9-a+sme without -fno-integrated-as. Use it when available. Signed-off-by: Akihiko Odaki --- tests/tcg/aarch64/Makefile.target | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 70d728ae9af7..05f98c80c88d 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -20,6 +20,9 @@ run-fcvt: fcvt config-cc.mak: Makefile $(quiet-@)( \ + if $(call cc-test, -fno-integrated-as); then fno_integrated_as=-fno-integrated-as; else \ + fno_integrated_as=; fi; \ + $(call cc-option,-fno-integrated-as, CROSS_CC_HAS_FNO_INTEGRATED_AS); \ $(call cc-option,-march=armv8.1-a+sve, CROSS_CC_HAS_SVE); \ $(call cc-option,-march=armv8.1-a+sve2, CROSS_CC_HAS_SVE2); \ $(call cc-option,-march=armv8.2-a, CROSS_CC_HAS_ARMV8_2); \ @@ -27,7 +30,7 @@ config-cc.mak: Makefile $(call cc-option,-march=armv8.5-a, CROSS_CC_HAS_ARMV8_5); \ $(call cc-option,-mbranch-protection=standard, CROSS_CC_HAS_ARMV8_BTI); \ $(call cc-option,-march=armv8.5-a+memtag, CROSS_CC_HAS_ARMV8_MTE); \ - $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak + $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme $$fno_integrated_as, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak -include config-cc.mak ifneq ($(CROSS_CC_HAS_ARMV8_2),) @@ -69,6 +72,9 @@ endif # SME Tests ifneq ($(CROSS_AS_HAS_ARMV9_SME),) AARCH64_TESTS += sme-outprod1 sme-smopa-1 sme-smopa-2 +ifneq ($(CROSS_CC_HAS_FNO_INTEGRATED_AS),) +sme-%: CFLAGS += -fno-integrated-as +endif endif # System Registers Tests From patchwork Sat Jun 29 08:56:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13716860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ADDEAC30658 for ; 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envelope-from=akihiko.odaki@daynix.com; helo=mail-ot1-x336.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The availability of -Wa,-march=armv9-a+sme was checked but it was never used. Use it for SME tests. Signed-off-by: Akihiko Odaki --- tests/tcg/aarch64/Makefile.target | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 05f98c80c88d..d3e739b566d9 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -72,6 +72,7 @@ endif # SME Tests ifneq ($(CROSS_AS_HAS_ARMV9_SME),) AARCH64_TESTS += sme-outprod1 sme-smopa-1 sme-smopa-2 +sme-%: CFLAGS += -Wa,-march=armv9-a+sme ifneq ($(CROSS_CC_HAS_FNO_INTEGRATED_AS),) sme-%: CFLAGS += -fno-integrated-as endif From patchwork Sat Jun 29 08:56:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13716864 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 00C6FC27C4F for ; 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envelope-from=akihiko.odaki@daynix.com; helo=mail-oo1-xc30.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org sme-smopa-2.c requires sme-i16i64 but the compiler option used not to specify it. Instead, the extension was specified with the inline assembly, resulting in mixing assembly code targeting sme-i1664 and C code that does not target sme-i1664. clang version 18.1.6 does not support such mixing so properly specify the extension with the compiler option instead. Signed-off-by: Akihiko Odaki --- tests/tcg/aarch64/sme-smopa-2.c | 2 +- tests/tcg/aarch64/Makefile.target | 18 ++++++++++++++---- 2 files changed, 15 insertions(+), 5 deletions(-) diff --git a/tests/tcg/aarch64/sme-smopa-2.c b/tests/tcg/aarch64/sme-smopa-2.c index c9f48c3bfca2..2c9707065992 100644 --- a/tests/tcg/aarch64/sme-smopa-2.c +++ b/tests/tcg/aarch64/sme-smopa-2.c @@ -14,7 +14,7 @@ int main() long svl; /* Validate that we have a wide enough vector for 4 elements. */ - asm(".arch armv8-r+sme-i64\n\trdsvl %0, #1" : "=r"(svl)); + asm("rdsvl %0, #1" : "=r"(svl)); if (svl < 32) { return 0; } diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index d3e739b566d9..0a527a9821c2 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -30,7 +30,8 @@ config-cc.mak: Makefile $(call cc-option,-march=armv8.5-a, CROSS_CC_HAS_ARMV8_5); \ $(call cc-option,-mbranch-protection=standard, CROSS_CC_HAS_ARMV8_BTI); \ $(call cc-option,-march=armv8.5-a+memtag, CROSS_CC_HAS_ARMV8_MTE); \ - $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme $$fno_integrated_as, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak + $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme $$fno_integrated_as, CROSS_AS_HAS_ARMV9_SME); \ + $(call cc-option,-march=armv9-a+sme-i16i64 $$fno_integrated_as, CROSS_AS_HAS_ARMV9_SME_I1664)) 3> config-cc.mak -include config-cc.mak ifneq ($(CROSS_CC_HAS_ARMV8_2),) @@ -71,10 +72,19 @@ endif # SME Tests ifneq ($(CROSS_AS_HAS_ARMV9_SME),) -AARCH64_TESTS += sme-outprod1 sme-smopa-1 sme-smopa-2 -sme-%: CFLAGS += -Wa,-march=armv9-a+sme +AARCH64_TESTS += sme-outprod1 sme-smopa-1 +sme-outprod1 sme-smopa-1: CFLAGS += -Wa,-march=armv9-a+sme ifneq ($(CROSS_CC_HAS_FNO_INTEGRATED_AS),) -sme-%: CFLAGS += -fno-integrated-as +sme-outprod1 sme-smopa-1: CFLAGS += -fno-integrated-as +endif +endif + +# SME I16I64 Tests +ifneq ($(CROSS_AS_HAS_ARMV9_SME_I1664),) +AARCH64_TESTS += sme-smopa-2 +sme-smopa-2: CFLAGS += -march=armv9-a+sme-i16i64 +ifneq ($(CROSS_CC_HAS_FNO_INTEGRATED_AS),) +sme-smopa-2: CFLAGS += -fno-integrated-as endif endif From patchwork Sat Jun 29 08:56:30 2024 Content-Type: text/plain; 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Sat, 29 Jun 2024 01:56:46 -0700 (PDT) From: Akihiko Odaki Date: Sat, 29 Jun 2024 17:56:30 +0900 Subject: [PATCH v3 4/7] tests/tcg/aarch64: Explicitly specify register width MIME-Version: 1.0 Message-Id: <20240629-tcg-v3-4-fa57918bdf09@daynix.com> References: <20240629-tcg-v3-0-fa57918bdf09@daynix.com> In-Reply-To: <20240629-tcg-v3-0-fa57918bdf09@daynix.com> To: Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, Akihiko Odaki , Richard Henderson X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::529; envelope-from=akihiko.odaki@daynix.com; helo=mail-pg1-x529.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org clang version 18.1.6 assumes a register is 64-bit by default and complains if a 32-bit value is given. Explicitly specify register width when passing a 32-bit value. Signed-off-by: Akihiko Odaki Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- tests/tcg/aarch64/bti-1.c | 6 +++--- tests/tcg/aarch64/bti-3.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/tests/tcg/aarch64/bti-1.c b/tests/tcg/aarch64/bti-1.c index 99a879af23d4..1fada8108d22 100644 --- a/tests/tcg/aarch64/bti-1.c +++ b/tests/tcg/aarch64/bti-1.c @@ -17,15 +17,15 @@ static void skip2_sigill(int sig, siginfo_t *info, ucontext_t *uc) #define BTI_JC "hint #38" #define BTYPE_1(DEST) \ - asm("mov %0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %0,#0" \ + asm("mov %w0,#1; adr x16, 1f; br x16; 1: " DEST "; mov %w0,#0" \ : "=r"(skipped) : : "x16") #define BTYPE_2(DEST) \ - asm("mov %0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %0,#0" \ + asm("mov %w0,#1; adr x16, 1f; blr x16; 1: " DEST "; mov %w0,#0" \ : "=r"(skipped) : : "x16", "x30") #define BTYPE_3(DEST) \ - asm("mov %0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %0,#0" \ + asm("mov %w0,#1; adr x15, 1f; br x15; 1: " DEST "; mov %w0,#0" \ : "=r"(skipped) : : "x15") #define TEST(WHICH, DEST, EXPECT) \ diff --git a/tests/tcg/aarch64/bti-3.c b/tests/tcg/aarch64/bti-3.c index 8c534c09d784..6a3bd037bcd6 100644 --- a/tests/tcg/aarch64/bti-3.c +++ b/tests/tcg/aarch64/bti-3.c @@ -11,15 +11,15 @@ static void skip2_sigill(int sig, siginfo_t *info, ucontext_t *uc) } #define BTYPE_1() \ - asm("mov %0,#1; adr x16, 1f; br x16; 1: hint #25; mov %0,#0" \ + asm("mov %w0,#1; adr x16, 1f; br x16; 1: hint #25; mov %w0,#0" \ : "=r"(skipped) : : "x16", "x30") #define BTYPE_2() \ - asm("mov %0,#1; adr x16, 1f; blr x16; 1: hint #25; mov %0,#0" \ + asm("mov %w0,#1; adr x16, 1f; blr x16; 1: hint #25; mov %w0,#0" \ : "=r"(skipped) : : "x16", "x30") #define BTYPE_3() \ - asm("mov %0,#1; adr x15, 1f; br x15; 1: hint #25; mov %0,#0" \ + asm("mov %w0,#1; adr x15, 1f; br x15; 1: hint #25; mov %w0,#0" \ : "=r"(skipped) : : "x15", "x30") #define TEST(WHICH, EXPECT) \ From patchwork Sat Jun 29 08:56:31 2024 Content-Type: text/plain; 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Sat, 29 Jun 2024 01:56:49 -0700 (PDT) From: Akihiko Odaki Date: Sat, 29 Jun 2024 17:56:31 +0900 Subject: [PATCH v3 5/7] tests/tcg/aarch64: Fix irg operand type MIME-Version: 1.0 Message-Id: <20240629-tcg-v3-5-fa57918bdf09@daynix.com> References: <20240629-tcg-v3-0-fa57918bdf09@daynix.com> In-Reply-To: <20240629-tcg-v3-0-fa57918bdf09@daynix.com> To: Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, Akihiko Odaki , Richard Henderson X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::433; envelope-from=akihiko.odaki@daynix.com; helo=mail-pf1-x433.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org irg expects 64-bit integers. Passing a 32-bit integer results in compilation failure with clang version 18.1.6. Signed-off-by: Akihiko Odaki Reviewed-by: Richard Henderson --- tests/tcg/aarch64/mte-1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/tcg/aarch64/mte-1.c b/tests/tcg/aarch64/mte-1.c index 88dcd617addc..146cad4a0499 100644 --- a/tests/tcg/aarch64/mte-1.c +++ b/tests/tcg/aarch64/mte-1.c @@ -15,7 +15,7 @@ int main(int ac, char **av) enable_mte(PR_MTE_TCF_NONE); p0 = alloc_mte_mem(sizeof(*p0)); - asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(1)); + asm("irg %0,%1,%2" : "=r"(p1) : "r"(p0), "r"(1l)); assert(p1 != p0); asm("subp %0,%1,%2" : "=r"(c) : "r"(p0), "r"(p1)); assert(c == 0); From patchwork Sat Jun 29 08:56:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13716865 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7E87C27C4F for ; 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envelope-from=akihiko.odaki@daynix.com; helo=mail-oa1-x2e.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org clang version 18.1.6 does not support x constraint for AArch64. Use w instead. Signed-off-by: Akihiko Odaki Reviewed-by: Richard Henderson --- tests/tcg/arm/fcvt.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c index 7ac47b564e24..f631197287a1 100644 --- a/tests/tcg/arm/fcvt.c +++ b/tests/tcg/arm/fcvt.c @@ -126,7 +126,7 @@ static void convert_single_to_half(void) asm("vcvtb.f16.f32 %0, %1" : "=t" (output) : "x" (input)); #else uint16_t output; - asm("fcvt %h0, %s1" : "=w" (output) : "x" (input)); + asm("fcvt %h0, %s1" : "=w" (output) : "w" (input)); #endif print_half_number(i, output); } @@ -149,7 +149,7 @@ static void convert_single_to_double(void) #if defined(__arm__) asm("vcvt.f64.f32 %P0, %1" : "=w" (output) : "t" (input)); #else - asm("fcvt %d0, %s1" : "=w" (output) : "x" (input)); + asm("fcvt %d0, %s1" : "=w" (output) : "w" (input)); #endif print_double_number(i, output); } @@ -244,7 +244,7 @@ static void convert_double_to_half(void) /* asm("vcvtb.f16.f64 %0, %P1" : "=t" (output) : "x" (input)); */ output = input; #else - asm("fcvt %h0, %d1" : "=w" (output) : "x" (input)); + asm("fcvt %h0, %d1" : "=w" (output) : "w" (input)); #endif print_half_number(i, output); } @@ -267,7 +267,7 @@ static void convert_double_to_single(void) #if defined(__arm__) asm("vcvt.f32.f64 %0, %P1" : "=w" (output) : "x" (input)); #else - asm("fcvt %s0, %d1" : "=w" (output) : "x" (input)); + asm("fcvt %s0, %d1" : "=w" (output) : "w" (input)); #endif print_single_number(i, output); @@ -335,7 +335,7 @@ static void convert_half_to_double(void) /* asm("vcvtb.f64.f16 %P0, %1" : "=w" (output) : "t" (input)); */ output = input; #else - asm("fcvt %d0, %h1" : "=w" (output) : "x" (input)); + asm("fcvt %d0, %h1" : "=w" (output) : "w" (input)); #endif print_double_number(i, output); } @@ -357,7 +357,7 @@ static void convert_half_to_single(void) #if defined(__arm__) asm("vcvtb.f32.f16 %0, %1" : "=w" (output) : "x" ((uint32_t)input)); #else - asm("fcvt %s0, %h1" : "=w" (output) : "x" (input)); + asm("fcvt %s0, %h1" : "=w" (output) : "w" (input)); #endif print_single_number(i, output); } @@ -380,7 +380,7 @@ static void convert_half_to_integer(void) /* asm("vcvt.s32.f16 %0, %1" : "=t" (output) : "t" (input)); v8.2*/ output = input; #else - asm("fcvt %s0, %h1" : "=w" (output) : "x" (input)); + asm("fcvt %s0, %h1" : "=w" (output) : "w" (input)); #endif print_int64(i, output); } From patchwork Sat Jun 29 08:56:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akihiko Odaki X-Patchwork-Id: 13716859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6A14C27C4F for ; Sat, 29 Jun 2024 08:57:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sNTtf-0007Kr-JE; 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Sat, 29 Jun 2024 01:56:57 -0700 (PDT) Received: from localhost ([157.82.204.135]) by smtp.gmail.com with UTF8SMTPSA id 98e67ed59e1d1-2c91ce17cc1sm2916847a91.5.2024.06.29.01.56.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 29 Jun 2024 01:56:56 -0700 (PDT) From: Akihiko Odaki Date: Sat, 29 Jun 2024 17:56:33 +0900 Subject: [PATCH v3 7/7] tests/tcg/arm: Manually bit-cast half-precision numbers MIME-Version: 1.0 Message-Id: <20240629-tcg-v3-7-fa57918bdf09@daynix.com> References: <20240629-tcg-v3-0-fa57918bdf09@daynix.com> In-Reply-To: <20240629-tcg-v3-0-fa57918bdf09@daynix.com> To: Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, Akihiko Odaki X-Mailer: b4 0.14-dev-fd6e3 Received-SPF: none client-ip=2607:f8b0:4864:20::32f; envelope-from=akihiko.odaki@daynix.com; helo=mail-ot1-x32f.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org clang version 18.1.6 does not allow specifying an integer as the value of a single-precision register. Manually bit-cast into float with vmov first. Signed-off-by: Akihiko Odaki Reviewed-by: Richard Henderson --- tests/tcg/arm/fcvt.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tests/tcg/arm/fcvt.c b/tests/tcg/arm/fcvt.c index f631197287a1..5263f607b59c 100644 --- a/tests/tcg/arm/fcvt.c +++ b/tests/tcg/arm/fcvt.c @@ -355,7 +355,9 @@ static void convert_half_to_single(void) print_half_number(i, input); #if defined(__arm__) - asm("vcvtb.f32.f16 %0, %1" : "=w" (output) : "x" ((uint32_t)input)); + float tmp; + asm("vmov %0, %1" : "=w" (tmp) : "r" (input)); + asm("vcvtb.f32.f16 %0, %1" : "=w" (output) : "x" (tmp)); #else asm("fcvt %s0, %h1" : "=w" (output) : "w" (input)); #endif