From patchwork Fri Mar 1 19:18:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 10835997 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4BBAA139A for ; Fri, 1 Mar 2019 19:29:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F6262D4FB for ; Fri, 1 Mar 2019 19:29:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 238A12D4FF; Fri, 1 Mar 2019 19:29:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A55412D4FB for ; Fri, 1 Mar 2019 19:29:10 +0000 (UTC) Received: from localhost ([127.0.0.1]:42935 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznqH-0004wh-Q7 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 01 Mar 2019 14:29:09 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38097) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznhc-0005dI-My for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gznhV-00044Q-FA for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:10 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:38438 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gznhH-0002Ro-Ah for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:00 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 297491A22DB; Fri, 1 Mar 2019 20:18:49 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 0350C1A2159; Fri, 1 Mar 2019 20:18:49 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 20:18:25 +0100 Message-Id: <1551467914-11209-2-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 01/10] disas: nanoMIPS: Correct comments to handlers of some DSP instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic Correct comments to handlers of some DSP instructions. Signed-off-by: Aleksandar Markovic --- disas/nanomips.cpp | 285 ++++++++++++++++++++++++++++------------------------- 1 file changed, 150 insertions(+), 135 deletions(-) diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp index f090f61..10f6d96 100644 --- a/disas/nanomips.cpp +++ b/disas/nanomips.cpp @@ -10183,14 +10183,13 @@ std::string NMD::MFHGC0(uint64 instruction) /* - * + * [DSP] MFHI rs, ac - Move from HI register * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 xxxxx 00000001111111 * rt ----- - * rs ----- - * rd ----- + * ac -- */ std::string NMD::MFHI_DSP_(uint64 instruction) { @@ -10231,14 +10230,13 @@ std::string NMD::MFHTR(uint64 instruction) /* - * + * [DSP] MFLO rs, ac - Move from HI register * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 xxxxx 01000001111111 * rt ----- - * rs ----- - * rd ----- + * ac -- */ std::string NMD::MFLO_DSP_(uint64 instruction) { @@ -10399,7 +10397,7 @@ std::string NMD::MOD(uint64 instruction) /* - * + * [DSP] MODSUB rd, rs, rt - Modular subtraction on an index value * * 3 2 1 * 10987654321098765432109876543210 @@ -10427,7 +10425,7 @@ std::string NMD::MODSUB(uint64 instruction) * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 x1010010101 * rt ----- * rs ----- * rd ----- @@ -10639,14 +10637,14 @@ std::string NMD::MOVZ(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MSUB ac, rs, rt - Multiply word and subtract from accumulator * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 10101010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MSUB_DSP_(uint64 instruction) { @@ -10711,14 +10709,14 @@ std::string NMD::MSUBF_S(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MSUBU ac, rs, rt - Multiply word and add to accumulator * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 11101010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MSUBU_DSP_(uint64 instruction) { @@ -10919,14 +10917,13 @@ std::string NMD::MTHGC0(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MTHI rs, ac - Move to HI register * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 - * rt ----- + * 001000xxxxx 10000001111111 * rs ----- - * rd ----- + * ac -- */ std::string NMD::MTHI_DSP_(uint64 instruction) { @@ -10941,14 +10938,13 @@ std::string NMD::MTHI_DSP_(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MTHLIP rs, ac - Copy LO to HI and a GPR to LO and increment pos by 32 * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 - * rt ----- + * 001000xxxxx 00001001111111 * rs ----- - * rd ----- + * ac -- */ std::string NMD::MTHLIP(uint64 instruction) { @@ -10989,14 +10985,13 @@ std::string NMD::MTHTR(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MTLO rs, ac - Move to LO register * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 - * rt ----- + * 001000xxxxx 11000001111111 * rs ----- - * rd ----- + * ac -- */ std::string NMD::MTLO_DSP_(uint64 instruction) { @@ -11155,11 +11150,12 @@ std::string NMD::MUL_D(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MUL.PH rd, rs, rt - Multiply vector integer half words to same size + * products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 00000101101 * rt ----- * rs ----- * rd ----- @@ -11179,11 +11175,12 @@ std::string NMD::MUL_PH(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MUL_S.PH rd, rs, rt - Multiply vector integer half words to same size + * products (saturated) * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 10000101101 * rt ----- * rs ----- * rd ----- @@ -11227,11 +11224,12 @@ std::string NMD::MUL_S(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULEQ_S.W.PHL rd, rs, rt - Multiply vector fractional left halfwords + * to expanded width products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0000100101 * rt ----- * rs ----- * rd ----- @@ -11251,11 +11249,12 @@ std::string NMD::MULEQ_S_W_PHL(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULEQ_S.W.PHR rd, rs, rt - Multiply vector fractional right halfwords + * to expanded width products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0001100101 * rt ----- * rs ----- * rd ----- @@ -11275,11 +11274,12 @@ std::string NMD::MULEQ_S_W_PHR(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULEU_S.PH.QBL rd, rs, rt - Multiply vector fractional left bytes + * by halfwords to halfword products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0010010101 * rt ----- * rs ----- * rd ----- @@ -11299,11 +11299,12 @@ std::string NMD::MULEU_S_PH_QBL(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULEU_S.PH.QBR rd, rs, rt - Multiply vector fractional right bytes + * by halfwords to halfword products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0011010101 * rt ----- * rs ----- * rd ----- @@ -11323,11 +11324,12 @@ std::string NMD::MULEU_S_PH_QBR(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULQ_RS.PH rd, rs, rt - Multiply vector fractional halfwords + * to fractional halfword products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0100010101 * rt ----- * rs ----- * rd ----- @@ -11347,11 +11349,12 @@ std::string NMD::MULQ_RS_PH(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULQ_RS.W rd, rs, rt - Multiply fractional words to same size + * product with saturation and rounding * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0110010101 * rt ----- * rs ----- * rd ----- @@ -11371,11 +11374,12 @@ std::string NMD::MULQ_RS_W(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULQ_S.PH rd, rs, rt - Multiply fractional halfwords to same size + * products * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0101010101 * rt ----- * rs ----- * rd ----- @@ -11395,11 +11399,12 @@ std::string NMD::MULQ_S_PH(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULQ_S.W rd, rs, rt - Multiply fractional words to same size product + * with saturation * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0111010101 * rt ----- * rs ----- * rd ----- @@ -11419,14 +11424,15 @@ std::string NMD::MULQ_S_W(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULSA.W.PH ac, rs, rt - Multiply and subtract vector integer halfword + * elements and accumulate * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 10110010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MULSA_W_PH(uint64 instruction) { @@ -11443,14 +11449,15 @@ std::string NMD::MULSA_W_PH(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULSAQ_S.W.PH ac, rs, rt - Multiply and subtract vector fractional + * halfwords and accumulate * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 11110010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MULSAQ_S_W_PH(uint64 instruction) { @@ -11467,14 +11474,14 @@ std::string NMD::MULSAQ_S_W_PH(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULT ac, rs, rt - Multiply word * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 00110010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MULT_DSP_(uint64 instruction) { @@ -11491,14 +11498,14 @@ std::string NMD::MULT_DSP_(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] MULTU ac, rs, rt - Multiply unsigned word * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 01110010111111 * rt ----- * rs ----- - * rd ----- + * ac -- */ std::string NMD::MULTU_DSP_(uint64 instruction) { @@ -12060,11 +12067,12 @@ std::string NMD::PRECEU_PH_QBR(uint64 instruction) /* - * ADDQH_R.W rd, rt, rs - Add Fractional Words And Shift Right to Halve Results + * [DSP] PRECR.QB.PH rd, rs, rt - Reduce the precision of four integer + * halfwords to four bytes * * 3 2 1 * 10987654321098765432109876543210 - * 001000 00010001101 + * 001000 x0001101101 * rt ----- * rs ----- * rd ----- @@ -12084,7 +12092,8 @@ std::string NMD::PRECR_QB_PH(uint64 instruction) /* - * + * [DSP] PRECR_SRA.PH.W rt, rs, sa - Reduce the precision of two integer + * words to halfwords after a right shift * * 3 2 1 * 10987654321098765432109876543210 @@ -12108,7 +12117,8 @@ std::string NMD::PRECR_SRA_PH_W(uint64 instruction) /* - * + * [DSP] PRECR_SRA_R.PH.W rt, rs, sa - Reduce the precision of two integer + * words to halfwords after a right shift with rounding * * 3 2 1 * 10987654321098765432109876543210 @@ -12132,7 +12142,8 @@ std::string NMD::PRECR_SRA_R_PH_W(uint64 instruction) /* - * + * [DSP] PRECRQ.PH.W rd, rs, rt - Reduce the precision of fractional + * words to fractional halfwords * * 3 2 1 * 10987654321098765432109876543210 @@ -12156,11 +12167,12 @@ std::string NMD::PRECRQ_PH_W(uint64 instruction) /* - * + * [DSP] PRECRQ.QB.PH rd, rs, rt - Reduce the precision of four fractional + * halfwords to four bytes * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 x0010101101 * rt ----- * rs ----- * rd ----- @@ -12180,7 +12192,8 @@ std::string NMD::PRECRQ_QB_PH(uint64 instruction) /* - * + * [DSP] PRECRQ_RS.PH.W rd, rs, rt - Reduce the precision of fractional + * words to halfwords with rounding and saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -12204,7 +12217,8 @@ std::string NMD::PRECRQ_RS_PH_W(uint64 instruction) /* - * + * [DSP] PRECRQU_S.QB.PH rd, rs, rt - Reduce the precision of fractional + * halfwords to unsigned bytes with saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -12300,7 +12314,7 @@ std::string NMD::PREFE(uint64 instruction) /* - * + * [DSP] PREPEND rt, rs, sa - Right shift and prepend bits to the MSB * * 3 2 1 * 10987654321098765432109876543210 @@ -12324,14 +12338,13 @@ std::string NMD::PREPEND(uint64 instruction) /* - * + * [DSP] RADDU.W.QB rt, rs - Unsigned reduction add of vector quad bytes * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 1111000100111111 * rt ----- * rs ----- - * rd ----- */ std::string NMD::RADDU_W_QB(uint64 instruction) { @@ -12346,14 +12359,13 @@ std::string NMD::RADDU_W_QB(uint64 instruction) /* - * + * [DSP] RDDSP rt, mask - Read DSPControl register fields to a GPR * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 00011001111111 * rt ----- - * rs ----- - * rd ----- + * mask ------- */ std::string NMD::RDDSP(uint64 instruction) { @@ -12458,14 +12470,14 @@ std::string NMD::RECIP_S(uint64 instruction) /* - * + * [DSP] REPL.PH rd, s - Replicate immediate integer into all vector element + * positions * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 x0000111101 * rt ----- - * rs ----- - * rd ----- + * s ---------- */ std::string NMD::REPL_PH(uint64 instruction) { @@ -12480,14 +12492,14 @@ std::string NMD::REPL_PH(uint64 instruction) /* - * + * [DSP] REPL.QB rd, u - Replicate immediate integer into all vector element + * positions * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 x010111111111 * rt ----- - * rs ----- - * rd ----- + * u -------- */ std::string NMD::REPL_QB(uint64 instruction) { @@ -12502,14 +12514,14 @@ std::string NMD::REPL_QB(uint64 instruction) /* - * + * [DSP] REPLV.PH rt, rs - Replicate a halfword into all vector element + * positions * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 0000001100111111 * rt ----- * rs ----- - * rd ----- */ std::string NMD::REPLV_PH(uint64 instruction) { @@ -12524,14 +12536,13 @@ std::string NMD::REPLV_PH(uint64 instruction) /* - * + * [DSP] REPLV.QB rt, rs - Replicate byte into all vector element positions * * 3 2 1 * 10987654321098765432109876543210 - * 001000 x1110000101 + * 001000 0001001100111111 * rt ----- * rs ----- - * rd ----- */ std::string NMD::REPLV_QB(uint64 instruction) { @@ -13920,8 +13931,8 @@ std::string NMD::SHE(uint64 instruction) /* - * SHILO ac, shift - Shift an Accumulator Value Leaving the Result in the Same - * Accumulator + * [DSP] SHILO ac, shift - Shift an accumulator value leaving the result in + * the same accumulator * * 3 2 1 * 10987654321098765432109876543210 @@ -13942,8 +13953,8 @@ std::string NMD::SHILO(uint64 instruction) /* - * SHILOV ac, rs - Variable Shift of Accumulator Value Leaving the Result in - * the Same Accumulator + * [DSP] SHILOV ac, rs - Variable shift of accumulator value leaving the result + * in the same accumulator * * 3 2 1 * 10987654321098765432109876543210 @@ -13964,7 +13975,7 @@ std::string NMD::SHILOV(uint64 instruction) /* - * SHLL.PH rt, rs, sa - Shift Left Logical Vector Pair Halfwords + * [DSP] SHLL.PH rt, rs, sa - Shift left logical vector pair halfwords * * 3 2 1 * 10987654321098765432109876543210 @@ -13988,7 +13999,7 @@ std::string NMD::SHLL_PH(uint64 instruction) /* - * SHLL.QB rt, rs, sa - Shift Left Logical Vector Quad Bytes + * [DSP] SHLL.QB rt, rs, sa - Shift left logical vector quad bytes * * 3 2 1 * 10987654321098765432109876543210 @@ -14012,7 +14023,8 @@ std::string NMD::SHLL_QB(uint64 instruction) /* - * SHLL_S.PH rt, rs, sa - Shift Left Logical Vector Pair Halfwords (saturated) + * [DSP] SHLL_S.PH rt, rs, sa - Shift left logical vector pair halfwords + * with saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -14036,14 +14048,14 @@ std::string NMD::SHLL_S_PH(uint64 instruction) /* - * + * [DSP] SHLL_S.PH rt, rs, sa - Shift left logical word with saturation * * 3 2 1 * 10987654321098765432109876543210 - * 001000 01001001101 + * 001000 x1111110101 * rt ----- * rs ----- - * rd ----- + * sa ----- */ std::string NMD::SHLL_S_W(uint64 instruction) { @@ -14060,11 +14072,12 @@ std::string NMD::SHLL_S_W(uint64 instruction) /* - * + * [DSP] SHLLV.PH rd, rt, rs - Shift left logical variable vector pair + * halfwords * * 3 2 1 * 10987654321098765432109876543210 - * 001000 01001001101 + * 001000 01110001101 * rt ----- * rs ----- * rd ----- @@ -14084,11 +14097,11 @@ std::string NMD::SHLLV_PH(uint64 instruction) /* - * + * [DSP] SHLLV_S.QB rd, rt, rs - Shift left logical variable vector quad bytes * * 3 2 1 * 10987654321098765432109876543210 - * 001000 01001001101 + * 001000 x1110010101 * rt ----- * rs ----- * rd ----- @@ -14108,11 +14121,12 @@ std::string NMD::SHLLV_QB(uint64 instruction) /* - * + * [DSP] SHLLV.PH rd, rt, rs - Shift left logical variable vector pair + * halfwords with saturation * * 3 2 1 * 10987654321098765432109876543210 - * 001000 01001001101 + * 001000 11110001101 * rt ----- * rs ----- * rd ----- @@ -14132,11 +14146,11 @@ std::string NMD::SHLLV_S_PH(uint64 instruction) /* - * + * [DSP] SHLLV_S.W rd, rt, rs - Shift left logical variable vector word * * 3 2 1 * 10987654321098765432109876543210 - * 001000 01001001101 + * 001000 x1111010101 * rt ----- * rs ----- * rd ----- @@ -14396,14 +14410,14 @@ std::string NMD::SHRAV_R_W(uint64 instruction) /* - * + * [DSP] SHRL.PH rt, rs, sa - Shift right logical two halfwords * * 3 2 1 * 10987654321098765432109876543210 - * 001000 01001001101 + * 001000 001111111111 * rt ----- * rs ----- - * rd ----- + * sa ---- */ std::string NMD::SHRL_PH(uint64 instruction) { @@ -14420,14 +14434,14 @@ std::string NMD::SHRL_PH(uint64 instruction) /* - * + * [DSP] SHRL.QB rt, rs, sa - Shift right logical vector quad bytes * * 3 2 1 * 10987654321098765432109876543210 - * 001000 01001001101 + * 001000 1100001111111 * rt ----- * rs ----- - * rd ----- + * sa --- */ std::string NMD::SHRL_QB(uint64 instruction) { @@ -14444,11 +14458,12 @@ std::string NMD::SHRL_QB(uint64 instruction) /* - * + * [DSP] SHLLV.PH rd, rt, rs - Shift right logical variable vector pair of + * halfwords * * 3 2 1 * 10987654321098765432109876543210 - * 001000 01001001101 + * 001000 x1100010101 * rt ----- * rs ----- * rd ----- @@ -14468,11 +14483,11 @@ std::string NMD::SHRLV_PH(uint64 instruction) /* - * + * [DSP] SHLLV.QB rd, rt, rs - Shift right logical variable vector quad bytes * * 3 2 1 * 10987654321098765432109876543210 - * 001000 01001001101 + * 001000 x1101010101 * rt ----- * rs ----- * rd ----- @@ -15032,8 +15047,8 @@ std::string NMD::SUBQ_PH(uint64 instruction) /* - * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right - * to Halve Results + * [DSP] SUBQ.S.PH rd, rt, rs - Subtract fractional halfword vectors and shift + * right to halve results * * 3 2 1 * 10987654321098765432109876543210 @@ -15057,8 +15072,8 @@ std::string NMD::SUBQ_S_PH(uint64 instruction) /* - * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right - * to Halve Results + * [DSP] SUBQ.S.W rd, rt, rs - Subtract fractional halfword vectors and shift + * right to halve results * * 3 2 1 * 10987654321098765432109876543210 @@ -15082,8 +15097,8 @@ std::string NMD::SUBQ_S_W(uint64 instruction) /* - * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right - * to Halve Results + * [DSP] SUBQH.PH rd, rt, rs - Subtract fractional halfword vectors and shift + * right to halve results * * 3 2 1 * 10987654321098765432109876543210 @@ -15107,8 +15122,8 @@ std::string NMD::SUBQH_PH(uint64 instruction) /* - * SUBQH.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right - * to Halve Results + * [DSP] SUBQH_R.PH rd, rt, rs - Subtract fractional halfword vectors and shift + * right to halve results * * 3 2 1 * 10987654321098765432109876543210 @@ -15132,8 +15147,8 @@ std::string NMD::SUBQH_R_PH(uint64 instruction) /* - * SUBQH_R.PH rd, rt, rs - Subtract Fractional Halfword Vectors And Shift Right - * to Halve Results (rounding) + * [DSP] SUBQH_R.W rd, rt, rs - Subtract fractional halfword vectors and shift + * right to halve results with rounding * * 3 2 1 * 10987654321098765432109876543210 @@ -15157,8 +15172,8 @@ std::string NMD::SUBQH_R_W(uint64 instruction) /* - * SUBQH.W rd, rs, rt - Subtract Fractional Words And Shift Right to Halve - * Results + * [DSP] SUBQH.W rd, rs, rt - Subtract fractional words and shift right to + * halve results * * 3 2 1 * 10987654321098765432109876543210 @@ -15279,7 +15294,7 @@ std::string NMD::SUBU_QB(uint64 instruction) /* * [DSP] SUBU_S.PH rd, rs, rt - Subtract unsigned unsigned halfwords with - * 8-bit saturation + * 8-bit saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -15304,7 +15319,7 @@ std::string NMD::SUBU_S_PH(uint64 instruction) /* * [DSP] SUBU_S.QB rd, rs, rt - Subtract unsigned quad byte vectors with - * 8-bit saturation + * 8-bit saturation * * 3 2 1 * 10987654321098765432109876543210 @@ -15329,7 +15344,7 @@ std::string NMD::SUBU_S_QB(uint64 instruction) /* * [DSP] SUBUH.QB rd, rs, rt - Subtract unsigned bytes and right shift - * to halve results + * to halve results * * 3 2 1 * 10987654321098765432109876543210 @@ -15354,7 +15369,7 @@ std::string NMD::SUBUH_QB(uint64 instruction) /* * [DSP] SUBUH_R.QB rd, rs, rt - Subtract unsigned bytes and right shift - * to halve results with rounding + * to halve results with rounding * * 3 2 1 * 10987654321098765432109876543210 From patchwork Fri Mar 1 19:18:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 10835995 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1187E1669 for ; Fri, 1 Mar 2019 19:27:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 00E932FC06 for ; Fri, 1 Mar 2019 19:27:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E97E72FCDF; Fri, 1 Mar 2019 19:27:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DFD2F2FC06 for ; Fri, 1 Mar 2019 19:27:13 +0000 (UTC) Received: from localhost ([127.0.0.1]:42915 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznoP-0003I0-6B for patchwork-qemu-devel@patchwork.kernel.org; Fri, 01 Mar 2019 14:27:13 -0500 Received: from eggs.gnu.org ([209.51.188.92]:37904) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznhW-0005U9-Rm for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gznhU-00043Y-NM for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:05 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:38445 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gznhH-0002Rx-8T for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:00 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 35A5E1A22D6; Fri, 1 Mar 2019 20:18:49 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 150621A22C0; Fri, 1 Mar 2019 20:18:49 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 20:18:26 +0100 Message-Id: <1551467914-11209-3-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 02/10] tests/tcg: target/mips: Add wrappers for MSA bit set instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic Add wrappers for MSA integer bit set instructions. Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/include/wrappers_msa.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include/wrappers_msa.h index 302f0ab..2e57268 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -152,5 +152,20 @@ DO_MSA__WD__WS_WT(MIN_U_H, min_u.h) DO_MSA__WD__WS_WT(MIN_U_W, min_u.w) DO_MSA__WD__WS_WT(MIN_U_D, min_u.d) +DO_MSA__WD__WS_WT(BCLR_B, bclr.b) +DO_MSA__WD__WS_WT(BCLR_H, bclr.h) +DO_MSA__WD__WS_WT(BCLR_W, bclr.w) +DO_MSA__WD__WS_WT(BCLR_D, bclr.d) + +DO_MSA__WD__WS_WT(BSET_B, bset.b) +DO_MSA__WD__WS_WT(BSET_H, bset.h) +DO_MSA__WD__WS_WT(BSET_W, bset.w) +DO_MSA__WD__WS_WT(BSET_D, bset.d) + +DO_MSA__WD__WS_WT(BNEG_B, bneg.b) +DO_MSA__WD__WS_WT(BNEG_H, bneg.h) +DO_MSA__WD__WS_WT(BNEG_W, bneg.w) +DO_MSA__WD__WS_WT(BNEG_D, bneg.d) + #endif From patchwork Fri Mar 1 19:18:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 10835999 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 42A60139A for ; Fri, 1 Mar 2019 19:29:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 328C02EFF8 for ; Fri, 1 Mar 2019 19:29:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 263802F04D; Fri, 1 Mar 2019 19:29:27 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C45792EF5D for ; Fri, 1 Mar 2019 19:29:26 +0000 (UTC) Received: from localhost ([127.0.0.1]:42937 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznqX-0005C3-Nv for patchwork-qemu-devel@patchwork.kernel.org; Fri, 01 Mar 2019 14:29:25 -0500 Received: from eggs.gnu.org ([209.51.188.92]:37932) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznhX-0005UO-4F for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gznhU-00043q-Rw for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:06 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:38451 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gznhH-0002S9-BC for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:00 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 444981A22C0; Fri, 1 Mar 2019 20:18:49 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 1E1AB1A22C5; Fri, 1 Mar 2019 20:18:49 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 20:18:27 +0100 Message-Id: <1551467914-11209-4-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 03/10] tests/tcg: target/mips: Add wrappers for MSA pack nstructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic Add wrappers for MSA pack instructions. Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/include/wrappers_msa.h | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include/wrappers_msa.h index 2e57268..7057ffb 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -167,5 +167,20 @@ DO_MSA__WD__WS_WT(BNEG_H, bneg.h) DO_MSA__WD__WS_WT(BNEG_W, bneg.w) DO_MSA__WD__WS_WT(BNEG_D, bneg.d) +DO_MSA__WD__WS_WT(PCKEV_B, pckev.b) +DO_MSA__WD__WS_WT(PCKEV_H, pckev.h) +DO_MSA__WD__WS_WT(PCKEV_W, pckev.w) +DO_MSA__WD__WS_WT(PCKEV_D, pckev.d) + +DO_MSA__WD__WS_WT(PCKOD_B, pckod.b) +DO_MSA__WD__WS_WT(PCKOD_H, pckod.h) +DO_MSA__WD__WS_WT(PCKOD_W, pckod.w) +DO_MSA__WD__WS_WT(PCKOD_D, pckod.d) + +DO_MSA__WD__WS_WT(VSHF_B, vshf.b) +DO_MSA__WD__WS_WT(VSHF_H, vshf.h) +DO_MSA__WD__WS_WT(VSHF_W, vshf.w) +DO_MSA__WD__WS_WT(VSHF_D, vshf.d) + #endif From patchwork Fri Mar 1 19:18:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 10835939 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F1BF6139A for ; Fri, 1 Mar 2019 19:21:43 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DDF282F443 for ; Fri, 1 Mar 2019 19:21:43 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CF2082F4EC; Fri, 1 Mar 2019 19:21:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1AD132F443 for ; Fri, 1 Mar 2019 19:21:43 +0000 (UTC) Received: from localhost ([127.0.0.1]:42819 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznj4-0006t6-Bq for patchwork-qemu-devel@patchwork.kernel.org; Fri, 01 Mar 2019 14:21:42 -0500 Received: from eggs.gnu.org ([209.51.188.92]:37970) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznhY-0005VD-2c for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gznhW-00043x-Ao for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:06 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:38455 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gznhH-0002SM-Ec for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:00 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 502D61A22C5; Fri, 1 Mar 2019 20:18:49 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 274041A22D3; Fri, 1 Mar 2019 20:18:49 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 20:18:28 +0100 Message-Id: <1551467914-11209-5-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 04/10] tests/tcg: target/mips: Add wrappers for MSA shift instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic Add wrappers for MSA shift instructions. Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/include/wrappers_msa.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include/wrappers_msa.h index 7057ffb..171a547 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -182,5 +182,30 @@ DO_MSA__WD__WS_WT(VSHF_H, vshf.h) DO_MSA__WD__WS_WT(VSHF_W, vshf.w) DO_MSA__WD__WS_WT(VSHF_D, vshf.d) +DO_MSA__WD__WS_WT(SLL_B, sll.b) +DO_MSA__WD__WS_WT(SLL_H, sll.h) +DO_MSA__WD__WS_WT(SLL_W, sll.w) +DO_MSA__WD__WS_WT(SLL_D, sll.d) + +DO_MSA__WD__WS_WT(SRA_B, sra.b) +DO_MSA__WD__WS_WT(SRA_H, sra.h) +DO_MSA__WD__WS_WT(SRA_W, sra.w) +DO_MSA__WD__WS_WT(SRA_D, sra.d) + +DO_MSA__WD__WS_WT(SRAR_B, srar.b) +DO_MSA__WD__WS_WT(SRAR_H, srar.h) +DO_MSA__WD__WS_WT(SRAR_W, srar.w) +DO_MSA__WD__WS_WT(SRAR_D, srar.d) + +DO_MSA__WD__WS_WT(SRL_B, srl.b) +DO_MSA__WD__WS_WT(SRL_H, srl.h) +DO_MSA__WD__WS_WT(SRL_W, srl.w) +DO_MSA__WD__WS_WT(SRL_D, srl.d) + +DO_MSA__WD__WS_WT(SRLR_B, srlr.b) +DO_MSA__WD__WS_WT(SRLR_H, srlr.h) +DO_MSA__WD__WS_WT(SRLR_W, srlr.w) +DO_MSA__WD__WS_WT(SRLR_D, srlr.d) + #endif From patchwork Fri Mar 1 19:18:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 10835953 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 489CA1669 for ; Fri, 1 Mar 2019 19:26:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 37E942FC29 for ; Fri, 1 Mar 2019 19:26:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2C01F2FD25; Fri, 1 Mar 2019 19:26:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C519A2FC29 for ; Fri, 1 Mar 2019 19:26:52 +0000 (UTC) Received: from localhost ([127.0.0.1]:42909 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzno4-00032M-3b for patchwork-qemu-devel@patchwork.kernel.org; Fri, 01 Mar 2019 14:26:52 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38106) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznhc-0005dL-PA for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gznhY-0004GK-C2 for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:10 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:42028 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gznhW-00041f-7o for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:07 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 537841A23CC; Fri, 1 Mar 2019 20:18:49 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 30A7D1A2159; Fri, 1 Mar 2019 20:18:49 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 20:18:29 +0100 Message-Id: <1551467914-11209-6-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 05/10] tests/tcg: target/mips: Add wrappers for MSA bit copy instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic Add wrappers for MSA bit copy instructions. Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/include/wrappers_msa.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include/wrappers_msa.h index 171a547..61ab3b9 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -207,5 +207,8 @@ DO_MSA__WD__WS_WT(SRLR_H, srlr.h) DO_MSA__WD__WS_WT(SRLR_W, srlr.w) DO_MSA__WD__WS_WT(SRLR_D, srlr.d) +DO_MSA__WD__WS_WT(BMNZ_V, bmnz.v) +DO_MSA__WD__WS_WT(BMZ_V, bmz.v) + #endif From patchwork Fri Mar 1 19:18:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 10835943 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9295F139A for ; Fri, 1 Mar 2019 19:22:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 80AC62F443 for ; Fri, 1 Mar 2019 19:22:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 725152F4EC; Fri, 1 Mar 2019 19:22:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1FE342F443 for ; Fri, 1 Mar 2019 19:22:51 +0000 (UTC) Received: from localhost ([127.0.0.1]:42829 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznkA-0007oQ-BL for patchwork-qemu-devel@patchwork.kernel.org; Fri, 01 Mar 2019 14:22:50 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38234) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznhl-0005me-3l for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gznhe-0004Rx-Fs for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:16 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:42029 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gznhY-00041g-Br for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:10 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 64BD41A23CD; Fri, 1 Mar 2019 20:18:49 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 3A4B01A23BA; Fri, 1 Mar 2019 20:18:49 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 20:18:30 +0100 Message-Id: <1551467914-11209-7-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 06/10] tests/tcg: target/mips: Add wrappers for MSA FP max/min instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic Add wrappers for MSA FP max/min instructions. Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/include/wrappers_msa.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/tests/tcg/mips/include/wrappers_msa.h b/tests/tcg/mips/include/wrappers_msa.h index 61ab3b9..c650ed2 100644 --- a/tests/tcg/mips/include/wrappers_msa.h +++ b/tests/tcg/mips/include/wrappers_msa.h @@ -210,5 +210,17 @@ DO_MSA__WD__WS_WT(SRLR_D, srlr.d) DO_MSA__WD__WS_WT(BMNZ_V, bmnz.v) DO_MSA__WD__WS_WT(BMZ_V, bmz.v) +DO_MSA__WD__WS_WT(FMAX_W, fmax.w) +DO_MSA__WD__WS_WT(FMAX_D, fmax.d) + +DO_MSA__WD__WS_WT(FMAX_A_W, fmax_a.w) +DO_MSA__WD__WS_WT(FMAX_A_D, fmax_a.d) + +DO_MSA__WD__WS_WT(FMIN_W, fmin.w) +DO_MSA__WD__WS_WT(FMIN_D, fmin.d) + +DO_MSA__WD__WS_WT(FMIN_A_W, fmin_a.w) +DO_MSA__WD__WS_WT(FMIN_A_D, fmin_a.d) + #endif From patchwork Fri Mar 1 19:18:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 10835947 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ACE97139A for ; Fri, 1 Mar 2019 19:24:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A0F22DBBF for ; Fri, 1 Mar 2019 19:24:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8D3082DC09; Fri, 1 Mar 2019 19:24:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D9CA92DBBF for ; Fri, 1 Mar 2019 19:24:34 +0000 (UTC) Received: from localhost ([127.0.0.1]:42846 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznlq-0000tb-55 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 01 Mar 2019 14:24:34 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38089) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznhc-0005dG-K0 for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gznhY-0004FC-2U for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:10 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:42033 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gznhV-00041t-UG for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:06 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 6BA4B1A23D8; Fri, 1 Mar 2019 20:18:49 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 4523E1A23BB; Fri, 1 Mar 2019 20:18:49 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 20:18:31 +0100 Message-Id: <1551467914-11209-8-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 07/10] tests/tcg: target/mips: Add test utilities for 64-bit tests X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic Add test utilities for 64-bit tests. Some of MIPS64R6 instructions require 64-bit inputs to be 32-bit integers sign-extedned to 64 bits, hence the need for sets of such inputs. Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/include/test_inputs_64.h | 208 ++++++++++++++++++++++++++++++++ tests/tcg/mips/include/test_utils_64.h | 78 ++++++++++++ 2 files changed, 286 insertions(+) create mode 100644 tests/tcg/mips/include/test_inputs_64.h create mode 100644 tests/tcg/mips/include/test_utils_64.h diff --git a/tests/tcg/mips/include/test_inputs_64.h b/tests/tcg/mips/include/test_inputs_64.h new file mode 100644 index 0000000..ca7c2fb --- /dev/null +++ b/tests/tcg/mips/include/test_inputs_64.h @@ -0,0 +1,208 @@ +/* + * Header file for pattern and random test inputs + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#ifndef TEST_INPUTS_64_H +#define TEST_INPUTS_64_H + +#include + + +#define PATTERN_INPUTS_64_COUNT 64 +#define PATTERN_INPUTS_64_SHORT_COUNT 8 + +uint64_t b64_pattern[PATTERN_INPUTS_64_COUNT] = { + 0xFFFFFFFFFFFFFFFFULL, /* 0 */ + 0x0000000000000000ULL, + 0xAAAAAAAAAAAAAAAAULL, + 0x5555555555555555ULL, + 0xCCCCCCCCCCCCCCCCULL, + 0x3333333333333333ULL, + 0xE38E38E38E38E38EULL, + 0x1C71C71C71C71C71ULL, + 0xF0F0F0F0F0F0F0F0ULL, /* 8 */ + 0x0F0F0F0F0F0F0F0FULL, + 0xF83E0F83E0F83E0FULL, + 0x07C1F07C1F07C1F0ULL, + 0xFC0FC0FC0FC0FC0FULL, + 0x03F03F03F03F03F0ULL, + 0xFE03F80FE03F80FEULL, + 0x01FC07F01FC07F01ULL, + 0xFF00FF00FF00FF00ULL, /* 16 */ + 0x00FF00FF00FF00FFULL, + 0xFF803FE00FF803FEULL, + 0x007FC01FF007FC01ULL, + 0xFFC00FFC00FFC00FULL, + 0x003FF003FF003FF0ULL, + 0xFFE003FF800FFE00ULL, + 0x001FFC007FF001FFULL, + 0xFFF000FFF000FFF0ULL, /* 24 */ + 0x000FFF000FFF000FULL, + 0xFFF8003FFE000FFFULL, + 0x0007FFC001FFF000ULL, + 0xFFFC000FFFC000FFULL, + 0x0003FFF0003FFF00ULL, + 0xFFFE0003FFF8000FULL, + 0x0001FFFC0007FFF0ULL, + 0xFFFF0000FFFF0000ULL, /* 32 */ + 0x0000FFFF0000FFFFULL, + 0xFFFF80003FFFE000ULL, + 0x00007FFFC0001FFFULL, + 0xFFFFC0000FFFFC00ULL, + 0x00003FFFF00003FFULL, + 0xFFFFE00003FFFF80ULL, + 0x00001FFFFC00007FULL, + 0xFFFFF00000FFFFF0ULL, /* 40 */ + 0x00000FFFFF00000FULL, + 0xFFFFF800003FFFFEULL, + 0x000007FFFFC00001ULL, + 0xFFFFFC00000FFFFFULL, + 0x000003FFFFF00000ULL, + 0xFFFFFE000003FFFFULL, + 0x000001FFFFFC0000ULL, + 0xFFFFFF000000FFFFULL, /* 48 */ + 0x000000FFFFFF0000ULL, + 0xFFFFFF8000003FFFULL, + 0x0000007FFFFFC000ULL, + 0xFFFFFFC000000FFFULL, + 0x0000003FFFFFF000ULL, + 0xFFFFFFE0000003FFULL, + 0x0000001FFFFFFC00ULL, + 0xFFFFFFF0000000FFULL, /* 56 */ + 0x0000000FFFFFFF00ULL, + 0xFFFFFFF80000003FULL, + 0x00000007FFFFFFC0ULL, + 0xFFFFFFFC0000000FULL, + 0x00000003FFFFFFF0ULL, + 0xFFFFFFFE00000003ULL, + 0x00000001FFFFFFFCULL, +}; + +uint64_t b64_pattern_se[PATTERN_INPUTS_64_COUNT] = { + 0xFFFFFFFFFFFFFFFFULL, /* 0 */ + 0x0000000000000000ULL, + 0xFFFFFFFFAAAAAAAAULL, + 0x0000000055555555ULL, + 0xFFFFFFFFCCCCCCCCULL, + 0x0000000033333333ULL, + 0xFFFFFFFFE38E38E3ULL, + 0x000000001C71C71CULL, + 0xFFFFFFFFF0F0F0F0ULL, /* 8 */ + 0x000000000F0F0F0FULL, + 0xFFFFFFFFF83E0F83ULL, + 0x0000000007C1F07CULL, + 0xFFFFFFFFFC0FC0FCULL, + 0x0000000003F03F03ULL, + 0xFFFFFFFFFE03F80FULL, + 0x0000000001FC07F0ULL, + 0xFFFFFFFFFF00FF00ULL, /* 16 */ + 0x0000000000FF00FFULL, + 0xFFFFFFFFFF803FE0ULL, + 0x00000000007FC01FULL, + 0xFFFFFFFFFFC00FFCULL, + 0x00000000003FF003ULL, + 0xFFFFFFFFFFE003FFULL, + 0x00000000001FFC00ULL, + 0xFFFFFFFFFFF000FFULL, /* 24 */ + 0x00000000000FFF00ULL, + 0xFFFFFFFFFFF8003FULL, + 0x000000000007FFC0ULL, + 0xFFFFFFFFFFFC000FULL, + 0x000000000003FFF0ULL, + 0xFFFFFFFFFFFE0003ULL, + 0x000000000001FFFCULL, + 0xFFFFFFFFFFFF0000ULL, /* 32 */ + 0x000000000000FFFFULL, + 0xFFFFFFFFFFFF8000ULL, + 0x0000000000007FFFULL, + 0xFFFFFFFFFFFFC000ULL, + 0x0000000000003FFFULL, + 0xFFFFFFFFFFFFE000ULL, + 0x0000000000001FFFULL, + 0xFFFFFFFFFFFFF000ULL, /* 40 */ + 0x0000000000000FFFULL, + 0xFFFFFFFFFFFFF800ULL, + 0x00000000000007FFULL, + 0xFFFFFFFFFFFFFC00ULL, + 0x00000000000003FFULL, + 0xFFFFFFFFFFFFFE00ULL, + 0x00000000000001FFULL, + 0xFFFFFFFFFFFFFF00ULL, /* 48 */ + 0x00000000000000FFULL, + 0xFFFFFFFFFFFFFF80ULL, + 0x000000000000007FULL, + 0xFFFFFFFFFFFFFFC0ULL, + 0x000000000000003FULL, + 0xFFFFFFFFFFFFFFE0ULL, + 0x000000000000001FULL, + 0xFFFFFFFFFFFFFFF0ULL, /* 56 */ + 0x000000000000000FULL, + 0xFFFFFFFFFFFFFFF8ULL, + 0x0000000000000007ULL, + 0xFFFFFFFFFFFFFFFCULL, + 0x0000000000000003ULL, + 0xFFFFFFFFFFFFFFFEULL, + 0x0000000000000001ULL, +}; + + +#define RANDOM_INPUTS_64_COUNT 16 +#define RANDOM_INPUTS_64_SHORT_COUNT 4 + +uint64_t b64_random[RANDOM_INPUTS_64_COUNT] = { + 0x886AE6CC28625540ULL, /* 0 */ + 0xFBBE00634D93C708ULL, + 0xAC5AAEAAB9CF8B80ULL, + 0x704F164D5E31E24EULL, + 0xB9926B7C7DAF4258ULL, + 0xD027BE89FF0A2EF9ULL, + 0xB83B580665CABC4AULL, + 0xFC8F23F09AA6B782ULL, + 0x201E09CD56AEE649ULL, /* 8 */ + 0xA57CD91365D9E5D7ULL, + 0xA2E8F6F5C9CBC61BULL, + 0xA89CF2F131A864AEULL, + 0xE61438E9A652EA0AULL, + 0x944A35FD192361A8ULL, + 0x4630426322BEF79CULL, + 0x8B5AA7A2F259DEADULL, +}; + +uint64_t b64_random_se[RANDOM_INPUTS_64_COUNT] = { + 0xFFFFFFFF886AE6CCULL, /* 0 */ + 0xFFFFFFFFFBBE0063ULL, + 0xFFFFFFFFAC5AAEAAULL, + 0x00000000704F164DULL, + 0xFFFFFFFFB9926B7CULL, + 0xFFFFFFFFD027BE89ULL, + 0xFFFFFFFFB83B5806ULL, + 0xFFFFFFFFFC8F23F0ULL, + 0x00000000201E09CDULL, /* 8 */ + 0xFFFFFFFFA57CD913ULL, + 0xFFFFFFFFA2E8F6F5ULL, + 0xFFFFFFFFA89CF2F1ULL, + 0xFFFFFFFFE61438E9ULL, + 0xFFFFFFFF944A35FDULL, + 0x0000000046304263ULL, + 0xFFFFFFFF8B5AA7A2ULL, +}; + + +#endif diff --git a/tests/tcg/mips/include/test_utils_64.h b/tests/tcg/mips/include/test_utils_64.h new file mode 100644 index 0000000..2977a5d --- /dev/null +++ b/tests/tcg/mips/include/test_utils_64.h @@ -0,0 +1,78 @@ +/* + * Header file for test utilities + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#ifndef TEST_UTILS_64_H +#define TEST_UTILS_64_H + +#include +#include +#include +#include + +#define PRINT_RESULTS 1 + + +static inline int32_t check_results_64(char *instruction_name, + uint32_t test_count, + double elapsed_time, + uint64_t *b64_result, + uint64_t *b64_expect) +{ +#if PRINT_RESULTS + uint32_t ii; + printf("\n"); + for (ii = 0; ii < test_count; ii++) { + uint64_t a; + memcpy(&a, (b64_result + ii), 8); + if (ii % 8 != 0) { + printf(" 0x%016llxULL,\n", a); + } else { + printf(" 0x%016llxULL, /* %3d */\n", + a, ii); + } + } + printf("\n"); +#endif + uint32_t i; + uint32_t pass_count = 0; + uint32_t fail_count = 0; + + printf("%s: ", instruction_name); + for (i = 0; i < test_count; i++) { + if (b64_result[i] == b64_expect[i]) { + pass_count++; + } else { + fail_count++; + } + } + + printf("PASS: %3d FAIL: %3d elapsed time: %5.2f ms\n", + pass_count, fail_count, elapsed_time); + + if (fail_count > 0) { + return -1; + } else { + return 0; + } +} + + +#endif From patchwork Fri Mar 1 19:18:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 10836001 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B6EDC1805 for ; Fri, 1 Mar 2019 19:31:35 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9F7172F5DC for ; Fri, 1 Mar 2019 19:31:35 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 929FA2F9F2; Fri, 1 Mar 2019 19:31:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 233F02F5DC for ; Fri, 1 Mar 2019 19:31:35 +0000 (UTC) Received: from localhost ([127.0.0.1]:42985 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznsc-0006yI-4L for patchwork-qemu-devel@patchwork.kernel.org; Fri, 01 Mar 2019 14:31:34 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38099) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznhc-0005dK-O7 for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gznhX-0004EN-R0 for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:10 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:42030 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gznhU-00041m-Vg for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:06 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 7417B1A2159; Fri, 1 Mar 2019 20:18:49 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 50DAC1A23C9; Fri, 1 Mar 2019 20:18:49 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 20:18:32 +0100 Message-Id: <1551467914-11209-9-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 08/10] tests/tcg: target/mips: Add wrappers for some MIPS64R6 instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic Add wrappers for some MIPS64R6 instructions. Signed-off-by: Aleksandar Markovic --- tests/tcg/mips/include/wrappers_mips64r6.h | 64 ++++++++++++++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 tests/tcg/mips/include/wrappers_mips64r6.h diff --git a/tests/tcg/mips/include/wrappers_mips64r6.h b/tests/tcg/mips/include/wrappers_mips64r6.h new file mode 100644 index 0000000..c9c34aa --- /dev/null +++ b/tests/tcg/mips/include/wrappers_mips64r6.h @@ -0,0 +1,64 @@ +/* + * Header file for wrappers around MIPS64R6 instructions assembler + * invocations + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#ifndef WRAPPERS_MIPS64R6_H +#define WRAPPERS_MIPS64R6_H + + +#define DO_MIPS64R6__RD__RS(suffix, mnemonic) \ +static inline void do_mips64r6_##suffix(void *input, void *output) \ +{ \ + __asm__ volatile ( \ + "ld $t1, 0(%0)\n\t" \ + #mnemonic " $t0, $t1\n\t" \ + "sd $t0, 0(%1)\n\t" \ + : \ + : "r" (input), "r" (output) \ + : "t0", "t1", "memory" \ + ); \ +} + +DO_MIPS64R6__RD__RS(DCLO, dclo) +DO_MIPS64R6__RD__RS(DCLZ, dclz) +DO_MIPS64R6__RD__RS(BITSWAP, bitswap) +DO_MIPS64R6__RD__RS(DBITSWAP, dbitswap) + + +#define DO_MIPS64R6__RD__RS_RT(suffix, mnemonic) \ +static inline void do_mips64r6_##suffix(void *input1, void *input2, \ + void *output) \ +{ \ + __asm__ volatile ( \ + "ld $t1, 0(%0)\n\t" \ + "ld $t2, 0(%1)\n\t" \ + #mnemonic " $t0, $t1, $t2\n\t" \ + "sd $t0, 0(%2)\n\t" \ + : \ + : "r" (input1), "r" (input2), "r" (output) \ + : "t0", "t1", "memory" \ + ); \ +} + +DO_MIPS64R6__RD__RS_RT(DSLLV, dsllv) + + +#endif From patchwork Fri Mar 1 19:18:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 10835951 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 170F2139A for ; Fri, 1 Mar 2019 19:25:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 027792FACB for ; Fri, 1 Mar 2019 19:25:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id EA6432FC29; Fri, 1 Mar 2019 19:25:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id ACCAC2FACB for ; Fri, 1 Mar 2019 19:25:42 +0000 (UTC) Received: from localhost ([127.0.0.1]:42886 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznmw-0001xD-09 for patchwork-qemu-devel@patchwork.kernel.org; Fri, 01 Mar 2019 14:25:42 -0500 Received: from eggs.gnu.org ([209.51.188.92]:38231) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gznhl-0005mc-2v for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:23 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gznhc-0004P8-IL for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:16 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:42032 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gznhX-00041o-AM for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:09 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 87B901A23B4; Fri, 1 Mar 2019 20:18:49 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 5B0B41A23AE; Fri, 1 Mar 2019 20:18:49 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 20:18:33 +0100 Message-Id: <1551467914-11209-10-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 09/10] tests/tcg: target/mips: Add tests for MIPS64R6 logic instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic Add tests for MIPS64R6 logic instructions. Signed-off-by: Aleksandar Markovic --- .../user/isa/mips64r6/logic/test_mips64r6_and.c | 151 +++++++++++++++++++++ .../user/isa/mips64r6/logic/test_mips64r6_nor.c | 151 +++++++++++++++++++++ .../user/isa/mips64r6/logic/test_mips64r6_or.c | 151 +++++++++++++++++++++ .../user/isa/mips64r6/logic/test_mips64r6_xor.c | 151 +++++++++++++++++++++ 4 files changed, 604 insertions(+) create mode 100644 tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_and.c create mode 100644 tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_nor.c create mode 100644 tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_or.c create mode 100644 tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_xor.c diff --git a/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_and.c b/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_and.c new file mode 100644 index 0000000..2039dd9 --- /dev/null +++ b/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_and.c @@ -0,0 +1,151 @@ +/* + * Test program for MIPS64R6 instruction AND + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_mips64r6.h" +#include "../../../../include/test_inputs_64.h" +#include "../../../../include/test_utils_64.h" + +#define TEST_COUNT_TOTAL (PATTERN_INPUTS_64_COUNT + RANDOM_INPUTS_64_COUNT) + + +int32_t main(void) +{ + char *instruction_name = "AND"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b64_result[TEST_COUNT_TOTAL]; + uint64_t b64_expect[TEST_COUNT_TOTAL] = { + 0x8000000000000000ULL, /* 0 */ + 0xffffffffffffffffULL, + 0xfffffc0000000000ULL, + 0xffffffffffe00000ULL, + 0xfffffffffffff000ULL, + 0xfff8000000000000ULL, + 0xffffffffffffc000ULL, + 0xfffe000000000000ULL, + 0x0000000000000000ULL, /* 8 */ + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, /* 16 */ + 0xaaaaaaaaaaaaaaaaULL, + 0xaaaaa80000000000ULL, + 0x5555555555400000ULL, + 0xaaaaaaaaaaaaa000ULL, + 0x5550000000000000ULL, + 0xaaaaaaaaaaaa8000ULL, + 0x5554000000000000ULL, + 0x8000000000000000ULL, /* 24 */ + 0x5555555555555555ULL, + 0x5555540000000000ULL, + 0xaaaaaaaaaaa00000ULL, + 0x5555555555555000ULL, + 0xaaa8000000000000ULL, + 0x5555555555554000ULL, + 0xaaaa000000000000ULL, + 0x0000000000000000ULL, /* 32 */ + 0xccccccccccccccccULL, + 0x3333300000000000ULL, + 0x9999999999800000ULL, + 0xccccccccccccc000ULL, + 0x6660000000000000ULL, + 0x3333333333330000ULL, + 0x9998000000000000ULL, + 0x8000000000000000ULL, /* 40 */ + 0x3333333333333333ULL, + 0xcccccc0000000000ULL, + 0x6666666666600000ULL, + 0x3333333333333000ULL, + 0x9998000000000000ULL, + 0xccccccccccccc000ULL, + 0x6666000000000000ULL, + 0x0000000000000000ULL, /* 48 */ + 0xe38e38e38e38e38eULL, + 0xe38e380000000000ULL, + 0x1c71c71c71c00000ULL, + 0xe38e38e38e38e000ULL, + 0x1c70000000000000ULL, + 0x8e38e38e38e38000ULL, + 0xc71c000000000000ULL, + 0x8000000000000000ULL, /* 56 */ + 0x1c71c71c71c71c71ULL, + 0x1c71c40000000000ULL, + 0xe38e38e38e200000ULL, + 0x1c71c71c71c71000ULL, + 0xe388000000000000ULL, + 0x71c71c71c71c4000ULL, + 0x38e2000000000000ULL, + 0x886ae6cc28625540ULL, /* 64 */ + 0x6ae6cc2862554000ULL, + 0x886ae6cc28625540ULL, + 0xb9b30a1895500000ULL, + 0xfbbe00634d93c708ULL, + 0xbe00634d93c70800ULL, + 0xfbbe00634d93c708ULL, + 0x8018d364f1c20000ULL, + 0xac5aaeaab9cf8b80ULL, /* 72 */ + 0x5aaeaab9cf8b8000ULL, + 0xac5aaeaab9cf8b80ULL, + 0xabaaae73e2e00000ULL, + 0x704f164d5e31e24eULL, + 0x4f164d5e31e24e00ULL, + 0x704f164d5e31e24eULL, + 0xc593578c78938000ULL, + }; + + gettimeofday(&start, NULL); + + for (i = 0; i < PATTERN_INPUTS_64_SHORT_COUNT; i++) { + for (j = 0; j < PATTERN_INPUTS_64_SHORT_COUNT; j++) { + do_mips64r6_AND(b64_pattern + i, b64_pattern + j, + b64_result + (PATTERN_INPUTS_64_SHORT_COUNT * i + j)); + } + } + + for (i = 0; i < RANDOM_INPUTS_64_SHORT_COUNT; i++) { + for (j = 0; j < RANDOM_INPUTS_64_SHORT_COUNT; j++) { + do_mips64r6_AND(b64_random + i, b64_random + j, + b64_result + (((PATTERN_INPUTS_64_SHORT_COUNT) * + (PATTERN_INPUTS_64_SHORT_COUNT)) + + RANDOM_INPUTS_64_SHORT_COUNT * i + j)); + } + } + + gettimeofday(&end, NULL); + + elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0; + + ret = check_results_64(instruction_name, TEST_COUNT_TOTAL, elapsed_time, + b64_result, b64_expect); + + return ret; +} diff --git a/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_nor.c b/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_nor.c new file mode 100644 index 0000000..f22393b --- /dev/null +++ b/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_nor.c @@ -0,0 +1,151 @@ +/* + * Test program for MIPS64R6 instruction NOR + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_mips64r6.h" +#include "../../../../include/test_inputs_64.h" +#include "../../../../include/test_utils_64.h" + +#define TEST_COUNT_TOTAL (PATTERN_INPUTS_64_COUNT + RANDOM_INPUTS_64_COUNT) + + +int32_t main(void) +{ + char *instruction_name = "NOR"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b64_result[TEST_COUNT_TOTAL]; + uint64_t b64_expect[TEST_COUNT_TOTAL] = { + 0x8000000000000000ULL, /* 0 */ + 0xffffffffffffffffULL, + 0xfffffc0000000000ULL, + 0xffffffffffe00000ULL, + 0xfffffffffffff000ULL, + 0xfff8000000000000ULL, + 0xffffffffffffc000ULL, + 0xfffe000000000000ULL, + 0x0000000000000000ULL, /* 8 */ + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, /* 16 */ + 0xaaaaaaaaaaaaaaaaULL, + 0xaaaaa80000000000ULL, + 0x5555555555400000ULL, + 0xaaaaaaaaaaaaa000ULL, + 0x5550000000000000ULL, + 0xaaaaaaaaaaaa8000ULL, + 0x5554000000000000ULL, + 0x8000000000000000ULL, /* 24 */ + 0x5555555555555555ULL, + 0x5555540000000000ULL, + 0xaaaaaaaaaaa00000ULL, + 0x5555555555555000ULL, + 0xaaa8000000000000ULL, + 0x5555555555554000ULL, + 0xaaaa000000000000ULL, + 0x0000000000000000ULL, /* 32 */ + 0xccccccccccccccccULL, + 0x3333300000000000ULL, + 0x9999999999800000ULL, + 0xccccccccccccc000ULL, + 0x6660000000000000ULL, + 0x3333333333330000ULL, + 0x9998000000000000ULL, + 0x8000000000000000ULL, /* 40 */ + 0x3333333333333333ULL, + 0xcccccc0000000000ULL, + 0x6666666666600000ULL, + 0x3333333333333000ULL, + 0x9998000000000000ULL, + 0xccccccccccccc000ULL, + 0x6666000000000000ULL, + 0x0000000000000000ULL, /* 48 */ + 0xe38e38e38e38e38eULL, + 0xe38e380000000000ULL, + 0x1c71c71c71c00000ULL, + 0xe38e38e38e38e000ULL, + 0x1c70000000000000ULL, + 0x8e38e38e38e38000ULL, + 0xc71c000000000000ULL, + 0x8000000000000000ULL, /* 56 */ + 0x1c71c71c71c71c71ULL, + 0x1c71c40000000000ULL, + 0xe38e38e38e200000ULL, + 0x1c71c71c71c71000ULL, + 0xe388000000000000ULL, + 0x71c71c71c71c4000ULL, + 0x38e2000000000000ULL, + 0x886ae6cc28625540ULL, /* 64 */ + 0x6ae6cc2862554000ULL, + 0x886ae6cc28625540ULL, + 0xb9b30a1895500000ULL, + 0xfbbe00634d93c708ULL, + 0xbe00634d93c70800ULL, + 0xfbbe00634d93c708ULL, + 0x8018d364f1c20000ULL, + 0xac5aaeaab9cf8b80ULL, /* 72 */ + 0x5aaeaab9cf8b8000ULL, + 0xac5aaeaab9cf8b80ULL, + 0xabaaae73e2e00000ULL, + 0x704f164d5e31e24eULL, + 0x4f164d5e31e24e00ULL, + 0x704f164d5e31e24eULL, + 0xc593578c78938000ULL, + }; + + gettimeofday(&start, NULL); + + for (i = 0; i < PATTERN_INPUTS_64_SHORT_COUNT; i++) { + for (j = 0; j < PATTERN_INPUTS_64_SHORT_COUNT; j++) { + do_mips64r6_NOR(b64_pattern + i, b64_pattern + j, + b64_result + (PATTERN_INPUTS_64_SHORT_COUNT * i + j)); + } + } + + for (i = 0; i < RANDOM_INPUTS_64_SHORT_COUNT; i++) { + for (j = 0; j < RANDOM_INPUTS_64_SHORT_COUNT; j++) { + do_mips64r6_NOR(b64_random + i, b64_random + j, + b64_result + (((PATTERN_INPUTS_64_SHORT_COUNT) * + (PATTERN_INPUTS_64_SHORT_COUNT)) + + RANDOM_INPUTS_64_SHORT_COUNT * i + j)); + } + } + + gettimeofday(&end, NULL); + + elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0; + + ret = check_results_64(instruction_name, TEST_COUNT_TOTAL, elapsed_time, + b64_result, b64_expect); + + return ret; +} diff --git a/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_or.c b/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_or.c new file mode 100644 index 0000000..ed8bac1 --- /dev/null +++ b/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_or.c @@ -0,0 +1,151 @@ +/* + * Test program for MIPS64R6 instruction OR + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_mips64r6.h" +#include "../../../../include/test_inputs_64.h" +#include "../../../../include/test_utils_64.h" + +#define TEST_COUNT_TOTAL (PATTERN_INPUTS_64_COUNT + RANDOM_INPUTS_64_COUNT) + + +int32_t main(void) +{ + char *instruction_name = "OR"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b64_result[TEST_COUNT_TOTAL]; + uint64_t b64_expect[TEST_COUNT_TOTAL] = { + 0x8000000000000000ULL, /* 0 */ + 0xffffffffffffffffULL, + 0xfffffc0000000000ULL, + 0xffffffffffe00000ULL, + 0xfffffffffffff000ULL, + 0xfff8000000000000ULL, + 0xffffffffffffc000ULL, + 0xfffe000000000000ULL, + 0x0000000000000000ULL, /* 8 */ + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, /* 16 */ + 0xaaaaaaaaaaaaaaaaULL, + 0xaaaaa80000000000ULL, + 0x5555555555400000ULL, + 0xaaaaaaaaaaaaa000ULL, + 0x5550000000000000ULL, + 0xaaaaaaaaaaaa8000ULL, + 0x5554000000000000ULL, + 0x8000000000000000ULL, /* 24 */ + 0x5555555555555555ULL, + 0x5555540000000000ULL, + 0xaaaaaaaaaaa00000ULL, + 0x5555555555555000ULL, + 0xaaa8000000000000ULL, + 0x5555555555554000ULL, + 0xaaaa000000000000ULL, + 0x0000000000000000ULL, /* 32 */ + 0xccccccccccccccccULL, + 0x3333300000000000ULL, + 0x9999999999800000ULL, + 0xccccccccccccc000ULL, + 0x6660000000000000ULL, + 0x3333333333330000ULL, + 0x9998000000000000ULL, + 0x8000000000000000ULL, /* 40 */ + 0x3333333333333333ULL, + 0xcccccc0000000000ULL, + 0x6666666666600000ULL, + 0x3333333333333000ULL, + 0x9998000000000000ULL, + 0xccccccccccccc000ULL, + 0x6666000000000000ULL, + 0x0000000000000000ULL, /* 48 */ + 0xe38e38e38e38e38eULL, + 0xe38e380000000000ULL, + 0x1c71c71c71c00000ULL, + 0xe38e38e38e38e000ULL, + 0x1c70000000000000ULL, + 0x8e38e38e38e38000ULL, + 0xc71c000000000000ULL, + 0x8000000000000000ULL, /* 56 */ + 0x1c71c71c71c71c71ULL, + 0x1c71c40000000000ULL, + 0xe38e38e38e200000ULL, + 0x1c71c71c71c71000ULL, + 0xe388000000000000ULL, + 0x71c71c71c71c4000ULL, + 0x38e2000000000000ULL, + 0x886ae6cc28625540ULL, /* 64 */ + 0x6ae6cc2862554000ULL, + 0x886ae6cc28625540ULL, + 0xb9b30a1895500000ULL, + 0xfbbe00634d93c708ULL, + 0xbe00634d93c70800ULL, + 0xfbbe00634d93c708ULL, + 0x8018d364f1c20000ULL, + 0xac5aaeaab9cf8b80ULL, /* 72 */ + 0x5aaeaab9cf8b8000ULL, + 0xac5aaeaab9cf8b80ULL, + 0xabaaae73e2e00000ULL, + 0x704f164d5e31e24eULL, + 0x4f164d5e31e24e00ULL, + 0x704f164d5e31e24eULL, + 0xc593578c78938000ULL, + }; + + gettimeofday(&start, NULL); + + for (i = 0; i < PATTERN_INPUTS_64_SHORT_COUNT; i++) { + for (j = 0; j < PATTERN_INPUTS_64_SHORT_COUNT; j++) { + do_mips64r6_OR(b64_pattern + i, b64_pattern + j, + b64_result + (PATTERN_INPUTS_64_SHORT_COUNT * i + j)); + } + } + + for (i = 0; i < RANDOM_INPUTS_64_SHORT_COUNT; i++) { + for (j = 0; j < RANDOM_INPUTS_64_SHORT_COUNT; j++) { + do_mips64r6_OR(b64_random + i, b64_random + j, + b64_result + (((PATTERN_INPUTS_64_SHORT_COUNT) * + (PATTERN_INPUTS_64_SHORT_COUNT)) + + RANDOM_INPUTS_64_SHORT_COUNT * i + j)); + } + } + + gettimeofday(&end, NULL); + + elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0; + + ret = check_results_64(instruction_name, TEST_COUNT_TOTAL, elapsed_time, + b64_result, b64_expect); + + return ret; +} diff --git a/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_xor.c b/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_xor.c new file mode 100644 index 0000000..a8ba2b4 --- /dev/null +++ b/tests/tcg/mips/user/isa/mips64r6/logic/test_mips64r6_xor.c @@ -0,0 +1,151 @@ +/* + * Test program for MIPS64R6 instruction XOR + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_mips64r6.h" +#include "../../../../include/test_inputs_64.h" +#include "../../../../include/test_utils_64.h" + +#define TEST_COUNT_TOTAL (PATTERN_INPUTS_64_COUNT + RANDOM_INPUTS_64_COUNT) + + +int32_t main(void) +{ + char *instruction_name = "XOR"; + int32_t ret; + uint32_t i, j; + struct timeval start, end; + double elapsed_time; + + uint64_t b64_result[TEST_COUNT_TOTAL]; + uint64_t b64_expect[TEST_COUNT_TOTAL] = { + 0x8000000000000000ULL, /* 0 */ + 0xffffffffffffffffULL, + 0xfffffc0000000000ULL, + 0xffffffffffe00000ULL, + 0xfffffffffffff000ULL, + 0xfff8000000000000ULL, + 0xffffffffffffc000ULL, + 0xfffe000000000000ULL, + 0x0000000000000000ULL, /* 8 */ + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, + 0x0000000000000000ULL, /* 16 */ + 0xaaaaaaaaaaaaaaaaULL, + 0xaaaaa80000000000ULL, + 0x5555555555400000ULL, + 0xaaaaaaaaaaaaa000ULL, + 0x5550000000000000ULL, + 0xaaaaaaaaaaaa8000ULL, + 0x5554000000000000ULL, + 0x8000000000000000ULL, /* 24 */ + 0x5555555555555555ULL, + 0x5555540000000000ULL, + 0xaaaaaaaaaaa00000ULL, + 0x5555555555555000ULL, + 0xaaa8000000000000ULL, + 0x5555555555554000ULL, + 0xaaaa000000000000ULL, + 0x0000000000000000ULL, /* 32 */ + 0xccccccccccccccccULL, + 0x3333300000000000ULL, + 0x9999999999800000ULL, + 0xccccccccccccc000ULL, + 0x6660000000000000ULL, + 0x3333333333330000ULL, + 0x9998000000000000ULL, + 0x8000000000000000ULL, /* 40 */ + 0x3333333333333333ULL, + 0xcccccc0000000000ULL, + 0x6666666666600000ULL, + 0x3333333333333000ULL, + 0x9998000000000000ULL, + 0xccccccccccccc000ULL, + 0x6666000000000000ULL, + 0x0000000000000000ULL, /* 48 */ + 0xe38e38e38e38e38eULL, + 0xe38e380000000000ULL, + 0x1c71c71c71c00000ULL, + 0xe38e38e38e38e000ULL, + 0x1c70000000000000ULL, + 0x8e38e38e38e38000ULL, + 0xc71c000000000000ULL, + 0x8000000000000000ULL, /* 56 */ + 0x1c71c71c71c71c71ULL, + 0x1c71c40000000000ULL, + 0xe38e38e38e200000ULL, + 0x1c71c71c71c71000ULL, + 0xe388000000000000ULL, + 0x71c71c71c71c4000ULL, + 0x38e2000000000000ULL, + 0x886ae6cc28625540ULL, /* 64 */ + 0x6ae6cc2862554000ULL, + 0x886ae6cc28625540ULL, + 0xb9b30a1895500000ULL, + 0xfbbe00634d93c708ULL, + 0xbe00634d93c70800ULL, + 0xfbbe00634d93c708ULL, + 0x8018d364f1c20000ULL, + 0xac5aaeaab9cf8b80ULL, /* 72 */ + 0x5aaeaab9cf8b8000ULL, + 0xac5aaeaab9cf8b80ULL, + 0xabaaae73e2e00000ULL, + 0x704f164d5e31e24eULL, + 0x4f164d5e31e24e00ULL, + 0x704f164d5e31e24eULL, + 0xc593578c78938000ULL, + }; + + gettimeofday(&start, NULL); + + for (i = 0; i < PATTERN_INPUTS_64_SHORT_COUNT; i++) { + for (j = 0; j < PATTERN_INPUTS_64_SHORT_COUNT; j++) { + do_mips64r6_XOR(b64_pattern + i, b64_pattern + j, + b64_result + (PATTERN_INPUTS_64_SHORT_COUNT * i + j)); + } + } + + for (i = 0; i < RANDOM_INPUTS_64_SHORT_COUNT; i++) { + for (j = 0; j < RANDOM_INPUTS_64_SHORT_COUNT; j++) { + do_mips64r6_XOR(b64_random + i, b64_random + j, + b64_result + (((PATTERN_INPUTS_64_SHORT_COUNT) * + (PATTERN_INPUTS_64_SHORT_COUNT)) + + RANDOM_INPUTS_64_SHORT_COUNT * i + j)); + } + } + + gettimeofday(&end, NULL); + + elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0; + + ret = check_results_64(instruction_name, TEST_COUNT_TOTAL, elapsed_time, + b64_result, b64_expect); + + return ret; +} From patchwork Fri Mar 1 19:18:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Aleksandar Markovic X-Patchwork-Id: 10836003 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CF2DA1669 for ; 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Fri, 01 Mar 2019 14:20:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gznhe-0004Si-JX for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:18 -0500 Received: from mx2.rt-rk.com ([89.216.37.149]:42031 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gznhX-00041n-PD for qemu-devel@nongnu.org; Fri, 01 Mar 2019 14:20:10 -0500 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 8F9561A23AE; Fri, 1 Mar 2019 20:18:49 +0100 (CET) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.domain.local (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id 69EDB1A22D3; Fri, 1 Mar 2019 20:18:49 +0100 (CET) From: Aleksandar Markovic To: qemu-devel@nongnu.org Date: Fri, 1 Mar 2019 20:18:34 +0100 Message-Id: <1551467914-11209-11-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1551467914-11209-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v5 10/10] tests/tcg: target/mips: Add tests for MIPS64R6 bit swap instructions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arikalo@wavecomp.com, amarkovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Aleksandar Markovic Add tests for MIPS64R6 bit swap instructions. Signed-off-by: Aleksandar Markovic --- .../isa/mips64r6/bit-swap/test_mips64r6_bitswap.c | 144 +++++++++++++++++++++ .../isa/mips64r6/bit-swap/test_mips64r6_dbitswap.c | 144 +++++++++++++++++++++ 2 files changed, 288 insertions(+) create mode 100644 tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_bitswap.c create mode 100644 tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_dbitswap.c diff --git a/tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_bitswap.c b/tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_bitswap.c new file mode 100644 index 0000000..639850d --- /dev/null +++ b/tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_bitswap.c @@ -0,0 +1,144 @@ +/* + * Test program for MIPS64R6 instruction BITSWAP + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_mips64r6.h" +#include "../../../../include/test_inputs_64.h" +#include "../../../../include/test_utils_64.h" + +#define TEST_COUNT_TOTAL (PATTERN_INPUTS_64_COUNT + RANDOM_INPUTS_64_COUNT) + + +int32_t main(void) +{ + char *instruction_name = "BITSWAP"; + int32_t ret; + uint32_t i; + struct timeval start, end; + double elapsed_time; + + uint64_t b64_result[TEST_COUNT_TOTAL]; + uint64_t b64_expect[TEST_COUNT_TOTAL] = { + 0xffffffffffffffffULL, /* 0 */ + 0x0000000000000000ULL, + 0x0000000055555555ULL, + 0xffffffffaaaaaaaaULL, + 0x0000000033333333ULL, + 0xffffffffccccccccULL, + 0x00000000711cc771ULL, + 0xffffffff8ee3388eULL, + 0x000000000f0f0f0fULL, /* 8 */ + 0xfffffffff0f0f0f0ULL, + 0x00000000071f7cf0ULL, + 0xfffffffff8e0830fULL, + 0xfffffffff0033ff0ULL, + 0x000000000ffcc00fULL, + 0x0000000007fc017fULL, + 0xfffffffff803fe80ULL, + 0xffffffffff00ff00ULL, /* 16 */ + 0x0000000000ff00ffULL, + 0xfffffffff01fc07fULL, + 0x000000000fe03f80ULL, + 0x0000000000ff03f0ULL, + 0xffffffffff00fc0fULL, + 0x0000000001f07f00ULL, + 0xfffffffffe0f80ffULL, + 0x000000000f00ff0fULL, /* 24 */ + 0xfffffffff0ff00f0ULL, + 0x000000007f00f0ffULL, + 0xffffffff80ff0f00ULL, + 0xffffffffff0300ffULL, + 0x0000000000fcff00ULL, + 0xffffffffff1f00f0ULL, + 0x0000000000e0ff0fULL, + 0xffffffffffff0000ULL, /* 32 */ + 0x000000000000ffffULL, + 0xfffffffffcff0700ULL, + 0x000000000300f8ffULL, + 0xfffffffff0ff3f00ULL, + 0x000000000f00c0ffULL, + 0xffffffffc0ffff01ULL, + 0x000000003f0000feULL, + 0x0000000000ffff0fULL, /* 40 */ + 0xffffffffff0000f0ULL, + 0x0000000000fcff7fULL, + 0xffffffffff030080ULL, + 0x0000000000f0ffffULL, + 0xffffffffff0f0000ULL, + 0x0000000000c0ffffULL, + 0xffffffffff3f0000ULL, + 0x000000000000ffffULL, /* 48 */ + 0xffffffffffff0000ULL, + 0x000000000000fcffULL, + 0xffffffffffff0300ULL, + 0x000000000000f0ffULL, + 0xffffffffffff0f00ULL, + 0x000000000000c0ffULL, + 0xffffffffffff3f00ULL, + 0x00000000000000ffULL, /* 56 */ + 0xffffffffffffff00ULL, + 0x00000000000000fcULL, + 0xffffffffffffff03ULL, + 0x00000000000000f0ULL, + 0xffffffffffffff0fULL, + 0x00000000000000c0ULL, + 0xffffffffffffff3fULL, + 0x000000001446aa02ULL, /* 64 */ + 0xffffffffb2c9e310ULL, + 0xffffffff9df3d101ULL, + 0x000000007a8c4772ULL, + 0xffffffffbef5421aULL, + 0xffffffffff50749fULL, + 0xffffffffa6533d52ULL, + 0x000000005965ed41ULL, + 0x000000006a756792ULL, /* 72 */ + 0xffffffffa69ba7ebULL, + 0xffffffff93d363d8ULL, + 0xffffffff8c152675ULL, + 0x00000000654a5750ULL, + 0xffffffff98c48615ULL, + 0x00000000447def39ULL, + 0x000000004f9a7bb5ULL, + }; + + gettimeofday(&start, NULL); + + for (i = 0; i < TEST_COUNT_TOTAL; i++) { + if (i < PATTERN_INPUTS_64_COUNT) { + do_mips64r6_BITSWAP(b64_pattern + i, b64_result + i); + } else { + do_mips64r6_BITSWAP(b64_random + (i - PATTERN_INPUTS_64_COUNT), + b64_result + i); + } + } + + gettimeofday(&end, NULL); + + elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0; + + ret = check_results_64(instruction_name, TEST_COUNT_TOTAL, elapsed_time, + b64_result, b64_expect); + + return ret; +} diff --git a/tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_dbitswap.c b/tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_dbitswap.c new file mode 100644 index 0000000..366fe61 --- /dev/null +++ b/tests/tcg/mips/user/isa/mips64r6/bit-swap/test_mips64r6_dbitswap.c @@ -0,0 +1,144 @@ +/* + * Test program for MIPS64R6 instruction DBITSWAP + * + * Copyright (C) 2019 Wave Computing, Inc. + * Copyright (C) 2019 Aleksandar Markovic + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + * + */ + +#include +#include + +#include "../../../../include/wrappers_mips64r6.h" +#include "../../../../include/test_inputs_64.h" +#include "../../../../include/test_utils_64.h" + +#define TEST_COUNT_TOTAL (PATTERN_INPUTS_64_COUNT + RANDOM_INPUTS_64_COUNT) + + +int32_t main(void) +{ + char *instruction_name = "DBITSWAP"; + int32_t ret; + uint32_t i; + struct timeval start, end; + double elapsed_time; + + uint64_t b64_result[TEST_COUNT_TOTAL]; + uint64_t b64_expect[TEST_COUNT_TOTAL] = { + 0xffffffffffffffffULL, /* 0 */ + 0x0000000000000000ULL, + 0x5555555555555555ULL, + 0xaaaaaaaaaaaaaaaaULL, + 0x3333333333333333ULL, + 0xccccccccccccccccULL, + 0xc7711cc7711cc771ULL, + 0x388ee3388ee3388eULL, + 0x0f0f0f0f0f0f0f0fULL, /* 8 */ + 0xf0f0f0f0f0f0f0f0ULL, + 0x1f7cf0c1071f7cf0ULL, + 0xe0830f3ef8e0830fULL, + 0x3ff0033ff0033ff0ULL, + 0xc00ffcc00ffcc00fULL, + 0x7fc01ff007fc017fULL, + 0x803fe00ff803fe80ULL, + 0xff00ff00ff00ff00ULL, /* 16 */ + 0x00ff00ff00ff00ffULL, + 0xff01fc07f01fc07fULL, + 0x00fe03f80fe03f80ULL, + 0xff03f03f00ff03f0ULL, + 0x00fc0fc0ff00fc0fULL, + 0xff07c0ff01f07f00ULL, + 0x00f83f00fe0f80ffULL, + 0xff0f00ff0f00ff0fULL, /* 24 */ + 0x00f0ff00f0ff00f0ULL, + 0xff1f00fc7f00f0ffULL, + 0x00e0ff0380ff0f00ULL, + 0xff3f00f0ff0300ffULL, + 0x00c0ff0f00fcff00ULL, + 0xff7f00c0ff1f00f0ULL, + 0x0080ff3f00e0ff0fULL, + 0xffff0000ffff0000ULL, /* 32 */ + 0x0000ffff0000ffffULL, + 0xffff0100fcff0700ULL, + 0x0000feff0300f8ffULL, + 0xffff0300f0ff3f00ULL, + 0x0000fcff0f00c0ffULL, + 0xffff0700c0ffff01ULL, + 0x0000f8ff3f0000feULL, + 0xffff0f0000ffff0fULL, /* 40 */ + 0x0000f0ffff0000f0ULL, + 0xffff1f0000fcff7fULL, + 0x0000e0ffff030080ULL, + 0xffff3f0000f0ffffULL, + 0x0000c0ffff0f0000ULL, + 0xffff7f0000c0ffffULL, + 0x000080ffff3f0000ULL, + 0xffffff000000ffffULL, /* 48 */ + 0x000000ffffff0000ULL, + 0xffffff010000fcffULL, + 0x000000feffff0300ULL, + 0xffffff030000f0ffULL, + 0x000000fcffff0f00ULL, + 0xffffff070000c0ffULL, + 0x000000f8ffff3f00ULL, + 0xffffff0f000000ffULL, /* 56 */ + 0x000000f0ffffff00ULL, + 0xffffff1f000000fcULL, + 0x000000e0ffffff03ULL, + 0xffffff3f000000f0ULL, + 0x000000c0ffffff0fULL, + 0xffffff7f000000c0ULL, + 0x00000080ffffff3fULL, + 0x115667331446aa02ULL, /* 64 */ + 0xdf7d00c6b2c9e310ULL, + 0x355a75559df3d101ULL, + 0x0ef268b27a8c4772ULL, + 0x9d49d63ebef5421aULL, + 0x0be47d91ff50749fULL, + 0x1ddc1a60a6533d52ULL, + 0x3ff1c40f5965ed41ULL, + 0x047890b36a756792ULL, /* 72 */ + 0xa53e9bc8a69ba7ebULL, + 0x45176faf93d363d8ULL, + 0x15394f8f8c152675ULL, + 0x67281c97654a5750ULL, + 0x2952acbf98c48615ULL, + 0x620c42c6447def39ULL, + 0xd15ae5454f9a7bb5ULL, + }; + + gettimeofday(&start, NULL); + + for (i = 0; i < TEST_COUNT_TOTAL; i++) { + if (i < PATTERN_INPUTS_64_COUNT) { + do_mips64r6_DBITSWAP(b64_pattern + i, b64_result + i); + } else { + do_mips64r6_DBITSWAP(b64_random + (i - PATTERN_INPUTS_64_COUNT), + b64_result + i); + } + } + + gettimeofday(&end, NULL); + + elapsed_time = (end.tv_sec - start.tv_sec) * 1000.0; + elapsed_time += (end.tv_usec - start.tv_usec) / 1000.0; + + ret = check_results_64(instruction_name, TEST_COUNT_TOTAL, elapsed_time, + b64_result, b64_expect); + + return ret; +}