From patchwork Wed Jul 3 08:47:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrei Simion X-Patchwork-Id: 13721531 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6BA71C2BD09 for ; Wed, 3 Jul 2024 08:49:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zVPGswtGmafkilB/oHQxrC/UjK2/l0FYuNY/yF4lf3E=; b=em/acGTJKTLTgRMB2YjO6ricrB upV3ZdiLI1bxMbOkUoI4krVwENFejYfXoOPn4bgn5KIa9bLkY4wnWnUVowFHcwNmWoK3jgVxMUsSi ykmfTbb6tuCrC2QBCg/qnOAa09R7na86HcRZYEGrFmBx1d2HZJLvimleU/8rFFBItEAMjBbFWO32j zWzpcXBv1qOXGnGy6Kp6tQ1JMwEUq8aeBllkxclX7FcEH7C1nkzeBlTpF6b44rh9dQK31IAxRBfpW iUavmuRe1zrxgUadw2la56fdkrY6PJxKp7ZpZRjITaCmnJKcGVGEBXlVALBHysCL3A+SQyjGHic1M MItJMp0g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sOvfU-00000009TL6-1MRN; Wed, 03 Jul 2024 08:48:48 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sOvfE-00000009TGo-3QNV for linux-arm-kernel@lists.infradead.org; Wed, 03 Jul 2024 08:48:34 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1719996512; x=1751532512; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z62RBtJdUWVJAzwa/Aeq8wYi4651I8agle+ZMpscrsI=; b=iS4C8ddUpqId4kVh+ZNU8SWVzqBUcDN9KCXGTuB1xZUeV+fdO/He8Lqp VKDsboeUusrKN4n9EG9CEWAYwaQAyJDYk9YaP4pslWEudJe7fZ097+VJN M87UIe8D1m9mFWkDybfVgfF2DsoukN/T1oUwSlKjoGCgK08PLFdMQWtch 2Plggka6k0boWMEj8TYxs5fb21eq7EDtlGC6Ecqpv4rfgLo+k+2jSh49e 75SHHWnJ2tE5S+gu8lxxk/wxsmn6L6P6x1YNLWUvX9mqPQvq0VgYIA/ya lzSA0jyFHdyBT1REqAZW0MOLY6IWmCp2cz9/h765PFky2lDnBNpx8VP/E A==; X-CSE-ConnectionGUID: s71X572eQVinIeDMsyDqRg== X-CSE-MsgGUID: 9JW94tPrRUmMAdhDudLbuA== X-IronPort-AV: E=Sophos;i="6.09,181,1716274800"; d="scan'208";a="196193650" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 03 Jul 2024 01:48:29 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Wed, 3 Jul 2024 01:48:02 -0700 Received: from ROB-ULT-M76677.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Wed, 3 Jul 2024 01:47:59 -0700 From: Andrei Simion To: , , , , , , , , CC: , , , , Claudiu Beznea , Andrei Simion Subject: [PATCH v4 1/3] eeprom: at24: Add support for Microchip 24AA025E48/24AA025E64 EEPROMs Date: Wed, 3 Jul 2024 11:47:02 +0300 Message-ID: <20240703084704.197697-2-andrei.simion@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240703084704.197697-1-andrei.simion@microchip.com> References: <20240703084704.197697-1-andrei.simion@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240703_014832_945607_FD5AD8EE X-CRM114-Status: GOOD ( 13.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Claudiu Beznea Add "microchip,24aa025e48", "microchip,24aa025e64" compatible for the usage w/ 24AA025E{48, 64} type of EEPROMs where "24aa025e48" stands for EUI-48 address and "24aa025e64" stands for EUI-64 address. Signed-off-by: Claudiu Beznea [andrei.simion@microchip.com: Use AT24_DATA_CHIP with AT24_FLAG_READONLY for 24AA025E{48, 64} type of EEPROMs. Reword commit message.] Signed-off-by: Andrei Simion --- v3 -> v4: - Use AT24_CHIP_DATA with AT24_FLAG_READONLY - drop AT24_CHIP_DATA_CB_AO - drop AT24_CHIP_DATA_AO - drop u8 adjoff - change the commit title v2 -> v3: - add specific compatible name according with https://ww1.microchip.com/downloads/en/DeviceDoc/24AA02E48-24AA025E48-24AA02E64-24AA025E64-Data-Sheet-20002124H.pdf - add extended macros to init structure with explicit value for adjoff - drop co-developed-by to maintain the commit history (chronological order of modifications) v1 -> v2: - no change --- drivers/misc/eeprom/at24.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c index 4bd4f32bcdab..ca872e3465ed 100644 --- a/drivers/misc/eeprom/at24.c +++ b/drivers/misc/eeprom/at24.c @@ -174,6 +174,10 @@ AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, AT24_FLAG_MAC | AT24_FLAG_READONLY); AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, AT24_FLAG_MAC | AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24aa025e48, 48 / 8, + AT24_FLAG_READONLY); +AT24_CHIP_DATA(at24_data_24aa025e64, 64 / 8, + AT24_FLAG_READONLY); /* spd is a 24c02 in memory DIMMs */ AT24_CHIP_DATA(at24_data_spd, 2048 / 8, AT24_FLAG_READONLY | AT24_FLAG_IRUGO); @@ -218,6 +222,8 @@ static const struct i2c_device_id at24_ids[] = { { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, + { "24aa025e48", (kernel_ulong_t)&at24_data_24aa025e48 }, + { "24aa025e64", (kernel_ulong_t)&at24_data_24aa025e64 }, { "spd", (kernel_ulong_t)&at24_data_spd }, { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio }, { "24c04", (kernel_ulong_t)&at24_data_24c04 }, @@ -270,6 +276,8 @@ static const struct of_device_id __maybe_unused at24_of_match[] = { { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 }, { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, + { .compatible = "microchip,24aa025e48", .data = &at24_data_24aa025e48 }, + { .compatible = "microchip,24aa025e64", .data = &at24_data_24aa025e64 }, { /* END OF LIST */ }, }; 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Wed, 3 Jul 2024 01:48:02 -0700 From: Andrei Simion To: , , , , , , , , CC: , , , , Claudiu Beznea , Andrei Simion Subject: [PATCH v4 2/3] ARM: dts: microchip: at91-sama7g5ek: add EEPROMs Date: Wed, 3 Jul 2024 11:47:03 +0300 Message-ID: <20240703084704.197697-3-andrei.simion@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240703084704.197697-1-andrei.simion@microchip.com> References: <20240703084704.197697-1-andrei.simion@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240703_014834_936480_8A2007E2 X-CRM114-Status: GOOD ( 12.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Claudiu Beznea Our main boot sequence is (1) ROM BOOT -> AT91Bootstrap -> U-Boot -> Linux Kernel. U-Boot is the stage where we set up the MAC address. Also we can skip U-Boot and use the following boot sequence : (2) ROM BOOT -> AT91Boostrap -> Linux Kernel. Add EEPROMs and nvmem-layout to describe eui48 MAC address region to be used for case (2). Signed-off-by: Claudiu Beznea [andrei.simion@microchip.com: Add nvmem-layout to describe eui48 mac region. Align compatible name with datasheet. Reword commit message.] Signed-off-by: Andrei Simion --- v3 -> v4: - reword commit message - change commit title v2 -> v3: - change from atmel,24mac02e4 to microchip,24aa025e48 to align with datasheet - drop co-developed-by to maintain the chronological order of the changes v1 -> v2: - remove unnecessary #address-cells #size-cells --- .../arm/boot/dts/microchip/at91-sama7g5ek.dts | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts index 20b2497657ae..40f4480e298b 100644 --- a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts @@ -403,6 +403,42 @@ i2c8: i2c@600 { i2c-digital-filter; i2c-digital-filter-width-ns = <35>; status = "okay"; + + eeprom0: eeprom@52 { + compatible = "microchip,24aa025e48"; + reg = <0x52>; + size = <256>; + pagesize = <16>; + vcc-supply = <&vdd_3v3>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom0_eui48: eui48@fa { + reg = <0xfa 0x6>; + }; + }; + }; + + eeprom1: eeprom@53 { + compatible = "microchip,24aa025e48"; + reg = <0x53>; + size = <256>; + pagesize = <16>; + vcc-supply = <&vdd_3v3>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom1_eui48: eui48@fa { + reg = <0xfa 0x6>; + }; + }; + }; }; }; @@ -440,6 +476,8 @@ &pinctrl_gmac0_mdio_default &pinctrl_gmac0_txck_default &pinctrl_gmac0_phy_irq>; phy-mode = "rgmii-id"; + nvmem-cells = <&eeprom0_eui48>; + nvmem-cell-names = "mac-address"; status = "okay"; ethernet-phy@7 { @@ -457,6 +495,8 @@ &gmac1 { &pinctrl_gmac1_mdio_default &pinctrl_gmac1_phy_irq>; phy-mode = "rmii"; + nvmem-cells = <&eeprom1_eui48>; + nvmem-cell-names = "mac-address"; status = "okay"; /* Conflict with pdmc0. */ ethernet-phy@0 { From patchwork Wed Jul 3 08:47:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrei Simion X-Patchwork-Id: 13721533 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82998C2BD09 for ; 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d="scan'208";a="196193660" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 03 Jul 2024 01:48:31 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Wed, 3 Jul 2024 01:48:08 -0700 Received: from ROB-ULT-M76677.microchip.com (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Wed, 3 Jul 2024 01:48:05 -0700 From: Andrei Simion To: , , , , , , , , CC: , , , , Andrei Simion , Conor Dooley Subject: [PATCH v4 3/3] dt-bindings: eeprom: at24: Add Microchip 24AA025E48/24AA025E64 Date: Wed, 3 Jul 2024 11:47:04 +0300 Message-ID: <20240703084704.197697-4-andrei.simion@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240703084704.197697-1-andrei.simion@microchip.com> References: <20240703084704.197697-1-andrei.simion@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240703_014835_271206_6C7344DA X-CRM114-Status: GOOD ( 11.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for compatible Microchip 24AA025E48/24AA025E64 EEPROMs. Reviewed-by: Conor Dooley Signed-off-by: Andrei Simion --- v3 -> v4: - change the rule to select compatible v2 -> v3: - commit subject changed to reference Microchip 24AA025E48/24AA025E64 - drop pattern: mac02e4$ and mac02e6$ and a-z from regex - add these two devices down at the bottom - added Reviewed-by v1 -> v2: - change pattern into "^atmel,(24(c|cs|mac)[a-z0-9]+|spd)$" to keep simpler --- Documentation/devicetree/bindings/eeprom/at24.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index 3c36cd0510de..4d46b8c5439d 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -18,7 +18,9 @@ select: properties: compatible: contains: - pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$" + anyOf: + - pattern: "^atmel,(24(c|cs|mac)[0-9]+|spd)$" + - enum: ["microchip,24aa025e48", "microchip,24aa025e64"] required: - compatible @@ -132,6 +134,10 @@ properties: - renesas,r1ex24128 - samsung,s524ad0xd1 - const: atmel,24c128 + - items: + - const: microchip,24aa025e48 + - items: + - const: microchip,24aa025e64 - pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st label: