From patchwork Mon Jul 8 15:22:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 13726737 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2745EC3271E for ; Mon, 8 Jul 2024 15:39:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B070810E0B9; Mon, 8 Jul 2024 15:39:36 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="emhdSVfx"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 15A4910E389 for ; Mon, 8 Jul 2024 15:39:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1720453176; x=1751989176; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=KvKbobJVb9CMXswZflV01wPRVpENjt/vFnnuc3Pt1Is=; b=emhdSVfxW0XzfkrLLlBpjqheGVPGkt5yz2N1zss/me53gULMRzJ+N3Ly 6g7Cg4JHZw97i5qlvk56hSLdKlNsWQHXYEahU2w4ee3KKF1eFRn+nJTuK L72WMxJ4CRuVeW7CJkYRDpPV264WW5W47D5CE8xHKyVQPxNguA3m3o1s8 cchL85b7cjSMNjQO/BNEJBOFay7A1JMYsi4PXrxMlqbJSnO+uSvg49D7r D9V1fc8pttC/4VGhS9fk0IUNs7rwxxHxGeWY17Apls21z1Df+Bg8niRci huvC2Uj16IOT9Ej5C9GOLs4KXpIVnYOeM3DVSJ3uynVSYuRUcd4SlswoR w==; X-CSE-ConnectionGUID: 7RGShjGzRXy8ZxSitxJgHg== X-CSE-MsgGUID: JZ55J/SFSLCopkNUC9mhfQ== X-IronPort-AV: E=McAfee;i="6700,10204,11127"; a="17480268" X-IronPort-AV: E=Sophos;i="6.09,192,1716274800"; d="scan'208";a="17480268" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2024 08:39:36 -0700 X-CSE-ConnectionGUID: 9ufsE4aRR5Ow3A1blh768A== X-CSE-MsgGUID: 7clQIeE3QgSnlV+v8Q8EWw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,192,1716274800"; d="scan'208";a="51955299" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa005.fm.intel.com with ESMTP; 08 Jul 2024 08:39:32 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com, jouni.hogander@intel.com, arun.r.murthy@intel.com, ankit.k.nautiyal@intel.com, mitulkumar.ajitkumar.golani@intel.com, Animesh Manna Subject: [PATCH v9 1/3] drm/i915/panelreplay: Panel replay workaround with VRR Date: Mon, 8 Jul 2024 20:52:29 +0530 Message-Id: <20240708152231.4170265-1-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Panel Replay VSC SDP not getting sent when VRR is enabled and W1 and W2 are 0. So Program Set Context Latency in TRANS_SET_CONTEXT_LATENCY register to at least a value of 1. The same is applicable for PSR1/PSR2 as well. HSD: 14015406119 v1: Initial version. v2: Update timings stored in adjusted_mode struct. [Ville] v3: Add WA in compute_config(). [Ville] v4: - Add DISPLAY_VER() check and improve code comment. [Rodrigo] - Introduce centralized intel_crtc_vblank_delay(). [Ville] v5: Move to crtc_compute_config(). [Ville] v6: Restrict DISPLAY_VER till 14. [Mitul] v7: - Corrected code-comment. [Mitul] - dev_priv local variable removed. [Jani] v8: Introduce late_compute_config() which will take care late vblank-delay adjustment. [Ville] v9: Implementation simplified and split into multiple patches. Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_display.c | 50 +++++++++++++++++++- drivers/gpu/drm/i915/display/intel_display.h | 2 + drivers/gpu/drm/i915/display/intel_vrr.c | 13 ----- 3 files changed, 51 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c2c388212e2e..be30eb22f3d1 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2512,9 +2512,21 @@ static int intel_crtc_compute_pipe_mode(struct intel_crtc_state *crtc_state) static int intel_crtc_compute_config(struct intel_atomic_state *state, struct intel_crtc *crtc) { + struct drm_connector *connector; + struct drm_connector_state *connector_state; struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - int ret; + int ret, i; + + for_each_new_connector_in_state(&state->base, connector, connector_state, i) { + struct intel_encoder *encoder = + to_intel_encoder(connector_state->best_encoder); + + if (connector_state->crtc != &crtc->base) + continue; + + intel_crtc_adjust_vblank_delay(crtc_state, encoder); + } ret = intel_dpll_crtc_compute_clock(state, crtc); if (ret) @@ -3925,6 +3937,26 @@ bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state) return true; } +void intel_crtc_adjust_vblank_delay(struct intel_crtc_state *crtc_state, + struct intel_encoder *encoder) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; + + /* + * wa_14015401596 for display versions 13, 14. + * Program Set Context Latency in TRANS_SET_CONTEXT_LATENCY register + * to at least a value of 1 when PSR1/PSR2/Panel Replay is enabled with VRR. + * Value for TRANS_SET_CONTEXT_LATENCY is calculated by substracting + * crtc_vdisplay from crtc_vblank_start, so incrementing crtc_vblank_start + * by 1 if both are equal. + */ + if (crtc_state->vrr.enable && crtc_state->has_psr && + adjusted_mode->crtc_vblank_start == adjusted_mode->crtc_vdisplay && + IS_DISPLAY_VER(to_i915(crtc->base.dev), 13, 14)) + adjusted_mode->crtc_vblank_start += 1; +} + int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n) { @@ -4783,10 +4815,26 @@ intel_modeset_pipe_config_late(struct intel_atomic_state *state, { struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); + struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; struct drm_connector_state *conn_state; struct drm_connector *connector; int i; + if (crtc_state->vrr.enable) { + /* + * For XE_LPD+, we use guardband and pipeline override + * is deprecated. + */ + if (DISPLAY_VER(to_i915(crtc->base.dev)) >= 13) { + crtc_state->vrr.guardband = + crtc_state->vrr.vmin + 1 - adjusted_mode->crtc_vblank_start; + } else { + crtc_state->vrr.pipeline_full = + min(255, crtc_state->vrr.vmin - adjusted_mode->crtc_vblank_start - + crtc_state->framestart_delay - 1); + } + } + for_each_new_connector_in_state(&state->base, connector, conn_state, i) { struct intel_encoder *encoder = diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h index b0cf6ca70952..21fd330b8834 100644 --- a/drivers/gpu/drm/i915/display/intel_display.h +++ b/drivers/gpu/drm/i915/display/intel_display.h @@ -428,6 +428,8 @@ bool intel_crtc_is_joiner_primary(const struct intel_crtc_state *crtc_state); u8 intel_crtc_joiner_secondary_pipes(const struct intel_crtc_state *crtc_state); struct intel_crtc *intel_primary_crtc(const struct intel_crtc_state *crtc_state); bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state); +void intel_crtc_adjust_vblank_delay(struct intel_crtc_state *crtc_state, + struct intel_encoder *encoder); bool intel_pipe_config_compare(const struct intel_crtc_state *current_config, const struct intel_crtc_state *pipe_config, bool fastset); diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 5a0da64c7db3..46341367d250 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -242,19 +242,6 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, (crtc_state->hw.adjusted_mode.crtc_vtotal - crtc_state->hw.adjusted_mode.vsync_end); } - - /* - * For XE_LPD+, we use guardband and pipeline override - * is deprecated. - */ - if (DISPLAY_VER(i915) >= 13) { - crtc_state->vrr.guardband = - crtc_state->vrr.vmin + 1 - adjusted_mode->crtc_vblank_start; - } else { - crtc_state->vrr.pipeline_full = - min(255, crtc_state->vrr.vmin - adjusted_mode->crtc_vblank_start - - crtc_state->framestart_delay - 1); - } } static u32 trans_vrr_ctl(const struct intel_crtc_state *crtc_state) From patchwork Mon Jul 8 15:22:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 13726738 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3E563C3271E for ; Mon, 8 Jul 2024 15:39:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AD66C10E389; Mon, 8 Jul 2024 15:39:40 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; 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a="17480271" X-IronPort-AV: E=Sophos;i="6.09,192,1716274800"; d="scan'208";a="17480271" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2024 08:39:39 -0700 X-CSE-ConnectionGUID: /Aq7Ug//R4y0b+QRWUc6fQ== X-CSE-MsgGUID: N3++a52/TKmTU73Ez6uuyw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,192,1716274800"; d="scan'208";a="51955302" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa005.fm.intel.com with ESMTP; 08 Jul 2024 08:39:36 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com, jouni.hogander@intel.com, arun.r.murthy@intel.com, ankit.k.nautiyal@intel.com, mitulkumar.ajitkumar.golani@intel.com, Animesh Manna Subject: [PATCH v9 2/3] drm/i915/lobf: No need to pass connector-state on lobf-compute-config. Date: Mon, 8 Jul 2024 20:52:30 +0530 Message-Id: <20240708152231.4170265-2-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20240708152231.4170265-1-animesh.manna@intel.com> References: <20240708152231.4170265-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Coonector state is not used in lobf compute config, so removed it. Signed-off-by: Animesh Manna Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_alpm.c | 3 +-- drivers/gpu/drm/i915/display/intel_alpm.h | 3 +-- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- 3 files changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 866b3b409c4d..021e970d8209 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -266,8 +266,7 @@ bool intel_alpm_compute_params(struct intel_dp *intel_dp, } void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, - struct intel_crtc_state *crtc_state, - struct drm_connector_state *conn_state) + struct intel_crtc_state *crtc_state) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index 8c409b10dce6..a17dfaa5248d 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -17,8 +17,7 @@ void intel_alpm_init_dpcd(struct intel_dp *intel_dp); bool intel_alpm_compute_params(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, - struct intel_crtc_state *crtc_state, - struct drm_connector_state *conn_state); + struct intel_crtc_state *crtc_state); void intel_alpm_configure(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 3903f6ead6e6..8feec90538ae 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -3009,7 +3009,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, intel_vrr_compute_config(pipe_config, conn_state); intel_dp_compute_as_sdp(intel_dp, pipe_config); intel_psr_compute_config(intel_dp, pipe_config, conn_state); - intel_alpm_lobf_compute_config(intel_dp, pipe_config, conn_state); + intel_alpm_lobf_compute_config(intel_dp, pipe_config); intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16); intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state); intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state); From patchwork Mon Jul 8 15:22:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Animesh Manna X-Patchwork-Id: 13726739 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5368BC3271E for ; Mon, 8 Jul 2024 15:39:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B694C10E38E; Mon, 8 Jul 2024 15:39:45 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; 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a="17480273" X-IronPort-AV: E=Sophos;i="6.09,192,1716274800"; d="scan'208";a="17480273" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Jul 2024 08:39:43 -0700 X-CSE-ConnectionGUID: HvGVseOrT1irshR5dl9JtA== X-CSE-MsgGUID: /4DSbxOVQb+U25B6Bsf34w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,192,1716274800"; d="scan'208";a="51955305" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by fmviesa005.fm.intel.com with ESMTP; 08 Jul 2024 08:39:40 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com, ville.syrjala@linux.intel.com, jouni.hogander@intel.com, arun.r.murthy@intel.com, ankit.k.nautiyal@intel.com, mitulkumar.ajitkumar.golani@intel.com, Animesh Manna Subject: [PATCH v9 3/3] drm/i915/lobf: Move Lobf compute config after vblank adjustement Date: Mon, 8 Jul 2024 20:52:31 +0530 Message-Id: <20240708152231.4170265-3-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20240708152231.4170265-1-animesh.manna@intel.com> References: <20240708152231.4170265-1-animesh.manna@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" As lobf compute config is depends upon delayed vbalnk so moved lobf compute config in encoder late config(). Lobf is only for edp connector so introduced intel_dp_late_compute_config(). Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_ddi.c | 5 +++++ drivers/gpu/drm/i915/display/intel_dp.c | 9 ++++++++- drivers/gpu/drm/i915/display/intel_dp.h | 2 ++ 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index a07aca96e551..e460ba0ee05f 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4366,6 +4366,11 @@ static int intel_ddi_compute_config_late(struct intel_encoder *encoder, port_sync_transcoders & ~BIT(crtc_state->cpu_transcoder); } + if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP) || + intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP)) { + intel_dp_late_compute_config(encoder, crtc_state); + } + return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 8feec90538ae..f6535281ab54 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -3009,7 +3009,6 @@ intel_dp_compute_config(struct intel_encoder *encoder, intel_vrr_compute_config(pipe_config, conn_state); intel_dp_compute_as_sdp(intel_dp, pipe_config); intel_psr_compute_config(intel_dp, pipe_config, conn_state); - intel_alpm_lobf_compute_config(intel_dp, pipe_config); intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16); intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state); intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, conn_state); @@ -3018,6 +3017,14 @@ intel_dp_compute_config(struct intel_encoder *encoder, pipe_config); } +void intel_dp_late_compute_config(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state) +{ + struct intel_dp *intel_dp = enc_to_intel_dp(encoder); + + intel_alpm_lobf_compute_config(intel_dp, crtc_state); +} + void intel_dp_set_link_params(struct intel_dp *intel_dp, int link_rate, int lane_count) { diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index a0f990a95ecc..cd473f939941 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -74,6 +74,8 @@ void intel_dp_encoder_flush_work(struct drm_encoder *encoder); int intel_dp_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state); +void intel_dp_late_compute_config(struct intel_encoder *encoder, + struct intel_crtc_state *crtc_state); int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state,