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Sun, 14 Jul 2024 16:37:10 +0000 Received: from SYBP282MB2238.AUSP282.PROD.OUTLOOK.COM ([fe80::ac24:7d2b:92fe:20c3]) by SYBP282MB2238.AUSP282.PROD.OUTLOOK.COM ([fe80::ac24:7d2b:92fe:20c3%4]) with mapi id 15.20.7762.027; Sun, 14 Jul 2024 16:37:10 +0000 From: Yuntao Dai To: jassisinghbrar@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, unicorn_wang@outlook.com, inochiama@outlook.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Yuntao Dai Subject: [PATCH v2 1/3] dt-bindings: mailbox: add Sophgo cv18x SoCs mailbox Date: Mon, 15 Jul 2024 00:36:45 +0800 Message-ID: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: X-TMN: [YsAHNOk3yT0on2cfC8wMiIX7ZIDhylmbEH1erL3PARI=] X-ClientProxiedBy: SI2PR01CA0016.apcprd01.prod.exchangelabs.com (2603:1096:4:191::20) To SYBP282MB2238.AUSP282.PROD.OUTLOOK.COM (2603:10c6:10:9b::8) X-Microsoft-Original-Message-ID: <20240714163647.10814-1-d1581209858@live.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SYBP282MB2238:EE_|SYYP282MB0991:EE_ X-MS-Office365-Filtering-Correlation-Id: d6cd2863-e7cb-4c81-00b6-08dca42334db X-Microsoft-Antispam: BCL:0;ARA:14566002|461199028|8060799006|19110799003|440099028|3412199025|4302099013|1602099012|1710799026; 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Any processer can write data in a channel, and + set co-responding register to raise interrupt to notice another processor, + and it is allowed to send data to itself. + Sophgo cv18x SoCs has 3 processors and numbered as + <1> C906L + <2> C906B + <3> 8051 + +properties: + compatible: + enum: + - sophgo,cv1800-mailbox + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-names: + const: mailbox + + "#mbox-cells": + const: 2 + description: + The first cell indicates which channel is used, the second cell indicates + sending to which processor + +required: + - compatible + - reg + - interrupts + - "#mbox-cells" + +additionalProperties: false + +examples: + - | + #include + + mailbox: mailbox@1900000 { + compatible = "sophgo,cv1800-mailbox"; + reg = <0x01900000 0x1000>; + interrupts = <101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mailbox"; + interrupt-parent = <&plic>; + #mbox-cells = <2>; + }; From patchwork Sun Jul 14 16:36:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuntao Dai X-Patchwork-Id: 13732754 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E342C3DA42 for ; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add mailbox node for Sophgo cv18x SoCs Signed-off-by: Yuntao Dai --- arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi index 891932ae4..1c7035737 100644 --- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi @@ -310,5 +310,14 @@ reg = <0x74000000 0x10000>; interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; }; + + mailbox: mailbox@1900000 { + compatible = "sophgo,cv1800-mailbox"; + reg = <0x01900000 0x1000>; + interrupts = <101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "mailbox"; + interrupt-parent = <&plic>; + #mbox-cells = <2>; + }; }; }; From patchwork Sun Jul 14 16:36:47 2024 Content-Type: text/plain; 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Signed-off-by: Yuntao Dai --- drivers/mailbox/Kconfig | 11 ++ drivers/mailbox/Makefile | 2 + drivers/mailbox/cv1800-mailbox.c | 203 +++++++++++++++++++++++++++++++ 3 files changed, 216 insertions(+) create mode 100644 drivers/mailbox/cv1800-mailbox.c diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index 3b8842c4a..db856ec7e 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -286,4 +286,15 @@ config QCOM_IPCC acts as an interrupt controller for receiving interrupts from clients. Say Y here if you want to build this driver. +config CV1800_MBOX + tristate "cv1800 mailbox" + depends on OF + depends on ARCH_SOPHGO || COMPILE_TEST + help + Mailbox driver implementation for Sophgo cv180x SoCs. This driver + can be used to send message between different processors in SoC. Any + processer can write data in a channel, and set co-responding register + to raise interrupt to notice another processor, and it is allowed to + send data to itself. + endif diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile index 5cf2f54de..2c6db8c5c 100644 --- a/drivers/mailbox/Makefile +++ b/drivers/mailbox/Makefile @@ -62,3 +62,5 @@ obj-$(CONFIG_SUN6I_MSGBOX) += sun6i-msgbox.o obj-$(CONFIG_SPRD_MBOX) += sprd-mailbox.o obj-$(CONFIG_QCOM_IPCC) += qcom-ipcc.o + +obj-$(CONFIG_CV1800_MBOX) += cv1800-mailbox.o \ No newline at end of file diff --git a/drivers/mailbox/cv1800-mailbox.c b/drivers/mailbox/cv1800-mailbox.c new file mode 100644 index 000000000..a3b214b4d --- /dev/null +++ b/drivers/mailbox/cv1800-mailbox.c @@ -0,0 +1,203 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RECV_CPU 2 + +#define MAILBOX_MAX_CHAN 0x0008 +#define MAILBOX_DONE_OFFSET 0x0002 +#define MAILBOX_CONTEXT_SIZE 0x0040 +#define MAILBOX_CONTEXT_OFFSET 0x0400 + +#define MBOX_EN_REG(cpu) (cpu << 2) +#define MBOX_DONE_REG(cpu) ((cpu << 2) + MAILBOX_DONE_OFFSET) + +#define MBOX_SET_CLR_REG(cpu) (0x10 + (cpu << 4)) +#define MBOX_SET_INT_REG(cpu) (0x18 + (cpu << 4)) + +#define MBOX_SET_REG 0x60 + +/** + * cv1800 mailbox channel private data + * @idx: index of channel + * @cpu: send to which processor + */ +struct cv1800_mbox_chan_priv { + int idx; + int cpu; +}; + +struct cv1800_mbox { + struct mbox_controller mbox; + struct cv1800_mbox_chan_priv priv[MAILBOX_MAX_CHAN]; + struct mbox_chan chans[MAILBOX_MAX_CHAN]; + u64 __iomem *content[MAILBOX_MAX_CHAN]; + void __iomem *mbox_base; + int recvid; +}; + +static irqreturn_t cv1800_mbox_isr(int irq, void *dev_id) +{ + struct cv1800_mbox *mbox = (struct cv1800_mbox *)dev_id; + size_t i; + + for (i = 0; i < MAILBOX_MAX_CHAN; i++) { + if (mbox->content[i] && mbox->chans[i].cl) { + mbox_chan_received_data(&mbox->chans[i], + mbox->content[i]); + mbox->content[i] = NULL; + return IRQ_HANDLED; + } + } + return IRQ_NONE; +} + +static irqreturn_t cv1800_mbox_irq(int irq, void *dev_id) +{ + struct cv1800_mbox *mbox = (struct cv1800_mbox *)dev_id; + u64 __iomem *addr; + u8 set, valid; + size_t i; + + set = readb(mbox->mbox_base + MBOX_SET_INT_REG(RECV_CPU)); + + if (!set) + return IRQ_NONE; + + for (i = 0; i < MAILBOX_MAX_CHAN; i++) { + valid = set & (1 << i); + addr = (u64 *)(mbox->mbox_base + MAILBOX_CONTEXT_OFFSET) + i; + if (valid) { + mbox->content[i] = addr; + writeb(valid, + mbox->mbox_base + MBOX_SET_CLR_REG(RECV_CPU)); + writeb(~valid, mbox->mbox_base + MBOX_EN_REG(RECV_CPU)); + return IRQ_WAKE_THREAD; + } + } + + return IRQ_NONE; +} + +static int cv1800_mbox_send_data(struct mbox_chan *chan, void *data) +{ + struct cv1800_mbox_chan_priv *priv = + (struct cv1800_mbox_chan_priv *)chan->con_priv; + struct cv1800_mbox *mbox = dev_get_drvdata(chan->mbox->dev); + u64 __iomem *addr; + u8 en, valid; + + int idx = priv->idx; + int cpu = priv->cpu; + + addr = (u64 *)(mbox->mbox_base + MAILBOX_CONTEXT_OFFSET) + idx; + memcpy_toio(addr, data, 8); + + valid = 1 << idx; + writeb(valid, mbox->mbox_base + MBOX_SET_CLR_REG(cpu)); + en = readb(mbox->mbox_base + MBOX_EN_REG(cpu)); + writeb(en | valid, mbox->mbox_base + MBOX_EN_REG(cpu)); + writeb(valid, mbox->mbox_base + MBOX_SET_REG); + + return 0; +} + +static bool cv1800_last_tx_done(struct mbox_chan *chan) +{ + return true; +} + +static const struct mbox_chan_ops cv1800_mbox_chan_ops = { + .send_data = cv1800_mbox_send_data, + .last_tx_done = cv1800_last_tx_done, +}; + +static struct mbox_chan *cv1800_mbox_xlate(struct mbox_controller *mbox, + const struct of_phandle_args *spec) +{ + struct cv1800_mbox_chan_priv *priv; + + int idx = spec->args[0]; + int cpu = spec->args[1]; + + if (idx >= mbox->num_chans) + return ERR_PTR(-EINVAL); + + priv = mbox->chans[idx].con_priv; + priv->cpu = cpu; + + return &mbox->chans[idx]; +} + +static const struct of_device_id cv1800_mbox_of_match[] = { + { .compatible = "sophgo,cv1800-mailbox", }, + {}, +}; +MODULE_DEVICE_TABLE(of, cv1800_mbox_of_match); + +static int cv1800_mbox_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct cv1800_mbox *mb; + int irq, idx, err; + + if (!dev->of_node) + return -ENODEV; + + mb = devm_kzalloc(dev, sizeof(*mb), GFP_KERNEL); + if (!mb) + return -ENOMEM; + + mb->mbox_base = devm_of_iomap(dev, dev->of_node, 0, NULL); + if (IS_ERR(mb->mbox_base)) + return dev_err_probe(dev, PTR_ERR(mb->mbox_base), + "Failed to map resource\n"); + + mb->mbox.dev = dev; + mb->mbox.chans = mb->chans; + mb->mbox.txdone_poll = true; + mb->mbox.ops = &cv1800_mbox_chan_ops; + mb->mbox.num_chans = MAILBOX_MAX_CHAN; + mb->mbox.of_xlate = cv1800_mbox_xlate; + + irq = platform_get_irq_byname(pdev, "mailbox"); + err = devm_request_threaded_irq(dev, irq, cv1800_mbox_irq, + cv1800_mbox_isr, IRQF_ONESHOT, + dev_name(&pdev->dev), mb); + if (err < 0) + return dev_err_probe(dev, err, "Failed to register irq\n"); + + for (idx = 0; idx < MAILBOX_MAX_CHAN; idx++) { + mb->priv[idx].idx = idx; + mb->mbox.chans[idx].con_priv = &mb->priv[idx]; + } + + err = devm_mbox_controller_register(dev, &mb->mbox); + if (err) + return dev_err_probe(dev, err, "Failed to register mailbox\n"); + + platform_set_drvdata(pdev, mb); + return 0; +} + +static struct platform_driver cv1800_mbox_driver = { + .driver = { + .name = "cv1800-mbox", + .of_match_table = cv1800_mbox_of_match, + }, + .probe = cv1800_mbox_probe, +}; + +module_platform_driver(cv1800_mbox_driver); + +MODULE_DESCRIPTION("cv1800 mailbox driver"); +MODULE_LICENSE("GPL");