From patchwork Mon Jul 15 04:49:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13732863 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 87CB9139CF7 for ; Mon, 15 Jul 2024 04:34:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721018064; cv=none; b=Ng66mJxBStF/Wkfkjd1KN166VL2ceGwrzvyBpXFkZFuoZ+9fc4xxerfZcse6Pg7axfSWeUe1vMUKIWPpQhgR9sKQt+WjnuVqRfamD/XqtcGHR2TFYwaKSyFhi9Gjl8zTwdN/fkr251NVGbaPnloUgc2b09ZbVyXVu9GQ0MjoBYA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721018064; c=relaxed/simple; bh=aSztLg0iNMT3uyyClDjLkfY1lXlQlvk27Z83Xiyv+UE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=nFwGGUFLyEQ0ktV8/j8MTWt/p8Ig8RB0+CGQ10SakVSPIgUBmUzBv7fU7XMph/dQ0Xx5TU35cKKj2Uo69hORYVYATrTxUaqkj6dIWh97HnWti3DpBt96YUtxINZ8a7g2hgrucE+gwBjfxSc2fAudFDCK7RdDmcF/HKnY4LQOf8Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Eg4SZTRi; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Eg4SZTRi" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721018063; x=1752554063; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aSztLg0iNMT3uyyClDjLkfY1lXlQlvk27Z83Xiyv+UE=; b=Eg4SZTRiew7Hpyh8qWw4bq45KEYojTEUppaobgRY7EhB1grK2cIFK1Tc WaI4OIn01UiSlkH+NdG1kWpIwHVFpUxj/7Wti/VcLzhp9FuNjXyCdUR79 eOeY3NekFcs8cTjoUtV64gO3e42SdHdz7ltWgNpbDdLKPiv0c+GkOb7Ce e0DSK0USuTKoY+UrcO0G4ZTkmOHZ2h2M0CnpRLg0hh4AkzKzhassKzvZ0 mbwfmjUXX5l1+DSIwf47LJxJSZzjJTxi6+5jk1LKkdTec5Y3rbMQescES F0rjvMZlLD369hxkMG0byZ8Y5SIsHeVrOYvqIDj1MPWMV4lNB9X8X8be8 A==; X-CSE-ConnectionGUID: 8giWVrnuQVyCm8zo2MxCDQ== X-CSE-MsgGUID: LCtvETIYRUukQtd9Cp3iIA== X-IronPort-AV: E=McAfee;i="6700,10204,11133"; a="35809800" X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="35809800" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jul 2024 21:34:23 -0700 X-CSE-ConnectionGUID: qLMAMfovQ4at0ONxQWqhBA== X-CSE-MsgGUID: mqDUxjmfQVuAsdrJZBP1xA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="54043035" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa004.fm.intel.com with ESMTP; 14 Jul 2024 21:34:19 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v3 1/8] target/i386/kvm: Add feature bit definitions for KVM CPUID Date: Mon, 15 Jul 2024 12:49:48 +0800 Message-Id: <20240715044955.3954304-2-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240715044955.3954304-1-zhao1.liu@intel.com> References: <20240715044955.3954304-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add feature definitions for KVM_CPUID_FEATURES in CPUID ( CPUID[4000_0001].EAX and CPUID[4000_0001].EDX), to get rid of lots of offset calculations. Signed-off-by: Zhao Liu --- v3: Resolved a rebasing conflict. v2: Changed the prefix from CPUID_FEAT_KVM_* to CPUID_KVM_*. (Xiaoyao) --- hw/i386/kvm/clock.c | 5 ++--- target/i386/cpu.h | 23 +++++++++++++++++++++++ target/i386/kvm/kvm.c | 28 ++++++++++++++-------------- 3 files changed, 39 insertions(+), 17 deletions(-) diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c index 40aa9a32c32c..ce416c05a3d0 100644 --- a/hw/i386/kvm/clock.c +++ b/hw/i386/kvm/clock.c @@ -27,7 +27,6 @@ #include "qapi/error.h" #include -#include "standard-headers/asm-x86/kvm_para.h" #include "qom/object.h" #define TYPE_KVM_CLOCK "kvmclock" @@ -334,8 +333,8 @@ void kvmclock_create(bool create_always) assert(kvm_enabled()); if (create_always || - cpu->env.features[FEAT_KVM] & ((1ULL << KVM_FEATURE_CLOCKSOURCE) | - (1ULL << KVM_FEATURE_CLOCKSOURCE2))) { + cpu->env.features[FEAT_KVM] & (CPUID_KVM_CLOCK | + CPUID_KVM_CLOCK2)) { sysbus_create_simple(TYPE_KVM_CLOCK, -1, NULL); } } diff --git a/target/i386/cpu.h b/target/i386/cpu.h index c43ac01c794a..b59bdc1c9d9d 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -28,6 +28,7 @@ #include "qapi/qapi-types-common.h" #include "qemu/cpu-float.h" #include "qemu/timer.h" +#include "standard-headers/asm-x86/kvm_para.h" #define XEN_NR_VIRQS 24 @@ -988,6 +989,28 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); #define CPUID_8000_0007_EBX_OVERFLOW_RECOV (1U << 0) #define CPUID_8000_0007_EBX_SUCCOR (1U << 1) +/* (Old) KVM paravirtualized clocksource */ +#define CPUID_KVM_CLOCK (1U << KVM_FEATURE_CLOCKSOURCE) +/* (New) KVM specific paravirtualized clocksource */ +#define CPUID_KVM_CLOCK2 (1U << KVM_FEATURE_CLOCKSOURCE2) +/* KVM asynchronous page fault */ +#define CPUID_KVM_ASYNCPF (1U << KVM_FEATURE_ASYNC_PF) +/* KVM stolen (when guest vCPU is not running) time accounting */ +#define CPUID_KVM_STEAL_TIME (1U << KVM_FEATURE_STEAL_TIME) +/* KVM paravirtualized end-of-interrupt signaling */ +#define CPUID_KVM_PV_EOI (1U << KVM_FEATURE_PV_EOI) +/* KVM paravirtualized spinlocks support */ +#define CPUID_KVM_PV_UNHALT (1U << KVM_FEATURE_PV_UNHALT) +/* KVM host-side polling on HLT control from the guest */ +#define CPUID_KVM_POLL_CONTROL (1U << KVM_FEATURE_POLL_CONTROL) +/* KVM interrupt based asynchronous page fault*/ +#define CPUID_KVM_ASYNCPF_INT (1U << KVM_FEATURE_ASYNC_PF_INT) +/* KVM 'Extended Destination ID' support for external interrupts */ +#define CPUID_KVM_MSI_EXT_DEST_ID (1U << KVM_FEATURE_MSI_EXT_DEST_ID) + +/* Hint to KVM that vCPUs expect never preempted for an unlimited time */ +#define CPUID_KVM_HINTS_REALTIME (1U << KVM_HINTS_REALTIME) + /* CLZERO instruction */ #define CPUID_8000_0008_EBX_CLZERO (1U << 0) /* Always save/restore FP error pointers */ diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index becca2efa5b4..86e42beb78bf 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -539,13 +539,13 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, * be enabled without the in-kernel irqchip */ if (!kvm_irqchip_in_kernel()) { - ret &= ~(1U << KVM_FEATURE_PV_UNHALT); + ret &= ~CPUID_KVM_PV_UNHALT; } if (kvm_irqchip_is_split()) { - ret |= 1U << KVM_FEATURE_MSI_EXT_DEST_ID; + ret |= CPUID_KVM_MSI_EXT_DEST_ID; } } else if (function == KVM_CPUID_FEATURES && reg == R_EDX) { - ret |= 1U << KVM_HINTS_REALTIME; + ret |= CPUID_KVM_HINTS_REALTIME; } if (current_machine->cgs) { @@ -3424,20 +3424,20 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_IA32_TSC, env->tsc); kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF_INT)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_EN, env->async_pf_en_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_PV_EOI)) { + if (env->features[FEAT_KVM] & CPUID_KVM_PV_EOI) { kvm_msr_entry_add(cpu, MSR_KVM_PV_EOI_EN, env->pv_eoi_en_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_STEAL_TIME)) { + if (env->features[FEAT_KVM] & CPUID_KVM_STEAL_TIME) { kvm_msr_entry_add(cpu, MSR_KVM_STEAL_TIME, env->steal_time_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_POLL_CONTROL)) { + if (env->features[FEAT_KVM] & CPUID_KVM_POLL_CONTROL) { kvm_msr_entry_add(cpu, MSR_KVM_POLL_CONTROL, env->poll_control_msr); } @@ -3900,19 +3900,19 @@ static int kvm_get_msrs(X86CPU *cpu) #endif kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF_INT)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_EN, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_PV_EOI)) { + if (env->features[FEAT_KVM] & CPUID_KVM_PV_EOI) { kvm_msr_entry_add(cpu, MSR_KVM_PV_EOI_EN, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_STEAL_TIME)) { + if (env->features[FEAT_KVM] & CPUID_KVM_STEAL_TIME) { kvm_msr_entry_add(cpu, MSR_KVM_STEAL_TIME, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_POLL_CONTROL)) { + if (env->features[FEAT_KVM] & CPUID_KVM_POLL_CONTROL) { kvm_msr_entry_add(cpu, MSR_KVM_POLL_CONTROL, 1); } if (has_architectural_pmu_version > 0) { @@ -5613,7 +5613,7 @@ uint64_t kvm_swizzle_msi_ext_dest_id(uint64_t address) return address; } env = &X86_CPU(first_cpu)->env; - if (!(env->features[FEAT_KVM] & (1 << KVM_FEATURE_MSI_EXT_DEST_ID))) { + if (!(env->features[FEAT_KVM] & CPUID_KVM_MSI_EXT_DEST_ID)) { return address; } From patchwork Mon Jul 15 04:49:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13732864 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C87FF13A89C for ; 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a="35809812" X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="35809812" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jul 2024 21:34:26 -0700 X-CSE-ConnectionGUID: 1TK6ChxeSL2fX8CDCR/HwQ== X-CSE-MsgGUID: 4lGA0LgxTMmECm7U3JD7IQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="54043046" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa004.fm.intel.com with ESMTP; 14 Jul 2024 21:34:22 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v3 2/8] target/i386/kvm: Remove local MSR_KVM_WALL_CLOCK and MSR_KVM_SYSTEM_TIME definitions Date: Mon, 15 Jul 2024 12:49:49 +0800 Message-Id: <20240715044955.3954304-3-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240715044955.3954304-1-zhao1.liu@intel.com> References: <20240715044955.3954304-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 These 2 MSRs have been already defined in kvm_para.h (standard-headers/ asm-x86/kvm_para.h). Remove QEMU local definitions to avoid duplication. Reviewed-by: Xiaoyao Li Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 86e42beb78bf..6ad5a7dbf1fd 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -81,9 +81,6 @@ #define KVM_APIC_BUS_CYCLE_NS 1 #define KVM_APIC_BUS_FREQUENCY (1000000000ULL / KVM_APIC_BUS_CYCLE_NS) -#define MSR_KVM_WALL_CLOCK 0x11 -#define MSR_KVM_SYSTEM_TIME 0x12 - /* A 4096-byte buffer can hold the 8-byte kvm_msrs header, plus * 255 kvm_msr_entry structs */ #define MSR_BUF_SIZE 4096 From patchwork Mon Jul 15 04:49:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13732865 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CDB413AA3E for ; Mon, 15 Jul 2024 04:34:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721018069; cv=none; b=eZve9kFsnl/MaVgRiZ4uRnEsgydygKYm3bJGjEI4ZkDUDcOMZJQ3mB0PkSyHhW4TbXFDwy0HYY0jIvPVn31aF49q5+iJ367He+02RgGYPH6zpzC/nfJq2888gxzDcSUrEXqCtmVi2opgDqSGx15X24A9ukg6dyHWxoCzo91yxd0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721018069; c=relaxed/simple; bh=tKr89zQ0Ud3Nsxehy7urxxT9zgviuntFd5ByL5dN0Dg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Gkh7TLp9u9LIIqJt9bkaJHWtvLoy2FKgucbr2ScyR/FF97vXUbH5cZJtG/e7AMmI0vu+Gc1NVkacSDYfAVlf2R/LcKgx8ul4QECHBI7+9nOcv0laZSEOHvZzZKrLuv73/kyYDP41wvy+6g3WHKsHBk/zmHsagbvu0tbU6l6K+OE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dAd3iVlK; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dAd3iVlK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721018069; x=1752554069; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tKr89zQ0Ud3Nsxehy7urxxT9zgviuntFd5ByL5dN0Dg=; b=dAd3iVlKiZryJMnGveaR+BnRJeaGS4YtN4FUwNmIHCfShgOlOvhgDKVR 3mpDQf4Nu34dkjYLna4tdpzYNiVEmJENHfDUESUqMcwvFdL9LYQdisqt2 166uePvcUoYgiR9MenU6oSjksYdubWuSk0+fQ5unh6SyzWMSkbt36Zq79 h7EB8N/IRm5YFg7zkkJLKjUmno5FF1QnUWEzmLH15dqd1lMrW5aa67Dun 0K8niGMTEEcBCPDqLFYGgk92iLewR525u7oORb3NQH4/VeX4Ij3HQHJzB tF3eP3sTqZg+VU/FBa1t85BKa7mtm5f8QLrxPJTJRLU1tcu/1hhsGCkTM A==; X-CSE-ConnectionGUID: Zbvug6AKT0iF9V0r8+AZ5g== X-CSE-MsgGUID: VRwf282YQrm1833CEzxv3Q== X-IronPort-AV: E=McAfee;i="6700,10204,11133"; a="35809825" X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="35809825" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jul 2024 21:34:28 -0700 X-CSE-ConnectionGUID: d46rdVzSQbq2gUIPsr/NmA== X-CSE-MsgGUID: Bdj/zOvLSmGvktFde+KVAQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="54043070" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa004.fm.intel.com with ESMTP; 14 Jul 2024 21:34:25 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v3 3/8] target/i386/kvm: Only save/load kvmclock MSRs when kvmclock enabled Date: Mon, 15 Jul 2024 12:49:50 +0800 Message-Id: <20240715044955.3954304-4-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240715044955.3954304-1-zhao1.liu@intel.com> References: <20240715044955.3954304-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 MSR_KVM_SYSTEM_TIME and MSR_KVM_WALL_CLOCK are attached with the (old) kvmclock feature (KVM_FEATURE_CLOCKSOURCE). So, just save/load them only when kvmclock (KVM_FEATURE_CLOCKSOURCE) is enabled. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 6ad5a7dbf1fd..ac434e83b64c 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3419,8 +3419,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level) */ if (level >= KVM_PUT_RESET_STATE) { kvm_msr_entry_add(cpu, MSR_IA32_TSC, env->tsc); - kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); - kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } @@ -3895,8 +3897,10 @@ static int kvm_get_msrs(X86CPU *cpu) } } #endif - kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); - kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } From patchwork Mon Jul 15 04:49:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13732866 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C630B183098 for ; Mon, 15 Jul 2024 04:34:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721018073; cv=none; b=B1KvjEaRffHSrVjr9DAKU2LP4VJmvM5TLLJPOlBSGmWG/M4RctKF4cuugyQexM//ikWU6mmLCks1IXIppcessWwF9XLEjLUTKd/BUi0Lypo/pKxIGzkj6hVnl5PLm0PguptuPS7YzzSWO9QYE5p0RVC7XbmsboU6N4wY0/8oL/o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721018073; c=relaxed/simple; bh=M+INEDceyzqNpPErcKN6L7u48TTH5fEDjgdcYW5fAXE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=JStAzSHdqHde5xNG0BmdOEv/Gp4cbbGyK7GQ1M1EL8DZ3i8IAflwHuoXUizs3jAtynBZ97ZOejEedFGJxaTrzNVpcUlvbt7yHl3//b/SjKR2mnd1wCSvcEg9zGAqDqoZ+9jI8UALBXm1kbed8c8d1EPTAb5vbCKk8Po/MzICI6Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=URoA88wm; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="URoA88wm" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721018071; x=1752554071; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=M+INEDceyzqNpPErcKN6L7u48TTH5fEDjgdcYW5fAXE=; b=URoA88wmcOnPmEiS3vJs/2mG7z1KeXfC2+snKet/I6CvOmJgrZP473j+ cgmoDZRJ7F7NQrlAlcUCz/ASiR7nOr6Eq4oP8+MePo4kaE9aYC3ZYiwda NpTs8iCC9jBoYwAMiyHTiMO59ZJnpn37wdNwGtLcoxs0AaSC+w/1Lb2eQ eDpbu3bJiDT8VTkieI3LYdjk8vyBjc1BeCduFvoG8RZadWWZ2+G2gcUE0 HMlFWdEBHIYGnBvMMdQbm5M27bm6swcIPz9wCTvI/GTrjPgTgjcB+kp0u yU/WN59oZptW669eBa9HT3yBD3C9lkSKpDt0Kc6c8dX1Lun/GffJxPBbN Q==; X-CSE-ConnectionGUID: ZC3yFnfhS5WcNEvzHR6bGQ== X-CSE-MsgGUID: 5U59UDMXTBut2AF3sgZicg== X-IronPort-AV: E=McAfee;i="6700,10204,11133"; a="35809835" X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="35809835" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jul 2024 21:34:31 -0700 X-CSE-ConnectionGUID: IUZVOMfsSeuOAnE6OaYd3g== X-CSE-MsgGUID: FrKreY+VTgumQl8oR9BvwA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="54043083" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa004.fm.intel.com with ESMTP; 14 Jul 2024 21:34:28 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v3 4/8] target/i386/kvm: Save/load MSRs of kvmclock2 (KVM_FEATURE_CLOCKSOURCE2) Date: Mon, 15 Jul 2024 12:49:51 +0800 Message-Id: <20240715044955.3954304-5-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240715044955.3954304-1-zhao1.liu@intel.com> References: <20240715044955.3954304-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 MSR_KVM_SYSTEM_TIME_NEW and MSR_KVM_WALL_CLOCK_NEW are bound to kvmclock2 (KVM_FEATURE_CLOCKSOURCE2). Add the save/load support for these 2 MSRs just like kvmclock MSRs. Signed-off-by: Zhao Liu --- target/i386/cpu.h | 2 ++ target/i386/kvm/kvm.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index b59bdc1c9d9d..35dc68631989 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1826,6 +1826,8 @@ typedef struct CPUArchState { uint64_t system_time_msr; uint64_t wall_clock_msr; + uint64_t system_time_new_msr; + uint64_t wall_clock_new_msr; uint64_t steal_time_msr; uint64_t async_pf_en_msr; uint64_t async_pf_int_msr; diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index ac434e83b64c..64e54beac7b3 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3423,6 +3423,12 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); } + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK2) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME_NEW, + env->system_time_new_msr); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK_NEW, + env->wall_clock_new_msr); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } @@ -3901,6 +3907,10 @@ static int kvm_get_msrs(X86CPU *cpu) kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); } + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK2) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME_NEW, 0); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK_NEW, 0); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } @@ -4167,6 +4177,12 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_KVM_WALL_CLOCK: env->wall_clock_msr = msrs[i].data; break; + case MSR_KVM_SYSTEM_TIME_NEW: + env->system_time_new_msr = msrs[i].data; + break; + case MSR_KVM_WALL_CLOCK_NEW: + env->wall_clock_new_msr = msrs[i].data; + break; case MSR_MCG_STATUS: env->mcg_status = msrs[i].data; break; From patchwork Mon Jul 15 04:49:52 2024 Content-Type: text/plain; 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Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v3 5/8] target/i386/kvm: Drop workaround for KVM_X86_DISABLE_EXITS_HTL typo Date: Mon, 15 Jul 2024 12:49:52 +0800 Message-Id: <20240715044955.3954304-6-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240715044955.3954304-1-zhao1.liu@intel.com> References: <20240715044955.3954304-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The KVM_X86_DISABLE_EXITS_HTL typo has been fixed in commit 77d361b13c19 ("linux-headers: Update to kernel mainline commit b357bf602"). Drop the related workaround. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 64e54beac7b3..4aae4ffc9ccd 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2728,10 +2728,6 @@ int kvm_arch_init(MachineState *ms, KVMState *s) if (enable_cpu_pm) { int disable_exits = kvm_check_extension(s, KVM_CAP_X86_DISABLE_EXITS); -/* Work around for kernel header with a typo. TODO: fix header and drop. */ -#if defined(KVM_X86_DISABLE_EXITS_HTL) && !defined(KVM_X86_DISABLE_EXITS_HLT) -#define KVM_X86_DISABLE_EXITS_HLT KVM_X86_DISABLE_EXITS_HTL -#endif if (disable_exits) { disable_exits &= (KVM_X86_DISABLE_EXITS_MWAIT | KVM_X86_DISABLE_EXITS_HLT | From patchwork Mon Jul 15 04:49:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13732868 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8AA8A139CF7 for ; Mon, 15 Jul 2024 04:34:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721018078; cv=none; b=R/H+SydPMkxTrNerQ4x5rmhR9S6tajxIPo0V7fOKaAiIx5EQk3ORdl1oQzJoXB4zT5LQbJFRDfbnqU0Khh9NAJrC13vCvH8v8CXSqlvjttSeZVfBn8gAkPUgmxTrCp7qlhVPdIXxkjBR++Hkc2/2YnYSX3T3yU53jV8tEWpF8q4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721018078; c=relaxed/simple; bh=u1cSsKiZS4LgVHWKLVbqsnZaR8V7g5t3vC4cMVukk+s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=gPa7uJAQjbp6tJZUJ/Tn2+D0ACs8mXFIPBxNZf/a3/5zsqHutysGEPub2HxAo1D8p9fy8pFCfo1vofHAi+WYzy9hCBlMGKooA1CqDJt9nOsBACbXIb7saEAkf6fca/pZ+UxAeyV8A3tTDI9ldvoPz0hjIYIUGr2P5DjK6KJNnWY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cjyQGqMA; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cjyQGqMA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721018077; x=1752554077; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=u1cSsKiZS4LgVHWKLVbqsnZaR8V7g5t3vC4cMVukk+s=; b=cjyQGqMAHrFBzHGmecLQmQBRSY/Ddiy7FB1Y1goxWOSqv4NdArLyteGG b1Zqc26kG1UxK+2dchjXXAAngv9GA6F+Ixb96saqJBwRcGRbaTdfsOQkn gLqmYCh5Lt7qW6GcO/CJXGajDKmn4h83RU/CnUnoI1MO9JZi+bpbaq05O s64Fppa44ObsJA0dcZljBJPe0ZzDcktXuItZMBhQNpOisyxqs8GRQKlPA qipwqB7CmRARUpx4kl2Gg4ejyh67jxJhFSxcWQj23CfVI6aSGGKtmf1Dw Mw57SfOED2KB1LefbSszSvb2eXBygimnV/kihKjYpS2qQhsLs3x4EH0CI w==; X-CSE-ConnectionGUID: sQqZkRprQwmt99ZOh09FOQ== X-CSE-MsgGUID: Fj8K9EOdS9eKSooQPTUgKw== X-IronPort-AV: E=McAfee;i="6700,10204,11133"; a="35809850" X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="35809850" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jul 2024 21:34:37 -0700 X-CSE-ConnectionGUID: mkQ7gO4nQv6RF0012GTDWg== X-CSE-MsgGUID: C+xQ9yLOT4aENov63PuQ8A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="54043096" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa004.fm.intel.com with ESMTP; 14 Jul 2024 21:34:33 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v3 6/8] target/i386/confidential-guest: Fix comment of x86_confidential_guest_kvm_type() Date: Mon, 15 Jul 2024 12:49:53 +0800 Message-Id: <20240715044955.3954304-7-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240715044955.3954304-1-zhao1.liu@intel.com> References: <20240715044955.3954304-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Update the comment to match the X86ConfidentialGuestClass implementation. Reported-by: Xiaoyao Li Signed-off-by: Zhao Liu Reviewed-by: Pankaj Gupta --- target/i386/confidential-guest.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/confidential-guest.h b/target/i386/confidential-guest.h index 7342d2843aa5..c90a59bac41a 100644 --- a/target/i386/confidential-guest.h +++ b/target/i386/confidential-guest.h @@ -46,7 +46,7 @@ struct X86ConfidentialGuestClass { /** * x86_confidential_guest_kvm_type: * - * Calls #X86ConfidentialGuestClass.unplug callback of @plug_handler. + * Calls #X86ConfidentialGuestClass.kvm_type() callback. */ static inline int x86_confidential_guest_kvm_type(X86ConfidentialGuest *cg) { From patchwork Mon Jul 15 04:49:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13732869 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86AE5139CF7 for ; Mon, 15 Jul 2024 04:34:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721018081; cv=none; b=r/OT5s+IBNnPjT5OZ6Kr25JP45B71Q5fPfJ18gmmTiQXOdLzNaOwlyjUwzEim8CsKq95hneldHLP1LcANWm63+sKC8ZzhihDY3bppVlomF8EcFijmn87D+vlzTDCD+leG4XIXE7s7E12HnKjE/jWA8Z6kv0jcqJkDa8iT/V9chw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721018081; c=relaxed/simple; bh=yLNWhHrtOyoeQooeafFrZVJbCO/Btc3+xL/n3wetEgs=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=bclXdwraPdRM3lEg+gCgXCvR9Ii+TYx8FET/JKmMlcfK4F0vO5zpR1pxCR6uXdjAPatKb+gdNNqzWCzBTpKvnbBNyMGIGO9MGashMG6oPAPBjupDgbtcwVK8h6wKoSqXi6j9Kgw4qhhlszUuEtyGKOoi2qfh8MuD+X1xB58+KKA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hU/RvBB0; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hU/RvBB0" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721018080; x=1752554080; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yLNWhHrtOyoeQooeafFrZVJbCO/Btc3+xL/n3wetEgs=; b=hU/RvBB0D48QmKyGQCQE7GGw8XRtYHt/hT+W2Ww3kha1FeIFQcI5eg8R Dvvfj0nbsAAURngupVsBQevcumeQIWCXXAr4N936kMQHr8Fwc4qLK/SE4 vrKxg2k6sUmbLaLkvnwR2hO1ySUB0Jw73Z1MYOBUaaY2z2mCobehCQDTs aUrImMGrCQ/3RWkVIE7FeVpodUSgZif2KauD5MG6xO7rE//H/+RpemrnF 0aYIsXR2ZGS1DLBlg6TcPcoMpNSagOVrY3EK5+j1HwpuYuy1T0+ANAUl0 uz9EVBi1Tj7aQyDI+xnRDJM+pjgJ2NN4tZRHl9AxFuOwEqX/vpnCMr0IY Q==; X-CSE-ConnectionGUID: 3dy+P2qfQXGLgeQp2al5vQ== X-CSE-MsgGUID: WzWSuiVARkm5i7EKAtQqyg== X-IronPort-AV: E=McAfee;i="6700,10204,11133"; a="35809858" X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="35809858" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jul 2024 21:34:40 -0700 X-CSE-ConnectionGUID: VWjhGhwBQdCqLgABca1ilg== X-CSE-MsgGUID: 6DEZMmFoTTOlfpcrOYp8jg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="54043137" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa004.fm.intel.com with ESMTP; 14 Jul 2024 21:34:36 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v3 7/8] target/i386/kvm: Clean up return values of MSR filter related functions Date: Mon, 15 Jul 2024 12:49:54 +0800 Message-Id: <20240715044955.3954304-8-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240715044955.3954304-1-zhao1.liu@intel.com> References: <20240715044955.3954304-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 At present, the error code of MSR filter enablement is attempted to be printed in error_report(). Unfortunately, this behavior doesn't work because the MSR filter-related functions return the boolean and current error_report() use the wrong return value. So fix this by making MSR filter related functions return int type and printing such returned value in error_report(). Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 35 +++++++++++++++++------------------ target/i386/kvm/kvm_i386.h | 4 ++-- 2 files changed, 19 insertions(+), 20 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 4aae4ffc9ccd..0fd1d099ae4c 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2780,8 +2780,6 @@ int kvm_arch_init(MachineState *ms, KVMState *s) } } if (kvm_vm_check_extension(s, KVM_CAP_X86_USER_SPACE_MSR)) { - bool r; - ret = kvm_vm_enable_cap(s, KVM_CAP_X86_USER_SPACE_MSR, 0, KVM_MSR_EXIT_REASON_FILTER); if (ret) { @@ -2790,9 +2788,9 @@ int kvm_arch_init(MachineState *ms, KVMState *s) exit(1); } - r = kvm_filter_msr(s, MSR_CORE_THREAD_COUNT, - kvm_rdmsr_core_thread_count, NULL); - if (!r) { + ret = kvm_filter_msr(s, MSR_CORE_THREAD_COUNT, + kvm_rdmsr_core_thread_count, NULL); + if (ret) { error_report("Could not install MSR_CORE_THREAD_COUNT handler: %s", strerror(-ret)); exit(1); @@ -5274,13 +5272,13 @@ void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) } } -static bool kvm_install_msr_filters(KVMState *s) +static int kvm_install_msr_filters(KVMState *s) { uint64_t zero = 0; struct kvm_msr_filter filter = { .flags = KVM_MSR_FILTER_DEFAULT_ALLOW, }; - int r, i, j = 0; + int ret, i, j = 0; for (i = 0; i < KVM_MSR_FILTER_MAX_RANGES; i++) { KVMMSRHandlers *handler = &msr_handlers[i]; @@ -5304,18 +5302,18 @@ static bool kvm_install_msr_filters(KVMState *s) } } - r = kvm_vm_ioctl(s, KVM_X86_SET_MSR_FILTER, &filter); - if (r) { - return false; + ret = kvm_vm_ioctl(s, KVM_X86_SET_MSR_FILTER, &filter); + if (ret) { + return ret; } - return true; + return 0; } -bool kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, - QEMUWRMSRHandler *wrmsr) +int kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, + QEMUWRMSRHandler *wrmsr) { - int i; + int i, ret; for (i = 0; i < ARRAY_SIZE(msr_handlers); i++) { if (!msr_handlers[i].msr) { @@ -5325,16 +5323,17 @@ bool kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, .wrmsr = wrmsr, }; - if (!kvm_install_msr_filters(s)) { + ret = kvm_install_msr_filters(s); + if (ret) { msr_handlers[i] = (KVMMSRHandlers) { }; - return false; + return ret; } - return true; + return 0; } } - return false; + return 0; } static int kvm_handle_rdmsr(X86CPU *cpu, struct kvm_run *run) diff --git a/target/i386/kvm/kvm_i386.h b/target/i386/kvm/kvm_i386.h index 34fc60774b86..91c2d6e69163 100644 --- a/target/i386/kvm/kvm_i386.h +++ b/target/i386/kvm/kvm_i386.h @@ -74,8 +74,8 @@ typedef struct kvm_msr_handlers { QEMUWRMSRHandler *wrmsr; } KVMMSRHandlers; -bool kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, - QEMUWRMSRHandler *wrmsr); +int kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, + QEMUWRMSRHandler *wrmsr); #endif /* CONFIG_KVM */ From patchwork Mon Jul 15 04:49:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13732870 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C1B354660 for ; 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a="35809865" X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="35809865" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jul 2024 21:34:43 -0700 X-CSE-ConnectionGUID: k7iJzDdDTD2Rgyq/0IMfyw== X-CSE-MsgGUID: 1K2khsfRRb6jkzlWCBsdZg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,209,1716274800"; d="scan'208";a="54043151" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by fmviesa004.fm.intel.com with ESMTP; 14 Jul 2024 21:34:39 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v3 8/8] target/i386/kvm: Clean up error handling in kvm_arch_init() Date: Mon, 15 Jul 2024 12:49:55 +0800 Message-Id: <20240715044955.3954304-9-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240715044955.3954304-1-zhao1.liu@intel.com> References: <20240715044955.3954304-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently, there're following incorrect error handling cases in kvm_arch_init(): * Missed to handle failure of kvm_get_supported_feature_msrs(). * Missed to return when KVM_CAP_X86_DISABLE_EXITS enabling fails. * MSR filter related cases called exit() directly instead of returning to kvm_init(). Fix the above cases. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 0fd1d099ae4c..246fe12ae411 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2682,7 +2682,10 @@ int kvm_arch_init(MachineState *ms, KVMState *s) return ret; } - kvm_get_supported_feature_msrs(s); + ret = kvm_get_supported_feature_msrs(s); + if (ret < 0) { + return ret; + } uname(&utsname); lm_capable_kernel = strcmp(utsname.machine, "x86_64") == 0; @@ -2740,6 +2743,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) if (ret < 0) { error_report("kvm: guest stopping CPU not supported: %s", strerror(-ret)); + return ret; } } @@ -2785,7 +2789,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) if (ret) { error_report("Could not enable user space MSRs: %s", strerror(-ret)); - exit(1); + return ret; } ret = kvm_filter_msr(s, MSR_CORE_THREAD_COUNT, @@ -2793,7 +2797,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) if (ret) { error_report("Could not install MSR_CORE_THREAD_COUNT handler: %s", strerror(-ret)); - exit(1); + return ret; } }