From patchwork Mon Jul 15 10:51:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733310 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE16FC3DA5D for ; Mon, 15 Jul 2024 10:52:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=B0lNPAQd9L+BKWNeE7Gqjs1LS8awyag0tTjDS7wvk7c=; b=iVgDU4fndLkKLCd7FA7ozbXTgF 3x4xRmy61IanQcXhhhf0QPtmC4mYGmYbg4PEAKh4ek9nMbdZuFQegcbGBnGA5AyaG243UbGodlUMc aqo+7jkffAAO/HBXS31ORaEhsLxOcWVwQM4zG+GgW9AXSEkPh8fAmi1Sps8gNX0Olc2CCvT7wj8bW z4HO15q5pCzEiqxn+kdfex9PhaMFwpG0QBKSOxXbj9aMUMWbPc7spIQuauH6ZiWZlAL8EPvK41sQh 0EowprkD7a1/GJXtfYSVjcVXoJODM+24djZxjuwF/DYffaGUwDdoCEWxm8O+4++qi7fIjHCOpeM2E INfBNKmg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJJx-00000006lXs-2dzG; Mon, 15 Jul 2024 10:52:41 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJJQ-00000006lKs-3Ig4 for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 10:52:10 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 3321BCE0ECE; Mon, 15 Jul 2024 10:52:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 51BE5C4AF0A; Mon, 15 Jul 2024 10:52:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040726; bh=Jsretw5fAsAe+nGUi2+h6BjL0rwdi6ENg+FAsgPqFPY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nVy/R0Al9HiTmXtGvimEQ6CxU7pC+DyyFT8hghPBNrFfBJbsryTT2LN1J/IsRGF9V zEw4Q39kVuu/z3k2wdW0xgC6r693JXoHBFxFkUHNgUsylyWmXKNt9lmQ8S3sSS4eeh tcEKATCkxOwTfjMmNjXAPvbX2CmcARLGL648r/ppFE2VjRoi6veJmaR7uq4tJlVRJW cznomziUwIAvIZb+XWgu0EahMe+DZIYXIcLx1T1rkwAzy1rSxMCooO/3HWPFUxpwvB s+5KB85lVerngsLQNkJsMxic5gKDGaRJVARdZZDdX5MnwCPLY5ENxkRKsmQ3UmxXKi CdtHYir1b2f7g== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 01/13] irqchip/armada-370-xp: Drop IPI_DOORBELL_START and rename IPI_DOORBELL_END Date: Mon, 15 Jul 2024 12:51:44 +0200 Message-ID: <20240715105156.18388-2-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035209_019857_A8538179 X-CRM114-Status: GOOD ( 13.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Drop IPI_DOORBELL_START since it is not used and rename IPI_DOORBELL_END to IPI_DOORBELL_NR. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index c93fab8ac2e4..8fb70a2e0206 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -136,8 +136,7 @@ #define MPIC_MAX_PER_CPU_IRQS 28 /* IPI and MSI interrupt definitions for IPI platforms */ -#define IPI_DOORBELL_START 0 -#define IPI_DOORBELL_END 8 +#define IPI_DOORBELL_NR 8 #define IPI_DOORBELL_MASK GENMASK(7, 0) #define PCI_MSI_DOORBELL_START 16 #define PCI_MSI_DOORBELL_NR 16 @@ -461,7 +460,7 @@ static const struct irq_domain_ops mpic_ipi_domain_ops = { static void mpic_ipi_resume(void) { - for (irq_hw_number_t i = 0; i < IPI_DOORBELL_END; i++) { + for (irq_hw_number_t i = 0; i < IPI_DOORBELL_NR; i++) { unsigned int virq = irq_find_mapping(mpic_ipi_domain, i); struct irq_data *d; @@ -478,18 +477,18 @@ static __init int mpic_ipi_init(struct device_node *node) int base_ipi; mpic_ipi_domain = irq_domain_create_linear(of_node_to_fwnode(node), - IPI_DOORBELL_END, + IPI_DOORBELL_NR, &mpic_ipi_domain_ops, NULL); if (WARN_ON(!mpic_ipi_domain)) return -ENOMEM; irq_domain_update_bus_token(mpic_ipi_domain, DOMAIN_BUS_IPI); - base_ipi = irq_domain_alloc_irqs(mpic_ipi_domain, IPI_DOORBELL_END, + base_ipi = irq_domain_alloc_irqs(mpic_ipi_domain, IPI_DOORBELL_NR, NUMA_NO_NODE, NULL); if (WARN_ON(!base_ipi)) return -ENOMEM; - set_smp_ipi_range(base_ipi, IPI_DOORBELL_END); + set_smp_ipi_range(base_ipi, IPI_DOORBELL_NR); return 0; } @@ -641,7 +640,7 @@ static void mpic_handle_ipi_irq(void) cause = readl_relaxed(per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); cause &= IPI_DOORBELL_MASK; - for_each_set_bit(i, &cause, IPI_DOORBELL_END) + for_each_set_bit(i, &cause, IPI_DOORBELL_NR) generic_handle_domain_irq(mpic_ipi_domain, i); } #else From patchwork Mon Jul 15 10:51:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733311 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BED0EC3DA5D for ; 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Mon, 15 Jul 2024 10:52:57 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJJU-00000006lLM-0iKU for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 10:52:13 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id CA667CE0EF3; Mon, 15 Jul 2024 10:52:09 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E8AF7C4AF0B; Mon, 15 Jul 2024 10:52:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040729; bh=AnmYC7i4Ke+Wf+DIm/t5NkZWiLWC0n97OJAqGG29dKw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WaQyYyp1lQl1LIcmvhskbMWs/Xj6ZyjUZHERKnz3g5/tg1F74Um9wf3VLXwFi3YGS L6xl3zCiUwWpxQeC7kS6im9pSC4zgFyLTf8bfu9zXSFQ0BwiaPbQ3+727AHiw59SPG 1DJjpZuCVrGsMyii1brbsCgIQRfcqVbYcSKqOHwNwBbR/qF7cr60wgWLrlFxmFxS0D qA9P3sbPrS3373n+0GrR2nEnAllG0y9iGwuGcCNU/Sdc3/Db0aUyN3n9cNsKy1WNVI J3vbZL4jRQiJVE6ZOZGiO31JZR/QyjkkzjwMalYrCb5mPqV7AJS6EDRskwt22A84yn TuSbIgJqV39IA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 02/13] irqchip/armada-370-xp: Drop msi_doorbell_end() Date: Mon, 15 Jul 2024 12:51:45 +0200 Message-ID: <20240715105156.18388-3-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035212_406602_ABF89DA0 X-CRM114-Status: UNSURE ( 9.83 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Drop the msi_doorbell_end() function and related constants, it is not used anymore. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 8fb70a2e0206..590f08b9dbf7 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -140,13 +140,11 @@ #define IPI_DOORBELL_MASK GENMASK(7, 0) #define PCI_MSI_DOORBELL_START 16 #define PCI_MSI_DOORBELL_NR 16 -#define PCI_MSI_DOORBELL_END 32 #define PCI_MSI_DOORBELL_MASK GENMASK(31, 16) /* MSI interrupt definitions for non-IPI platforms */ #define PCI_MSI_FULL_DOORBELL_START 0 #define PCI_MSI_FULL_DOORBELL_NR 32 -#define PCI_MSI_FULL_DOORBELL_END 32 #define PCI_MSI_FULL_DOORBELL_MASK GENMASK(31, 0) #define PCI_MSI_FULL_DOORBELL_SRC0_MASK GENMASK(15, 0) #define PCI_MSI_FULL_DOORBELL_SRC1_MASK GENMASK(31, 16) @@ -193,12 +191,6 @@ static inline unsigned int msi_doorbell_size(void) PCI_MSI_FULL_DOORBELL_NR; } -static inline unsigned int msi_doorbell_end(void) -{ - return mpic_is_ipi_available() ? PCI_MSI_DOORBELL_END : - PCI_MSI_FULL_DOORBELL_END; -} - static inline bool mpic_is_percpu_irq(irq_hw_number_t hwirq) { return hwirq <= MPIC_MAX_PER_CPU_IRQS; From patchwork Mon Jul 15 10:51:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733312 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3240EC3DA5D for ; Mon, 15 Jul 2024 10:53:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=IvFMFwVCTdsuq558qzjvMcOKbSRd6XpipcLVKrbFDNI=; b=p8+OTc4yJ6tK9qdscRuT8OHPso iPYbBB+rZDnXZ5XmA0tLShvUbFdIWaAg/y3OXOKjx+iGyg3cYvxp6IaPuLb5HJNI0C+oQAWWQVY7Q OWyNgZGu6Sv1BhVjsAFRs0pxONBR5KxCcrACLfXhBh2QEPGqA2z1C0g4K15YKqNfBzL3Lq0BOzyDb R39eXqOdyYqikyLLMfkkCWjpgk4tkwaQfO8AbBIcAd1iRdZrxlTqWTVOE83oO6rNx5Q2/myhyzyYi e+xrtHT6WH7ix9cogKUOLmid4SfC/8WFt3nKmEAdggaPfb4Dco+Wt2Xu0mx9q3Z2FzYhlsUeZdvei loqr1ynw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJKT-00000006lfu-3s1R; Mon, 15 Jul 2024 10:53:13 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJJW-00000006lM2-0spT for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 10:52:15 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 6DEF9CE0EEA; Mon, 15 Jul 2024 10:52:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8BEFAC32782; Mon, 15 Jul 2024 10:52:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040731; bh=azjt/DjcGUh12b84Mg94z/aFk2FQTq9D7aVgvoC0XG8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uRGIstcmLrr2EnJFx0Ad7inOE5/iA+ktHhmLbwDP+p18T/UgckRurLgTFYiK6HZx9 vky6S8kibnhMYuoxdstQLj8N7WWkegSvTR2W2PVV8wHSSA2cTcgIhGTWBAnqfbIYaw JG03APjnEnPrTyNFUjXlr28UQNCeomYMf/SlwikKwzunIaqzqnS/oR0Ho4WnNZbKUa rceoLGjROKpSJ+PYlbbsF+mJWu6LicLgtSRcSZpNsT32eo6I0FE8yOofKSWWbPie/d DyFdWWjRO1yaKhOU5QtvXwT5SS9JRev3mu3W9+FK8DR8Qpu7rkBeetED9idL+r6gSO 0GeeUWbAb/Ojw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 03/13] irqchip/armada-370-xp: Rename struct irq_domain variables for consistency Date: Mon, 15 Jul 2024 12:51:46 +0200 Message-ID: <20240715105156.18388-4-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035214_629575_7BA8AE20 X-CRM114-Status: GOOD ( 12.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Rename struct irq_domain variables passed as arguments into callbacks to "h", for consistency. The "d" name is reserved for irq_data, while "domain" is unnecessarily long. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 590f08b9dbf7..1739bf768696 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -268,7 +268,7 @@ static struct irq_chip mpic_msi_bottom_irq_chip = { .irq_set_affinity = mpic_msi_set_affinity, }; -static int mpic_msi_alloc(struct irq_domain *domain, unsigned int virq, +static int mpic_msi_alloc(struct irq_domain *h, unsigned int virq, unsigned int nr_irqs, void *args) { int hwirq; @@ -282,18 +282,18 @@ static int mpic_msi_alloc(struct irq_domain *domain, unsigned int virq, return -ENOSPC; for (unsigned int i = 0; i < nr_irqs; i++) - irq_domain_set_info(domain, virq + i, hwirq + i, + irq_domain_set_info(h, virq + i, hwirq + i, &mpic_msi_bottom_irq_chip, - domain->host_data, handle_simple_irq, + h->host_data, handle_simple_irq, NULL, NULL); return 0; } -static void mpic_msi_free(struct irq_domain *domain, unsigned int virq, +static void mpic_msi_free(struct irq_domain *h, unsigned int virq, unsigned int nr_irqs) { - struct irq_data *d = irq_domain_get_irq_data(domain, virq); + struct irq_data *d = irq_domain_get_irq_data(h, virq); mutex_lock(&msi_used_lock); bitmap_release_region(msi_used, d->hwirq, order_base_2(nr_irqs)); @@ -426,20 +426,20 @@ static struct irq_chip mpic_ipi_irqchip = { .ipi_send_mask = mpic_ipi_send_mask, }; -static int mpic_ipi_alloc(struct irq_domain *d, unsigned int virq, +static int mpic_ipi_alloc(struct irq_domain *h, unsigned int virq, unsigned int nr_irqs, void *args) { for (unsigned int i = 0; i < nr_irqs; i++) { irq_set_percpu_devid(virq + i); - irq_domain_set_info(d, virq + i, i, &mpic_ipi_irqchip, - d->host_data, handle_percpu_devid_irq, + irq_domain_set_info(h, virq + i, i, &mpic_ipi_irqchip, + h->host_data, handle_percpu_devid_irq, NULL, NULL); } return 0; } -static void mpic_ipi_free(struct irq_domain *d, unsigned int virq, +static void mpic_ipi_free(struct irq_domain *h, unsigned int virq, unsigned int nr_irqs) { /* Not freeing IPIs */ From patchwork Mon Jul 15 10:51:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733313 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 42323C3DA5D for ; Mon, 15 Jul 2024 10:53:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=aqwKruE3QPIQBgib6r5zrVnk1fGq0iEvQBBJk6FAfto=; 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Mon, 15 Jul 2024 10:52:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040734; bh=K4NFYOC8oStffXCHwSvjto4Ewdglh2t5DDMs3CCvT4c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sfRfa/E4OqI9x4ALZQiiGUnYb+VL7SReaMidHDxqndRxdm8SKHEzpEeVCJEc+Fc3U hMQE1jAjlRk02rhFf5GWkM3SsD6tFzhv9QwUAFZPc5oesdU8GoF9FsMSuGNNasvQB8 /uvR5QwZ9+FD7zNn7ylVAgoZDcma+SBFSg589NC41ZOjWZpZTNniAgm7m90gD1EZ98 hQKqsgMYUz89ftogbgmd5agJH26nNxJo9KKg4HXQOFB7NaEkM4FbVt1o7VoCYG/RoZ uga9GDGPMlH0WAJBmhaykryTunJBXTUJag7/fBYsFcrBsgDLDqC0ac5YGwDZgpsx7I vUc1XR0xx0GeA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 04/13] irqchip/armada-370-xp: Add the __init attribute to mpic_msi_init() Date: Mon, 15 Jul 2024 12:51:47 +0200 Message-ID: <20240715105156.18388-5-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035215_621600_17F5018E X-CRM114-Status: GOOD ( 11.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the __init attribute to the mpic_msi_init() function. It is only called from the device initializer, and so can be dropped after boot is complete. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 1739bf768696..2185f79007f4 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -318,8 +318,8 @@ static void mpic_msi_reenable_percpu(void) writel(1, per_cpu_int_base + MPIC_INT_CLEAR_MASK); } -static int mpic_msi_init(struct device_node *node, - phys_addr_t main_int_phys_base) +static int __init mpic_msi_init(struct device_node *node, + phys_addr_t main_int_phys_base) { msi_doorbell_addr = main_int_phys_base + MPIC_SW_TRIG_INT; From patchwork Mon Jul 15 10:51:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733314 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D080BC3DA5D for ; Mon, 15 Jul 2024 10:53:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=wa0bJqUQSMWShu+19TOAzFP/3J+XWqHGhJwomUPnO64=; b=3E6rdPFvdMiKuU7Tki1HsPXLl9 KCnh+ma3N+8XLF4VVl7E5i935N1CwL4t6xnqVmtXqy2GY903iZFE/zCGqD6xVGyOlqGWi3+XnYsdX OVoTqzns7iC5PWCyVZzf6sJJzurqOxMo2piD8BDzQqwzE3Xx6Ayi5rEwERCPFohgfeulvfby43zEU KbEF7Ps/1HOLlBplo6SUCrTj58RiO9CG6u8zc9ILXum7e73SkaJtJWa56TAja3J/WuQGN/j7JI2xZ Qj07eVV3zKsmIK7wwyLO3gSs2ujNYK9zTg6kBwl0MnxnNTfBBuXSmOasVQtmlIff28UKbow+dE7ro 5pJMkWGA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJL2-00000006lrx-2l5W; Mon, 15 Jul 2024 10:53:48 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJJb-00000006lO9-1IIj for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 10:52:20 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id B01B4CE0EEF; Mon, 15 Jul 2024 10:52:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C5E3CC4AF0B; Mon, 15 Jul 2024 10:52:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040737; bh=ruAH41VgmTaGJhntmkCyJkgLkebobBF3HcerS4+je88=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kOCIeqZk1GwtrQji/S067lIo/vsVUY8famSbJfn4Hj2sYuHm0WjDyBqRm/xQebcQb YOURYdv5D3G9nidPUIdg+DG83K4fjqLpUb+SvVuiECtdEqJ5qkeee4UnTKtgkpaITd WRRyf+hlVcHdJMBFwAPtCyHhW1LFF8ZmCxSEvB/7OWddOxQ7JIjsZ5dof95ZvK68Df VU+TNiiRG56FmbLM1nJoob4SBxkVwkNP4PV++xknwfLNopVQStvYfRKUCmQw7fLva4 hO9rWCHVow8sSufFy68oRPxrz9LK0Uertu7e1tAqVUoEtYIdbVGdserQc0BKv2XTiZ OZXfEYDlqZKdw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 05/13] irqchip/armada-370-xp: Put __init attribute after return type in mpic_ipi_init() Date: Mon, 15 Jul 2024 12:51:48 +0200 Message-ID: <20240715105156.18388-6-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035219_544152_2BB77EB1 X-CRM114-Status: GOOD ( 11.32 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org For consistency with the rest of the driver, put the __init attribute after the return type of the mpic_ipi_init() function. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 2185f79007f4..646a50d5724f 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -464,7 +464,7 @@ static void mpic_ipi_resume(void) } } -static __init int mpic_ipi_init(struct device_node *node) +static int __init mpic_ipi_init(struct device_node *node) { int base_ipi; From patchwork Mon Jul 15 10:51:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733315 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F321EC3DA5D for ; Mon, 15 Jul 2024 10:54:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=9i22rphCRVkPBuzqWGh8ufLuaFu7/2OqmTkr1AYtRGQ=; b=B+29A2pfnc3XZHroIjnhRB5lpv vR2Gqnwj7a+9rNN5DIJXi8Stqf0HRxBG+r+4cSH14lyRc1T8AsazdxmBhNSnOCOCH9/+LPa64HS12 pnpjf6FAxsMjvPESkgHmfsEJZYzp7rJxbiV8/aVFFxT8ysFORbF1s6w5hZPPXgzNGFCgHJ9GKNVAe QeN2QsxAd4zpEqm9QInN64bCKDrNisziF7HwonPl9IKQUq98wyLgVObDTv2XBw3Vn4O0qxp2vNSAn R992xcUYujSvSbbsa1cEZ3icPVw2eM4LFct34O6B06l4oB4xxhCThjNf+fDPeX7YnsB5LHTlj/D58 tWn+/fnw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJLJ-00000006lwl-360e; Mon, 15 Jul 2024 10:54:05 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJJe-00000006lPT-0tHF for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 10:52:24 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 52780CE0EF0; Mon, 15 Jul 2024 10:52:20 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 724A0C4AF0A; Mon, 15 Jul 2024 10:52:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040739; bh=OJZZGjxo6wxvVsyxqwuGdnhw+p3nvXdDvPCSIcyUpos=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jhK85o8PtLyhJTy5/SlPvjhiLnGhabOSwjB+2t8FzGESCOU+xL1axQTJ5J2vwSKMK RXC2LRH6tx1Z0hcAaHWs4ZLa+vBcFp/iCK7jaNALbFKDqoV3SYkCLVKwHD91ksboOs tik3+WKlhZuJDVyNJU3cGeGB5Pk255pkXKdzijpxtok5hrVrqXMOoDXBbI6f6ON+9c RMuueuLuK/aLLdyQXdu96gjnEHWzaC+J2bID+bkp3aPQIKWL6WAj1E0qQXQ9VgIXQs j5wBRXNEaMnewMMR61ncrd0ttTg6OygzzZPSBdZCqKcLwN7hBQfX7cvqc9AnkzT+Sq Es0pVfLaOJSeA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 06/13] irqchip/armada-370-xp: Put static variables into driver private structure Date: Mon, 15 Jul 2024 12:51:49 +0200 Message-ID: <20240715105156.18388-7-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035222_630864_6429CBC8 X-CRM114-Status: GOOD ( 24.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In preparation for converting the driver to modern style put all the interrupt controller private static variables into driver private structure. Access to these variables changes as: main_int_base mpic->base per_cpu_int_base mpic->per_cpu mpic_domain mpic->domain parent_irq mpic->parent_irq ... Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 226 +++++++++++++++------------- 1 file changed, 122 insertions(+), 104 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 646a50d5724f..f688b038dc7b 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -66,11 +66,11 @@ * * The "global interrupt mask/unmask" is modified using the * MPIC_INT_SET_ENABLE and MPIC_INT_CLEAR_ENABLE - * registers, which are relative to "main_int_base". + * registers, which are relative to "mpic->base". * * The "per-CPU mask/unmask" is modified using the MPIC_INT_SET_MASK * and MPIC_INT_CLEAR_MASK registers, which are relative to - * "per_cpu_int_base". This base address points to a special address, + * "mpic->per_cpu". This base address points to a special address, * which automatically accesses the registers of the current CPU. * * The per-CPU mask/unmask can also be adjusted using the global @@ -112,7 +112,7 @@ * at the per-CPU level. */ -/* Registers relative to main_int_base */ +/* Registers relative to mpic->base */ #define MPIC_INT_CONTROL 0x00 #define MPIC_INT_CONTROL_NUMINT_MASK GENMASK(12, 2) #define MPIC_SW_TRIG_INT 0x04 @@ -122,7 +122,7 @@ #define MPIC_INT_SOURCE_CPU_MASK GENMASK(3, 0) #define MPIC_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << (cpuid)) -/* Registers relative to per_cpu_int_base */ +/* Registers relative to mpic->per_cpu */ #define MPIC_IN_DRBEL_CAUSE 0x08 #define MPIC_IN_DRBEL_MASK 0x0c #define MPIC_PPI_CAUSE 0x10 @@ -149,19 +149,38 @@ #define PCI_MSI_FULL_DOORBELL_SRC0_MASK GENMASK(15, 0) #define PCI_MSI_FULL_DOORBELL_SRC1_MASK GENMASK(31, 16) -static void __iomem *per_cpu_int_base; -static void __iomem *main_int_base; -static struct irq_domain *mpic_domain; -static u32 doorbell_mask_reg; -static int parent_irq; +struct mpic { + /* Register regions */ + void __iomem *base; + void __iomem *per_cpu; + + /* If MPIC is not top-level interrupt controller */ + int parent_irq; + + /* Main IRQ domain */ + struct irq_domain *domain; + +#ifdef CONFIG_SMP + /* IPI interrupts */ + struct irq_domain *ipi_domain; +#endif + #ifdef CONFIG_PCI_MSI -static struct irq_domain *mpic_msi_domain; -static struct irq_domain *mpic_msi_inner_domain; -static DECLARE_BITMAP(msi_used, PCI_MSI_FULL_DOORBELL_NR); -static DEFINE_MUTEX(msi_used_lock); -static phys_addr_t msi_doorbell_addr; + /* MSI interrupts */ + struct irq_domain *msi_domain; + struct irq_domain *msi_inner_domain; + DECLARE_BITMAP(msi_used, PCI_MSI_FULL_DOORBELL_NR); + struct mutex msi_lock; + phys_addr_t msi_doorbell_addr; #endif + /* suspend & resume */ + u32 doorbell_mask; +}; + +static struct mpic mpic_data; +static struct mpic * const mpic = &mpic_data; + static inline bool mpic_is_ipi_available(void) { /* @@ -170,7 +189,7 @@ static inline bool mpic_is_ipi_available(void) * interrupt controller (e.g. GIC) that takes care of inter-processor * interrupts. */ - return parent_irq <= 0; + return mpic->parent_irq <= 0; } static inline u32 msi_doorbell_mask(void) @@ -206,9 +225,9 @@ static void mpic_irq_mask(struct irq_data *d) irq_hw_number_t hwirq = irqd_to_hwirq(d); if (!mpic_is_percpu_irq(hwirq)) - writel(hwirq, main_int_base + MPIC_INT_CLEAR_ENABLE); + writel(hwirq, mpic->base + MPIC_INT_CLEAR_ENABLE); else - writel(hwirq, per_cpu_int_base + MPIC_INT_SET_MASK); + writel(hwirq, mpic->per_cpu + MPIC_INT_SET_MASK); } static void mpic_irq_unmask(struct irq_data *d) @@ -216,9 +235,9 @@ static void mpic_irq_unmask(struct irq_data *d) irq_hw_number_t hwirq = irqd_to_hwirq(d); if (!mpic_is_percpu_irq(hwirq)) - writel(hwirq, main_int_base + MPIC_INT_SET_ENABLE); + writel(hwirq, mpic->base + MPIC_INT_SET_ENABLE); else - writel(hwirq, per_cpu_int_base + MPIC_INT_CLEAR_MASK); + writel(hwirq, mpic->per_cpu + MPIC_INT_CLEAR_MASK); } #ifdef CONFIG_PCI_MSI @@ -239,8 +258,8 @@ static void mpic_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) { unsigned int cpu = cpumask_first(irq_data_get_effective_affinity_mask(d)); - msg->address_lo = lower_32_bits(msi_doorbell_addr); - msg->address_hi = upper_32_bits(msi_doorbell_addr); + msg->address_lo = lower_32_bits(mpic->msi_doorbell_addr); + msg->address_hi = upper_32_bits(mpic->msi_doorbell_addr); msg->data = BIT(cpu + 8) | (d->hwirq + msi_doorbell_start()); } @@ -273,10 +292,10 @@ static int mpic_msi_alloc(struct irq_domain *h, unsigned int virq, { int hwirq; - mutex_lock(&msi_used_lock); - hwirq = bitmap_find_free_region(msi_used, msi_doorbell_size(), + mutex_lock(&mpic->msi_lock); + hwirq = bitmap_find_free_region(mpic->msi_used, msi_doorbell_size(), order_base_2(nr_irqs)); - mutex_unlock(&msi_used_lock); + mutex_unlock(&mpic->msi_lock); if (hwirq < 0) return -ENOSPC; @@ -295,9 +314,9 @@ static void mpic_msi_free(struct irq_domain *h, unsigned int virq, { struct irq_data *d = irq_domain_get_irq_data(h, virq); - mutex_lock(&msi_used_lock); - bitmap_release_region(msi_used, d->hwirq, order_base_2(nr_irqs)); - mutex_unlock(&msi_used_lock); + mutex_lock(&mpic->msi_lock); + bitmap_release_region(mpic->msi_used, d->hwirq, order_base_2(nr_irqs)); + mutex_unlock(&mpic->msi_lock); } static const struct irq_domain_ops mpic_msi_domain_ops = { @@ -310,30 +329,32 @@ static void mpic_msi_reenable_percpu(void) u32 reg; /* Enable MSI doorbell mask and combined cpu local interrupt */ - reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); + reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK); reg |= msi_doorbell_mask(); - writel(reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); + writel(reg, mpic->per_cpu + MPIC_IN_DRBEL_MASK); /* Unmask local doorbell interrupt */ - writel(1, per_cpu_int_base + MPIC_INT_CLEAR_MASK); + writel(1, mpic->per_cpu + MPIC_INT_CLEAR_MASK); } static int __init mpic_msi_init(struct device_node *node, phys_addr_t main_int_phys_base) { - msi_doorbell_addr = main_int_phys_base + MPIC_SW_TRIG_INT; + mpic->msi_doorbell_addr = main_int_phys_base + MPIC_SW_TRIG_INT; - mpic_msi_inner_domain = irq_domain_add_linear(NULL, msi_doorbell_size(), - &mpic_msi_domain_ops, - NULL); - if (!mpic_msi_inner_domain) + mutex_init(&mpic->msi_lock); + + mpic->msi_inner_domain = irq_domain_add_linear(NULL, msi_doorbell_size(), + &mpic_msi_domain_ops, + NULL); + if (!mpic->msi_inner_domain) return -ENOMEM; - mpic_msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node), - &mpic_msi_domain_info, - mpic_msi_inner_domain); - if (!mpic_msi_domain) { - irq_domain_remove(mpic_msi_inner_domain); + mpic->msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node), + &mpic_msi_domain_info, + mpic->msi_inner_domain); + if (!mpic->msi_domain) { + irq_domain_remove(mpic->msi_inner_domain); return -ENOMEM; } @@ -341,7 +362,7 @@ static int __init mpic_msi_init(struct device_node *node, /* Unmask low 16 MSI irqs on non-IPI platforms */ if (!mpic_is_ipi_available()) - writel(0, per_cpu_int_base + MPIC_INT_CLEAR_MASK); + writel(0, mpic->per_cpu + MPIC_INT_CLEAR_MASK); return 0; } @@ -369,29 +390,26 @@ static void mpic_perf_init(void) cpuid = cpu_logical_map(smp_processor_id()); /* Enable Performance Counter Overflow interrupts */ - writel(MPIC_INT_CAUSE_PERF(cpuid), - per_cpu_int_base + MPIC_INT_FABRIC_MASK); + writel(MPIC_INT_CAUSE_PERF(cpuid), mpic->per_cpu + MPIC_INT_FABRIC_MASK); } #ifdef CONFIG_SMP -static struct irq_domain *mpic_ipi_domain; - static void mpic_ipi_mask(struct irq_data *d) { u32 reg; - reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); + reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK); reg &= ~BIT(d->hwirq); - writel(reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); + writel(reg, mpic->per_cpu + MPIC_IN_DRBEL_MASK); } static void mpic_ipi_unmask(struct irq_data *d) { u32 reg; - reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); + reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK); reg |= BIT(d->hwirq); - writel(reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); + writel(reg, mpic->per_cpu + MPIC_IN_DRBEL_MASK); } static void mpic_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) @@ -410,12 +428,12 @@ static void mpic_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) dsb(); /* submit softirq */ - writel((map << 8) | d->hwirq, main_int_base + MPIC_SW_TRIG_INT); + writel((map << 8) | d->hwirq, mpic->base + MPIC_SW_TRIG_INT); } static void mpic_ipi_ack(struct irq_data *d) { - writel(~BIT(d->hwirq), per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); + writel(~BIT(d->hwirq), mpic->per_cpu + MPIC_IN_DRBEL_CAUSE); } static struct irq_chip mpic_ipi_irqchip = { @@ -453,13 +471,13 @@ static const struct irq_domain_ops mpic_ipi_domain_ops = { static void mpic_ipi_resume(void) { for (irq_hw_number_t i = 0; i < IPI_DOORBELL_NR; i++) { - unsigned int virq = irq_find_mapping(mpic_ipi_domain, i); + unsigned int virq = irq_find_mapping(mpic->ipi_domain, i); struct irq_data *d; if (!virq || !irq_percpu_is_enabled(virq)) continue; - d = irq_domain_get_irq_data(mpic_ipi_domain, virq); + d = irq_domain_get_irq_data(mpic->ipi_domain, virq); mpic_ipi_unmask(d); } } @@ -468,14 +486,14 @@ static int __init mpic_ipi_init(struct device_node *node) { int base_ipi; - mpic_ipi_domain = irq_domain_create_linear(of_node_to_fwnode(node), - IPI_DOORBELL_NR, - &mpic_ipi_domain_ops, NULL); - if (WARN_ON(!mpic_ipi_domain)) + mpic->ipi_domain = irq_domain_create_linear(of_node_to_fwnode(node), + IPI_DOORBELL_NR, + &mpic_ipi_domain_ops, NULL); + if (WARN_ON(!mpic->ipi_domain)) return -ENOMEM; - irq_domain_update_bus_token(mpic_ipi_domain, DOMAIN_BUS_IPI); - base_ipi = irq_domain_alloc_irqs(mpic_ipi_domain, IPI_DOORBELL_NR, + irq_domain_update_bus_token(mpic->ipi_domain, DOMAIN_BUS_IPI); + base_ipi = irq_domain_alloc_irqs(mpic->ipi_domain, IPI_DOORBELL_NR, NUMA_NO_NODE, NULL); if (WARN_ON(!base_ipi)) return -ENOMEM; @@ -494,7 +512,7 @@ static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, /* Select a single core from the affinity mask which is online */ cpu = cpumask_any_and(mask_val, cpu_online_mask); - atomic_io_modify(main_int_base + MPIC_INT_SOURCE_CTL(hwirq), + atomic_io_modify(mpic->base + MPIC_INT_SOURCE_CTL(hwirq), MPIC_INT_SOURCE_CPU_MASK, BIT(cpu_logical_map(cpu))); irq_data_update_effective_affinity(d, cpumask_of(cpu)); @@ -504,27 +522,27 @@ static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, static void mpic_smp_cpu_init(void) { - for (irq_hw_number_t i = 0; i < mpic_domain->hwirq_max; i++) - writel(i, per_cpu_int_base + MPIC_INT_SET_MASK); + for (irq_hw_number_t i = 0; i < mpic->domain->hwirq_max; i++) + writel(i, mpic->per_cpu + MPIC_INT_SET_MASK); if (!mpic_is_ipi_available()) return; /* Disable all IPIs */ - writel(0, per_cpu_int_base + MPIC_IN_DRBEL_MASK); + writel(0, mpic->per_cpu + MPIC_IN_DRBEL_MASK); /* Clear pending IPIs */ - writel(0, per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); + writel(0, mpic->per_cpu + MPIC_IN_DRBEL_CAUSE); /* Unmask IPI interrupt */ - writel(0, per_cpu_int_base + MPIC_INT_CLEAR_MASK); + writel(0, mpic->per_cpu + MPIC_INT_CLEAR_MASK); } static void mpic_reenable_percpu(void) { /* Re-enable per-CPU interrupts that were enabled before suspend */ for (irq_hw_number_t i = 0; i < MPIC_MAX_PER_CPU_IRQS; i++) { - unsigned int virq = irq_linear_revmap(mpic_domain, i); + unsigned int virq = irq_linear_revmap(mpic->domain, i); struct irq_data *d; if (!virq || !irq_percpu_is_enabled(virq)) @@ -553,7 +571,7 @@ static int mpic_cascaded_starting_cpu(unsigned int cpu) { mpic_perf_init(); mpic_reenable_percpu(); - enable_percpu_irq(parent_irq, IRQ_TYPE_NONE); + enable_percpu_irq(mpic->parent_irq, IRQ_TYPE_NONE); return 0; } @@ -582,9 +600,9 @@ static int mpic_irq_map(struct irq_domain *h, unsigned int virq, mpic_irq_mask(irq_get_irq_data(virq)); if (!mpic_is_percpu_irq(hwirq)) - writel(hwirq, per_cpu_int_base + MPIC_INT_CLEAR_MASK); + writel(hwirq, mpic->per_cpu + MPIC_INT_CLEAR_MASK); else - writel(hwirq, main_int_base + MPIC_INT_SET_ENABLE); + writel(hwirq, mpic->base + MPIC_INT_SET_ENABLE); irq_set_status_flags(virq, IRQ_LEVEL); if (mpic_is_percpu_irq(hwirq)) { @@ -611,12 +629,12 @@ static void mpic_handle_msi_irq(void) unsigned long cause; unsigned int i; - cause = readl_relaxed(per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); + cause = readl_relaxed(mpic->per_cpu + MPIC_IN_DRBEL_CAUSE); cause &= msi_doorbell_mask(); - writel(~cause, per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); + writel(~cause, mpic->per_cpu + MPIC_IN_DRBEL_CAUSE); for_each_set_bit(i, &cause, BITS_PER_LONG) - generic_handle_domain_irq(mpic_msi_inner_domain, + generic_handle_domain_irq(mpic->msi_inner_domain, i - msi_doorbell_start()); } #else @@ -629,11 +647,11 @@ static void mpic_handle_ipi_irq(void) unsigned long cause; irq_hw_number_t i; - cause = readl_relaxed(per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); + cause = readl_relaxed(mpic->per_cpu + MPIC_IN_DRBEL_CAUSE); cause &= IPI_DOORBELL_MASK; for_each_set_bit(i, &cause, IPI_DOORBELL_NR) - generic_handle_domain_irq(mpic_ipi_domain, i); + generic_handle_domain_irq(mpic->ipi_domain, i); } #else static inline void mpic_handle_ipi_irq(void) {} @@ -648,11 +666,11 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) chained_irq_enter(chip, desc); - cause = readl_relaxed(per_cpu_int_base + MPIC_PPI_CAUSE); + cause = readl_relaxed(mpic->per_cpu + MPIC_PPI_CAUSE); cpuid = cpu_logical_map(smp_processor_id()); for_each_set_bit(i, &cause, BITS_PER_LONG) { - irqsrc = readl_relaxed(main_int_base + MPIC_INT_SOURCE_CTL(i)); + irqsrc = readl_relaxed(mpic->base + MPIC_INT_SOURCE_CTL(i)); /* Check if the interrupt is not masked on current CPU. * Test IRQ (0-1) and FIQ (8-9) mask bits. @@ -665,7 +683,7 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) continue; } - generic_handle_domain_irq(mpic_domain, i); + generic_handle_domain_irq(mpic->domain, i); } chained_irq_exit(chip, desc); @@ -677,14 +695,14 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) u32 irqstat; do { - irqstat = readl_relaxed(per_cpu_int_base + MPIC_CPU_INTACK); + irqstat = readl_relaxed(mpic->per_cpu + MPIC_CPU_INTACK); i = FIELD_GET(MPIC_CPU_INTACK_IID_MASK, irqstat); if (i > 1022) break; if (i > 1) - generic_handle_domain_irq(mpic_domain, i); + generic_handle_domain_irq(mpic->domain, i); /* MSI handling */ if (i == 1) @@ -698,7 +716,7 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) static int mpic_suspend(void) { - doorbell_mask_reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); + mpic->doorbell_mask = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK); return 0; } @@ -708,8 +726,8 @@ static void mpic_resume(void) bool src0, src1; /* Re-enable interrupts */ - for (irq_hw_number_t i = 0; i < mpic_domain->hwirq_max; i++) { - unsigned int virq = irq_linear_revmap(mpic_domain, i); + for (irq_hw_number_t i = 0; i < mpic->domain->hwirq_max; i++) { + unsigned int virq = irq_linear_revmap(mpic->domain, i); struct irq_data *d; if (!virq) @@ -719,12 +737,12 @@ static void mpic_resume(void) if (!mpic_is_percpu_irq(i)) { /* Non per-CPU interrupts */ - writel(i, per_cpu_int_base + MPIC_INT_CLEAR_MASK); + writel(i, mpic->per_cpu + MPIC_INT_CLEAR_MASK); if (!irqd_irq_disabled(d)) mpic_irq_unmask(d); } else { /* Per-CPU interrupts */ - writel(i, main_int_base + MPIC_INT_SET_ENABLE); + writel(i, mpic->base + MPIC_INT_SET_ENABLE); /* * Re-enable on the current CPU, mpic_reenable_percpu() @@ -736,20 +754,20 @@ static void mpic_resume(void) } /* Reconfigure doorbells for IPIs and MSIs */ - writel(doorbell_mask_reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); + writel(mpic->doorbell_mask, mpic->per_cpu + MPIC_IN_DRBEL_MASK); if (mpic_is_ipi_available()) { - src0 = doorbell_mask_reg & IPI_DOORBELL_MASK; - src1 = doorbell_mask_reg & PCI_MSI_DOORBELL_MASK; + src0 = mpic->doorbell_mask & IPI_DOORBELL_MASK; + src1 = mpic->doorbell_mask & PCI_MSI_DOORBELL_MASK; } else { - src0 = doorbell_mask_reg & PCI_MSI_FULL_DOORBELL_SRC0_MASK; - src1 = doorbell_mask_reg & PCI_MSI_FULL_DOORBELL_SRC1_MASK; + src0 = mpic->doorbell_mask & PCI_MSI_FULL_DOORBELL_SRC0_MASK; + src1 = mpic->doorbell_mask & PCI_MSI_FULL_DOORBELL_SRC1_MASK; } if (src0) - writel(0, per_cpu_int_base + MPIC_INT_CLEAR_MASK); + writel(0, mpic->per_cpu + MPIC_INT_CLEAR_MASK); if (src1) - writel(1, per_cpu_int_base + MPIC_INT_CLEAR_MASK); + writel(1, mpic->per_cpu + MPIC_INT_CLEAR_MASK); if (mpic_is_ipi_available()) mpic_ipi_resume(); @@ -801,33 +819,33 @@ static int __init mpic_of_init(struct device_node *node, unsigned int nr_irqs; int err; - err = mpic_map_region(node, 0, &main_int_base, &phys_base); + err = mpic_map_region(node, 0, &mpic->base, &phys_base); if (err) return err; - err = mpic_map_region(node, 1, &per_cpu_int_base, NULL); + err = mpic_map_region(node, 1, &mpic->per_cpu, NULL); if (err) return err; nr_irqs = FIELD_GET(MPIC_INT_CONTROL_NUMINT_MASK, - readl(main_int_base + MPIC_INT_CONTROL)); + readl(mpic->base + MPIC_INT_CONTROL)); for (irq_hw_number_t i = 0; i < nr_irqs; i++) - writel(i, main_int_base + MPIC_INT_CLEAR_ENABLE); + writel(i, mpic->base + MPIC_INT_CLEAR_ENABLE); - mpic_domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, NULL); - if (!mpic_domain) { + mpic->domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, NULL); + if (!mpic->domain) { pr_err("%pOF: Unable to add IRQ domain\n", node); return -ENOMEM; } - irq_domain_update_bus_token(mpic_domain, DOMAIN_BUS_WIRED); + irq_domain_update_bus_token(mpic->domain, DOMAIN_BUS_WIRED); /* - * Initialize parent_irq before calling any other functions, since it is - * used to distinguish between IPI and non-IPI platforms. + * Initialize mpic->parent_irq before calling any other functions, since + * it is used to distinguish between IPI and non-IPI platforms. */ - parent_irq = irq_of_parse_and_map(node, 0); + mpic->parent_irq = irq_of_parse_and_map(node, 0); /* Setup for the boot CPU */ mpic_perf_init(); @@ -839,8 +857,8 @@ static int __init mpic_of_init(struct device_node *node, return err; } - if (parent_irq <= 0) { - irq_set_default_host(mpic_domain); + if (mpic->parent_irq <= 0) { + irq_set_default_host(mpic->domain); set_handle_irq(mpic_handle_irq); #ifdef CONFIG_SMP err = mpic_ipi_init(node); @@ -859,7 +877,7 @@ static int __init mpic_of_init(struct device_node *node, "irqchip/armada/cascade:starting", mpic_cascaded_starting_cpu, NULL); #endif - irq_set_chained_handler(parent_irq, mpic_handle_cascade_irq); + irq_set_chained_handler(mpic->parent_irq, mpic_handle_cascade_irq); } register_syscore_ops(&mpic_syscore_ops); From patchwork Mon Jul 15 10:51:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733316 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 71857C3DA59 for ; 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Mon, 15 Jul 2024 10:54:22 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJJg-00000006lPv-2gbs for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 10:52:26 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id EA321CE0EEA; Mon, 15 Jul 2024 10:52:22 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 14D18C32782; Mon, 15 Jul 2024 10:52:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040742; bh=uXUT+8XWuRihWQA4+q+UgDAH3ur9Uz5nBXlC2RqnszM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BVOU7OGBXWgPIVb+uR4mgFNZlLhxqhkYjxII4xlKrVo25aY9pfa1u9S8xWNrRRl5h RQMC/Px1Q58OWTY3qu4BVtl64oUiI13pUhvhhx+eaXbzkcyHqExBTc7jSPc+qbYTAp M/wyGvt+r4Kr5lEnqqLMgjhFfgDw1qOf8ZKhsSBHL+CNogOfBoQXZNJLVNk3Pgzen/ F+0uwvsKYniGKxp5o/KcONC1KnEf/ayzNSnSsNcZI/AcFRT4cFY7COvx41K4EfmWCI UwZtnDqjgLRxCrLUattfprx35cI/vX87WbwHw7FIvMFWjh0u9VsMRqQ1Nt1OZt+Ylk T/5gXbrx8QLaw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 07/13] irqchip/armada-370-xp: Put MSI doorbell limits into the mpic structure Date: Mon, 15 Jul 2024 12:51:50 +0200 Message-ID: <20240715105156.18388-8-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035225_085369_F545F63E X-CRM114-Status: GOOD ( 13.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Put the MSI doorbell limits msi_doorbell_start, msi_doorbell_size and msi_doorbell_mask into the driver private structure and get rid of the corresponding functions. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 43 +++++++++++++---------------- 1 file changed, 19 insertions(+), 24 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index f688b038dc7b..9de815833c7f 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -172,6 +172,8 @@ struct mpic { DECLARE_BITMAP(msi_used, PCI_MSI_FULL_DOORBELL_NR); struct mutex msi_lock; phys_addr_t msi_doorbell_addr; + u32 msi_doorbell_mask; + unsigned int msi_doorbell_start, msi_doorbell_size; #endif /* suspend & resume */ @@ -192,24 +194,6 @@ static inline bool mpic_is_ipi_available(void) return mpic->parent_irq <= 0; } -static inline u32 msi_doorbell_mask(void) -{ - return mpic_is_ipi_available() ? PCI_MSI_DOORBELL_MASK : - PCI_MSI_FULL_DOORBELL_MASK; -} - -static inline unsigned int msi_doorbell_start(void) -{ - return mpic_is_ipi_available() ? PCI_MSI_DOORBELL_START : - PCI_MSI_FULL_DOORBELL_START; -} - -static inline unsigned int msi_doorbell_size(void) -{ - return mpic_is_ipi_available() ? PCI_MSI_DOORBELL_NR : - PCI_MSI_FULL_DOORBELL_NR; -} - static inline bool mpic_is_percpu_irq(irq_hw_number_t hwirq) { return hwirq <= MPIC_MAX_PER_CPU_IRQS; @@ -260,7 +244,7 @@ static void mpic_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) msg->address_lo = lower_32_bits(mpic->msi_doorbell_addr); msg->address_hi = upper_32_bits(mpic->msi_doorbell_addr); - msg->data = BIT(cpu + 8) | (d->hwirq + msi_doorbell_start()); + msg->data = BIT(cpu + 8) | (d->hwirq + mpic->msi_doorbell_start); } static int mpic_msi_set_affinity(struct irq_data *d, const struct cpumask *mask, @@ -293,7 +277,7 @@ static int mpic_msi_alloc(struct irq_domain *h, unsigned int virq, int hwirq; mutex_lock(&mpic->msi_lock); - hwirq = bitmap_find_free_region(mpic->msi_used, msi_doorbell_size(), + hwirq = bitmap_find_free_region(mpic->msi_used, mpic->msi_doorbell_size, order_base_2(nr_irqs)); mutex_unlock(&mpic->msi_lock); @@ -330,7 +314,7 @@ static void mpic_msi_reenable_percpu(void) /* Enable MSI doorbell mask and combined cpu local interrupt */ reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK); - reg |= msi_doorbell_mask(); + reg |= mpic->msi_doorbell_mask; writel(reg, mpic->per_cpu + MPIC_IN_DRBEL_MASK); /* Unmask local doorbell interrupt */ @@ -344,7 +328,18 @@ static int __init mpic_msi_init(struct device_node *node, mutex_init(&mpic->msi_lock); - mpic->msi_inner_domain = irq_domain_add_linear(NULL, msi_doorbell_size(), + if (mpic_is_ipi_available()) { + mpic->msi_doorbell_start = PCI_MSI_DOORBELL_START; + mpic->msi_doorbell_size = PCI_MSI_DOORBELL_NR; + mpic->msi_doorbell_mask = PCI_MSI_DOORBELL_MASK; + } else { + mpic->msi_doorbell_start = PCI_MSI_FULL_DOORBELL_START; + mpic->msi_doorbell_size = PCI_MSI_FULL_DOORBELL_NR; + mpic->msi_doorbell_mask = PCI_MSI_FULL_DOORBELL_MASK; + } + + mpic->msi_inner_domain = irq_domain_add_linear(NULL, + mpic->msi_doorbell_size, &mpic_msi_domain_ops, NULL); if (!mpic->msi_inner_domain) @@ -630,12 +625,12 @@ static void mpic_handle_msi_irq(void) unsigned int i; cause = readl_relaxed(mpic->per_cpu + MPIC_IN_DRBEL_CAUSE); - cause &= msi_doorbell_mask(); + cause &= mpic->msi_doorbell_mask; writel(~cause, mpic->per_cpu + MPIC_IN_DRBEL_CAUSE); for_each_set_bit(i, &cause, BITS_PER_LONG) generic_handle_domain_irq(mpic->msi_inner_domain, - i - msi_doorbell_start()); + i - mpic->msi_doorbell_start); } #else static void mpic_handle_msi_irq(void) {} From patchwork Mon Jul 15 10:51:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733317 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E0DBAC3DA59 for ; Mon, 15 Jul 2024 10:54:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; 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Mon, 15 Jul 2024 10:52:27 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 2A49060F32; Mon, 15 Jul 2024 10:52:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AC039C4AF0E; Mon, 15 Jul 2024 10:52:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040744; bh=E2CEAEib9zhtuUe34HPfnNLJFru3CrbF3aLo+owKHSg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sXLA6Mjn4ij4k5Gic2yYRrG2j4wySI7ZqGYVPfY5AOCgoV1ngWwOr17kBxw5AgpCw y4c35PzIccm2+jeY1sBhaczhRABNGZk8A/GqXd2D06JlH2L8n08b25tcttn/IlJul2 +QI8dFLy02Q9BrfUMwV0tcUdPhUW2WolwCIrsAJBNuKVkw0OntBrzeEa2k2O+BKWNN nen6WXwLTlG6+zuZpVo2YFhnAogDaMTzzJCshyiFk1OGKwW2xjPv9WT+C5YOKizlT1 wMnYq5IaZE3dpJuP9IaQENWEDKLUDhRYU0N1jb+xsS42qdqiWruzQOpQM9HdtjOnZp 08ubgzSvzFmGA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 08/13] irqchip/armada-370-xp: Pass around the driver private structure Date: Mon, 15 Jul 2024 12:51:51 +0200 Message-ID: <20240715105156.18388-9-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035226_084605_2FEB151D X-CRM114-Status: GOOD ( 22.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In continuation of converting the driver to modern style, drop the global pointer to the driver private structure and instead pass it around the functions and callbacks, wherever possible. (There are 3 cases where it is not possible: mpic_cascaded_starting_cpu() and the syscore operations mpic_suspend() and mpic_resume()). Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 111 +++++++++++++++++----------- 1 file changed, 68 insertions(+), 43 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 9de815833c7f..08d251ad72fd 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -181,9 +181,8 @@ struct mpic { }; static struct mpic mpic_data; -static struct mpic * const mpic = &mpic_data; -static inline bool mpic_is_ipi_available(void) +static inline bool mpic_is_ipi_available(struct mpic *mpic) { /* * We distinguish IPI availability in the IC by the IC not having a @@ -206,6 +205,7 @@ static inline bool mpic_is_percpu_irq(irq_hw_number_t hwirq) */ static void mpic_irq_mask(struct irq_data *d) { + struct mpic *mpic = irq_data_get_irq_chip_data(d); irq_hw_number_t hwirq = irqd_to_hwirq(d); if (!mpic_is_percpu_irq(hwirq)) @@ -216,6 +216,7 @@ static void mpic_irq_mask(struct irq_data *d) static void mpic_irq_unmask(struct irq_data *d) { + struct mpic *mpic = irq_data_get_irq_chip_data(d); irq_hw_number_t hwirq = irqd_to_hwirq(d); if (!mpic_is_percpu_irq(hwirq)) @@ -241,6 +242,7 @@ static struct msi_domain_info mpic_msi_domain_info = { static void mpic_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) { unsigned int cpu = cpumask_first(irq_data_get_effective_affinity_mask(d)); + struct mpic *mpic = irq_data_get_irq_chip_data(d); msg->address_lo = lower_32_bits(mpic->msi_doorbell_addr); msg->address_hi = upper_32_bits(mpic->msi_doorbell_addr); @@ -274,6 +276,7 @@ static struct irq_chip mpic_msi_bottom_irq_chip = { static int mpic_msi_alloc(struct irq_domain *h, unsigned int virq, unsigned int nr_irqs, void *args) { + struct mpic *mpic = h->host_data; int hwirq; mutex_lock(&mpic->msi_lock); @@ -297,6 +300,7 @@ static void mpic_msi_free(struct irq_domain *h, unsigned int virq, unsigned int nr_irqs) { struct irq_data *d = irq_domain_get_irq_data(h, virq); + struct mpic *mpic = h->host_data; mutex_lock(&mpic->msi_lock); bitmap_release_region(mpic->msi_used, d->hwirq, order_base_2(nr_irqs)); @@ -308,7 +312,7 @@ static const struct irq_domain_ops mpic_msi_domain_ops = { .free = mpic_msi_free, }; -static void mpic_msi_reenable_percpu(void) +static void mpic_msi_reenable_percpu(struct mpic *mpic) { u32 reg; @@ -321,14 +325,14 @@ static void mpic_msi_reenable_percpu(void) writel(1, mpic->per_cpu + MPIC_INT_CLEAR_MASK); } -static int __init mpic_msi_init(struct device_node *node, +static int __init mpic_msi_init(struct mpic *mpic, struct device_node *node, phys_addr_t main_int_phys_base) { mpic->msi_doorbell_addr = main_int_phys_base + MPIC_SW_TRIG_INT; mutex_init(&mpic->msi_lock); - if (mpic_is_ipi_available()) { + if (mpic_is_ipi_available(mpic)) { mpic->msi_doorbell_start = PCI_MSI_DOORBELL_START; mpic->msi_doorbell_size = PCI_MSI_DOORBELL_NR; mpic->msi_doorbell_mask = PCI_MSI_DOORBELL_MASK; @@ -341,7 +345,7 @@ static int __init mpic_msi_init(struct device_node *node, mpic->msi_inner_domain = irq_domain_add_linear(NULL, mpic->msi_doorbell_size, &mpic_msi_domain_ops, - NULL); + mpic); if (!mpic->msi_inner_domain) return -ENOMEM; @@ -353,25 +357,25 @@ static int __init mpic_msi_init(struct device_node *node, return -ENOMEM; } - mpic_msi_reenable_percpu(); + mpic_msi_reenable_percpu(mpic); /* Unmask low 16 MSI irqs on non-IPI platforms */ - if (!mpic_is_ipi_available()) + if (!mpic_is_ipi_available(mpic)) writel(0, mpic->per_cpu + MPIC_INT_CLEAR_MASK); return 0; } #else -static __maybe_unused void mpic_msi_reenable_percpu(void) {} +static __maybe_unused void mpic_msi_reenable_percpu(struct mpic *mpic) {} -static inline int mpic_msi_init(struct device_node *node, +static inline int mpic_msi_init(struct mpic *mpic, struct device_node *node, phys_addr_t main_int_phys_base) { return 0; } #endif -static void mpic_perf_init(void) +static void mpic_perf_init(struct mpic *mpic) { u32 cpuid; @@ -391,6 +395,7 @@ static void mpic_perf_init(void) #ifdef CONFIG_SMP static void mpic_ipi_mask(struct irq_data *d) { + struct mpic *mpic = irq_data_get_irq_chip_data(d); u32 reg; reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK); @@ -400,6 +405,7 @@ static void mpic_ipi_mask(struct irq_data *d) static void mpic_ipi_unmask(struct irq_data *d) { + struct mpic *mpic = irq_data_get_irq_chip_data(d); u32 reg; reg = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK); @@ -409,6 +415,7 @@ static void mpic_ipi_unmask(struct irq_data *d) static void mpic_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) { + struct mpic *mpic = irq_data_get_irq_chip_data(d); unsigned int cpu; u32 map = 0; @@ -428,6 +435,8 @@ static void mpic_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) static void mpic_ipi_ack(struct irq_data *d) { + struct mpic *mpic = irq_data_get_irq_chip_data(d); + writel(~BIT(d->hwirq), mpic->per_cpu + MPIC_IN_DRBEL_CAUSE); } @@ -463,7 +472,7 @@ static const struct irq_domain_ops mpic_ipi_domain_ops = { .free = mpic_ipi_free, }; -static void mpic_ipi_resume(void) +static void mpic_ipi_resume(struct mpic *mpic) { for (irq_hw_number_t i = 0; i < IPI_DOORBELL_NR; i++) { unsigned int virq = irq_find_mapping(mpic->ipi_domain, i); @@ -477,13 +486,13 @@ static void mpic_ipi_resume(void) } } -static int __init mpic_ipi_init(struct device_node *node) +static int __init mpic_ipi_init(struct mpic *mpic, struct device_node *node) { int base_ipi; mpic->ipi_domain = irq_domain_create_linear(of_node_to_fwnode(node), IPI_DOORBELL_NR, - &mpic_ipi_domain_ops, NULL); + &mpic_ipi_domain_ops, mpic); if (WARN_ON(!mpic->ipi_domain)) return -ENOMEM; @@ -501,6 +510,7 @@ static int __init mpic_ipi_init(struct device_node *node) static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bool force) { + struct mpic *mpic = irq_data_get_irq_chip_data(d); irq_hw_number_t hwirq = irqd_to_hwirq(d); unsigned int cpu; @@ -515,12 +525,12 @@ static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, return IRQ_SET_MASK_OK; } -static void mpic_smp_cpu_init(void) +static void mpic_smp_cpu_init(struct mpic *mpic) { for (irq_hw_number_t i = 0; i < mpic->domain->hwirq_max; i++) writel(i, mpic->per_cpu + MPIC_INT_SET_MASK); - if (!mpic_is_ipi_available()) + if (!mpic_is_ipi_available(mpic)) return; /* Disable all IPIs */ @@ -533,7 +543,7 @@ static void mpic_smp_cpu_init(void) writel(0, mpic->per_cpu + MPIC_INT_CLEAR_MASK); } -static void mpic_reenable_percpu(void) +static void mpic_reenable_percpu(struct mpic *mpic) { /* Re-enable per-CPU interrupts that were enabled before suspend */ for (irq_hw_number_t i = 0; i < MPIC_MAX_PER_CPU_IRQS; i++) { @@ -547,32 +557,36 @@ static void mpic_reenable_percpu(void) mpic_irq_unmask(d); } - if (mpic_is_ipi_available()) - mpic_ipi_resume(); + if (mpic_is_ipi_available(mpic)) + mpic_ipi_resume(mpic); - mpic_msi_reenable_percpu(); + mpic_msi_reenable_percpu(mpic); } static int mpic_starting_cpu(unsigned int cpu) { - mpic_perf_init(); - mpic_smp_cpu_init(); - mpic_reenable_percpu(); + struct mpic *mpic = irq_get_default_host()->host_data; + + mpic_perf_init(mpic); + mpic_smp_cpu_init(mpic); + mpic_reenable_percpu(mpic); return 0; } static int mpic_cascaded_starting_cpu(unsigned int cpu) { - mpic_perf_init(); - mpic_reenable_percpu(); + struct mpic *mpic = &mpic_data; + + mpic_perf_init(mpic); + mpic_reenable_percpu(mpic); enable_percpu_irq(mpic->parent_irq, IRQ_TYPE_NONE); return 0; } #else -static void mpic_smp_cpu_init(void) {} -static void mpic_ipi_resume(void) {} +static void mpic_smp_cpu_init(struct mpic *mpic) {} +static void mpic_ipi_resume(struct mpic *mpic) {} #endif static struct irq_chip mpic_irq_chip = { @@ -589,10 +603,14 @@ static struct irq_chip mpic_irq_chip = { static int mpic_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hwirq) { + struct mpic *mpic = h->host_data; + /* IRQs 0 and 1 cannot be mapped, they are handled internally */ if (hwirq <= 1) return -EINVAL; + irq_set_chip_data(virq, mpic); + mpic_irq_mask(irq_get_irq_data(virq)); if (!mpic_is_percpu_irq(hwirq)) writel(hwirq, mpic->per_cpu + MPIC_INT_CLEAR_MASK); @@ -619,7 +637,7 @@ static const struct irq_domain_ops mpic_irq_ops = { }; #ifdef CONFIG_PCI_MSI -static void mpic_handle_msi_irq(void) +static void mpic_handle_msi_irq(struct mpic *mpic) { unsigned long cause; unsigned int i; @@ -633,11 +651,11 @@ static void mpic_handle_msi_irq(void) i - mpic->msi_doorbell_start); } #else -static void mpic_handle_msi_irq(void) {} +static void mpic_handle_msi_irq(struct mpic *mpic) {} #endif #ifdef CONFIG_SMP -static void mpic_handle_ipi_irq(void) +static void mpic_handle_ipi_irq(struct mpic *mpic) { unsigned long cause; irq_hw_number_t i; @@ -649,11 +667,12 @@ static void mpic_handle_ipi_irq(void) generic_handle_domain_irq(mpic->ipi_domain, i); } #else -static inline void mpic_handle_ipi_irq(void) {} +static inline void mpic_handle_ipi_irq(struct mpic *mpic) {} #endif static void mpic_handle_cascade_irq(struct irq_desc *desc) { + struct mpic *mpic = irq_desc_get_handler_data(desc); struct irq_chip *chip = irq_desc_get_chip(desc); unsigned long cause; u32 irqsrc, cpuid; @@ -674,7 +693,7 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) continue; if (i == 0 || i == 1) { - mpic_handle_msi_irq(); + mpic_handle_msi_irq(mpic); continue; } @@ -686,6 +705,7 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) { + struct mpic *mpic = irq_get_default_host()->host_data; irq_hw_number_t i; u32 irqstat; @@ -701,16 +721,18 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) /* MSI handling */ if (i == 1) - mpic_handle_msi_irq(); + mpic_handle_msi_irq(mpic); /* IPI Handling */ if (i == 0) - mpic_handle_ipi_irq(); + mpic_handle_ipi_irq(mpic); } while (1); } static int mpic_suspend(void) { + struct mpic *mpic = &mpic_data; + mpic->doorbell_mask = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK); return 0; @@ -718,6 +740,7 @@ static int mpic_suspend(void) static void mpic_resume(void) { + struct mpic *mpic = &mpic_data; bool src0, src1; /* Re-enable interrupts */ @@ -751,7 +774,7 @@ static void mpic_resume(void) /* Reconfigure doorbells for IPIs and MSIs */ writel(mpic->doorbell_mask, mpic->per_cpu + MPIC_IN_DRBEL_MASK); - if (mpic_is_ipi_available()) { + if (mpic_is_ipi_available(mpic)) { src0 = mpic->doorbell_mask & IPI_DOORBELL_MASK; src1 = mpic->doorbell_mask & PCI_MSI_DOORBELL_MASK; } else { @@ -764,8 +787,8 @@ static void mpic_resume(void) if (src1) writel(1, mpic->per_cpu + MPIC_INT_CLEAR_MASK); - if (mpic_is_ipi_available()) - mpic_ipi_resume(); + if (mpic_is_ipi_available(mpic)) + mpic_ipi_resume(mpic); } static struct syscore_ops mpic_syscore_ops = { @@ -810,6 +833,7 @@ static int __init mpic_map_region(struct device_node *np, int index, static int __init mpic_of_init(struct device_node *node, struct device_node *parent) { + struct mpic *mpic = &mpic_data; phys_addr_t phys_base; unsigned int nr_irqs; int err; @@ -828,7 +852,7 @@ static int __init mpic_of_init(struct device_node *node, for (irq_hw_number_t i = 0; i < nr_irqs; i++) writel(i, mpic->base + MPIC_INT_CLEAR_ENABLE); - mpic->domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, NULL); + mpic->domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, mpic); if (!mpic->domain) { pr_err("%pOF: Unable to add IRQ domain\n", node); return -ENOMEM; @@ -843,10 +867,10 @@ static int __init mpic_of_init(struct device_node *node, mpic->parent_irq = irq_of_parse_and_map(node, 0); /* Setup for the boot CPU */ - mpic_perf_init(); - mpic_smp_cpu_init(); + mpic_perf_init(mpic); + mpic_smp_cpu_init(mpic); - err = mpic_msi_init(node, phys_base); + err = mpic_msi_init(mpic, node, phys_base); if (err) { pr_err("%pOF: Unable to initialize MSI domain\n", node); return err; @@ -856,7 +880,7 @@ static int __init mpic_of_init(struct device_node *node, irq_set_default_host(mpic->domain); set_handle_irq(mpic_handle_irq); #ifdef CONFIG_SMP - err = mpic_ipi_init(node); + err = mpic_ipi_init(mpic, node); if (err) { pr_err("%pOF: Unable to initialize IPI domain\n", node); return err; @@ -872,7 +896,8 @@ static int __init mpic_of_init(struct device_node *node, "irqchip/armada/cascade:starting", mpic_cascaded_starting_cpu, NULL); #endif - irq_set_chained_handler(mpic->parent_irq, mpic_handle_cascade_irq); + irq_set_chained_handler_and_data(mpic->parent_irq, + mpic_handle_cascade_irq, mpic); } register_syscore_ops(&mpic_syscore_ops); From patchwork Mon Jul 15 10:51:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733318 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 819ABC3DA59 for ; Mon, 15 Jul 2024 10:55:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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This concludes the conversion of this driver to modern style. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 08d251ad72fd..e8daa967e5fc 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -180,7 +180,7 @@ struct mpic { u32 doorbell_mask; }; -static struct mpic mpic_data; +static struct mpic *mpic_data __ro_after_init; static inline bool mpic_is_ipi_available(struct mpic *mpic) { @@ -576,7 +576,7 @@ static int mpic_starting_cpu(unsigned int cpu) static int mpic_cascaded_starting_cpu(unsigned int cpu) { - struct mpic *mpic = &mpic_data; + struct mpic *mpic = mpic_data; mpic_perf_init(mpic); mpic_reenable_percpu(mpic); @@ -731,7 +731,7 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) static int mpic_suspend(void) { - struct mpic *mpic = &mpic_data; + struct mpic *mpic = mpic_data; mpic->doorbell_mask = readl(mpic->per_cpu + MPIC_IN_DRBEL_MASK); @@ -740,7 +740,7 @@ static int mpic_suspend(void) static void mpic_resume(void) { - struct mpic *mpic = &mpic_data; + struct mpic *mpic = mpic_data; bool src0, src1; /* Re-enable interrupts */ @@ -833,11 +833,17 @@ static int __init mpic_map_region(struct device_node *np, int index, static int __init mpic_of_init(struct device_node *node, struct device_node *parent) { - struct mpic *mpic = &mpic_data; phys_addr_t phys_base; unsigned int nr_irqs; + struct mpic *mpic; int err; + mpic = kzalloc(sizeof(*mpic), GFP_KERNEL); + if (WARN_ON(!mpic)) + return -ENOMEM; + + mpic_data = mpic; + err = mpic_map_region(node, 0, &mpic->base, &phys_base); if (err) return err; From patchwork Mon Jul 15 10:51:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3B8EDC3DA5D for ; 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Mon, 15 Jul 2024 10:55:11 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJJo-00000006lT7-2Ai3 for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 10:52:33 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id C88F6CE0ECE; Mon, 15 Jul 2024 10:52:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E7FFAC4AF0B; Mon, 15 Jul 2024 10:52:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040750; bh=ospChZBh29PvY9nOnz0jXXLFXiWBOOs16kUH2ioQPuw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=X/zLUO0+RAM1+cCBK4jLHy1/42heldS4BzheYqFNx9olC2OVmRUyPRcePnm2OUq92 b+zRTu1vSOCGvByuJo1gmRnQV29dMRApIsJ6Uy+kRimIpFzvfsn/6GKCVAueHK2PiG GIk+DtGpYBng4zuPvYdMfiSQMzKMJj1ltrsb7DD/k9nFPl4W0tP/9GXPxEEvz0gD7G 06A8Wpf8ItrE7SmrmvaxrIRkxVGycEI7Y3IK/s0HJIgRC0wl6rRtUZrlp8GlNvLL85 2MvfwyBika7Oy/8fRxmMLCxNEw38DtJ7T6gjC+sqbokJQNXsu9igc9xeqBsP7Hcd6S NlHdGL44Ozmgg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 10/13] irqchip/armada-370-xp: Fix reenabling last per-CPU interrupt Date: Mon, 15 Jul 2024 12:51:53 +0200 Message-ID: <20240715105156.18388-11-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035232_754750_DFA0CFA3 X-CRM114-Status: GOOD ( 14.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The number of per-CPU interrupts is 29 (0 to 28). This is described by the constant MPIC_MAX_PER_CPU_IRQS, set to 28 (the maximum per-CPU interrupt). Commit 0fa4ce746d1d ("irqchip/armada-370-xp: Re-enable per-CPU interrupts at resume time") used the constant incorrectly in the for-loop, it used the operator < instead of <=, causing it to iterate only the first 28 interrupts (0 to 27), ignoring the last, 28th, per-CPU interrupt. To avoid this kind of confusions, fix this issue by renaming the constant to MPIC_PER_CPU_IRQS_NR and set it to 29, the number of per-CPU IRQs. Update its use in mpic_is_percpu_irq() accordingly. Fixes: 0fa4ce746d1d ("irqchip/armada-370-xp: Re-enable per-CPU interrupts at resume time") Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index e8daa967e5fc..78d9c7699972 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -133,7 +133,7 @@ #define MPIC_INT_FABRIC_MASK 0x54 #define MPIC_INT_CAUSE_PERF(cpu) BIT(cpu) -#define MPIC_MAX_PER_CPU_IRQS 28 +#define MPIC_PER_CPU_IRQS_NR 29 /* IPI and MSI interrupt definitions for IPI platforms */ #define IPI_DOORBELL_NR 8 @@ -195,7 +195,7 @@ static inline bool mpic_is_ipi_available(struct mpic *mpic) static inline bool mpic_is_percpu_irq(irq_hw_number_t hwirq) { - return hwirq <= MPIC_MAX_PER_CPU_IRQS; + return hwirq < MPIC_PER_CPU_IRQS_NR; } /* @@ -546,7 +546,7 @@ static void mpic_smp_cpu_init(struct mpic *mpic) static void mpic_reenable_percpu(struct mpic *mpic) { /* Re-enable per-CPU interrupts that were enabled before suspend */ - for (irq_hw_number_t i = 0; i < MPIC_MAX_PER_CPU_IRQS; i++) { + for (irq_hw_number_t i = 0; i < MPIC_PER_CPU_IRQS_NR; i++) { unsigned int virq = irq_linear_revmap(mpic->domain, i); struct irq_data *d; From patchwork Mon Jul 15 10:51:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733320 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 58633C3DA5D for ; Mon, 15 Jul 2024 10:55:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Mon, 15 Jul 2024 10:52:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040752; bh=1n3czihuhBZzxRluYcQ3ZKP+cOmNrEajTc3eGyMd/ow=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Oq9SAE9Tr4+ORs4Yi0jDsUdLmJQ8xmkadxSN83U4MGabo7kFb2PNWxFnj0x+/yWk9 cEqXBrIDDkeSPph9XhFhUsMEbZbUgkDeYsaGTmVpLKFx3Kpl5XI+iSQD4YITNe3K5w d/gv07S32UIynt0n3OBQgiu1VN/ikpMf5KM6zFVs4mRQcuJXOkSpUCANyG9jMmBfYI CllvP6VpxT+DPPxLa8HslgeC05GoaLaZrzlZYrbaTx6QlLpGUPKMKUM80zYemfgUJW oomQhMUX9NcXYOXhCfGvXz4hG3ji4ZU7pzKH0MSnIO6r/9wV6+QLenBifDYiJlL9o2 xWtBk6ZnAu2qQ== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 11/13] irqchip/armada-370-xp: Iterate only valid bits of the per-CPU interrupt cause register Date: Mon, 15 Jul 2024 12:51:54 +0200 Message-ID: <20240715105156.18388-12-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035233_668840_2FC2AF8D X-CRM114-Status: GOOD ( 12.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Use MPIC_PER_CPU_IRQS_NR (29) bound instead of BITS_PER_LONG (32) when iterating the bits of the per-CPU interrupt cause register, since there are only 29 per-CPU interrupts. The top 3 bits are always zero anyway, so this may save a couple of cycles in the interrupt handler. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 78d9c7699972..1db9160da20a 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -683,7 +683,7 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) cause = readl_relaxed(mpic->per_cpu + MPIC_PPI_CAUSE); cpuid = cpu_logical_map(smp_processor_id()); - for_each_set_bit(i, &cause, BITS_PER_LONG) { + for_each_set_bit(i, &cause, MPIC_PER_CPU_IRQS_NR) { irqsrc = readl_relaxed(mpic->base + MPIC_INT_SOURCE_CTL(i)); /* Check if the interrupt is not masked on current CPU. From patchwork Mon Jul 15 10:51:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733321 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6BB54C3DA5D for ; Mon, 15 Jul 2024 10:55:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=w+ZPzl78i3kwckrb/ZQy7s0+zhNMdwWctIqOBI9Ec4c=; b=wUIP0w/BHD6anW/sGO0PjJhXRl 8K5CxE7+k2MSr1LpT35onRN57yCrAY+W6jDelvFdG85yVLRutYeNGSmP4QjEQ7UNpjWbatyXnFIeh zj2/eejw8IQQbcqZjnVFHD/m65ny3PJjymsO9jq9nPFXWsGVVAgc/i6JjyInfKhYHdOb2vLjwn/or rRCJ7Zv7gfL+GS1t14c8qoLbpGF7RbBuTDtromYExYbo8HA/tXorMbJR7tdt+ylhgIi4emAf5kkV4 rYMffNvY+cn+GCSuzOKWIf0YKGj6ZA+4sB+AI0owbeR2mg7JWi94iCZ1fUZWaH04wtfpRXZFgLIf1 o/D0g7Dw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJMv-00000006mRR-2JnY; Mon, 15 Jul 2024 10:55:45 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJJt-00000006lVS-38Qj for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 10:52:39 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 12234CE0EEF; Mon, 15 Jul 2024 10:52:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2FE5AC32782; Mon, 15 Jul 2024 10:52:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040755; bh=bsfrZo4AmleFmLAwB23grY53SRdnkkh2TBIbMYP6ICk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oTvMALi2SzRqg21AeHBIJvdeV6SosJp5l4MJ1TTNuToduW8sHKSrv79mdBtp7wVxj FN5rKb+KTmp8UcTTHrK1D41C3kthNva+2pgOKf0cwMVqk5IDF9svimHPD/jqWicaqd hoCxB/egyWlIkpLAD+kVMuz8P3xXugou1orPyevW6wGqnMH57JFKx/amrEWsZlLfP8 FTcMawZ/1RMdpwSiZumHaev++lvDcg+JfulrX60FC4if0yeQEEYjVqIGx7CSX5pjpg 4MRl+5C8AKeCgcwz8j4ehlggXp1L+xKOnqAizEWMnb2XU2dYtYTupxyNE4PKpVDaId pD262/46j2QMw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 12/13] irqchip/armada-370-xp: Allow mapping only per-CPU interrupts Date: Mon, 15 Jul 2024 12:51:55 +0200 Message-ID: <20240715105156.18388-13-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035238_005288_0B955F32 X-CRM114-Status: GOOD ( 14.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On platforms where MPIC is not the top-level interrupt controller the driver currently only supports handling of the per-CPU interrupts (the first 29 interrupts). This is obvious from the code of mpic_handle_cascade_irq(), where we read only one cause register. Bound the number of available interrupts in the IRQ domain to 29 for these platforms. The corresponding device-trees refer only to per-CPU interrupts via MPIC, the other interrupts are referred to via GIC. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 1db9160da20a..3cae6ceacc73 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -858,6 +858,19 @@ static int __init mpic_of_init(struct device_node *node, for (irq_hw_number_t i = 0; i < nr_irqs; i++) writel(i, mpic->base + MPIC_INT_CLEAR_ENABLE); + /* + * Initialize mpic->parent_irq before calling any other functions, since + * it is used to distinguish between IPI and non-IPI platforms. + */ + mpic->parent_irq = irq_of_parse_and_map(node, 0); + + /* + * On non-IPI platforms the driver currently supports only the per-CPU + * interrupts (the first 29 interrupts). See mpic_handle_cascade_irq(). + */ + if (!mpic_is_ipi_available(mpic)) + nr_irqs = MPIC_PER_CPU_IRQS_NR; + mpic->domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, mpic); if (!mpic->domain) { pr_err("%pOF: Unable to add IRQ domain\n", node); @@ -866,12 +879,6 @@ static int __init mpic_of_init(struct device_node *node, irq_domain_update_bus_token(mpic->domain, DOMAIN_BUS_WIRED); - /* - * Initialize mpic->parent_irq before calling any other functions, since - * it is used to distinguish between IPI and non-IPI platforms. - */ - mpic->parent_irq = irq_of_parse_and_map(node, 0); - /* Setup for the boot CPU */ mpic_perf_init(mpic); mpic_smp_cpu_init(mpic); From patchwork Mon Jul 15 10:51:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13733322 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 07A42C3DA59 for ; Mon, 15 Jul 2024 10:56:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=jl25GEi80Y/97nrsvvfDUu2+Fg+ryJ2n1+Cth6fT4G0=; b=ObQtI6MowMj1ErfrSlk+5nOytR Ypc0a5tAjQIfAVN/UpIhgIdYJ7x8iBToDYPOIWB0c08glz3O/0nUY3G/1ozAn1CdchzHBD9gxAPG6 TmV9wulM1M6aH8iB3ALE6da2BxPpH4fW2bsNdtd4xyMJXyq9Vt8GMQskcIppJN6q7cA/Pzzy4H39Q ZNpgpJFf8APnty8BoltH1BLrH/yJVyk95Cde0yHnVGON/bZkcuHua18pxOscXsfUfBZSXZ84QmPlg cBbJULBEtjwlJLvFuD4qAlXu1XcLr80P2UqLM5Im1S8tn3JKHqM8o1L5hnxML9jMNrg+qZZRU16JR uOip1KQA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJNC-00000006mYJ-3C8Y; Mon, 15 Jul 2024 10:56:02 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sTJJw-00000006lWc-1dQ5 for linux-arm-kernel@lists.infradead.org; Mon, 15 Jul 2024 10:52:42 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id B3DAECE0EEA; Mon, 15 Jul 2024 10:52:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C69A4C4AF0A; Mon, 15 Jul 2024 10:52:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721040758; bh=cyhQbqMT8K6us6T6cl+OGFlbj0kB/PPZoztSxX04igQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=suoD0sgu5WItj/+50VBYYOMHk/XBLeNJDerl8BlS2q52vJy2ytn8R29ornqfGUuY8 mt3wJ9AU0FNjxsb+pyRBlh1iukRTDbTqZjPIt8EB1SBMSTw6tvXopU8XvyIrKyqiiW l+VbzlTGYSp5uKlZMDZeN5k7/th0xdSmoIB2ZbYEttZeBbR+dtMpiBfiwkPS9F8I/q wvjbHSr0wEdtUn7KrxQDy6eBF8eWhQ0n9x9W7EpwGxTWg53xOORr2luyCAqWnsJtp7 JkAVMkrYFmZ1xDk9fabxyRPRwuVGXWthfKNpc7fB5L2xAfvOagQdQISppudVvJ6iRq ET1JD4BYtueEA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH 13/13] irqchip/armada-370-xp: Use the mpic_is_ipi_available() helper in one more case Date: Mon, 15 Jul 2024 12:51:56 +0200 Message-ID: <20240715105156.18388-14-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240715105156.18388-1-kabel@kernel.org> References: <20240715105156.18388-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240715_035240_926978_804BF3A0 X-CRM114-Status: GOOD ( 12.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org There is one last case where we can use the helper function mpic_is_ipi_available() instead of hardcoding the condition. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 3cae6ceacc73..56ab14f0d496 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -889,7 +889,7 @@ static int __init mpic_of_init(struct device_node *node, return err; } - if (mpic->parent_irq <= 0) { + if (mpic_is_ipi_available(mpic)) { irq_set_default_host(mpic->domain); set_handle_irq(mpic_handle_irq); #ifdef CONFIG_SMP