From patchwork Tue Jul 16 16:10:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13734651 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEAEA19E7CF for ; Tue, 16 Jul 2024 15:55:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145312; cv=none; b=CHsc7Qdujpqoy0fzWzrUSR+eR0FGLSLKTR0xPoJnvR0gPFvY90Br5lDoAvTI7EK/cTDarTFze5NKp5uFsIbKNgYhGorkKcw7nNdOg7lqJaUOxKaFY7kUuTOWWjMyW9hslGqRUVTm0waLPHxhVpYZ9DYiDo6nptqydmRCGjnLo5U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145312; c=relaxed/simple; bh=aSztLg0iNMT3uyyClDjLkfY1lXlQlvk27Z83Xiyv+UE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=EsK1F/RWWp2/WS6Ot7jsLrEO9I/bTY6/aMvTuNdh0DGPfjNKy+4TFh/dIoodllue4nfWkdVU2ZzFKjJiDA9gnKqEeuL89zM33QxA3P4a8yf7mq22BF7e+YdjOcoB+2B2oDYIv1XDlCDPOaWiuwHaJp5P56LjNoDo0TWKauVV278= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=V0UurNR6; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="V0UurNR6" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721145311; x=1752681311; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=aSztLg0iNMT3uyyClDjLkfY1lXlQlvk27Z83Xiyv+UE=; b=V0UurNR6CoKAFlHMVox2uAoAxjLBJp8Ft863cmTSrKCK4aPf5NtSmmA/ QPptWo5BrRHAnE41edonULs1lfpMAic5KdCEroByaEY+C4TYE/V2u9S7X VDlUM/cajoxACjKl2u6ayPRvERKYiAfeVDuyC2v6Ninb1lOsCKEUv+NKg 5kTwJNsHVJT2/kPodkLz6BYKiJlIZf4qCFWcrPDRRtd4ZvuF8sjXX6ZfO S/+hHbas7+cecy1ARHPLbDZPxY/zu4AnI4x5AQfzNANFpW7IgxvEipBYu TPfd/kjNzBE6bPltyeQDrRlNGlHN7S9wNaVq5ew2aux5wlr4PPnoDxx62 Q==; X-CSE-ConnectionGUID: wh9x0gu4Ti2LNAg6CAPpyA== X-CSE-MsgGUID: 2iaX/ZMiQ4ykt6/D8mTq5Q== X-IronPort-AV: E=McAfee;i="6700,10204,11135"; a="18743685" X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="18743685" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2024 08:54:49 -0700 X-CSE-ConnectionGUID: C5k4/VhcSmOzD31a0n95Pw== X-CSE-MsgGUID: 7LQz5i87Sf6SSYe7NAa9VA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="50788258" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orviesa008.jf.intel.com with ESMTP; 16 Jul 2024 08:54:46 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v4 1/9] target/i386/kvm: Add feature bit definitions for KVM CPUID Date: Wed, 17 Jul 2024 00:10:07 +0800 Message-Id: <20240716161015.263031-2-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240716161015.263031-1-zhao1.liu@intel.com> References: <20240716161015.263031-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add feature definitions for KVM_CPUID_FEATURES in CPUID ( CPUID[4000_0001].EAX and CPUID[4000_0001].EDX), to get rid of lots of offset calculations. Signed-off-by: Zhao Liu Reviewed-by: zide.chen@intel.com --- v3: Resolved a rebasing conflict. v2: Changed the prefix from CPUID_FEAT_KVM_* to CPUID_KVM_*. (Xiaoyao) --- hw/i386/kvm/clock.c | 5 ++--- target/i386/cpu.h | 23 +++++++++++++++++++++++ target/i386/kvm/kvm.c | 28 ++++++++++++++-------------- 3 files changed, 39 insertions(+), 17 deletions(-) diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c index 40aa9a32c32c..ce416c05a3d0 100644 --- a/hw/i386/kvm/clock.c +++ b/hw/i386/kvm/clock.c @@ -27,7 +27,6 @@ #include "qapi/error.h" #include -#include "standard-headers/asm-x86/kvm_para.h" #include "qom/object.h" #define TYPE_KVM_CLOCK "kvmclock" @@ -334,8 +333,8 @@ void kvmclock_create(bool create_always) assert(kvm_enabled()); if (create_always || - cpu->env.features[FEAT_KVM] & ((1ULL << KVM_FEATURE_CLOCKSOURCE) | - (1ULL << KVM_FEATURE_CLOCKSOURCE2))) { + cpu->env.features[FEAT_KVM] & (CPUID_KVM_CLOCK | + CPUID_KVM_CLOCK2)) { sysbus_create_simple(TYPE_KVM_CLOCK, -1, NULL); } } diff --git a/target/i386/cpu.h b/target/i386/cpu.h index c43ac01c794a..b59bdc1c9d9d 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -28,6 +28,7 @@ #include "qapi/qapi-types-common.h" #include "qemu/cpu-float.h" #include "qemu/timer.h" +#include "standard-headers/asm-x86/kvm_para.h" #define XEN_NR_VIRQS 24 @@ -988,6 +989,28 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); #define CPUID_8000_0007_EBX_OVERFLOW_RECOV (1U << 0) #define CPUID_8000_0007_EBX_SUCCOR (1U << 1) +/* (Old) KVM paravirtualized clocksource */ +#define CPUID_KVM_CLOCK (1U << KVM_FEATURE_CLOCKSOURCE) +/* (New) KVM specific paravirtualized clocksource */ +#define CPUID_KVM_CLOCK2 (1U << KVM_FEATURE_CLOCKSOURCE2) +/* KVM asynchronous page fault */ +#define CPUID_KVM_ASYNCPF (1U << KVM_FEATURE_ASYNC_PF) +/* KVM stolen (when guest vCPU is not running) time accounting */ +#define CPUID_KVM_STEAL_TIME (1U << KVM_FEATURE_STEAL_TIME) +/* KVM paravirtualized end-of-interrupt signaling */ +#define CPUID_KVM_PV_EOI (1U << KVM_FEATURE_PV_EOI) +/* KVM paravirtualized spinlocks support */ +#define CPUID_KVM_PV_UNHALT (1U << KVM_FEATURE_PV_UNHALT) +/* KVM host-side polling on HLT control from the guest */ +#define CPUID_KVM_POLL_CONTROL (1U << KVM_FEATURE_POLL_CONTROL) +/* KVM interrupt based asynchronous page fault*/ +#define CPUID_KVM_ASYNCPF_INT (1U << KVM_FEATURE_ASYNC_PF_INT) +/* KVM 'Extended Destination ID' support for external interrupts */ +#define CPUID_KVM_MSI_EXT_DEST_ID (1U << KVM_FEATURE_MSI_EXT_DEST_ID) + +/* Hint to KVM that vCPUs expect never preempted for an unlimited time */ +#define CPUID_KVM_HINTS_REALTIME (1U << KVM_HINTS_REALTIME) + /* CLZERO instruction */ #define CPUID_8000_0008_EBX_CLZERO (1U << 0) /* Always save/restore FP error pointers */ diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index becca2efa5b4..86e42beb78bf 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -539,13 +539,13 @@ uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function, * be enabled without the in-kernel irqchip */ if (!kvm_irqchip_in_kernel()) { - ret &= ~(1U << KVM_FEATURE_PV_UNHALT); + ret &= ~CPUID_KVM_PV_UNHALT; } if (kvm_irqchip_is_split()) { - ret |= 1U << KVM_FEATURE_MSI_EXT_DEST_ID; + ret |= CPUID_KVM_MSI_EXT_DEST_ID; } } else if (function == KVM_CPUID_FEATURES && reg == R_EDX) { - ret |= 1U << KVM_HINTS_REALTIME; + ret |= CPUID_KVM_HINTS_REALTIME; } if (current_machine->cgs) { @@ -3424,20 +3424,20 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_IA32_TSC, env->tsc); kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF_INT)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_EN, env->async_pf_en_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_PV_EOI)) { + if (env->features[FEAT_KVM] & CPUID_KVM_PV_EOI) { kvm_msr_entry_add(cpu, MSR_KVM_PV_EOI_EN, env->pv_eoi_en_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_STEAL_TIME)) { + if (env->features[FEAT_KVM] & CPUID_KVM_STEAL_TIME) { kvm_msr_entry_add(cpu, MSR_KVM_STEAL_TIME, env->steal_time_msr); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_POLL_CONTROL)) { + if (env->features[FEAT_KVM] & CPUID_KVM_POLL_CONTROL) { kvm_msr_entry_add(cpu, MSR_KVM_POLL_CONTROL, env->poll_control_msr); } @@ -3900,19 +3900,19 @@ static int kvm_get_msrs(X86CPU *cpu) #endif kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF_INT)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_ASYNC_PF)) { + if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_EN, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_PV_EOI)) { + if (env->features[FEAT_KVM] & CPUID_KVM_PV_EOI) { kvm_msr_entry_add(cpu, MSR_KVM_PV_EOI_EN, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_STEAL_TIME)) { + if (env->features[FEAT_KVM] & CPUID_KVM_STEAL_TIME) { kvm_msr_entry_add(cpu, MSR_KVM_STEAL_TIME, 0); } - if (env->features[FEAT_KVM] & (1 << KVM_FEATURE_POLL_CONTROL)) { + if (env->features[FEAT_KVM] & CPUID_KVM_POLL_CONTROL) { kvm_msr_entry_add(cpu, MSR_KVM_POLL_CONTROL, 1); } if (has_architectural_pmu_version > 0) { @@ -5613,7 +5613,7 @@ uint64_t kvm_swizzle_msi_ext_dest_id(uint64_t address) return address; } env = &X86_CPU(first_cpu)->env; - if (!(env->features[FEAT_KVM] & (1 << KVM_FEATURE_MSI_EXT_DEST_ID))) { + if (!(env->features[FEAT_KVM] & CPUID_KVM_MSI_EXT_DEST_ID)) { return address; } From patchwork Tue Jul 16 16:10:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13734650 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 543FB19DF75 for ; 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a="18743700" X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="18743700" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2024 08:54:52 -0700 X-CSE-ConnectionGUID: sX48Ry9oS9a3ksiDhRNKcg== X-CSE-MsgGUID: IzrrmODeTFCDv39AExZSaQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="50788277" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orviesa008.jf.intel.com with ESMTP; 16 Jul 2024 08:54:49 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v4 2/9] target/i386/kvm: Remove local MSR_KVM_WALL_CLOCK and MSR_KVM_SYSTEM_TIME definitions Date: Wed, 17 Jul 2024 00:10:08 +0800 Message-Id: <20240716161015.263031-3-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240716161015.263031-1-zhao1.liu@intel.com> References: <20240716161015.263031-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 These 2 MSRs have been already defined in kvm_para.h (standard-headers/ asm-x86/kvm_para.h). Remove QEMU local definitions to avoid duplication. Reviewed-by: Xiaoyao Li Signed-off-by: Zhao Liu Reviewed-by: zide.chen@intel.com --- target/i386/kvm/kvm.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 86e42beb78bf..6ad5a7dbf1fd 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -81,9 +81,6 @@ #define KVM_APIC_BUS_CYCLE_NS 1 #define KVM_APIC_BUS_FREQUENCY (1000000000ULL / KVM_APIC_BUS_CYCLE_NS) -#define MSR_KVM_WALL_CLOCK 0x11 -#define MSR_KVM_SYSTEM_TIME 0x12 - /* A 4096-byte buffer can hold the 8-byte kvm_msrs header, plus * 255 kvm_msr_entry structs */ #define MSR_BUF_SIZE 4096 From patchwork Tue Jul 16 16:10:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13734652 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 130FE19E7D3 for ; Tue, 16 Jul 2024 15:55:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145312; cv=none; b=d0KgucIKzYrcumGFRkov9KkmJy10Y5pQDqvsNZtHy6UaoCM5bWS7B2vdxYsQtY3wiB74nZHfB9DIkcGiG7Yni169w37ei5uU9o9kpX4NQ/1pS82AON/LS3N1vidKXobWXQ4IpXxi05PnDgYlbd0HT+wCgaEaacHk5Pzou3bXhUg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145312; c=relaxed/simple; bh=tKr89zQ0Ud3Nsxehy7urxxT9zgviuntFd5ByL5dN0Dg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BdJO6cAczYS3jtBPDMf95AbmqURhofJwTDIp5eBrpfJGY8lP+rTsthB+0HcwYJOE+aVMIoII+nQHdlb0wUvZoxJ6+Id8JTmJQKukiy8Uz9SpbITKT1peOjZAUFEZIrfZtOieWNaSdD4s2F+dJxErEg9hy30cnp/GECw5LCAM5KM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=jYDRIPRG; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="jYDRIPRG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721145311; x=1752681311; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tKr89zQ0Ud3Nsxehy7urxxT9zgviuntFd5ByL5dN0Dg=; b=jYDRIPRGmutukpZFARK5urAIfPnaCfLzzsfJ9l92d17CwQ4xCHP4AlFl 4KnZTACD1cePaWZmPR32UXsUL7Q1g2nJAKRaRgO/KBMvLio8KW4/3Z6uG gSC5JmY0Emwvg1YymWPVgQOs5FuZiaPAeCAiWc56CT76ZFDi7icgRc4Cl N7n980fHFHZQP973pfYDUKKyVyjbjYi0nZ0ibw/XIsEIvlGJdg//tDcIi rWS1WkhUA6YWGqEGAw2HOyWT71lqAOgesGRWTIpCdozAt3QG3ES5b5Gnw qlDQot53+Zsl7f1tSz3OIBmg3uZklDm2FZTBRfXfHKz+uPbEB2iHDVCq5 A==; X-CSE-ConnectionGUID: YQmKdp15SMuldVD9/c2hVw== X-CSE-MsgGUID: GkG5W2ZGS9uwZt258m79kg== X-IronPort-AV: E=McAfee;i="6700,10204,11135"; a="18743711" X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="18743711" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2024 08:54:55 -0700 X-CSE-ConnectionGUID: j3gcA0gTTA2+0HOhBi+S3A== X-CSE-MsgGUID: YP2sYcn8QyKJ8X4hGTs2/A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="50788304" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orviesa008.jf.intel.com with ESMTP; 16 Jul 2024 08:54:52 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v4 3/9] target/i386/kvm: Only save/load kvmclock MSRs when kvmclock enabled Date: Wed, 17 Jul 2024 00:10:09 +0800 Message-Id: <20240716161015.263031-4-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240716161015.263031-1-zhao1.liu@intel.com> References: <20240716161015.263031-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 MSR_KVM_SYSTEM_TIME and MSR_KVM_WALL_CLOCK are attached with the (old) kvmclock feature (KVM_FEATURE_CLOCKSOURCE). So, just save/load them only when kvmclock (KVM_FEATURE_CLOCKSOURCE) is enabled. Signed-off-by: Zhao Liu --- target/i386/kvm/kvm.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 6ad5a7dbf1fd..ac434e83b64c 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3419,8 +3419,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level) */ if (level >= KVM_PUT_RESET_STATE) { kvm_msr_entry_add(cpu, MSR_IA32_TSC, env->tsc); - kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); - kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } @@ -3895,8 +3897,10 @@ static int kvm_get_msrs(X86CPU *cpu) } } #endif - kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); - kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } From patchwork Tue Jul 16 16:10:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13734653 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B47F195B27 for ; Tue, 16 Jul 2024 15:55:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145314; cv=none; b=IVQU+X5jEBaRkpXY5tnlQNOh+b6QcsPyTuHF2mlsCBTiYqgtctaXXwYyLBUdGu5blnxahGs/M9GZSvuiVfcPq6uNiwyK4b6r8qvK23ZmtiCRsZAslUrpTvRum7Rjc/uX8u0StKEIb8a3UUZbZwdw/Zne0G65ba/Z0G4hx+sKCoI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145314; c=relaxed/simple; bh=M+INEDceyzqNpPErcKN6L7u48TTH5fEDjgdcYW5fAXE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Fr9bTp6OlXV19Vcc2CER+a9MVy64HfQIxzZjpmZIjJ+jQBa4cWWhPrvO/6luqNNzwYdyg437MOoIfKD+0E9twC9KgGOsKiJZCQa6+y19T21I3haX8I7jqc5Pves1XIA87mdJ6Ty1iHTxmmpp9u1dNxM8ZopooQfCxCy6JPecn6Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=eX2jVF/a; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="eX2jVF/a" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721145312; x=1752681312; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=M+INEDceyzqNpPErcKN6L7u48TTH5fEDjgdcYW5fAXE=; b=eX2jVF/aOfxJJZwZAK3fel6pcCsgvqd17Jk6G0oqVGixJZ+R4g4Tqa+O nfyPdzCofd2IEgP0iBuqZaymxWizGN0/TH9z2hRtcoT0Nz4EFRwc+jQ7m dzk7PmCIZ009/VzLMSLDtHMtWAa2qChzmFnveJUU5CI5xOJ/JVm0hzaKm c7jGaCgf5dxYxpfr3bvm47oUl6bGwZ31TMvMzqS1sJTyZPDpICpkA70Zi OHhiq/6ltJRGpKU5aoMO53TYNKyXO3/GFNeqOLtFwfljmS68Piyuy5im7 HirO81Z77/w6SzmPcmobtJUWfiSNNBH70k8FvoVfLhvMhIRsqoBA1DKUr Q==; X-CSE-ConnectionGUID: +kv9Y80jRaG+Dfmh8xRC6w== X-CSE-MsgGUID: jnlnQ4h4TXOeo7hRSNm2DA== X-IronPort-AV: E=McAfee;i="6700,10204,11135"; a="18743722" X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="18743722" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2024 08:54:58 -0700 X-CSE-ConnectionGUID: yaG6rVfWQRio/3iUZpNdng== X-CSE-MsgGUID: NRCi32nqSbSgQyQJ9+MGCw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="50788325" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orviesa008.jf.intel.com with ESMTP; 16 Jul 2024 08:54:55 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v4 4/9] target/i386/kvm: Save/load MSRs of kvmclock2 (KVM_FEATURE_CLOCKSOURCE2) Date: Wed, 17 Jul 2024 00:10:10 +0800 Message-Id: <20240716161015.263031-5-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240716161015.263031-1-zhao1.liu@intel.com> References: <20240716161015.263031-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 MSR_KVM_SYSTEM_TIME_NEW and MSR_KVM_WALL_CLOCK_NEW are bound to kvmclock2 (KVM_FEATURE_CLOCKSOURCE2). Add the save/load support for these 2 MSRs just like kvmclock MSRs. Signed-off-by: Zhao Liu Reviewed-by: Zide Chen --- target/i386/cpu.h | 2 ++ target/i386/kvm/kvm.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index b59bdc1c9d9d..35dc68631989 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1826,6 +1826,8 @@ typedef struct CPUArchState { uint64_t system_time_msr; uint64_t wall_clock_msr; + uint64_t system_time_new_msr; + uint64_t wall_clock_new_msr; uint64_t steal_time_msr; uint64_t async_pf_en_msr; uint64_t async_pf_int_msr; diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index ac434e83b64c..64e54beac7b3 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -3423,6 +3423,12 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, env->system_time_msr); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, env->wall_clock_msr); } + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK2) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME_NEW, + env->system_time_new_msr); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK_NEW, + env->wall_clock_new_msr); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, env->async_pf_int_msr); } @@ -3901,6 +3907,10 @@ static int kvm_get_msrs(X86CPU *cpu) kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME, 0); kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK, 0); } + if (env->features[FEAT_KVM] & CPUID_KVM_CLOCK2) { + kvm_msr_entry_add(cpu, MSR_KVM_SYSTEM_TIME_NEW, 0); + kvm_msr_entry_add(cpu, MSR_KVM_WALL_CLOCK_NEW, 0); + } if (env->features[FEAT_KVM] & CPUID_KVM_ASYNCPF_INT) { kvm_msr_entry_add(cpu, MSR_KVM_ASYNC_PF_INT, 0); } @@ -4167,6 +4177,12 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_KVM_WALL_CLOCK: env->wall_clock_msr = msrs[i].data; break; + case MSR_KVM_SYSTEM_TIME_NEW: + env->system_time_new_msr = msrs[i].data; + break; + case MSR_KVM_WALL_CLOCK_NEW: + env->wall_clock_new_msr = msrs[i].data; + break; case MSR_MCG_STATUS: env->mcg_status = msrs[i].data; break; From patchwork Tue Jul 16 16:10:11 2024 Content-Type: text/plain; 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Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v4 5/9] target/i386/kvm: Drop workaround for KVM_X86_DISABLE_EXITS_HTL typo Date: Wed, 17 Jul 2024 00:10:11 +0800 Message-Id: <20240716161015.263031-6-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240716161015.263031-1-zhao1.liu@intel.com> References: <20240716161015.263031-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The KVM_X86_DISABLE_EXITS_HTL typo has been fixed in commit 77d361b13c19 ("linux-headers: Update to kernel mainline commit b357bf602"). Drop the related workaround. Signed-off-by: Zhao Liu Reviewed-by: Zide Chen --- target/i386/kvm/kvm.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 64e54beac7b3..4aae4ffc9ccd 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2728,10 +2728,6 @@ int kvm_arch_init(MachineState *ms, KVMState *s) if (enable_cpu_pm) { int disable_exits = kvm_check_extension(s, KVM_CAP_X86_DISABLE_EXITS); -/* Work around for kernel header with a typo. TODO: fix header and drop. */ -#if defined(KVM_X86_DISABLE_EXITS_HTL) && !defined(KVM_X86_DISABLE_EXITS_HLT) -#define KVM_X86_DISABLE_EXITS_HLT KVM_X86_DISABLE_EXITS_HTL -#endif if (disable_exits) { disable_exits &= (KVM_X86_DISABLE_EXITS_MWAIT | KVM_X86_DISABLE_EXITS_HLT | From patchwork Tue Jul 16 16:10:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13734655 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F87919E830 for ; Tue, 16 Jul 2024 15:55:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145315; cv=none; b=NjyVEbzM7VoVmI/LN0vsxYZNuPdT9tEgOHKcwmADXkd8T1Dw2TSecS1aDFbz7KRjwNyklIhvPnm9L7Ud6RCGmPJasOHx3VSiZ/MRX774J8H7JJ8zKkelFr04EhuOVJMSdcK1oBOOcbzMzWNv7XbD5iRT2RMjJFYp/iNRb59FDpg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145315; c=relaxed/simple; bh=u1cSsKiZS4LgVHWKLVbqsnZaR8V7g5t3vC4cMVukk+s=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=OunR7mywXVrf6ZQOrWUJclYVmswoc9rOclKlvBR2973R+QuL2mm4Jgo7gZzduVD2FnqYIjvP3UGOn3jcymWexLvmXIlnrRbgkepe050MwlWMayxvMBJlJSsW2tBjn1cA43WBQbXv5jaFW2sE/jNr/NeZa+XiaaGLQF8BWWa3iEw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=NYwM/iwi; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="NYwM/iwi" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721145313; x=1752681313; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=u1cSsKiZS4LgVHWKLVbqsnZaR8V7g5t3vC4cMVukk+s=; b=NYwM/iwiuc4NvEsnemPETS3E3QG8vBizFqzUaTwqieGfJl7SOXY4KDt1 4Sf6ICAG6r707xaW/dnbSyXecOjCbZFzqcjPrZN2OloxmGYWpjN3qbSQ6 qM1ficu0Q2krixs68SWsInq8QvRReC+NzaChGZcm1vl4EP4VAawqWj+XP cdpQR2Bn5U2gm70tPKgPe4tGYMhaisd3CzCp/oqXYSaB5vkfS84DAAgCK FBsPlOHe91O/To1VCZME62+6Z4U9vwgZRiamuITLAcKprYYV4+Y4C6ffp 7xaekmVmZJws6OUygm3E3Gl2ooxyq4NFqLXUVDxPh5HwvWIRAOQCqFoPJ Q==; X-CSE-ConnectionGUID: 4x66TiYRSrWJSFNKKVc7Ng== X-CSE-MsgGUID: hopVD+B6Tr6qEBoMGKXhSw== X-IronPort-AV: E=McAfee;i="6700,10204,11135"; a="18743754" X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="18743754" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2024 08:55:04 -0700 X-CSE-ConnectionGUID: AvJVzMyPQc68UJx2aqmsgg== X-CSE-MsgGUID: L5VZ5PCHQ5u211w+4a4pKQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="50788394" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orviesa008.jf.intel.com with ESMTP; 16 Jul 2024 08:55:01 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v4 6/9] target/i386/confidential-guest: Fix comment of x86_confidential_guest_kvm_type() Date: Wed, 17 Jul 2024 00:10:12 +0800 Message-Id: <20240716161015.263031-7-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240716161015.263031-1-zhao1.liu@intel.com> References: <20240716161015.263031-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Update the comment to match the X86ConfidentialGuestClass implementation. Reported-by: Xiaoyao Li Signed-off-by: Zhao Liu Reviewed-by: Pankaj Gupta --- target/i386/confidential-guest.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/confidential-guest.h b/target/i386/confidential-guest.h index 7342d2843aa5..c90a59bac41a 100644 --- a/target/i386/confidential-guest.h +++ b/target/i386/confidential-guest.h @@ -46,7 +46,7 @@ struct X86ConfidentialGuestClass { /** * x86_confidential_guest_kvm_type: * - * Calls #X86ConfidentialGuestClass.unplug callback of @plug_handler. + * Calls #X86ConfidentialGuestClass.kvm_type() callback. */ static inline int x86_confidential_guest_kvm_type(X86ConfidentialGuest *cg) { From patchwork Tue Jul 16 16:10:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13734656 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2A89919F477 for ; Tue, 16 Jul 2024 15:55:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145315; cv=none; b=eW/AqcNQB10a9vqXoHhoQP2z+1aG5ma75/JPaAoj2RnE7p9Ue985IVTuef86FNAcV+hcR+IdWk3c1XTfybIMo0lgEaFscpJhQxSqtvxik0I77qHh3pZCLXlptqqXuwHYdpR2+y9UvhdkeauskXUE3WGSYdi+PskL6r3GV5ylkKs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145315; c=relaxed/simple; bh=o17ZIKIksTITRMcAguc7dJOs/NSuZsgFkBWTlPrKm8w=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=jajKgIJYNWxm8xilYBYJpdGxJQ23iPgqS+P874OO9+S6dNy/oGCvXvIlZI+B10yJqpJpKvHNsleb9QDR683MjMMsMj9tooJXIjW/3qBFZtV88irMwpzc9EESicZUUPuZ5Y1TlslZM54l255v6xLTqStHCh/QYtqYqjv3Pb24oKs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=VZFExEmq; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="VZFExEmq" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721145314; x=1752681314; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=o17ZIKIksTITRMcAguc7dJOs/NSuZsgFkBWTlPrKm8w=; b=VZFExEmqlg+bKtRV1xkO1OvpSqzS0tyWpFrXTAnzGOSybDIndpuu2RC9 GASyFdt+SeKUo/G4SpOoRhLd5zdGJ1a1iulYwTS1YDqbqQKgmg7pd1M4U Kg5ggAPcNGiH1Lq2Y5DvBs84wHbWSypy4zpfsN7bQi//As1hQA3IlZpkQ bGrbZdDm6YAxb2h4YJBjU9yDITKpkIsd5iAJuWVFQOLhMSVoYN8gxiAZO 9tgUyj2cn4WT6qjI3FZ1suvytT5EccpnlXYZXky2p6ItJfnG+AZxFPSXZ /KwR0/ldJcdyAm3nU77nuyi/9pAyh+BAblnU9xsi1wPxLN2qRgX2W0K74 g==; X-CSE-ConnectionGUID: sEg0R3KRQ32exk8cjPZPoQ== X-CSE-MsgGUID: c3XjDW0PTumIC39j9Z+Ccg== X-IronPort-AV: E=McAfee;i="6700,10204,11135"; a="18743773" X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="18743773" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2024 08:55:07 -0700 X-CSE-ConnectionGUID: s2dEqft1QrKII9T29SAtSg== X-CSE-MsgGUID: MX4+2bZTRHqNYc+Y7yZYCQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="50788416" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orviesa008.jf.intel.com with ESMTP; 16 Jul 2024 08:55:04 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v4 7/9] target/i386/kvm: Clean up return values of MSR filter related functions Date: Wed, 17 Jul 2024 00:10:13 +0800 Message-Id: <20240716161015.263031-8-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240716161015.263031-1-zhao1.liu@intel.com> References: <20240716161015.263031-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 At present, the error code of MSR filter enablement attempts to print in error_report(). Unfortunately, this behavior doesn't work because the MSR filter-related functions return the boolean and current error_report() use the wrong return value. So fix this by making MSR filter related functions return int type and printing such returned value in error_report(). Signed-off-by: Zhao Liu --- v4: Returned kvm_vm_ioctl() directly. (Zide) v3: new commit. --- target/i386/kvm/kvm.c | 34 ++++++++++++++-------------------- target/i386/kvm/kvm_i386.h | 4 ++-- 2 files changed, 16 insertions(+), 22 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index 4aae4ffc9ccd..f68be68eb411 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2780,8 +2780,6 @@ int kvm_arch_init(MachineState *ms, KVMState *s) } } if (kvm_vm_check_extension(s, KVM_CAP_X86_USER_SPACE_MSR)) { - bool r; - ret = kvm_vm_enable_cap(s, KVM_CAP_X86_USER_SPACE_MSR, 0, KVM_MSR_EXIT_REASON_FILTER); if (ret) { @@ -2790,9 +2788,9 @@ int kvm_arch_init(MachineState *ms, KVMState *s) exit(1); } - r = kvm_filter_msr(s, MSR_CORE_THREAD_COUNT, - kvm_rdmsr_core_thread_count, NULL); - if (!r) { + ret = kvm_filter_msr(s, MSR_CORE_THREAD_COUNT, + kvm_rdmsr_core_thread_count, NULL); + if (ret) { error_report("Could not install MSR_CORE_THREAD_COUNT handler: %s", strerror(-ret)); exit(1); @@ -5274,13 +5272,13 @@ void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg) } } -static bool kvm_install_msr_filters(KVMState *s) +static int kvm_install_msr_filters(KVMState *s) { uint64_t zero = 0; struct kvm_msr_filter filter = { .flags = KVM_MSR_FILTER_DEFAULT_ALLOW, }; - int r, i, j = 0; + int i, j = 0; for (i = 0; i < KVM_MSR_FILTER_MAX_RANGES; i++) { KVMMSRHandlers *handler = &msr_handlers[i]; @@ -5304,18 +5302,13 @@ static bool kvm_install_msr_filters(KVMState *s) } } - r = kvm_vm_ioctl(s, KVM_X86_SET_MSR_FILTER, &filter); - if (r) { - return false; - } - - return true; + return kvm_vm_ioctl(s, KVM_X86_SET_MSR_FILTER, &filter); } -bool kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, - QEMUWRMSRHandler *wrmsr) +int kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, + QEMUWRMSRHandler *wrmsr) { - int i; + int i, ret; for (i = 0; i < ARRAY_SIZE(msr_handlers); i++) { if (!msr_handlers[i].msr) { @@ -5325,16 +5318,17 @@ bool kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, .wrmsr = wrmsr, }; - if (!kvm_install_msr_filters(s)) { + ret = kvm_install_msr_filters(s); + if (ret) { msr_handlers[i] = (KVMMSRHandlers) { }; - return false; + return ret; } - return true; + return 0; } } - return false; + return 0; } static int kvm_handle_rdmsr(X86CPU *cpu, struct kvm_run *run) diff --git a/target/i386/kvm/kvm_i386.h b/target/i386/kvm/kvm_i386.h index 34fc60774b86..91c2d6e69163 100644 --- a/target/i386/kvm/kvm_i386.h +++ b/target/i386/kvm/kvm_i386.h @@ -74,8 +74,8 @@ typedef struct kvm_msr_handlers { QEMUWRMSRHandler *wrmsr; } KVMMSRHandlers; -bool kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, - QEMUWRMSRHandler *wrmsr); +int kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, + QEMUWRMSRHandler *wrmsr); #endif /* CONFIG_KVM */ From patchwork Tue Jul 16 16:10:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13734657 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A7CE19F487 for ; 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Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v4 8/9] target/i386/kvm: Clean up error handling in kvm_arch_init() Date: Wed, 17 Jul 2024 00:10:14 +0800 Message-Id: <20240716161015.263031-9-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240716161015.263031-1-zhao1.liu@intel.com> References: <20240716161015.263031-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently, there're following incorrect error handling cases in kvm_arch_init(): * Missed to handle failure of kvm_get_supported_feature_msrs(). * Missed to return when KVM_CAP_X86_DISABLE_EXITS enabling fails. * MSR filter related cases called exit() directly instead of returning to kvm_init(). Fix the above cases. Signed-off-by: Zhao Liu Reviewed-by: Zide Chen --- v3: new commit. --- target/i386/kvm/kvm.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index f68be68eb411..d47476e96813 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -2682,7 +2682,10 @@ int kvm_arch_init(MachineState *ms, KVMState *s) return ret; } - kvm_get_supported_feature_msrs(s); + ret = kvm_get_supported_feature_msrs(s); + if (ret < 0) { + return ret; + } uname(&utsname); lm_capable_kernel = strcmp(utsname.machine, "x86_64") == 0; @@ -2740,6 +2743,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) if (ret < 0) { error_report("kvm: guest stopping CPU not supported: %s", strerror(-ret)); + return ret; } } @@ -2785,7 +2789,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) if (ret) { error_report("Could not enable user space MSRs: %s", strerror(-ret)); - exit(1); + return ret; } ret = kvm_filter_msr(s, MSR_CORE_THREAD_COUNT, @@ -2793,7 +2797,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) if (ret) { error_report("Could not install MSR_CORE_THREAD_COUNT handler: %s", strerror(-ret)); - exit(1); + return ret; } } From patchwork Tue Jul 16 16:10:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13734658 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8046C19E7F7 for ; Tue, 16 Jul 2024 15:55:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145323; cv=none; b=fHc3uHwUWrxRxv/AKGlEb3fjv1vezPa5BGhJMct/719JsZRjs4SARMsyVHEZRS4YUhCzsV/xSefKU74tj+9z6Z/yrWBxIOgq1FjUVXfN6DduMq2own03pVUkTbt61zoXjVCHxtdVISZD2mKxJoQHd5JLL2mM3h0jhYSfan+IEVk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721145323; c=relaxed/simple; bh=tdtgldsaF/+mVcySq07MM+0QKRZwCNCIky3jLeqq+yU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Nrz7nDd3ngiHI+L0/LNl1RKGds2WsYNKpOFYzBjc9DH8czKai2W907u6P/YaXmFRdE98/htb7OqjdpNLZTkGj73Xz6cVC1zLRprSMheERtcwn91gQ/dLwQXzjrRzhCdB7SZfy9X23VQ2o7SHh5iLactG2nDReI0EEt7AUI6f+5M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=F4i9A1D5; arc=none smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="F4i9A1D5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721145323; x=1752681323; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tdtgldsaF/+mVcySq07MM+0QKRZwCNCIky3jLeqq+yU=; b=F4i9A1D5zlc/TRFdpNTnSmy9zmXrG1JZ5E8iTiteotWrbo6y8LZ0fyXF PDBwOoavY2uvrOR4xtZygLQZXXmDUodDhbuBn1L84BR2MvmabA2sp/gRW LEKFtVSIBLLTEsHys4D6EKkwdWMW2crvBNcVwc35Z4sdU05Uza0+N1iYK 4xH9rk1gioXHu9tR12DcOe8riW7b3inozpOtRvC6YD0nUvZbJ1XCX5kbf aDaHRo88kOIkp9VsDmQOLi18U8mDAuXRh0DjMjsR6ox2niaych3NnFOzO kifvZTT+nzuJI3Xy3QGSAzfrqAsmWQqn1OSZxtvYmS04qV7zI5y3YWJ9E g==; X-CSE-ConnectionGUID: spqkkoy2Rfy1i92HuBJ0fQ== X-CSE-MsgGUID: E82Rq7hIRP2jg4eRE95LUg== X-IronPort-AV: E=McAfee;i="6700,10204,11135"; a="18743840" X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="18743840" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2024 08:55:22 -0700 X-CSE-ConnectionGUID: VMJ6NDNcQHG83f2ZFWlZ7Q== X-CSE-MsgGUID: 6r8tifxbTPWlPASAB/PxKg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,212,1716274800"; d="scan'208";a="50788551" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orviesa008.jf.intel.com with ESMTP; 16 Jul 2024 08:55:10 -0700 From: Zhao Liu To: Paolo Bonzini , Richard Henderson , Eduardo Habkost , "Michael S . Tsirkin" , Marcel Apfelbaum , Marcelo Tosatti Cc: Xiaoyao Li , Pankaj Gupta , Zide Chen , qemu-devel@nongnu.org, kvm@vger.kernel.org, Zhao Liu Subject: [PATCH v4 9/9] target/i386/kvm: Replace ARRAY_SIZE(msr_handlers) with KVM_MSR_FILTER_MAX_RANGES Date: Wed, 17 Jul 2024 00:10:15 +0800 Message-Id: <20240716161015.263031-10-zhao1.liu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240716161015.263031-1-zhao1.liu@intel.com> References: <20240716161015.263031-1-zhao1.liu@intel.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 kvm_install_msr_filters() uses KVM_MSR_FILTER_MAX_RANGES as the bound when traversing msr_handlers[], while other places still compute the size by ARRAY_SIZE(msr_handlers). In fact, msr_handlers[] is an array with the fixed size KVM_MSR_FILTER_MAX_RANGES, so there is no difference between the two ways. For the code consistency and to avoid additional computational overhead, use KVM_MSR_FILTER_MAX_RANGES instead of ARRAY_SIZE(msr_handlers). Suggested-by: Zide Chen Signed-off-by: Zhao Liu Reviewed-by: Zide Chen --- v4: new commit. --- target/i386/kvm/kvm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c index d47476e96813..43b2ea63d584 100644 --- a/target/i386/kvm/kvm.c +++ b/target/i386/kvm/kvm.c @@ -5314,7 +5314,7 @@ int kvm_filter_msr(KVMState *s, uint32_t msr, QEMURDMSRHandler *rdmsr, { int i, ret; - for (i = 0; i < ARRAY_SIZE(msr_handlers); i++) { + for (i = 0; i < KVM_MSR_FILTER_MAX_RANGES; i++) { if (!msr_handlers[i].msr) { msr_handlers[i] = (KVMMSRHandlers) { .msr = msr, @@ -5340,7 +5340,7 @@ static int kvm_handle_rdmsr(X86CPU *cpu, struct kvm_run *run) int i; bool r; - for (i = 0; i < ARRAY_SIZE(msr_handlers); i++) { + for (i = 0; i < KVM_MSR_FILTER_MAX_RANGES; i++) { KVMMSRHandlers *handler = &msr_handlers[i]; if (run->msr.index == handler->msr) { if (handler->rdmsr) { @@ -5360,7 +5360,7 @@ static int kvm_handle_wrmsr(X86CPU *cpu, struct kvm_run *run) int i; bool r; - for (i = 0; i < ARRAY_SIZE(msr_handlers); i++) { + for (i = 0; i < KVM_MSR_FILTER_MAX_RANGES; i++) { KVMMSRHandlers *handler = &msr_handlers[i]; if (run->msr.index == handler->msr) { if (handler->wrmsr) {