From patchwork Wed Jul 17 05:24:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsiao Chien Sung via B4 Relay X-Patchwork-Id: 13735095 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B8FB8C3DA42 for ; Wed, 17 Jul 2024 05:25:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ED85710E934; Wed, 17 Jul 2024 05:25:11 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="oKukNrcw"; dkim-atps=neutral Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0B31D10E932 for ; Wed, 17 Jul 2024 05:24:50 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 95A5BCE168C; Wed, 17 Jul 2024 05:24:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 1D7BBC4AF0C; Wed, 17 Jul 2024 05:24:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721193886; bh=tfabwBvvONPi6G1imBOAg7bICWXSe8zF8QtpBuR5L0s=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=oKukNrcwSDXrJfaioEr6rzZWSNIufWoJNGBvkR3N9+LArG3s2zEYYQRrkujzK5zGm t94GMjd5lxRPiQCHYHE5vfIDT9Es4cxYnDuI82gOB+AtYTdRwJ+hOj4FpwmvsokfzQ /13i1iNYUG4HovFqUB2KzP6A2iVhRN1ptyGryfAIPYofQRNCW/c8MpKQjmKi+cBqwe gjNAZ59P4npPQci/FLIoKLCHx6KLlyic8FFPWhF5w1NgF3wzJCf1RX1/x2yvCknNlL 9e35kv4pVAvTvtnrmAQZhGqjp4EUMswDSDt3WqEcMKbwLemzoLVVj7QN85yHDxWv1Z UkVJMoq9muGxw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A231C3DA42; Wed, 17 Jul 2024 05:24:46 +0000 (UTC) From: Hsiao Chien Sung via B4 Relay Date: Wed, 17 Jul 2024 13:24:41 +0800 Subject: [PATCH v4 1/5] drm/mediatek: Support "None" blending in OVL MIME-Version: 1.0 Message-Id: <20240717-alpha-blending-v4-1-4b1c806c0749@mediatek.com> References: <20240717-alpha-blending-v4-0-4b1c806c0749@mediatek.com> In-Reply-To: <20240717-alpha-blending-v4-0-4b1c806c0749@mediatek.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , AngeloGioacchino Del Regno Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hsiao Chien Sung , CK Hu , Hsiao Chien Sung X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1721193884; l=1452; i=shawn.sung@mediatek.com; s=20240710; h=from:subject:message-id; bh=XPDvZ7xzyMMnOIwBspXj+lmld62ksCxAgrZn9GTIqIg=; b=Wy9P+FVTGGbiW8DLQqinrUGhy4tek0KY1cjIauc/PX5eCpPsBFzUkqfUB0/w5gKKXXs7pEK33 u4iJbnYii6OCcFP5B+sCDyImznSS+DZVc5UtLSlMO9l5AKEG6OX1weL X-Developer-Key: i=shawn.sung@mediatek.com; a=ed25519; pk=VRlGZ3diQkQtpDd8fCL9/mx+TpZStm08pg8UPaG1NGc= X-Endpoint-Received: by B4 Relay for shawn.sung@mediatek.com/20240710 with auth_id=184 X-Original-From: Hsiao Chien Sung X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: shawn.sung@mediatek.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Hsiao Chien Sung Support "None" alpha blending mode on MediaTek's chips. Reviewed-by: CK Hu Signed-off-by: Hsiao Chien Sung Reviewed-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index 9d6d9fd8342e..add671c38613 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -434,6 +434,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, unsigned int fmt = pending->format; unsigned int offset = (pending->y << 16) | pending->x; unsigned int src_size = (pending->height << 16) | pending->width; + unsigned int blend_mode = state->base.pixel_blend_mode; unsigned int ignore_pixel_alpha = 0; unsigned int con; bool is_afbc = pending->modifier != DRM_FORMAT_MOD_LINEAR; @@ -463,7 +464,8 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, * For RGB888 related formats, whether CONST_BLD is enabled or not won't * affect the result. Therefore we use !has_alpha as the condition. */ - if (state->base.fb && !state->base.fb->format->has_alpha) + if ((state->base.fb && !state->base.fb->format->has_alpha) || + blend_mode == DRM_MODE_BLEND_PIXEL_NONE) ignore_pixel_alpha = OVL_CONST_BLEND; if (pending->rotation & DRM_MODE_REFLECT_Y) { From patchwork Wed Jul 17 05:24:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsiao Chien Sung via B4 Relay X-Patchwork-Id: 13735092 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BCBFDC3DA42 for ; Wed, 17 Jul 2024 05:24:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7C26510E92A; Wed, 17 Jul 2024 05:24:53 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="Ufq6kxXW"; dkim-atps=neutral Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by gabe.freedesktop.org (Postfix) with ESMTPS id DF12C10E931 for ; Wed, 17 Jul 2024 05:24:49 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 946A9CE167D; Wed, 17 Jul 2024 05:24:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 2FFE7C4AF09; Wed, 17 Jul 2024 05:24:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721193886; bh=k+m/j/ZZUAf19tVJ68uEgaeMiuJbGDy2Tlswzrloros=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=Ufq6kxXW0VOHP10v4bw7ec3Vedm/wbB8ObnCM/O12eHEcBqBkoXpz8YwhlcA14gzO aLMOVy5Ra4Y8ecRONg6WVsr+EzRQ8iC8Fjsr6PeP6UDLV491KXzTVMmnn+pwoOiaRR G+YX4ZZMGxZ3YGgw261BldeNotcuR0qGboURcssAt5XqsDtY5qSumiUxaWAMqZrOR3 5yzSnmm8myskoBp4QflzhS7NAvJNx9A6aM6X/oB9hZLmy2/KaI6ZXEiT2bbv+Qveko FdbGCvzmslmSQUDrNxqFkbpDumt02jWI9kLSNTJ9pcDNGu9cLQKUjmMKCNbiQXhNTF K2PEvr1Csfx1g== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 185C3C3DA61; Wed, 17 Jul 2024 05:24:46 +0000 (UTC) From: Hsiao Chien Sung via B4 Relay Date: Wed, 17 Jul 2024 13:24:42 +0800 Subject: [PATCH v4 2/5] drm/mediatek: Support "None" blending in Mixer MIME-Version: 1.0 Message-Id: <20240717-alpha-blending-v4-2-4b1c806c0749@mediatek.com> References: <20240717-alpha-blending-v4-0-4b1c806c0749@mediatek.com> In-Reply-To: <20240717-alpha-blending-v4-0-4b1c806c0749@mediatek.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , AngeloGioacchino Del Regno Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hsiao Chien Sung , Hsiao Chien Sung X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1721193884; l=1164; i=shawn.sung@mediatek.com; s=20240710; h=from:subject:message-id; bh=UnuJItDahJeCC5tgEfQnqRNWpQwYQbCGuIsN6s/jhSQ=; b=YwJtfVG+IrzyvVX0K/tSkhi9+eVqQWIX79akZkka6VlXm0pJ1//CgmZinvv49UCjjB+6lm3X2 xxFJnXo0pRyAlKuarorwaY6Og/totKcaGBIBY3qaO4GBOyKYk1FsTYs X-Developer-Key: i=shawn.sung@mediatek.com; a=ed25519; pk=VRlGZ3diQkQtpDd8fCL9/mx+TpZStm08pg8UPaG1NGc= X-Endpoint-Received: by B4 Relay for shawn.sung@mediatek.com/20240710 with auth_id=184 X-Original-From: Hsiao Chien Sung X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: shawn.sung@mediatek.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Hsiao Chien Sung Support "None" alpha blending mode on MediaTek's chips. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Hsiao Chien Sung Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_ethdr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c index 9dfd13d32dfa..80ccdad3741b 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -3,6 +3,7 @@ * Copyright (c) 2021 MediaTek Inc. */ +#include #include #include #include @@ -175,7 +176,8 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, alpha_con |= state->base.alpha & MIXER_ALPHA; } - if (state->base.fb && !state->base.fb->format->has_alpha) { + if ((state->base.fb && !state->base.fb->format->has_alpha) || + state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) { /* * Mixer doesn't support CONST_BLD mode, * use a trick to make the output equivalent From patchwork Wed Jul 17 05:24:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsiao Chien Sung via B4 Relay X-Patchwork-Id: 13735091 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 45394C3DA4B for ; Wed, 17 Jul 2024 05:24:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 78FFF10E927; Wed, 17 Jul 2024 05:24:52 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="psLoWn26"; dkim-atps=neutral Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by gabe.freedesktop.org (Postfix) with ESMTPS id D28E910E92A for ; Wed, 17 Jul 2024 05:24:49 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 96BB5CE1693; Wed, 17 Jul 2024 05:24:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 3BB3AC4AF0E; Wed, 17 Jul 2024 05:24:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721193886; bh=jStUj4J7GY2NynoXTdFCihTpdFS6iLvkmtbx4Xv7GP0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=psLoWn26fkQLAsKlDl/23hv0psSYG/yW0fd0r96YkNYjzMDBELnmG69vO9Om6L5Px 5E6c71rZIunEvy72GvI8zTuPK1brslNFyLDFxJDppzmgFJ/DJn80h0uep91IuR5hFv eQbMDKb4qZ1ZYGR4BuipQVzavQ5Lz18YRouByTnnjSUr963yCENSzK1J3k2As6q/Hg 7O2Fcc4pEGU+bzYuIscD/XPohOZahVsftzMcJVfDYVwFGJNIAIgg0WgwYItCd4K7Y9 OFleJpMM8KjXLVEixJRg+U/MaOYUhImEangEQt04Gq+jtSdWiIX4jPgXT+pbAruSJ2 +J53j8Uy/CdbA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28BEBC3DA60; Wed, 17 Jul 2024 05:24:46 +0000 (UTC) From: Hsiao Chien Sung via B4 Relay Date: Wed, 17 Jul 2024 13:24:43 +0800 Subject: [PATCH v4 3/5] drm/mediatek: Support "Pre-multiplied" blending in OVL MIME-Version: 1.0 Message-Id: <20240717-alpha-blending-v4-3-4b1c806c0749@mediatek.com> References: <20240717-alpha-blending-v4-0-4b1c806c0749@mediatek.com> In-Reply-To: <20240717-alpha-blending-v4-0-4b1c806c0749@mediatek.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , AngeloGioacchino Del Regno Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hsiao Chien Sung , CK Hu , Hsiao Chien Sung X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1721193884; l=4110; i=shawn.sung@mediatek.com; s=20240710; h=from:subject:message-id; bh=/vwylVqtlY2ywvjbVf9FrPyy6AYsQ+oPjHXBQz1SYMk=; b=KPa3+72oVgLAAJ4i3CpGs/D/UzJaS/d0GgJtjtPHi8HC8S+oTNrMPGR/kmBsaScdcs7X8V9dl K/8F8SimYQlACaKM3JC3qPDECZL56N2WJ6g9j7zGKeE3fYKyCbROdaW X-Developer-Key: i=shawn.sung@mediatek.com; a=ed25519; pk=VRlGZ3diQkQtpDd8fCL9/mx+TpZStm08pg8UPaG1NGc= X-Endpoint-Received: by B4 Relay for shawn.sung@mediatek.com/20240710 with auth_id=184 X-Original-From: Hsiao Chien Sung X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: shawn.sung@mediatek.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Hsiao Chien Sung Support "Pre-multiplied" alpha blending mode on in OVL. Before this patch, only the "coverage" mode is supported. As whether OVL_CON_CLRFMT_MAN bit is enabled, (3 << 12) means different formats in the datasheet. To prevent misunderstandings going forward, instead of reusing OVL_CON_CLRFMT_RGBA8888, we intetionally defined OVL_CON_CLRFMT_PARGB8888 with bit operation again. Reviewed-by: CK Hu Signed-off-by: Hsiao Chien Sung Reviewed-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 32 +++++++++++++++++++++++++------- 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index add671c38613..89b439dcf3a6 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -56,8 +56,12 @@ #define GMC_THRESHOLD_HIGH ((1 << GMC_THRESHOLD_BITS) / 4) #define GMC_THRESHOLD_LOW ((1 << GMC_THRESHOLD_BITS) / 8) +#define OVL_CON_CLRFMT_MAN BIT(23) #define OVL_CON_BYTE_SWAP BIT(24) -#define OVL_CON_MTX_YUV_TO_RGB (6 << 16) + +/* OVL_CON_RGB_SWAP works only if OVL_CON_CLRFMT_MAN is enabled */ +#define OVL_CON_RGB_SWAP BIT(25) + #define OVL_CON_CLRFMT_RGB (1 << 12) #define OVL_CON_CLRFMT_ARGB8888 (2 << 12) #define OVL_CON_CLRFMT_RGBA8888 (3 << 12) @@ -65,6 +69,11 @@ #define OVL_CON_CLRFMT_BGRA8888 (OVL_CON_CLRFMT_ARGB8888 | OVL_CON_BYTE_SWAP) #define OVL_CON_CLRFMT_UYVY (4 << 12) #define OVL_CON_CLRFMT_YUYV (5 << 12) +#define OVL_CON_MTX_YUV_TO_RGB (6 << 16) +#define OVL_CON_CLRFMT_PARGB8888 ((3 << 12) | OVL_CON_CLRFMT_MAN) +#define OVL_CON_CLRFMT_PABGR8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_RGB_SWAP) +#define OVL_CON_CLRFMT_PBGRA8888 (OVL_CON_CLRFMT_PARGB8888 | OVL_CON_BYTE_SWAP) +#define OVL_CON_CLRFMT_PRGBA8888 (OVL_CON_CLRFMT_PABGR8888 | OVL_CON_BYTE_SWAP) #define OVL_CON_CLRFMT_RGB565(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \ 0 : OVL_CON_CLRFMT_RGB) #define OVL_CON_CLRFMT_RGB888(ovl) ((ovl)->data->fmt_rgb565_is_0 ? \ @@ -377,7 +386,8 @@ void mtk_ovl_layer_off(struct device *dev, unsigned int idx, DISP_REG_OVL_RDMA_CTRL(idx)); } -static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt) +static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt, + unsigned int blend_mode) { /* The return value in switch "MEM_MODE_INPUT_FORMAT_XXX" * is defined in mediatek HW data sheet. @@ -398,22 +408,30 @@ static unsigned int ovl_fmt_convert(struct mtk_disp_ovl *ovl, unsigned int fmt) case DRM_FORMAT_RGBA8888: case DRM_FORMAT_RGBX1010102: case DRM_FORMAT_RGBA1010102: - return OVL_CON_CLRFMT_RGBA8888; + return blend_mode == DRM_MODE_BLEND_COVERAGE ? + OVL_CON_CLRFMT_RGBA8888 : + OVL_CON_CLRFMT_PRGBA8888; case DRM_FORMAT_BGRX8888: case DRM_FORMAT_BGRA8888: case DRM_FORMAT_BGRX1010102: case DRM_FORMAT_BGRA1010102: - return OVL_CON_CLRFMT_BGRA8888; + return blend_mode == DRM_MODE_BLEND_COVERAGE ? + OVL_CON_CLRFMT_BGRA8888 : + OVL_CON_CLRFMT_PBGRA8888; case DRM_FORMAT_XRGB8888: case DRM_FORMAT_ARGB8888: case DRM_FORMAT_XRGB2101010: case DRM_FORMAT_ARGB2101010: - return OVL_CON_CLRFMT_ARGB8888; + return blend_mode == DRM_MODE_BLEND_COVERAGE ? + OVL_CON_CLRFMT_ARGB8888 : + OVL_CON_CLRFMT_PARGB8888; case DRM_FORMAT_XBGR8888: case DRM_FORMAT_ABGR8888: case DRM_FORMAT_XBGR2101010: case DRM_FORMAT_ABGR2101010: - return OVL_CON_CLRFMT_ABGR8888; + return blend_mode == DRM_MODE_BLEND_COVERAGE ? + OVL_CON_CLRFMT_ABGR8888 : + OVL_CON_CLRFMT_PABGR8888; case DRM_FORMAT_UYVY: return OVL_CON_CLRFMT_UYVY | OVL_CON_MTX_YUV_TO_RGB; case DRM_FORMAT_YUYV: @@ -453,7 +471,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, return; } - con = ovl_fmt_convert(ovl, fmt); + con = ovl_fmt_convert(ovl, fmt, blend_mode); if (state->base.fb) { con |= OVL_CON_AEN; con |= state->base.alpha & OVL_CON_ALPHA; From patchwork Wed Jul 17 05:24:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsiao Chien Sung via B4 Relay X-Patchwork-Id: 13735093 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1174C3DA42 for ; Wed, 17 Jul 2024 05:24:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6993B10E92D; Wed, 17 Jul 2024 05:24:59 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.b="oL9SnksI"; dkim-atps=neutral Received: from sin.source.kernel.org (sin.source.kernel.org [145.40.73.55]) by gabe.freedesktop.org (Postfix) with ESMTPS id D21A710E927 for ; Wed, 17 Jul 2024 05:24:49 +0000 (UTC) Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 98CB7CE1695; Wed, 17 Jul 2024 05:24:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPS id 445D3C4AF0F; Wed, 17 Jul 2024 05:24:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721193886; bh=2NcjMrvwfe1/v2FtKU3wRpvD6ZLIx8HGvtlmvTktZss=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=oL9SnksIU07HqB0yz//l1Ae8jsfWsTtmwIEpMjP9LbvGlcAHYuAyxoAj5VQ6PoW7H TMtmZ/5aLBp0J/z4HA8Q/VcrzzJ96UbSvPygbQ6sloEJAfwkpAHg9EL/1R0eh7OK5q cedeUdh5QTS23yJInAG8s8vhUgE2L3k+MO6wKEFZyaACUW9TnD0C5kY5VVrWB4PebF 8miR9ssO/N80D5b50Q9Dulc+8tXbJj73RtYBZHMWbfWQG//Msz0Yc5LDpPMxlc1nUD QVffz2qFspHOcEUAHP4Vn7SFIuJez8w9U8Qcdu8+ZPf8481B0i8kQhoyGXcNgtTQpE c5c9GvYtQrudA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37DA0C3DA4B; Wed, 17 Jul 2024 05:24:46 +0000 (UTC) From: Hsiao Chien Sung via B4 Relay Date: Wed, 17 Jul 2024 13:24:44 +0800 Subject: [PATCH v4 4/5] drm/mediatek: Support "Pre-multiplied" blending in Mixer MIME-Version: 1.0 Message-Id: <20240717-alpha-blending-v4-4-4b1c806c0749@mediatek.com> References: <20240717-alpha-blending-v4-0-4b1c806c0749@mediatek.com> In-Reply-To: <20240717-alpha-blending-v4-0-4b1c806c0749@mediatek.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , AngeloGioacchino Del Regno Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hsiao Chien Sung , Hsiao Chien Sung X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1721193884; l=2294; i=shawn.sung@mediatek.com; s=20240710; h=from:subject:message-id; bh=DojSZu5PuBzMfoL3foGMBjfvPTLtxxAtfP7xNgOj/lE=; b=veMbyMxGW1pG/bwLlWCL/J7zOro6Lxh+WYADC8HkzM+jy+2dPQFP48yTp06NIWcN2alaKOP2y gzMwVmdLzrYAnLAxZOI6ycJMbMMChepi3e4sVm3YG7J6YBZJNGEwqwD X-Developer-Key: i=shawn.sung@mediatek.com; a=ed25519; pk=VRlGZ3diQkQtpDd8fCL9/mx+TpZStm08pg8UPaG1NGc= X-Endpoint-Received: by B4 Relay for shawn.sung@mediatek.com/20240710 with auth_id=184 X-Original-From: Hsiao Chien Sung X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: shawn.sung@mediatek.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Hsiao Chien Sung Support "Pre-multiplied" alpha blending mode in Mixer. Before this patch, only the coverage mode is supported. To replace the default setting that is set in mtk_ethdr_config(), we change mtk_ddp_write_mask() to mtk_ddp_write(), and this change will also reset the NON_PREMULTI_SOURCE bit that was assigned in mtk_ethdr_config(). Therefore, we must still set NON_PREMULTI_SOURCE bit if the blend mode is not DRM_MODE_BLEND_PREMULTI. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Hsiao Chien Sung Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_ethdr.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c index 80ccdad3741b..d1d9cf8b10e1 100644 --- a/drivers/gpu/drm/mediatek/mtk_ethdr.c +++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c @@ -36,6 +36,7 @@ #define MIX_SRC_L0_EN BIT(0) #define MIX_L_SRC_CON(n) (0x28 + 0x18 * (n)) #define NON_PREMULTI_SOURCE (2 << 12) +#define PREMULTI_SOURCE (3 << 12) #define MIX_L_SRC_SIZE(n) (0x30 + 0x18 * (n)) #define MIX_L_SRC_OFFSET(n) (0x34 + 0x18 * (n)) #define MIX_FUNC_DCM0 0x120 @@ -176,6 +177,11 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, alpha_con |= state->base.alpha & MIXER_ALPHA; } + if (state->base.pixel_blend_mode == DRM_MODE_BLEND_PREMULTI) + alpha_con |= PREMULTI_SOURCE; + else + alpha_con |= NON_PREMULTI_SOURCE; + if ((state->base.fb && !state->base.fb->format->has_alpha) || state->base.pixel_blend_mode == DRM_MODE_BLEND_PIXEL_NONE) { /* @@ -193,8 +199,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx, mtk_ddp_write(cmdq_pkt, pending->height << 16 | align_width, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_SIZE(idx)); mtk_ddp_write(cmdq_pkt, offset, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_OFFSET(idx)); - mtk_ddp_write_mask(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx), - 0x1ff); + mtk_ddp_write(cmdq_pkt, alpha_con, &mixer->cmdq_base, mixer->regs, MIX_L_SRC_CON(idx)); mtk_ddp_write_mask(cmdq_pkt, BIT(idx), &mixer->cmdq_base, mixer->regs, MIX_SRC_CON, BIT(idx)); } From patchwork Wed Jul 17 05:24:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsiao Chien Sung via B4 Relay X-Patchwork-Id: 13735094 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 15582C3DA60 for ; Wed, 17 Jul 2024 05:25:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6A08F10E931; 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Wed, 17 Jul 2024 05:24:46 +0000 (UTC) From: Hsiao Chien Sung via B4 Relay Date: Wed, 17 Jul 2024 13:24:45 +0800 Subject: [PATCH v4 5/5] drm/mediatek: Support alpha blending in display driver MIME-Version: 1.0 Message-Id: <20240717-alpha-blending-v4-5-4b1c806c0749@mediatek.com> References: <20240717-alpha-blending-v4-0-4b1c806c0749@mediatek.com> In-Reply-To: <20240717-alpha-blending-v4-0-4b1c806c0749@mediatek.com> To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , AngeloGioacchino Del Regno Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Hsiao Chien Sung , CK Hu , Hsiao Chien Sung X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1721193884; l=2210; i=shawn.sung@mediatek.com; s=20240710; h=from:subject:message-id; bh=NXMVY+5up48Xsv5+9pKY3kYmUYHXnlx5rItB6cJy0f4=; b=qPLQi6C96RpE78tAkBytO4OSi0fwdJOcpP6FcHQkDdR6SkrD9IfkRhPs4zgCjQBF2Ay17XZG8 NldT43LQNpXDF1jgUO2PAxdkGHLEeBuiGP2EyvG/Km0DHDHnxYI8UgX X-Developer-Key: i=shawn.sung@mediatek.com; a=ed25519; pk=VRlGZ3diQkQtpDd8fCL9/mx+TpZStm08pg8UPaG1NGc= X-Endpoint-Received: by B4 Relay for shawn.sung@mediatek.com/20240710 with auth_id=184 X-Original-From: Hsiao Chien Sung X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: shawn.sung@mediatek.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Hsiao Chien Sung Support "Pre-multiplied" and "None" blend mode on MediaTek's chips by adding correct blend mode property when the planes init. Before this patch, only the "Coverage" mode (default) is supported. For more information, there are three pixel blend modes in DRM driver: "None", "Pre-multiplied", and "Coverage". To understand the difference between these modes, let's take a look at the following two approaches to do alpha blending: 1. Straight: dst.RGB = src.RGB * src.A + dst.RGB * (1 - src.A) This is straightforward and easy to understand, when the source layer is compositing with the destination layer, it's alpha will affect the result. This is also known as "post-multiplied", or "Coverage" mode. 2. Pre-multiplied: dst.RGB = src.RGB + dst.RGB * (1 - src.A) Since the source RGB have already multiplied its alpha, only destination RGB need to multiply it. This is the "Pre-multiplied" mode in DRM. For the "None" blend mode in DRM, it means the pixel alpha is ignored when compositing the layers, only the constant alpha for the composited layer will take effects. Reviewed-by: CK Hu Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Hsiao Chien Sung --- drivers/gpu/drm/mediatek/mtk_plane.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_plane.c b/drivers/gpu/drm/mediatek/mtk_plane.c index 1723d4333f37..5bf757a3ef20 100644 --- a/drivers/gpu/drm/mediatek/mtk_plane.c +++ b/drivers/gpu/drm/mediatek/mtk_plane.c @@ -346,6 +346,17 @@ int mtk_plane_init(struct drm_device *dev, struct drm_plane *plane, DRM_INFO("Create rotation property failed\n"); } + err = drm_plane_create_alpha_property(plane); + if (err) + DRM_ERROR("failed to create property: alpha\n"); + + err = drm_plane_create_blend_mode_property(plane, + BIT(DRM_MODE_BLEND_PREMULTI) | + BIT(DRM_MODE_BLEND_COVERAGE) | + BIT(DRM_MODE_BLEND_PIXEL_NONE)); + if (err) + DRM_ERROR("failed to create property: blend_mode\n"); + drm_plane_helper_add(plane, &mtk_plane_helper_funcs); return 0;