From patchwork Wed Jul 17 16:36:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13735621 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8DE1FC3DA42 for ; Wed, 17 Jul 2024 16:36:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AC7F510E2F9; Wed, 17 Jul 2024 16:36:50 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="hpoBTlDB"; dkim-atps=neutral Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6A0D910E2E9; Wed, 17 Jul 2024 16:36:45 +0000 (UTC) Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-1fb4a807708so62601075ad.2; Wed, 17 Jul 2024 09:36:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1721234204; x=1721839004; darn=lists.freedesktop.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xS3DSdckRYn7jTy4h1ciXu44qXa/Pj3ya32AUzBMa0Y=; b=hpoBTlDB5c1M64dJ3nfTPCMafbx5Q6eyS5TYUVsLNu1ERB3cAaV2YPk9c6JL0ZgrPB a7zg4BAFRGUPyjwzFQeq3+wKH29trBajSnTdEzEbYqOu6EZGjSJVteaz76k+MrA23bMr UbShGtj61BFk0yBRIT1Ub8Am3GnmHQx4BAhTxFmBZDfQmWbb9VnY06Iwsv8oZ/Fr0Tuw +/sz7B3wZtlsM6wQXsa4pRMjI9rairXfuXSYWoglZGAL7jtQOXNkiqQgMMt4RSIQyuor o8mBPU0CqSrDYVXsE0U3MNLjI40szoqKO+AparmM6B5Hxhc/fwmlTuyTQTdR24Wtrm4V IF8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721234204; x=1721839004; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xS3DSdckRYn7jTy4h1ciXu44qXa/Pj3ya32AUzBMa0Y=; b=RPwwWDgKK99xyHNZrGrggDlwdaGIvEvkFJBAbPjLEsZZ3nR30EtLUY9M/prvCMksLF uerws02OREBkLg160XApQjdxNonabMCPrmctRZVYOXJgRJ5x7q5DVR1TfFErJ4Fxtdk8 N/RZI+nMFVQFGoCLy1hyyHIY4lHBjwjVzDgSD7dbKvh0qU6LCiZ21G7bIYdZ6POpY7jx UqisJhbd10QyDJCrrZBQxqimVWkTXOeEmfPNTQ47uU09N5jDFwXOLHSQf6rEnY6sF0WK A6Y4MS9TaDMdcmJM5FF6enue3hCFZWvM754ksfBnA5++tnCXGFHEO0BSPqtUXbGnEWkp Osxw== X-Forwarded-Encrypted: i=1; AJvYcCWnuNMgRyPD9aaBe5MkBNLeMAopOPMrManryivr3xc6lmXH3lzgEBRqllhw8928cnBhwE+LDF+aHTWuhTTSsaYnevqkR2HFuigB8hvDiCsQ X-Gm-Message-State: AOJu0YxtNBHyAly7+94O4hHducDoxLLLHFqe8ZPwxR0imWw1ez6OqW/d a/UrgXx1IgPash7WMGRiZKFABTfcnfmRkX8cyAf1ZLxo16zzD5TZgqMgqA== X-Google-Smtp-Source: AGHT+IFurVoTGjQHWIcjxe79/Go15gofqseCdO3ikokdIlMnT18lCbu7d4emLjIItFuPe/nEVyrcRw== X-Received: by 2002:a17:902:ec8c:b0:1fb:779e:4fd0 with SMTP id d9443c01a7336-1fc4e130dfdmr17894525ad.24.1721234204256; Wed, 17 Jul 2024 09:36:44 -0700 (PDT) Received: from localhost ([2a00:79e1:2e00:1301:e1c5:6354:b45d:8ffc]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1fc4c34a38fsm13762865ad.37.2024.07.17.09.36.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jul 2024 09:36:43 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, iommu@lists.linux.dev, Will Deacon , Rob Clark , Joerg Roedel , Robin Murphy , Joerg Roedel , Jason Gunthorpe , Lu Baolu , Kevin Tian , Boris Brezillon , Joao Martins , linux-arm-kernel@lists.infradead.org (moderated list:ARM SMMU DRIVERS), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v6 1/2] iommu/io-pgtable-arm: Add way to debug pgtable walk Date: Wed, 17 Jul 2024 09:36:21 -0700 Message-ID: <20240717163627.43423-2-robdclark@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240717163627.43423-1-robdclark@gmail.com> References: <20240717163627.43423-1-robdclark@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Rob Clark Add an io-pgtable method to walk the pgtable returning the raw PTEs that would be traversed for a given iova access. Signed-off-by: Rob Clark Acked-by: Joerg Roedel --- drivers/iommu/io-pgtable-arm.c | 36 +++++++++++++++++++++++++--------- include/linux/io-pgtable.h | 17 ++++++++++++++++ 2 files changed, 44 insertions(+), 9 deletions(-) diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index 3d23b924cec1..e70803940b46 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -690,9 +690,11 @@ static size_t arm_lpae_unmap_pages(struct io_pgtable_ops *ops, unsigned long iov data->start_level, ptep); } -static phys_addr_t arm_lpae_iova_to_phys(struct io_pgtable_ops *ops, - unsigned long iova) +static int arm_lpae_pgtable_walk(struct io_pgtable_ops *ops, + unsigned long iova, + void *_wd) { + struct arm_lpae_io_pgtable_walk_data *wd = _wd; struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops); arm_lpae_iopte pte, *ptep = data->pgd; int lvl = data->start_level; @@ -700,7 +702,7 @@ static phys_addr_t arm_lpae_iova_to_phys(struct io_pgtable_ops *ops, do { /* Valid IOPTE pointer? */ if (!ptep) - return 0; + return -ENOENT; /* Grab the IOPTE we're interested in */ ptep += ARM_LPAE_LVL_IDX(iova, lvl, data); @@ -708,22 +710,37 @@ static phys_addr_t arm_lpae_iova_to_phys(struct io_pgtable_ops *ops, /* Valid entry? */ if (!pte) - return 0; + return -ENOENT; - /* Leaf entry? */ + wd->ptes[wd->level++] = pte; + + /* Leaf entry? If so, we've found the translation */ if (iopte_leaf(pte, lvl, data->iop.fmt)) - goto found_translation; + return 0; /* Take it to the next level */ ptep = iopte_deref(pte, data); } while (++lvl < ARM_LPAE_MAX_LEVELS); /* Ran out of page tables to walk */ - return 0; + return -ENOENT; +} + +static phys_addr_t arm_lpae_iova_to_phys(struct io_pgtable_ops *ops, + unsigned long iova) +{ + struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops); + struct arm_lpae_io_pgtable_walk_data wd = {}; + int ret, lvl; + + ret = arm_lpae_pgtable_walk(ops, iova, &wd); + if (ret) + return 0; + + lvl = wd.level + data->start_level; -found_translation: iova &= (ARM_LPAE_BLOCK_SIZE(lvl, data) - 1); - return iopte_to_paddr(pte, data) | iova; + return iopte_to_paddr(wd.ptes[wd.level - 1], data) | iova; } static void arm_lpae_restrict_pgsizes(struct io_pgtable_cfg *cfg) @@ -804,6 +821,7 @@ arm_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg) .map_pages = arm_lpae_map_pages, .unmap_pages = arm_lpae_unmap_pages, .iova_to_phys = arm_lpae_iova_to_phys, + .pgtable_walk = arm_lpae_pgtable_walk, }; return data; diff --git a/include/linux/io-pgtable.h b/include/linux/io-pgtable.h index 86cf1f7ae389..df6f6e58310c 100644 --- a/include/linux/io-pgtable.h +++ b/include/linux/io-pgtable.h @@ -171,12 +171,28 @@ struct io_pgtable_cfg { }; }; +/** + * struct arm_lpae_io_pgtable_walk_data - information from a pgtable walk + * + * @ptes: The recorded PTE values from the walk + * @level: The level of the last PTE + * + * @level also specifies the last valid index in @ptes + */ +struct arm_lpae_io_pgtable_walk_data { + u64 ptes[4]; + int level; +}; + /** * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers. * * @map_pages: Map a physically contiguous range of pages of the same size. * @unmap_pages: Unmap a range of virtually contiguous pages of the same size. * @iova_to_phys: Translate iova to physical address. + * @pgtable_walk: (optional) Perform a page table walk for a given iova. The + * type for the wd parameter is specific to pgtable type, as + * the PTE size and number of levels differs per pgtable type. * * These functions map directly onto the iommu_ops member functions with * the same names. @@ -190,6 +206,7 @@ struct io_pgtable_ops { struct iommu_iotlb_gather *gather); phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops, unsigned long iova); + int (*pgtable_walk)(struct io_pgtable_ops *ops, unsigned long iova, void *wd); int (*read_and_clear_dirty)(struct io_pgtable_ops *ops, unsigned long iova, size_t size, unsigned long flags, From patchwork Wed Jul 17 16:36:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 13735622 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B2ECEC3DA60 for ; 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Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 10 ++++++++++ drivers/gpu/drm/msm/msm_gpu.c | 9 +++++++++ drivers/gpu/drm/msm/msm_gpu.h | 8 ++++++++ drivers/gpu/drm/msm/msm_iommu.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/msm/msm_mmu.h | 3 ++- 5 files changed, 51 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c index 99661af8d941..422dae873b6b 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -861,6 +861,16 @@ void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state, drm_printf(p, " - dir=%s\n", info->flags & IOMMU_FAULT_WRITE ? "WRITE" : "READ"); drm_printf(p, " - type=%s\n", info->type); drm_printf(p, " - source=%s\n", info->block); + + /* Information extracted from what we think are the current + * pgtables. Hopefully the TTBR0 matches what we've extracted + * from the SMMU registers in smmu_info! + */ + drm_puts(p, "pgtable-fault-info:\n"); + drm_printf(p, " - ttbr0: %.16llx\n", (u64)info->pgtbl_ttbr0); + drm_printf(p, " - asid: %d\n", info->asid); + drm_printf(p, " - ptes: %.16llx %.16llx %.16llx %.16llx\n", + info->ptes[0], info->ptes[1], info->ptes[2], info->ptes[3]); } drm_printf(p, "rbbm-status: 0x%08x\n", state->rbbm_status); diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 3666b42b4ecd..bf2f8b2a7ccc 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -281,6 +281,15 @@ static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, if (submit) { int i; + if (state->fault_info.ttbr0) { + struct msm_gpu_fault_info *info = &state->fault_info; + struct msm_mmu *mmu = submit->aspace->mmu; + + msm_iommu_pagetable_params(mmu, &info->pgtbl_ttbr0, + &info->asid); + msm_iommu_pagetable_walk(mmu, info->iova, info->ptes); + } + state->bos = kcalloc(submit->nr_bos, sizeof(struct msm_gpu_state_bo), GFP_KERNEL); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 1f02bb9956be..82e838ba8c80 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -101,6 +101,14 @@ struct msm_gpu_fault_info { int flags; const char *type; const char *block; + + /* Information about what we think/expect is the current SMMU state, + * for example expected_ttbr0 should match smmu_info.ttbr0 which + * was read back from SMMU registers. + */ + phys_addr_t pgtbl_ttbr0; + u64 ptes[4]; + int asid; }; /** diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c index d5512037c38b..0c35a5b597f3 100644 --- a/drivers/gpu/drm/msm/msm_iommu.c +++ b/drivers/gpu/drm/msm/msm_iommu.c @@ -195,6 +195,28 @@ struct iommu_domain_geometry *msm_iommu_get_geometry(struct msm_mmu *mmu) return &iommu->domain->geometry; } +int +msm_iommu_pagetable_walk(struct msm_mmu *mmu, unsigned long iova, uint64_t ptes[4]) +{ + struct msm_iommu_pagetable *pagetable; + struct arm_lpae_io_pgtable_walk_data wd = {}; + + if (mmu->type != MSM_MMU_IOMMU_PAGETABLE) + return -EINVAL; + + pagetable = to_pagetable(mmu); + + if (!pagetable->pgtbl_ops->pgtable_walk) + return -EINVAL; + + pagetable->pgtbl_ops->pgtable_walk(pagetable->pgtbl_ops, iova, &wd); + + for (int i = 0; i < ARRAY_SIZE(wd.ptes); i++) + ptes[i] = wd.ptes[i]; + + return 0; +} + static const struct msm_mmu_funcs pagetable_funcs = { .map = msm_iommu_pagetable_map, .unmap = msm_iommu_pagetable_unmap, diff --git a/drivers/gpu/drm/msm/msm_mmu.h b/drivers/gpu/drm/msm/msm_mmu.h index 88af4f490881..96e509bd96a6 100644 --- a/drivers/gpu/drm/msm/msm_mmu.h +++ b/drivers/gpu/drm/msm/msm_mmu.h @@ -53,7 +53,8 @@ static inline void msm_mmu_set_fault_handler(struct msm_mmu *mmu, void *arg, struct msm_mmu *msm_iommu_pagetable_create(struct msm_mmu *parent); int msm_iommu_pagetable_params(struct msm_mmu *mmu, phys_addr_t *ttbr, - int *asid); + int *asid); +int msm_iommu_pagetable_walk(struct msm_mmu *mmu, unsigned long iova, uint64_t ptes[4]); struct iommu_domain_geometry *msm_iommu_get_geometry(struct msm_mmu *mmu); #endif /* __MSM_MMU_H__ */