From patchwork Wed Jul 17 21:44:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Stefan_M=C3=A4tje?= X-Patchwork-Id: 13735818 X-Patchwork-Delegate: kuba@kernel.org Received: from DB3PR0202CU003.outbound.protection.outlook.com (mail-northeuropeazon11021101.outbound.protection.outlook.com [52.101.65.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1EE43187325; Wed, 17 Jul 2024 21:44:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.65.101 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721252658; cv=fail; b=tWj4WXAMvzzN84VmzxddVsqqOp1YPPEdzrJ+ikqDG/q8XftiuHn9kZKmj3xr9LilaUjS5pIMlnxYVnOOtg/AZIZX8nv9rvXyr3Gt333o0XLLwryqmco/6NhvwerC3YEo+4B80sZ9hAAYVBRNDDrNeAhG+bFWYl2gweRjHZy05s8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721252658; c=relaxed/simple; bh=fWbvBHKrWJT2QHXDdYmHiLsEgrKYcWS9XghsdlLl5jY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=WLg10Bf2XrRpEKsq7AdC6xXjevNriaEz7HQkmzkGMZwqcokCLG9iDV2CQIZRzMsX0E5aC5lVjzzZstuHRTGwXr0caFkRn3mLhEZrqQ7Tmejo/xQ/SF1y1UHdMoGfjNDyyZXH+9I73mWDe6W0CtpeOyLD2P0waeEQkr3kdZkW4QA= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=esd.eu; spf=pass smtp.mailfrom=esd.eu; dkim=pass (1024-bit key) header.d=esdhannover.onmicrosoft.com header.i=@esdhannover.onmicrosoft.com header.b=kxMdpF8A; arc=fail smtp.client-ip=52.101.65.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=esd.eu Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=esd.eu Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=esdhannover.onmicrosoft.com header.i=@esdhannover.onmicrosoft.com header.b="kxMdpF8A" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=E19Cxvhuil1JPN3qhN7JrSGw8jiYbcrPWCyhML9SAg+2xOgKpBLzeF5MVcVtlv+7bEQnLHkZHgabK83rudh9Q8ctH1MSH97ISlw5tyLTSITAevVJDgNztaDuPPenYL5hADskRswzQVijDQblkv0dqhbFBvYNfzDf8RIDhUE7mcGBLaVtw5Fn/UX7uGovWMU01jZJFmquClnDxRudX+kwS1+elpllJefcaJje6HxH2dvv9ZupsLM6tnFr+7x91YpwNfl7uuhd0EviKTr+zHTSsGKvYKGRNhMlF4/tMTsfxKTYGWjZ2kND40aSsezyc2wHI/Kw0HArxf9fGxTtxwYxHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9t9cg9MUrzlNcPKH8xVyy9AVPEoX4vJ/X1Ms2jwjlhs=; b=ygJNQbMqBkAkImdYlQlX4gqgr0G1B9PR+14LtauOWHUn/mI6vDdQHknpw3CJbgTbcfBnJPPf3ucwY47+rnUUx8ohK2hiJSxcNunMv4YIwUUantArxz3VQ8+lEyhEsbgp4jHWTDIpjTCLgae6YODOHsPOGG2GWiOLXYwEMUl0IlHwIhDHNRkfTIYWzA6oMef2SIMann6Sa3NMVKD+ktBDKzFQytdcIuEIjnp50JOvmsdQQkMEUM8TOaD98MNhPUtqmpI+I7DMY2QUVnbmu4Ko+TeVebdkh8DipuSQlj22jNeKBI4pJ/MLWRy2wgIAY7bxp4zhnqz3jdE0fyZZItIAQQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=softfail (sender ip is 80.151.164.27) smtp.rcpttodomain=davemloft.net smtp.mailfrom=esd.eu; dmarc=fail (p=none sp=none pct=100) action=none header.from=esd.eu; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=esdhannover.onmicrosoft.com; s=selector1-esdhannover-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9t9cg9MUrzlNcPKH8xVyy9AVPEoX4vJ/X1Ms2jwjlhs=; b=kxMdpF8AnZZIYh3SoLkVtni56+8SYUnDgMLljK3lytJmMdTYErr6E0huVYtI9dTPXeTHXdOvPxkngIlN8+pU14Fn3H+SgLfHw5NuUYAf2ZyjyQIeHu8gkedEQqhjKdlHQnB7Mi76SU3AWowCIvmxjKesmMC8fWdvHq2O4/rVmOY= Received: from DUZPR01CA0233.eurprd01.prod.exchangelabs.com (2603:10a6:10:4b4::17) by GV2PR03MB9524.eurprd03.prod.outlook.com (2603:10a6:150:da::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7784.17; Wed, 17 Jul 2024 21:44:10 +0000 Received: from DB5PEPF00014B9D.eurprd02.prod.outlook.com (2603:10a6:10:4b4:cafe::5a) by DUZPR01CA0233.outlook.office365.com (2603:10a6:10:4b4::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7784.18 via Frontend Transport; Wed, 17 Jul 2024 21:44:10 +0000 X-MS-Exchange-Authentication-Results: spf=softfail (sender IP is 80.151.164.27) smtp.mailfrom=esd.eu; dkim=none (message not signed) header.d=none;dmarc=fail action=none header.from=esd.eu; Received-SPF: SoftFail (protection.outlook.com: domain of transitioning esd.eu discourages use of 80.151.164.27 as permitted sender) Received: from esd-s7.esd (80.151.164.27) by DB5PEPF00014B9D.mail.protection.outlook.com (10.167.8.164) with Microsoft SMTP Server id 15.20.7784.11 via Frontend Transport; Wed, 17 Jul 2024 21:44:09 +0000 Received: from debby.esd.local (jenkins.esd.local [10.0.0.190]) by esd-s7.esd (Postfix) with ESMTPS id 8947E7C16C9; Wed, 17 Jul 2024 23:44:09 +0200 (CEST) Received: by debby.esd.local (Postfix, from userid 2044) id 7A03D2E0157; Wed, 17 Jul 2024 23:44:09 +0200 (CEST) From: =?utf-8?q?Stefan_M=C3=A4tje?= To: Marc Kleine-Budde , Vincent Mailhol , linux-can@vger.kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Wolfgang Grandegger , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Subject: [PATCH 1/2] can: esd_402_pci: Rename esdACC CTRL register macros Date: Wed, 17 Jul 2024 23:44:08 +0200 Message-Id: <20240717214409.3934333-2-stefan.maetje@esd.eu> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240717214409.3934333-1-stefan.maetje@esd.eu> References: <20240717214409.3934333-1-stefan.maetje@esd.eu> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DB5PEPF00014B9D:EE_|GV2PR03MB9524:EE_ X-MS-Office365-Filtering-Correlation-Id: affec90e-0fa5-43c4-d1bf-08dca6a9976e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|7416014|82310400026|36860700013; X-Microsoft-Antispam-Message-Info: =?utf-8?q?4qnuzmYKBOxiCK8J38uMquKaJ2f64vJ?= =?utf-8?q?qF3rMcgUoE9VlkpzQYdjZ2ihutw0deKQyNeK/tAffguvTcEI4tqK++UaM+LsBd70V?= =?utf-8?q?5lCD4BgpRw3IoOqH5g+oUkkUpi5qsRg16ojjw244viCepOoq/kLXT/u+N5l5gTdvi?= =?utf-8?q?92CDQK+8U2xlX/DTwdFMmkwk+rKR9Fw9AoY0fplVUd9IvmUtUNQI3Q94b2ltz8u6Y?= =?utf-8?q?jm6+mShYZRCoUHks8F0MRUUnvzwZes97Kut21Gn1b3JzzbA3R6pEOVf2sKzNbWaHh?= =?utf-8?q?CQQFR1/gKWhAjKzp+QHgQroutv8CquUb8y2Q3YD4rgbSqGD8pHKgXGxmkGXp2qO6C?= =?utf-8?q?rbKdFyXT8n1Hjp1nRseT/cJit5/ReD8dbaXuGfeCchCN9JnV9rR2kGkh0ALgsu6k4?= =?utf-8?q?2Sbdl6/8vRyxed0GghizKOXQSg8blTgXuJPqvMCplSV6J8wGcYjX/I6y/37wpRMh7?= =?utf-8?q?1HhCDIls9M+VRdDRgykDLbvS7x8ut8kqvs0/Ad6wo/BclRqq715R3++tzL+6/0Cr2?= =?utf-8?q?anXgGmBNEne7NvVRsVJWB67cGkFFbP35DZSwzPwlZN1SruAZbZWf4YeSWJd2Lz3Y2?= =?utf-8?q?TJ3EUT9/yuuHX5djDb4X0wwDHjr7EsXwq1/rcXWVjBLhGaU3u0ypagdwZtNJS+hPF?= =?utf-8?q?0VhFHcSc1lungNQABvkKLPSNSUbExPWbOvR5b7dtjjOJh0wVhTfHaC9Rr6cQObpe5?= =?utf-8?q?y8xAnK1Zvn9uOixOmycswSMyUwK+gvcdt5AzG/16FTGJf+0E6wHOT0CWYJoitzOK6?= =?utf-8?q?YWp7jlagg+gVoZE2kC1eabseRScWOpa0/HhIrLlTlCQOoV2dyTn7xD396ATyiG+Nz?= =?utf-8?q?g/op4jhHGXXqJZ5Zm/Lw2un1xgnM8xIlhd7wjAwyYwrb+fZDI43mOClJz4ZvNqXzB?= =?utf-8?q?uGIKKvYi7A1UW6fIlOLTvdcjBNsCzi1WP+2Eb7N395sEOc72SzHddyLOntZ4tyK/M?= =?utf-8?q?Edn8S2sWn2ZXvbisNfriiFVIvTIGANvALof2PzPQ4biKZo1a+BjuhZs3GJBHTSPCK?= =?utf-8?q?vTGnVo5qUvimGECgfG1ZtmnUzKSVv0qD9LgX7tUbhmpte79+e9bLHANsg4Wa25LHO?= =?utf-8?q?kOHxb3D++CMjNeZbL+EZTtm2jtfiYihGgU4iG8A/22YA5DxZG6TNV3PoHss1l+XfG?= =?utf-8?q?h8RZphGnAVT5QUXeKvfVV9S8OJaq17+ye6+7oclrSGi0VZz9Pk2wVGt2PD9nwJVtn?= =?utf-8?q?FXz9UzudozOID7pH5f82gwJ34rBerAL4LjV3nYNhcHtvqDpv0FJlHua196rVYPrmm?= =?utf-8?q?bxQwlEwjtOxooVf0BhbXGySiB7P01Ngkyr9gP1UsbTTsbVq9RE4batxCI51eKh9/t?= =?utf-8?q?3O2vU4b4viucnkxgWllW4xlKLbtrcgeapsD41ljokI9KCG9osnl92IU9MGGyPTUPI?= =?utf-8?q?csIiNcQuFyi?= X-Forefront-Antispam-Report: CIP:80.151.164.27;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:esd-s7.esd;PTR:p5097a41b.dip0.t-ipconnect.de;CAT:NONE;SFS:(13230040)(376014)(1800799024)(7416014)(82310400026)(36860700013);DIR:OUT;SFP:1102; X-OriginatorOrg: esd.eu X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jul 2024 21:44:09.8980 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: affec90e-0fa5-43c4-d1bf-08dca6a9976e X-MS-Exchange-CrossTenant-Id: 5a9c3a1d-52db-4235-b74c-9fd851db2e6b X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5a9c3a1d-52db-4235-b74c-9fd851db2e6b;Ip=[80.151.164.27];Helo=[esd-s7.esd] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B9D.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV2PR03MB9524 X-Patchwork-Delegate: kuba@kernel.org Rename macros to use for esdACC CTRL register access to match the internal documentation and to make the macro prefix consistent. - ACC_CORE_OF_CTRL_MODE -> ACC_CORE_OF_CTRL Makes the name match the documentation. - ACC_REG_CONTROL_MASK_MODE_ -> ACC_REG_CTRL_MASK_ ACC_REG_CONTROL_MASK_ -> ACC_REG_CTRL_MASK_ Makes the prefix consistent for macros describing masks in the same register (CTRL). Signed-off-by: Stefan Mätje --- drivers/net/can/esd/esdacc.c | 46 ++++++++++++++++++------------------ drivers/net/can/esd/esdacc.h | 37 +++++++++++++++-------------- 2 files changed, 42 insertions(+), 41 deletions(-) diff --git a/drivers/net/can/esd/esdacc.c b/drivers/net/can/esd/esdacc.c index 121cbbf81458..ef33d2ccd220 100644 --- a/drivers/net/can/esd/esdacc.c +++ b/drivers/net/can/esd/esdacc.c @@ -43,8 +43,8 @@ static void acc_resetmode_enter(struct acc_core *core) { - acc_set_bits(core, ACC_CORE_OF_CTRL_MODE, - ACC_REG_CONTROL_MASK_MODE_RESETMODE); + acc_set_bits(core, ACC_CORE_OF_CTRL, + ACC_REG_CTRL_MASK_RESETMODE); /* Read back reset mode bit to flush PCI write posting */ acc_resetmode_entered(core); @@ -52,8 +52,8 @@ static void acc_resetmode_enter(struct acc_core *core) static void acc_resetmode_leave(struct acc_core *core) { - acc_clear_bits(core, ACC_CORE_OF_CTRL_MODE, - ACC_REG_CONTROL_MASK_MODE_RESETMODE); + acc_clear_bits(core, ACC_CORE_OF_CTRL, + ACC_REG_CTRL_MASK_RESETMODE); /* Read back reset mode bit to flush PCI write posting */ acc_resetmode_entered(core); @@ -172,7 +172,7 @@ int acc_open(struct net_device *netdev) struct acc_net_priv *priv = netdev_priv(netdev); struct acc_core *core = priv->core; u32 tx_fifo_status; - u32 ctrl_mode; + u32 ctrl; int err; /* Retry to enter RESET mode if out of sync. */ @@ -187,19 +187,19 @@ int acc_open(struct net_device *netdev) if (err) return err; - ctrl_mode = ACC_REG_CONTROL_MASK_IE_RXTX | - ACC_REG_CONTROL_MASK_IE_TXERROR | - ACC_REG_CONTROL_MASK_IE_ERRWARN | - ACC_REG_CONTROL_MASK_IE_OVERRUN | - ACC_REG_CONTROL_MASK_IE_ERRPASS; + ctrl = ACC_REG_CTRL_MASK_IE_RXTX | + ACC_REG_CTRL_MASK_IE_TXERROR | + ACC_REG_CTRL_MASK_IE_ERRWARN | + ACC_REG_CTRL_MASK_IE_OVERRUN | + ACC_REG_CTRL_MASK_IE_ERRPASS; if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) - ctrl_mode |= ACC_REG_CONTROL_MASK_IE_BUSERR; + ctrl |= ACC_REG_CTRL_MASK_IE_BUSERR; if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) - ctrl_mode |= ACC_REG_CONTROL_MASK_MODE_LOM; + ctrl |= ACC_REG_CTRL_MASK_LOM; - acc_set_bits(core, ACC_CORE_OF_CTRL_MODE, ctrl_mode); + acc_set_bits(core, ACC_CORE_OF_CTRL, ctrl); acc_resetmode_leave(core); priv->can.state = CAN_STATE_ERROR_ACTIVE; @@ -218,13 +218,13 @@ int acc_close(struct net_device *netdev) struct acc_net_priv *priv = netdev_priv(netdev); struct acc_core *core = priv->core; - acc_clear_bits(core, ACC_CORE_OF_CTRL_MODE, - ACC_REG_CONTROL_MASK_IE_RXTX | - ACC_REG_CONTROL_MASK_IE_TXERROR | - ACC_REG_CONTROL_MASK_IE_ERRWARN | - ACC_REG_CONTROL_MASK_IE_OVERRUN | - ACC_REG_CONTROL_MASK_IE_ERRPASS | - ACC_REG_CONTROL_MASK_IE_BUSERR); + acc_clear_bits(core, ACC_CORE_OF_CTRL, + ACC_REG_CTRL_MASK_IE_RXTX | + ACC_REG_CTRL_MASK_IE_TXERROR | + ACC_REG_CTRL_MASK_IE_ERRWARN | + ACC_REG_CTRL_MASK_IE_OVERRUN | + ACC_REG_CTRL_MASK_IE_ERRPASS | + ACC_REG_CTRL_MASK_IE_BUSERR); netif_stop_queue(netdev); acc_resetmode_enter(core); @@ -233,9 +233,9 @@ int acc_close(struct net_device *netdev) /* Mark pending TX requests to be aborted after controller restart. */ acc_write32(core, ACC_CORE_OF_TX_ABORT_MASK, 0xffff); - /* ACC_REG_CONTROL_MASK_MODE_LOM is only accessible in RESET mode */ - acc_clear_bits(core, ACC_CORE_OF_CTRL_MODE, - ACC_REG_CONTROL_MASK_MODE_LOM); + /* ACC_REG_CTRL_MASK_LOM is only accessible in RESET mode */ + acc_clear_bits(core, ACC_CORE_OF_CTRL, + ACC_REG_CTRL_MASK_LOM); close_candev(netdev); return 0; diff --git a/drivers/net/can/esd/esdacc.h b/drivers/net/can/esd/esdacc.h index a70488b25d39..d13dfa60703a 100644 --- a/drivers/net/can/esd/esdacc.h +++ b/drivers/net/can/esd/esdacc.h @@ -50,7 +50,7 @@ #define ACC_OV_REG_MODE_MASK_FPGA_RESET BIT(31) /* esdACC CAN Core Module */ -#define ACC_CORE_OF_CTRL_MODE 0x0000 +#define ACC_CORE_OF_CTRL 0x0000 #define ACC_CORE_OF_STATUS_IRQ 0x0008 #define ACC_CORE_OF_BRP 0x000c #define ACC_CORE_OF_BTR 0x0010 @@ -66,21 +66,22 @@ #define ACC_CORE_OF_TXFIFO_DATA_0 0x00c8 #define ACC_CORE_OF_TXFIFO_DATA_1 0x00cc -#define ACC_REG_CONTROL_MASK_MODE_RESETMODE BIT(0) -#define ACC_REG_CONTROL_MASK_MODE_LOM BIT(1) -#define ACC_REG_CONTROL_MASK_MODE_STM BIT(2) -#define ACC_REG_CONTROL_MASK_MODE_TRANSEN BIT(5) -#define ACC_REG_CONTROL_MASK_MODE_TS BIT(6) -#define ACC_REG_CONTROL_MASK_MODE_SCHEDULE BIT(7) - -#define ACC_REG_CONTROL_MASK_IE_RXTX BIT(8) -#define ACC_REG_CONTROL_MASK_IE_TXERROR BIT(9) -#define ACC_REG_CONTROL_MASK_IE_ERRWARN BIT(10) -#define ACC_REG_CONTROL_MASK_IE_OVERRUN BIT(11) -#define ACC_REG_CONTROL_MASK_IE_TSI BIT(12) -#define ACC_REG_CONTROL_MASK_IE_ERRPASS BIT(13) -#define ACC_REG_CONTROL_MASK_IE_ALI BIT(14) -#define ACC_REG_CONTROL_MASK_IE_BUSERR BIT(15) +/* CTRL register layout */ +#define ACC_REG_CTRL_MASK_RESETMODE BIT(0) +#define ACC_REG_CTRL_MASK_LOM BIT(1) +#define ACC_REG_CTRL_MASK_STM BIT(2) +#define ACC_REG_CTRL_MASK_TRANSEN BIT(5) +#define ACC_REG_CTRL_MASK_TS BIT(6) +#define ACC_REG_CTRL_MASK_SCHEDULE BIT(7) + +#define ACC_REG_CTRL_MASK_IE_RXTX BIT(8) +#define ACC_REG_CTRL_MASK_IE_TXERROR BIT(9) +#define ACC_REG_CTRL_MASK_IE_ERRWARN BIT(10) +#define ACC_REG_CTRL_MASK_IE_OVERRUN BIT(11) +#define ACC_REG_CTRL_MASK_IE_TSI BIT(12) +#define ACC_REG_CTRL_MASK_IE_ERRPASS BIT(13) +#define ACC_REG_CTRL_MASK_IE_ALI BIT(14) +#define ACC_REG_CTRL_MASK_IE_BUSERR BIT(15) /* BRP and BTR register layout for CAN-Classic version */ #define ACC_REG_BRP_CL_MASK_BRP GENMASK(8, 0) @@ -300,9 +301,9 @@ static inline void acc_clear_bits(struct acc_core *core, static inline int acc_resetmode_entered(struct acc_core *core) { - u32 ctrl = acc_read32(core, ACC_CORE_OF_CTRL_MODE); + u32 ctrl = acc_read32(core, ACC_CORE_OF_CTRL); - return (ctrl & ACC_REG_CONTROL_MASK_MODE_RESETMODE) != 0; + return (ctrl & ACC_REG_CTRL_MASK_RESETMODE) != 0; } static inline u32 acc_ov_read32(struct acc_ov *ov, unsigned short offs) From patchwork Wed Jul 17 21:44:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Stefan_M=C3=A4tje?= X-Patchwork-Id: 13735816 X-Patchwork-Delegate: kuba@kernel.org Received: from DUZPR83CU001.outbound.protection.outlook.com (mail-northeuropeazon11023137.outbound.protection.outlook.com [52.101.67.137]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4689F4688; Wed, 17 Jul 2024 21:44:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.67.137 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721252657; cv=fail; b=p1HlGk8sP7LAjFKkuJyXJNKDfPW4P1qpm89f2k/6deOpcUutro1EFc80BPqbJku9MmY2M4n7yWfbl0fq2vdMAZV148p3XFLj99tt9lGOVr774zMltfy1t93EejnJ/606dEEcJCBJ+ddujOPp1i/7plKHYp4fSgdqxRJRKpZlc9s= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721252657; c=relaxed/simple; bh=iBuU0KgkP5loNvI9ehGVm8Olu21jZYbjftYW2u+nLvM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=XX+Ogj5E+sviZTOnzF4bqHo15wU/bVo4LVc3vTeGV4GuFVcHUtE2SGJ9Csvgn8ObvsPJQsBT7NjjE51/cqLxsygpHC3xgll8dpY5bSZs9fJdMSeXDYeMCZN6JGay0LaJukSXsnCLcOBXx8XB4Cb7lrcXEPGigZjSK9sx9k1q7rM= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=esd.eu; spf=pass smtp.mailfrom=esd.eu; dkim=pass (1024-bit key) header.d=esdhannover.onmicrosoft.com header.i=@esdhannover.onmicrosoft.com header.b=HnmoEQ6b; arc=fail smtp.client-ip=52.101.67.137 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=esd.eu Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=esd.eu Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=esdhannover.onmicrosoft.com header.i=@esdhannover.onmicrosoft.com header.b="HnmoEQ6b" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=W1nKm0aGduJvObZnGvyNKcMYj6XX/r79L863PsmrcZtiQuxIaioeodwdtSuWqGgQ51AJ+c5NXQ5xd6ShjDyKb6rSCm/EYjMl5KILa2OZyo8HuGAAtksEYgzl/hqB0wQNRg00PfPX5fhiy5o0mA5yVFf7cU41ElcrOW9Xz+PIL9cgTFzpAepxopP/zSvGCIA5UqeXBGk1gadl5D2U2csQKrAKTiF+2vaDOAVp7fa6mEgsIfKKZWlVKpZ2yXqikLvAOg8FVNrzbMXso7BiNJUoygA7qzSpqVILcHxnqpRp+g+BPVVvTDwvXx6LZfoBQKtx0Ta+E6yr7jqvzNubqQ7Jnw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=hLB1l7TZKzTbV5W/Z74Yx3nlK05AboEEchJ6yWSO0m8=; b=i1PvgIoR4y/w5ChLzosRNXg2NDY4sL00maC3xRU0n/xO+ndiNenIOKQ7eNSVOzIc45eK9R5e2O1z5cmV4nxS5k+irR3xb2FrynXSJ4XXMLjqh2+GMY5o/6pOZQo3oRPR5sWSuyymb8/5oohGqLK5cJKZHJqHXcPgk9K5aXgxaZz9KO47YMA4ZtJjvQWeZZw4gEKApBsNQpqJM/VS8HhHzeVucx1U0L8kqSJ1GgHEvGtekf0pFriiAFPlsgXa6o9a4ONpjfbveM/HNxt+NV01uledVKNZfDjWDa83l8p51rTqcaqju5u8QSVfRwnLGJN9vf3mR1gWxBHdtIqNbEtiKw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=softfail (sender ip is 80.151.164.27) smtp.rcpttodomain=davemloft.net smtp.mailfrom=esd.eu; dmarc=fail (p=none sp=none pct=100) action=none header.from=esd.eu; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=esdhannover.onmicrosoft.com; s=selector1-esdhannover-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=hLB1l7TZKzTbV5W/Z74Yx3nlK05AboEEchJ6yWSO0m8=; b=HnmoEQ6blubqwEFrZCsqLZDNA+qTV2XCnkyu86ZVtCUW1+NIeeXBFSjpFKMQqSlb9yN3BXvmq4bEAJ8dy5hcTexGd9YOZVg7ue5pQ03BhIZ0mXPMN+Aff97NedD+ykX4M8zoJZDn5DAjYlLG++wa9PCeEZT1t1Sx9h6ekbSPiSs= Received: from AS4P191CA0053.EURP191.PROD.OUTLOOK.COM (2603:10a6:20b:657::29) by DU2PR03MB10163.eurprd03.prod.outlook.com (2603:10a6:10:49d::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7762.29; Wed, 17 Jul 2024 21:44:10 +0000 Received: from AMS0EPF00000193.eurprd05.prod.outlook.com (2603:10a6:20b:657:cafe::b3) by AS4P191CA0053.outlook.office365.com (2603:10a6:20b:657::29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7784.16 via Frontend Transport; Wed, 17 Jul 2024 21:44:10 +0000 X-MS-Exchange-Authentication-Results: spf=softfail (sender IP is 80.151.164.27) smtp.mailfrom=esd.eu; dkim=none (message not signed) header.d=none;dmarc=fail action=none header.from=esd.eu; Received-SPF: SoftFail (protection.outlook.com: domain of transitioning esd.eu discourages use of 80.151.164.27 as permitted sender) Received: from esd-s7.esd (80.151.164.27) by AMS0EPF00000193.mail.protection.outlook.com (10.167.16.212) with Microsoft SMTP Server id 15.20.7784.11 via Frontend Transport; Wed, 17 Jul 2024 21:44:09 +0000 Received: from debby.esd.local (jenkins.esd [10.0.0.190]) by esd-s7.esd (Postfix) with ESMTPS id 8B2287C16CB; Wed, 17 Jul 2024 23:44:09 +0200 (CEST) Received: by debby.esd.local (Postfix, from userid 2044) id 7EEA52E0166; Wed, 17 Jul 2024 23:44:09 +0200 (CEST) From: =?utf-8?q?Stefan_M=C3=A4tje?= To: Marc Kleine-Budde , Vincent Mailhol , linux-can@vger.kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Wolfgang Grandegger , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Subject: [PATCH 2/2] can: esd_402_pci: Add support for one-shot mode Date: Wed, 17 Jul 2024 23:44:09 +0200 Message-Id: <20240717214409.3934333-3-stefan.maetje@esd.eu> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240717214409.3934333-1-stefan.maetje@esd.eu> References: <20240717214409.3934333-1-stefan.maetje@esd.eu> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AMS0EPF00000193:EE_|DU2PR03MB10163:EE_ X-MS-Office365-Filtering-Correlation-Id: bc644768-dd9b-4bfd-a9ee-08dca6a99761 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?utf-8?q?hB8PYC1pzT38hUATBgofYvPQlYi55Fw?= =?utf-8?q?+olyL0fRzyOjxwQZTEtoM+jeBQUW8kTNKLGN4q7a84buxjgZ721JbzvPApG7Vr6gN?= =?utf-8?q?JfH4q9kuSGA+vfN5YsMH5OX6MlwGpMJ5UtFSsLFIzd4ryjLiaTvNRj565ZU4EN3A5?= =?utf-8?q?Eeh68fuQT4boEuKwQpNNQce0EDVOavzB4a8vYrQtPPVHe8m1w9epcz0IfBzQXAYlF?= =?utf-8?q?E9D+IczinVCgLnadK2LF4az+OJTBAUzI386aargMxnrHnjz95IKEGBEBrPv3I8quA?= =?utf-8?q?6qQQ+gYFdJKMT2mjqx49yLzQZL6y6aGvqoMlHSBzzO/lV4/4CZMzSEWmB05r5wyxK?= =?utf-8?q?o3dFI9ZHNQOfdP7/8jqXD76ssCM9j8cEK2/TktzCGwNPjJFCCbGi/vH5fDrrn2WSe?= =?utf-8?q?szrXUntjauiM6O5aMEPRnZ5HhI04CFR+xZnKgtGh4QealDwNlOUb7iYBnCZklIGDR?= =?utf-8?q?ohoSeD71CL53P8ywg4GiPmmKqmHvkbP+5TjKmbz641iSvQhhnwvWrysQQpqWnmzki?= =?utf-8?q?PpouMNE7TZXJpGLo0+B2/vVPdeEf1mB+uRTARuywvyjM5cGFdK1CJidLvQRhVy67M?= =?utf-8?q?mxB2fgOEDPJchzoBr0bdK4GqqcWXXflieoxDWtSfmvIEFs2Y4RAySsl7b7jiT3A6Z?= =?utf-8?q?q5fjYJ8NZCw77TjnXQ1oou8p5qOVzOJTsDk8WLdlRVZpqOU5CFSYYE3meWKrV15fH?= =?utf-8?q?ixd0dXJw4bjihhr4gzFigQstv9thA7lXiySrp25QHrTLMHGzPVNjwF1VeEui66cIA?= =?utf-8?q?NyDdNc0gTjcqBNgDLaMjhHJX7Hb8/vJY0lZ38aPHcZKatetMWP/oge/JkIdtGcAQm?= =?utf-8?q?0Dth97qYDF5/I8xJ68vzrloqAmkY2OrH5zbje02jLb7X4qgD1lf5OXWW9/udMnbi0?= =?utf-8?q?pVkXGgkCIADxCJRRCdpWibxT2IZm1SBV3HrJG4qCqFkBEcjdeZ6MzFkBsLSquQOom?= =?utf-8?q?36rEmUhNO/uX4wsJDkgmNg0iIAG3xxqAyKPxztkDeI0QMbs9xiXtISVtwOUMaspHe?= =?utf-8?q?8C4tKaWex8Stw3VQFsyb/LNDCv0ybDk/Mli2aG/L81GJevGxb0LtWrDauES3k12ny?= =?utf-8?q?JWNOnfX5MicaRt+uiLsQ2x12JkOVhsvDRArrqORxjLPGbUbjaKP+dWdvOC6fVbnkf?= =?utf-8?q?YZRZU0yUn6xYaoU/9NF/xs5h1EzKsxbC7Fhgppr7gp+5kW9nomb1PuT82gGoWE7Ph?= =?utf-8?q?JynyjUAN61kAUB0QlEa3DZMkLrMVcRjXPjnpgKE2zP2YbvHAWs4mhoZ5ttKsxqMdJ?= =?utf-8?q?0OfvPIw7Z0IpLdpW4fWvwqzAAwr0LhFQ9f/FoDzdFCu2hIgiu2mhouyCPsdl5afYR?= =?utf-8?q?+jpa8kSVXfpB7z+GEafa18nH/ghFf1Vw7sYgL/nxopvgme4DzJCHosh9Pp0DaLVSs?= =?utf-8?q?uTv4cwGf6yh?= X-Forefront-Antispam-Report: CIP:80.151.164.27;CTRY:DE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:esd-s7.esd;PTR:p5097a41b.dip0.t-ipconnect.de;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(376014)(36860700013)(82310400026);DIR:OUT;SFP:1102; X-OriginatorOrg: esd.eu X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jul 2024 21:44:09.8586 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bc644768-dd9b-4bfd-a9ee-08dca6a99761 X-MS-Exchange-CrossTenant-Id: 5a9c3a1d-52db-4235-b74c-9fd851db2e6b X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=5a9c3a1d-52db-4235-b74c-9fd851db2e6b;Ip=[80.151.164.27];Helo=[esd-s7.esd] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF00000193.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR03MB10163 X-Patchwork-Delegate: kuba@kernel.org This patch adds support for one-shot mode. In this mode there happens no automatic retransmission in the case of an arbitration lost error or on any bus error. Signed-off-by: Stefan Mätje --- drivers/net/can/esd/esd_402_pci-core.c | 5 +++-- drivers/net/can/esd/esdacc.c | 9 +++++++-- drivers/net/can/esd/esdacc.h | 1 + 3 files changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/net/can/esd/esd_402_pci-core.c b/drivers/net/can/esd/esd_402_pci-core.c index b7cdcffd0e45..5d6d2828cd04 100644 --- a/drivers/net/can/esd/esd_402_pci-core.c +++ b/drivers/net/can/esd/esd_402_pci-core.c @@ -369,12 +369,13 @@ static int pci402_init_cores(struct pci_dev *pdev) SET_NETDEV_DEV(netdev, &pdev->dev); priv = netdev_priv(netdev); + priv->can.clock.freq = card->ov.core_frequency; priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK | CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_BERR_REPORTING | CAN_CTRLMODE_CC_LEN8_DLC; - - priv->can.clock.freq = card->ov.core_frequency; + if (card->ov.features & ACC_OV_REG_FEAT_MASK_DAR) + priv->can.ctrlmode_supported |= CAN_CTRLMODE_ONE_SHOT; if (card->ov.features & ACC_OV_REG_FEAT_MASK_CANFD) priv->can.bittiming_const = &pci402_bittiming_const_canfd; else diff --git a/drivers/net/can/esd/esdacc.c b/drivers/net/can/esd/esdacc.c index ef33d2ccd220..c80032bc1a52 100644 --- a/drivers/net/can/esd/esdacc.c +++ b/drivers/net/can/esd/esdacc.c @@ -17,6 +17,9 @@ /* esdACC DLC register layout */ #define ACC_DLC_DLC_MASK GENMASK(3, 0) #define ACC_DLC_RTR_FLAG BIT(4) +#define ACC_DLC_SSTX_FLAG BIT(24) /* Single Shot TX */ + +/* esdACC DLC in struct acc_bmmsg_rxtxdone::acc_dlc.len only! */ #define ACC_DLC_TXD_FLAG BIT(5) /* ecc value of esdACC equals SJA1000's ECC register */ @@ -59,7 +62,7 @@ static void acc_resetmode_leave(struct acc_core *core) acc_resetmode_entered(core); } -static void acc_txq_put(struct acc_core *core, u32 acc_id, u8 acc_dlc, +static void acc_txq_put(struct acc_core *core, u32 acc_id, u32 acc_dlc, const void *data) { acc_write32_noswap(core, ACC_CORE_OF_TXFIFO_DATA_1, @@ -249,7 +252,7 @@ netdev_tx_t acc_start_xmit(struct sk_buff *skb, struct net_device *netdev) u8 tx_fifo_head = core->tx_fifo_head; int fifo_usage; u32 acc_id; - u8 acc_dlc; + u32 acc_dlc; if (can_dropped_invalid_skb(netdev, skb)) return NETDEV_TX_OK; @@ -274,6 +277,8 @@ netdev_tx_t acc_start_xmit(struct sk_buff *skb, struct net_device *netdev) acc_dlc = can_get_cc_dlc(cf, priv->can.ctrlmode); if (cf->can_id & CAN_RTR_FLAG) acc_dlc |= ACC_DLC_RTR_FLAG; + if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT) + acc_dlc |= ACC_DLC_SSTX_FLAG; if (cf->can_id & CAN_EFF_FLAG) { acc_id = cf->can_id & CAN_EFF_MASK; diff --git a/drivers/net/can/esd/esdacc.h b/drivers/net/can/esd/esdacc.h index d13dfa60703a..6b7ebd8c91b2 100644 --- a/drivers/net/can/esd/esdacc.h +++ b/drivers/net/can/esd/esdacc.h @@ -35,6 +35,7 @@ */ #define ACC_OV_REG_FEAT_MASK_CANFD BIT(27 - 16) #define ACC_OV_REG_FEAT_MASK_NEW_PSC BIT(28 - 16) +#define ACC_OV_REG_FEAT_MASK_DAR BIT(30 - 16) #define ACC_OV_REG_MODE_MASK_ENDIAN_LITTLE BIT(0) #define ACC_OV_REG_MODE_MASK_BM_ENABLE BIT(1)