From patchwork Mon Jul 22 07:10:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738469 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CF3C1B7F4; Mon, 22 Jul 2024 07:11:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.129 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632268; cv=none; b=c+Fvt0Ow2WfqTPtwn/vkbdvIDDefbwAcsCNonPvH5cU4sq5ye4Ot8L4M20yU62GHvKARcvse0Fk1BjoRN652x4FhzHn28amDhsTffxlcH6kIw3wh/k0jTJGJUIDhO1kZQ3Woa6u5oMBxldjVNF8w8L1+1gx8qSOYzQ5u/Ul3EEM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632268; c=relaxed/simple; bh=0i17fR7MkJO0xOYoBFBes8/uzxNaH2EUbsbbSWQ2LNk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SE0d/lviyEwWI8s/5rGH4unI+ftkrILS4rFWUN0pIl9WlnZutqvtgsjs+qLCtCutvs43og2zeMalKqqlfAK4NU2KqCO5m0FOhrHuHwE31hDHbM9akn0P6BGTty9NGM9diVlOMbnm1pDjs0TuvafzyaKFjiFvGK4FA3uN+dhDX5k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=l2XX0njN; arc=none smtp.client-ip=198.252.153.129 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="l2XX0njN" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx1.riseup.net (Postfix) with ESMTPS id 4WSBJp3gyvzDqQ8; Mon, 22 Jul 2024 07:11:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1721632266; bh=0i17fR7MkJO0xOYoBFBes8/uzxNaH2EUbsbbSWQ2LNk=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=l2XX0njNDQFQN04j2Ax3wp7P03GROkFaPEJkoiP/tg4+iH6b7oZkWyZqMfgvz2ZA/ VIEhruPHFsZKNSW7hQ7pwFXA5pZPkmQdajv/AgxWgEpVIF48/9XEpUKT8g1KFMdbXq CnXb/oIYey9LfLXfZ12MN0CjhOixY9XhhkzJdidY= X-Riseup-User-ID: BE95F539B2D3CA41A834D4541C6F5B57F41B5113F25554295AE9D32EC7DD5DDE Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WSBJl4GqZzJmqy; Mon, 22 Jul 2024 07:11:03 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:11 +0700 Subject: [PATCH 01/12] arm64: dts: qcom: sm6115-pro1x: Add Hall Switch and Camera Button Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-1-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The Pro1X has a flip keyboard and a single-state camera button. Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 33 +++++++++++++++++++++++-- 1 file changed, 31 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 4a30024aa48f..5b7dd54be6b6 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -34,9 +34,24 @@ framebuffer0: framebuffer@5c000000 { gpio-keys { compatible = "gpio-keys"; - - pinctrl-0 = <&vol_up_n>; pinctrl-names = "default"; + pinctrl-0 = <&hall_sensor_n>, <&key_camera_n>, <&vol_up_n>; + + hall-switch { + label = "Hall Switch"; + linux,input-type = ; + linux,code = ; + gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; + debounce-interval = <90>; + wakeup-source; + }; + + key-camera { + label = "Camera Button"; + linux,code = ; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + debounce-interval = <15>; + }; key-volume-up { label = "Volume Up"; @@ -212,6 +227,20 @@ &sleep_clk { &tlmm { gpio-reserved-ranges = <0 4>, <14 4>; + + hall_sensor_n: hall-sensor-n { + pins = "gpio96"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + key_camera_n: key-camera-n { + pins = "gpio18"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; }; &ufs_mem_hc { From patchwork Mon Jul 22 07:10:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738470 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 67E61224FD; Mon, 22 Jul 2024 07:11:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632271; cv=none; b=QMC8av9XGcc40vyl5JFGCcvlNAnqk1cpFYGR4rLPW9SbThe5R7B8H4WQphC58eqw20dbVgMQHMMNJfdt3man7Mm6N6SBB2uuE7y0NpGRGiXLpXd9iU98+1njc62EzDTp40BGpSRobSQ30DSXgpoGuyGje3r02D1s90FdfcQwnBs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632271; c=relaxed/simple; bh=M3L7RYMJWWu8n7oj3hIljj0OriZSrZa/7iNAsjZjw+U=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RgmP4bulymw+6nj6DTqsGS7g9DzBq2oUlQzMLPUyeDAhoqDcsDO5y/kqx2KZuPnOIvlzspUc56AqdHNFxP6HhotQDVIRn7ojlw0Ink5xQ5WUYc2OhwjKsOTv7GWUWRRlcOwprGQy3d9/wa1vfoFc15XFE2feioZz4TORFQecwk0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=ZjPVdF1H; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="ZjPVdF1H" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WSBJs4PV6z9v89; Mon, 22 Jul 2024 07:11:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1721632269; bh=M3L7RYMJWWu8n7oj3hIljj0OriZSrZa/7iNAsjZjw+U=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ZjPVdF1HgmSK/hMWWf9/LRJ/Gueftj+M/fN4+SEvj8QSqLvnXFiG5BIMAp3qovgkN zec6cywyW8EE7OYYfAGL+b9698pXSyMoXn2jHf02VS4rQU3f/unDCveA/gmVqWwt47 03E6V8wCNZXl42Nd8Nj8yEYdswm1bCL0ZJlDWVHM= X-Riseup-User-ID: 1C66832B198A5148F9B03B2455FE833E1DD501321EA08AC55304A099201DA9AC Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WSBJp5TXWzJrYb; Mon, 22 Jul 2024 07:11:06 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:12 +0700 Subject: [PATCH 02/12] arm64: dts: qcom: sm6115-pro1x: Add PCA9534 IO Expander Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-2-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh F(x)tec Pro1X comes with PCA9534 IO Expander, it is used for enabling touch screen VDD/VDDIO and keyboard's caps lock LED. Signed-off-by: Dang Huynh Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 5b7dd54be6b6..43b4bee72dd8 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -69,6 +69,23 @@ &dispcc { status = "disabled"; }; +&gpi_dma0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + /* Clock frequency was not specified downstream, let's park it to 100 KHz */ + clock-frequency = <100000>; + + pca9534: gpio@21 { + compatible = "nxp,pca9534"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + &pm6125_gpios { vol_up_n: vol-up-n-state { pins = "gpio5"; @@ -88,6 +105,10 @@ &pon_resin { status = "okay"; }; +&qupv3_id_0 { + status = "okay"; +}; + &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm6125-regulators"; From patchwork Mon Jul 22 07:10:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738471 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 88E9D2E3F7; Mon, 22 Jul 2024 07:11:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632274; cv=none; b=fyNZY7miBfnbrFra96REuAzxG5odm4bX1aL9BX4QB+VxGOD2LapsTv2Ao0Ve+IFaHyEN5iIfto8eDebY4Dhppdv3G44/uTm8sVobsvA025WHhojc8/zq02fVm5UdbgGDf9tw9WOsY4Qb57iesTKyHy4aWMc/rcwNR6DaKfSNSwU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632274; c=relaxed/simple; bh=h8Euqhb97+Bz0/Ll+6/8ichuSZtZkS5o+d22paiug2w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dKUdiROT7HtHDqnyMEpkx7RZinrQb4qoiirTQYyjp7WBcwdhtD8AigqPCq11zxhJKh4y7n0RljtZesqCTiZJkKE4eFVMRHMzEnzqVKEH0KeHuBaccr/g9Y9HCqjstTJgcUl3iQOWZEZeYBHbRpVhjDNlhZqtpBrn6LRCgB1hF/o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=A9BH9qcv; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="A9BH9qcv" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WSBJw5RvVz9v89; Mon, 22 Jul 2024 07:11:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1721632272; bh=h8Euqhb97+Bz0/Ll+6/8ichuSZtZkS5o+d22paiug2w=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=A9BH9qcvCkNh50+eZT4VBVMgf3zQJCZtKXM7q6AyvrLzPaqwhQTeyZdsrU9U6d1n+ BzXtgXOzRl+FrFtNZ9WOCETZQuhSnB3xqURR/mzHmtt+rJx/FhWiZ4Ptp+kNXMgzJg Eoyz8R+VbXe9f2AqWx0SHJxj1huxynDdqPOHkl6Y= X-Riseup-User-ID: 1B349F001B19F7B62335CA1E7204DAFB91F54665BCE2597B92627E4B1D653422 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WSBJs6Sm0zJmqy; Mon, 22 Jul 2024 07:11:09 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:13 +0700 Subject: [PATCH 03/12] arm64: dts: qcom: sm6115-pro1x: Add Goodix Touchscreen Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-3-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The Fxtec Pro1X touchscreen uses Goodix GT9286 chip. Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 49 +++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 43b4bee72dd8..d91d31646b29 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -62,6 +62,20 @@ key-volume-up { wakeup-source; }; }; + + ts_vdd_supply: ts-vdd-supply { + compatible = "regulator-fixed"; + regulator-name = "ts_vdd_supply"; + gpio = <&pca9534 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + ts_vddio_supply: ts-vddio-supply { + compatible = "regulator-fixed"; + regulator-name = "ts_vddio_supply"; + gpio = <&pca9534 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &dispcc { @@ -86,6 +100,27 @@ pca9534: gpio@21 { }; }; +&i2c2 { + status = "okay"; + /* Clock frequency was not specified downstream, let's park it to 100 KHz */ + clock-frequency = <100000>; + + touchscreen@14 { + compatible = "goodix,gt9286"; + reg = <0x14>; + pinctrl-names = "default"; + pinctrl-0 = <&ts_int_n>, <&ts_rst_n>; + + interrupt-parent = <&tlmm>; + interrupts = <80 IRQ_TYPE_LEVEL_LOW>; + + irq-gpios = <&tlmm 80 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&tlmm 71 GPIO_ACTIVE_HIGH>; + AVDD28-supply = <&ts_vdd_supply>; + VDDIO-supply = <&ts_vddio_supply>; + }; +}; + &pm6125_gpios { vol_up_n: vol-up-n-state { pins = "gpio5"; @@ -262,6 +297,20 @@ key_camera_n: key-camera-n { drive-strength = <2>; bias-pull-up; }; + + ts_int_n: ts-int-n { + pins = "gpio80"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + ts_rst_n: ts-rst-n { + pins = "gpio71"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; }; &ufs_mem_hc { From patchwork Mon Jul 22 07:10:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738472 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8285E381C2; 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Mon, 22 Jul 2024 07:11:12 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:14 +0700 Subject: [PATCH 04/12] arm64: dts: qcom: sm6115-pro1x: Add Caps Lock LED Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-4-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The Pro1X has a caps lock LED on the keyboard. Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index d91d31646b29..60c046fe8e52 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -8,6 +8,7 @@ #include "sm6115.dtsi" #include "pm6125.dtsi" #include +#include / { model = "F(x)tec Pro1X (QX1050)"; @@ -63,6 +64,16 @@ key-volume-up { }; }; + gpio-leds { + compatible = "gpio-leds"; + + capslock-led { + color = ; + function = LED_FUNCTION_CAPSLOCK; + gpios = <&pca9534 1 GPIO_ACTIVE_HIGH>; + }; + }; + ts_vdd_supply: ts-vdd-supply { compatible = "regulator-fixed"; regulator-name = "ts_vdd_supply"; From patchwork Mon Jul 22 07:10:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738473 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E483C3BBE2; Mon, 22 Jul 2024 07:11:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.129 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632281; cv=none; b=qcM3wo+yPRVJgDuAaEstdjLV1jYuZfwA0HISlcRJjMjEv/FQJS974TxJNK9X8AsLRdOW42G5MOXyLvEmaoCG6pluVAAGweYMkpE9p6n3XpCoZmXVOuJzQ4VqczGWFjxcMtHOfRTSk6hEnq5Mr0XTRdJb0kT6BB2Ls4P7GTze62E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632281; c=relaxed/simple; bh=HJblI5oQuwtVrKZEQ7b2SgOy0zXWPkXW2shqhb1zCr8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kIZInMw+h6W32Y4hztxynn67nhNUrJtpScUv5xnLMjAtgdnSLXO7zUXskAUuUA+VZdRilh6ChJ+95/a/ToLKW18Yo4Ih2UZ3/D4GsytgjzqYArnbhMSVHwNIBSfsvbp/bD8k+JWU5pGbfuvWtKQqbv82aYri3ZP+SIz91oDnbTU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=EDQ7jNsb; arc=none smtp.client-ip=198.252.153.129 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="EDQ7jNsb" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx1.riseup.net (Postfix) with ESMTPS id 4WSBK30b6yzDqT9; Mon, 22 Jul 2024 07:11:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1721632279; bh=HJblI5oQuwtVrKZEQ7b2SgOy0zXWPkXW2shqhb1zCr8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=EDQ7jNsbkx5OFNUmkROQmqGlmTXsyPgalmeFanqJIbqGnXlUoC61p4SLDu2jcdw95 3sbEpUBcKo/VSstyJlRJo0lKcl18DzE+HoGfdg+nFnXFN+nxKVCrEk3jDpMGrJoEWJ vBFZ/QQ7KPcD8755iEhVtxYhWYsz/ouTdDQ11Qy4= X-Riseup-User-ID: 22681378F6F097C354D6F7437EB999C57E3D138DEE5D7800A8283525E4F243EA Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WSBK01NYVzJmqy; Mon, 22 Jul 2024 07:11:15 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:15 +0700 Subject: [PATCH 05/12] arm64: dts: qcom: sm6115-pro1x: Enable SD card slot Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-5-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh Fxtec Pro1X has two card slots and allow either 2xSIM cards or 1xSIM, 1xSD Card configuration. Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 31 +++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 60c046fe8e52..42567545f56d 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -187,6 +187,7 @@ pm6125_l4a: l4 { pm6125_l5a: l5 { regulator-min-microvolt = <1648000>; regulator-max-microvolt = <3056000>; + regulator-allow-set-load; }; pm6125_l6a: l6 { @@ -288,6 +289,36 @@ pm6125_l24a: l24 { }; }; +&sdc2_state_off { + cd-pins { + pins = "gpio88"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; + +&sdc2_state_on { + cd-pins { + pins = "gpio88"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; +}; + +&sdhc_2 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc2_state_on>; + pinctrl-1 = <&sdc2_state_off>; + + cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&pm6125_l22a>; + vqmmc-supply = <&pm6125_l5a>; + status = "okay"; +}; + &sleep_clk { clock-frequency = <32764>; }; From patchwork Mon Jul 22 07:10:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738474 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 823C93EA69; Mon, 22 Jul 2024 07:11:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632283; cv=none; b=m4hMhgMrNawz/xEBV1CW7nXCfb+xF7w5AS7zuiz7uNI5iGPLpbRMoEuYm4Su08O+ImhKQeDFAI+eaNYkwb5x96xGOSVFPFZ753qyKqVnWwZZCmR/ajpmhY2RKmHTiFLCIsQfyuXqBiql0TYFsKv++A98ozpJpwtEeGDrpMY/894= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632283; c=relaxed/simple; bh=KWBpJ7gGcid+EjpgOjWMY+CPLBB3dIruHrlg9txXzvM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YMiBKk+KGP/IeVyg0+O8YrHSwZa/wkX/zg5W5al5H2JyEdtZgLsvV2wXnVxjBB/NDvNp0/NdB3RGo1gHiYy+t+5K1nqbqFTzgZKIV7rDl1raeARXiqqfySQ8qddLbKvBUGRJlaPKzcnHPfB3W8gZxqzz9ZpDTePrvAID9GRugVg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=k/SgN9YB; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="k/SgN9YB" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WSBK61M8Mz9v89; Mon, 22 Jul 2024 07:11:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1721632282; bh=KWBpJ7gGcid+EjpgOjWMY+CPLBB3dIruHrlg9txXzvM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=k/SgN9YBdH2P+70phj3OoknI+DRO8iC4By7zmcNBfukI+uE2J2bWZPLmGGa/PVKmp crR8OhBfWPno++aniweyxZ0IOdtqkd9bOfB3KounvuvYqWk+F6fipLVmYzgGGSOswv VyOi7UYpjz7CDRtaTr/viBgUQecr2bGiorRkBIfo= X-Riseup-User-ID: CC568D24F5FF85FB7943D38D9609E589BCE296E2124344443DF92247DD287E70 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WSBK32T9lzJrYb; Mon, 22 Jul 2024 07:11:19 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:16 +0700 Subject: [PATCH 06/12] arm64: dts: qcom: sm6115-pro1x: Enable MDSS and GPU Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-6-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh Fxtec Pro1x uses the same display (BOE BF060Y8M-AJ0) as Pro1. Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 60 +++++++++++++++++++++++-- 1 file changed, 56 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 42567545f56d..6148cc258164 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -89,13 +89,16 @@ ts_vddio_supply: ts-vddio-supply { }; }; -&dispcc { - /* HACK: disable until a panel driver is ready to retain simplefb */ - status = "disabled"; +&gpi_dma0 { + status = "okay"; }; -&gpi_dma0 { +&gpu { status = "okay"; + + zap-shader { + firmware-name = "qcom/sm6115/Fxtec/QX1050/a610_zap.mbn"; + }; }; &i2c1 { @@ -132,6 +135,42 @@ touchscreen@14 { }; }; +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + vdda-supply = <&pm6125_l18a>; + status = "okay"; + + panel: panel@0 { + compatible = "boe,bf060y8m-aj0"; + reg = <0>; + + reset-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>; + + vddio-supply = <&pm6125_l9a>; + + pinctrl-names = "default"; + pinctrl-0 = <&mdss_dsi_n &panel_en_n>; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + status = "okay"; +}; + &pm6125_gpios { vol_up_n: vol-up-n-state { pins = "gpio5"; @@ -340,6 +379,19 @@ key_camera_n: key-camera-n { bias-pull-up; }; + mdss_dsi_n: mdss-dsi-n { + pins = "gpio82"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + panel_en_n: panel-en-n { + pins = "gpio65"; + function = "gpio"; + bias-disable; + }; + ts_int_n: ts-int-n { pins = "gpio80"; function = "gpio"; From patchwork Mon Jul 22 07:10:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738475 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA56B450E2; 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Mon, 22 Jul 2024 07:11:22 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:17 +0700 Subject: [PATCH 07/12] arm64: dts: qcom: sm6115-pro1x: Hook up USB3 SS Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-7-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The F(x)tec Pro1X supports USB 3.0 through it's USB-C port. Signed-off-by: Dang Huynh Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 6148cc258164..a32fc27bc783 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -428,7 +428,6 @@ &usb { &usb_dwc3 { /delete-property/ usb-role-switch; - maximum-speed = "high-speed"; dr_mode = "peripheral"; }; @@ -439,6 +438,12 @@ &usb_hsphy { status = "okay"; }; +&usb_qmpphy { + vdda-phy-supply = <&pm6125_l4a>; + vdda-pll-supply = <&pm6125_l12a>; + status = "okay"; +}; + &xo_board { clock-frequency = <19200000>; }; From patchwork Mon Jul 22 07:10:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738476 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 752054776A; Mon, 22 Jul 2024 07:11:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.129 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632290; cv=none; b=dXqGse5+PUeN3BN1drGt/IyjlD3rCN58IhPagSvizK4M2+1iiRyW14Dj6Cq88jOkuEXM5YX5SC5LNztPjF8pEiqwVXmQ8xsyXGqD+yPVleUr3ph35EkgioyjxQOUAfaKzPY2dyFVAVmmGvfEN5RJFYy9/tpYiGRjk4xneqJ5zFY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632290; c=relaxed/simple; bh=JxHI/ZiUCJ5QXwzrMpm6uDTvguA5MZRc5DcSL7YASww=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DHFl6vs8eqFcNhXUivCgz0lXwoBj8pfff09xrEyGic67uZFb8NGEX7CsEL1LyfQxvJuP0jge7UywBWn9Rn+LN03lGjc0iBVV8p9d5+V7Q9UPHKvxJ8wAPJ9lzn3r8awmP7ayDDgJF8K7KSkH/LfQ5Hz1wfgbNloTz9/2/hWQ1M8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=NbtEQAWq; arc=none smtp.client-ip=198.252.153.129 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="NbtEQAWq" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx1.riseup.net (Postfix) with ESMTPS id 4WSBKD3ZNQzDqXT; Mon, 22 Jul 2024 07:11:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1721632288; bh=JxHI/ZiUCJ5QXwzrMpm6uDTvguA5MZRc5DcSL7YASww=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=NbtEQAWqklXYEBxAnqmvheJ0hTfnMyI3zz9/wsitmOwQg1co/UfWEXtqGFgwxGAQP ea4sIS9C8XBEn3e3VjfkUN2PC+8Q41I4c40daLXd7/zvdlq5mjfjvIb9jd8qw8+RYc dCk6zaK3rYcphP5oaAgWWJmQfcS5lYd8R9zZi0wE= X-Riseup-User-ID: 213644179A3551838FFA1B9669CE811AA9316FA9DF55FD16D9A56E01A59C661E Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WSBK94kHwzJmqy; Mon, 22 Jul 2024 07:11:25 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:18 +0700 Subject: [PATCH 08/12] arm64: dts: qcom: sm6115-pro1x: Update copyright year Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-8-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh It's 2024, let's update the copyright year. Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index a32fc27bc783..6e9e4d9f8250 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright (c) 2023, Dang Huynh + * Copyright (c) 2023 - 2024, Dang Huynh */ /dts-v1/; From patchwork Mon Jul 22 07:10:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738477 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3CEF649625; Mon, 22 Jul 2024 07:11:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632293; cv=none; b=ccX6PWFsaVnptKgHpQjPb+8kcFYoWfDgZ0BywmZMdzP1NHADgO2WlmYWpMRX0NHQeKWxbQ9P9K9s6pCJ+xFO6wdjXrJWp+PAfZTbgH22X/JvgkB0iXCgOf1xGlkuyUJwZ8Biv2kE9UrWwLnlO3T1dfzKfSyqHpQubZ3lN2/Krws= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632293; c=relaxed/simple; bh=fZzBukaA/Zp0ajPgX2Pu0mA349XDLDuRR09TQSLL7c8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=vE4cP2ZrkPFVQF8yVb/hARV0Z4UFGYaS71kV5aSu0o1lE1SXycn3dhWOpQ51ZvTGelDW1kBrymtsYr/JtlGMP2Kx/Xhs+mGzvapLFuNIHZGKw1uPGYrFosNPBTQuN+oJwwTUzudj7uGOWPcbaCOCx+bFjg0ELJN0w37fjNXfIw0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=nmp7bb4Z; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="nmp7bb4Z" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WSBKH6KDmz9v89; Mon, 22 Jul 2024 07:11:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1721632292; bh=fZzBukaA/Zp0ajPgX2Pu0mA349XDLDuRR09TQSLL7c8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=nmp7bb4Zi41w6588TQwm1EyK8uV/4l8o46zhcfWTe6/ykdC9hJeLqfoxgEYrvvNLj vVvbJFyOQd0TIE1jE5f+JJamWF6K2W0wyAjQbCidb9HSac5yCiGqBPIlBdBxDL/l04 QUsvcj5bK8YXg5H2t7X56EuF9xEe/IjWDK0Qxfjc= X-Riseup-User-ID: E9377D6A8CF7494D418DB7FE8DC8D1B73087EB71B7BF79C64A510FFAB824CCB2 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WSBKD5mCszJrYb; Mon, 22 Jul 2024 07:11:28 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:19 +0700 Subject: [PATCH 09/12] arm64: dts: qcom: sm6115-pro1x: Add PMI632 Type-C property Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-9-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The USB-C port is used for powering external devices and transfer data from/to them. Signed-off-by: Dang Huynh Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 51 +++++++++++++++++++++++-- 1 file changed, 48 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 6e9e4d9f8250..88df28fc8c7e 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -7,8 +7,10 @@ #include "sm6115.dtsi" #include "pm6125.dtsi" +#include "pmi632.dtsi" #include #include +#include / { model = "F(x)tec Pro1X (QX1050)"; @@ -181,6 +183,46 @@ vol_up_n: vol-up-n-state { }; }; +&pmi632_typec { + status = "okay"; + + connector { + compatible = "usb-c-connector"; + + power-role = "dual"; + data-role = "dual"; + self-powered; + + typec-power-opmode = "default"; + pd-disable; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + pmi632_hs_in: endpoint { + remote-endpoint = <&usb_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + pmi632_ss_in: endpoint { + remote-endpoint = <&usb_qmpphy_out>; + }; + }; + }; + }; +}; + +&pmi632_vbus { + regulator-min-microamp = <500000>; + regulator-max-microamp = <1000000>; + status = "okay"; +}; + &pon_pwrkey { status = "okay"; }; @@ -426,9 +468,8 @@ &usb { status = "okay"; }; -&usb_dwc3 { - /delete-property/ usb-role-switch; - dr_mode = "peripheral"; +&usb_dwc3_hs { + remote-endpoint = <&pmi632_hs_in>; }; &usb_hsphy { @@ -444,6 +485,10 @@ &usb_qmpphy { status = "okay"; }; +&usb_qmpphy_out { + remote-endpoint = <&pmi632_ss_in>; +}; + &xo_board { clock-frequency = <19200000>; }; From patchwork Mon Jul 22 07:10:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738478 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D577C4C622; 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Mon, 22 Jul 2024 07:11:31 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:20 +0700 Subject: [PATCH 10/12] arm64: dts: qcom: sm6115-pro1x: Enable RGB LED Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-10-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh This device has an RGB LED. It is used for notifications. Signed-off-by: Dang Huynh Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 27 +++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 88df28fc8c7e..b434241a95b2 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -183,6 +183,33 @@ vol_up_n: vol-up-n-state { }; }; +&pmi632_lpg { + status = "okay"; + + multi-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@1 { + reg = <1>; + color = ; + }; + + led@2 { + reg = <2>; + color = ; + }; + + led@3 { + reg = <3>; + color = ; + }; + }; +}; + &pmi632_typec { status = "okay"; From patchwork Mon Jul 22 07:10:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738479 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BCD4424B2F; Mon, 22 Jul 2024 07:11:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.129 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632300; cv=none; b=gMOeSH99fuFaPa2k0oHUQKkqBBtd0Mo0+ABjy6pXvUqqFqOoIBBj2T1XTZmyl0d9a7FIvcIiLrtb+U2FnURLVeuhazeA++GbOBVR+xUvH2rt7yDlvaHHgdF4HEAM4yvPybnp8IDb8u/wTlXzFQWa6dpspnxR5/ejk9B9EW+NJ4M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632300; c=relaxed/simple; bh=+nx+9T3xtA4UcCxPoiO3ksD/DT97xhZZ365okDBN660=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=r86Q1Vhg4WSJTz2NiGbcRJ1izyl+wg7Xq1M2v+Yw0G70c+ii26UGl16uDBWZEf0UWLRJUDHSbE/bk3RYg1nSWVeQGjc1LsFASrOQLWt8kOv46OSNnQM34Pca9NvLguas+Luhl2PejgBIDeSxwyjCep0O/B8nBrgMZVSaXqEnQhk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=NKYEgl18; arc=none smtp.client-ip=198.252.153.129 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="NKYEgl18" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx1.riseup.net (Postfix) with ESMTPS id 4WSBKQ1B2qzDqT9; Mon, 22 Jul 2024 07:11:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1721632298; bh=+nx+9T3xtA4UcCxPoiO3ksD/DT97xhZZ365okDBN660=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=NKYEgl18NBbgKLqRXD5aYckPoCBtA/lZ/Ww8+cmIYDxcDnGIs+cnZH0qIf1SY2W2b pS9JsHnXZ7W7E15ZGLPBrwE1a+VtQ7B77DuT98+QDvB3vaZol5rgorIQOEHLvpLNFw Jpt1kqtZfMDxaTemWSRbcBR1Fp2DGR6GQQ6PSL1Q= X-Riseup-User-ID: 4DCA886B0D1944FD1D1617DE6253A426561B4C273528D3B0E67905B1CE53FFB8 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WSBKM2RgRzJrdJ; Mon, 22 Jul 2024 07:11:35 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:21 +0700 Subject: [PATCH 11/12] arm64: dts: qcom: sm6115-pro1x: Enable remoteprocs Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-11-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh Enable [A,C]DSP and MPSS remote processor on this device. Signed-off-by: Dang Huynh Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index b434241a95b2..14d4f533f741 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -263,6 +263,21 @@ &qupv3_id_0 { status = "okay"; }; +&remoteproc_adsp { + firmware-name = "qcom/sm6115/Fxtec/QX1050/adsp.mbn"; + status = "okay"; +}; + +&remoteproc_cdsp { + firmware-name = "qcom/sm6115/Fxtec/QX1050/cdsp.mbn"; + status = "okay"; +}; + +&remoteproc_mpss { + firmware-name = "qcom/sm6115/Fxtec/QX1050/modem.mbn"; + status = "okay"; +}; + &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm6125-regulators"; From patchwork Mon Jul 22 07:10:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13738480 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA63B5C603; Mon, 22 Jul 2024 07:11:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632303; cv=none; b=uAk/pZ1wRsPGBJ3E7SVnfWwHYJw4+a/d28PDwoTn1hdICpF33Z1/Omr6CLUq8CR+fe7VMLx+PYH4vsHBrKEPPOJdv15BoSDmSrpdBNG5IlpbPHU8j46aMuCRTi+R8lpGtKIxQNqts7ccCErm/5T/TvbMCI0GpOMbMgkIvwFlzSo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721632303; c=relaxed/simple; bh=Qp1HPrxtCdVBwj+fKMzHWw50d5Ybm0uUddMCdm6lVq8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rPojWqtY9ApkLyGzZT/C4SiRg7JbF0KyTRIXpn6L2hZ/ryBOUdFQAL+KnNs8crssu5oz7tPdEuGiq/ldNX+pvagmQaL+FU0v44BGRnbDQNWswtXD552F1zdc5zk5crKggdce/o5Dn8MaFuyZ5ugDrDJjQX+Xxi29c4sPwkWZgIs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=YFEenxm1; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="YFEenxm1" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WSBKT2Bbbz9v89; Mon, 22 Jul 2024 07:11:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1721632301; bh=Qp1HPrxtCdVBwj+fKMzHWw50d5Ybm0uUddMCdm6lVq8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=YFEenxm17Qziom9S4BzvhPAUMOfyXqzeZrMI3tNwcJPgNiQsV3if9cXKXrAv4o1wx +ldkvsnaIsfsocY2tZLUp8AJ6HYhkNyYFj5Gq3Ed/DQdeg5DOIPWIyqTFKiXcWwiVS 5QjaOaMDpYZDfIyPIWFnhVAN5nLwGoPGgJjDg8SE= X-Riseup-User-ID: 92DF24B5FB6C06253BDC6747F3C07A91FE2B59A39A253CA2BF8D1637276449BC Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WSBKQ3WlVzJmqy; Mon, 22 Jul 2024 07:11:38 +0000 (UTC) From: Dang Huynh Date: Mon, 22 Jul 2024 14:10:22 +0700 Subject: [PATCH 12/12] arm64: dts: qcom: sm6115-pro1x: Enable ATH10K WLAN Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240722-qx1050-feature-expansion-v1-12-c4d486435b96@riseup.net> References: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> In-Reply-To: <20240722-qx1050-feature-expansion-v1-0-c4d486435b96@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh Enable onboard Wi-Fi on the F(x)tec Pro1X. For reference, HW/SW identifies as: qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000 qmi fw_version 0x324103d6 fw_build_timestamp 2021-12-02 08:20 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.2.4-00982-QCAHLSWMTPLZ-1 Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 14d4f533f741..c148ebd1c8b4 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -531,6 +531,17 @@ &usb_qmpphy_out { remote-endpoint = <&pmi632_ss_in>; }; +&wifi { + status = "okay"; + + vdd-0.8-cx-mx-supply = <&pm6125_l8a>; + vdd-1.8-xo-supply = <&pm6125_l16a>; + vdd-1.3-rfa-supply = <&pm6125_l17a>; + vdd-3.3-ch0-supply = <&pm6125_l23a>; + + qcom,ath10k-calibration-variant = "Fxtec_QX1050"; +}; + &xo_board { clock-frequency = <19200000>; };