From patchwork Mon Jul 22 12:05:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13738795 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0D18BC3DA59 for ; Mon, 22 Jul 2024 12:06:32 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sVrnw-0000BO-N9; Mon, 22 Jul 2024 08:06:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrnc-0007EU-Di for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:05:55 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrna-0007uT-O9 for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:05:52 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1721649949; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=hr9BZw+jnnZPYCHU7IVnZQe9pLLjGhNrmHmaZ/LVdfI=; b=gLdZQvWbecFbGorIotlQL1pRYFpamDByWWeyk52Njdvm4LR0SQSEuAXuksagkVtL90945+ yi08lYpD4H1Ko3Lr1ytszObzj74RXDovvh6qjBCQODlU5TyIqAwaDIvtJsoTwnIrcJ0WuQ 2y18Ocb/Be+xmkcNCdNOlVt87J93mds= Received: from mail-ed1-f69.google.com (mail-ed1-f69.google.com [209.85.208.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-686-d_qA2aW8N4OR17xMRZsxGw-1; Mon, 22 Jul 2024 08:05:47 -0400 X-MC-Unique: d_qA2aW8N4OR17xMRZsxGw-1 Received: by mail-ed1-f69.google.com with SMTP id 4fb4d7f45d1cf-5a534faa028so1152634a12.0 for ; Mon, 22 Jul 2024 05:05:46 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721649945; x=1722254745; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hr9BZw+jnnZPYCHU7IVnZQe9pLLjGhNrmHmaZ/LVdfI=; b=QHPh/P3MYVVzZ2Yz7HHOu6r5M/LwS+yGm/5Dna6wm2S8GB2Xr38U3u4lxfA2ITePiN Uv6akOD68mlPJyxoA47dzWhFJuU9qIdDjJcyOAa8bD0kbMBuU7jZsFv9JvzLgDq2FzD6 GQg7HTiXENtPrWjp64Hv4Cf0d9vpZIsEWWdIphR0OYvNXUYFr9m6vYa5WfAzD8cBbHL5 vB/WCFL/IdLN9Wsuxexr8GedfuArZ/DzTAQq3vJ2Eg1YRnFezLKhzEC2d5jiTiSz+gjT avrLhA042kFpI5qi5klid4DDjlZ0Pu0nbIspXcJxRvKbAyU4Qia+gmnWVkxoKBib2Eum a19Q== X-Gm-Message-State: AOJu0YwF5HkFkluOJYJV4ieXJeIh0uphiNE6dpcjFMGXyl0myFg8KBC8 5k3WdKdLT5HLXHadP/JZv57ERycEr+Kfl1roGMQ545M+IaDtgffE79iS+kAjX7N8OcSiAZ2f+OP E/TTHMv08rAMzkmKc874q/+xx6d3p86EBWMqnHruwmYE/br+QA0YaCGWBIpSY7Xb1aJkl27nQea dG3hxQA0JGzIGRdsnJAgmyqXBmZs8eA7KFLU4O X-Received: by 2002:a05:6402:528c:b0:5a2:2101:a714 with SMTP id 4fb4d7f45d1cf-5a479677407mr4553581a12.25.1721649945464; Mon, 22 Jul 2024 05:05:45 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFbqMKdZok4oCArQguPXMHY6YVtFE2C/Fsb3safFTXF0BzX6kzfMu53c826j63Kx+abDUY6qw== X-Received: by 2002:a05:6402:528c:b0:5a2:2101:a714 with SMTP id 4fb4d7f45d1cf-5a479677407mr4553568a12.25.1721649944869; Mon, 22 Jul 2024 05:05:44 -0700 (PDT) Received: from avogadro.local ([151.95.101.29]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5a30c3f0673sm5985630a12.61.2024.07.22.05.05.43 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 05:05:43 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 1/7] hpet: fix and cleanup persistence of interrupt status Date: Mon, 22 Jul 2024 14:05:35 +0200 Message-ID: <20240722120541.70790-2-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240722120541.70790-1-pbonzini@redhat.com> References: <20240722120541.70790-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.133, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org There are several bugs in the handling of the ISR register: - switching level->edge was not lowering the interrupt and clearing ISR - switching on the enable bit was not raising a level-triggered interrupt if the timer had fired - the timer must be kept running even if not enabled, in order to set the ISR flag, so writes to HPET_TN_CFG must not call hpet_del_timer() Signed-off-by: Paolo Bonzini --- hw/timer/hpet.c | 60 +++++++++++++++++++++++++++++++++---------------- 1 file changed, 41 insertions(+), 19 deletions(-) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 4cb5393c0b5..58073df02b5 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -196,21 +196,31 @@ static void update_irq(struct HPETTimer *timer, int set) } s = timer->state; mask = 1 << timer->tn; - if (!set || !timer_enabled(timer) || !hpet_enabled(timer->state)) { + + if (set && (timer->config & HPET_TN_TYPE_LEVEL)) { + /* + * If HPET_TN_ENABLE bit is 0, "the timer will still operate and + * generate appropriate status bits, but will not cause an interrupt" + */ + s->isr |= mask; + } else { s->isr &= ~mask; + } + + if (set && timer_enabled(timer) && hpet_enabled(s)) { + if (timer_fsb_route(timer)) { + address_space_stl_le(&address_space_memory, timer->fsb >> 32, + timer->fsb & 0xffffffff, MEMTXATTRS_UNSPECIFIED, + NULL); + } else if (timer->config & HPET_TN_TYPE_LEVEL) { + qemu_irq_raise(s->irqs[route]); + } else { + qemu_irq_pulse(s->irqs[route]); + } + } else { if (!timer_fsb_route(timer)) { qemu_irq_lower(s->irqs[route]); } - } else if (timer_fsb_route(timer)) { - address_space_stl_le(&address_space_memory, timer->fsb >> 32, - timer->fsb & 0xffffffff, MEMTXATTRS_UNSPECIFIED, - NULL); - } else if (timer->config & HPET_TN_TYPE_LEVEL) { - s->isr |= mask; - qemu_irq_raise(s->irqs[route]); - } else { - s->isr &= ~mask; - qemu_irq_pulse(s->irqs[route]); } } @@ -414,8 +424,13 @@ static void hpet_set_timer(HPETTimer *t) static void hpet_del_timer(HPETTimer *t) { + HPETState *s = t->state; timer_del(t->qemu_timer); - update_irq(t, 0); + + if (s->isr & (1 << t->tn)) { + /* For level-triggered interrupt, this leaves ISR set but lowers irq. */ + update_irq(t, 1); + } } static uint64_t hpet_ram_read(void *opaque, hwaddr addr, @@ -515,20 +530,26 @@ static void hpet_ram_write(void *opaque, hwaddr addr, switch ((addr - 0x100) % 0x20) { case HPET_TN_CFG: trace_hpet_ram_write_tn_cfg(); - if (activating_bit(old_val, new_val, HPET_TN_FSB_ENABLE)) { + if (deactivating_bit(old_val, new_val, HPET_TN_TYPE_LEVEL)) { + /* + * Do this before changing timer->config; otherwise, if + * HPET_TN_FSB is set, update_irq will not lower the qemu_irq. + */ update_irq(timer, 0); } val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK); timer->config = (timer->config & 0xffffffff00000000ULL) | val; + if (activating_bit(old_val, new_val, HPET_TN_ENABLE) + && (s->isr & (1 << timer_id))) { + update_irq(timer, 1); + } + if (new_val & HPET_TN_32BIT) { timer->cmp = (uint32_t)timer->cmp; timer->period = (uint32_t)timer->period; } - if (activating_bit(old_val, new_val, HPET_TN_ENABLE) && - hpet_enabled(s)) { + if (hpet_enabled(s)) { hpet_set_timer(timer); - } else if (deactivating_bit(old_val, new_val, HPET_TN_ENABLE)) { - hpet_del_timer(timer); } break; case HPET_TN_CFG + 4: // Interrupt capabilities @@ -606,9 +627,10 @@ static void hpet_ram_write(void *opaque, hwaddr addr, s->hpet_offset = ticks_to_ns(s->hpet_counter) - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); for (i = 0; i < s->num_timers; i++) { - if ((&s->timer[i])->cmp != ~0ULL) { - hpet_set_timer(&s->timer[i]); + if (timer_enabled(&s->timer[i]) && (s->isr & (1 << i))) { + update_irq(&s->timer[i], 1); } + hpet_set_timer(&s->timer[i]); } } else if (deactivating_bit(old_val, new_val, HPET_CFG_ENABLE)) { /* Halt main counter and disable interrupt generation. */ From patchwork Mon Jul 22 12:05:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13738798 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3792FC3DA59 for ; Mon, 22 Jul 2024 12:07:33 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sVrny-0000Md-R9; Mon, 22 Jul 2024 08:06:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrnf-0007St-W5 for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:05:59 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrnb-0007uk-Tc for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:05:53 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1721649951; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=j4UwUK1qyFt8jfRv5O/+Xfolt2iTAQ7FuHpfmrN0EbA=; b=VBNqbpYSuzpxKIPnbMWhqD76UvHTjyoSJqtCmt4ghzKEyv8UosaahoVaofZ0gPHjmm58p3 6zyfdN0GLQX28uKAIL5jszMboHducXyypZ88yDFZHeuOyWn7nvwWIhuL54VeATdGOpwTHg poz/UPUQwjVb/SxfUiO7v4pPwdDREF0= Received: from mail-lf1-f72.google.com (mail-lf1-f72.google.com [209.85.167.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-621-hYarwy8NMLG1VKJv20dvrQ-1; Mon, 22 Jul 2024 08:05:49 -0400 X-MC-Unique: hYarwy8NMLG1VKJv20dvrQ-1 Received: by mail-lf1-f72.google.com with SMTP id 2adb3069b0e04-52efd629749so1736269e87.2 for ; Mon, 22 Jul 2024 05:05:49 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721649947; x=1722254747; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=j4UwUK1qyFt8jfRv5O/+Xfolt2iTAQ7FuHpfmrN0EbA=; b=W8Cvl/kU3jv2p6P4OazL/iqeBCtikZsOp9KqRrVlRTgcCO9fcnZh0kmBDSndq3zV1P M4zDjF1rHn1V8e50kk5I+J3jp5BkAA0z4AvhWSsw7Q50Ea0j2duL7v9WbpYYXHeh4aqM jnAaAh7WxLZAyFEqvW+y98673j9YII5jUWXfR8mT2FW3r8oPB5KN2hUU3K2rAdzurKJC 5e9zPSTO6ZCt7jukvbB7FoqRs8R20+H3JDE/WiYWCPNViGWuLRhGHK61gfdg7l57rngQ wK5MgS1WCc1DhGEKADs4CoHILgekfJraFh8aA4OnJUd/BpwnAW84Ae6BDKfD9IvXuCR6 1Bug== X-Gm-Message-State: AOJu0YwmsmTxpPnb6zOFM8R6TpsE/iOM3RVoKbHYD7tuFe4+3sjZc6J0 uv+V/u3hp4h6QsvWc0KeN52mIwCyVv+kr33R9jfSXOqWRKgRO0P1i7n1/JxE0ofND2XQMuCcCWK Jvgn+PantnD6Fg9/GdimXiycxfOD1TvRZuic8zh42LA1r+4cc1dmXjoB0xm9KGedzdnSZqEOJP+ vuLvw/xAnUiVTRTQOBqH6EcdRUhGbCvNF0TFZw X-Received: by 2002:a2e:2e0d:0:b0:2ec:40cf:fa9 with SMTP id 38308e7fff4ca-2ef167a6c3cmr45289081fa.29.1721649947726; Mon, 22 Jul 2024 05:05:47 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGuNxi/klocEARBunzUzS/wWDPUNc4nQwSBc4BYKXU+Z5Fzqo5X2tBdfWzpLoMmI7W2xClVPA== X-Received: by 2002:a2e:2e0d:0:b0:2ec:40cf:fa9 with SMTP id 38308e7fff4ca-2ef167a6c3cmr45288941fa.29.1721649947274; Mon, 22 Jul 2024 05:05:47 -0700 (PDT) Received: from avogadro.local ([151.95.101.29]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5a3e642b647sm4913778a12.55.2024.07.22.05.05.45 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 05:05:46 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 2/7] hpet: ignore high bits of comparator in 32-bit mode Date: Mon, 22 Jul 2024 14:05:36 +0200 Message-ID: <20240722120541.70790-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240722120541.70790-1-pbonzini@redhat.com> References: <20240722120541.70790-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.133, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Paolo Bonzini --- hw/timer/hpet.c | 4 ++++ hw/timer/trace-events | 1 + 2 files changed, 5 insertions(+) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 58073df02b5..bbb1e5f0897 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -585,6 +585,10 @@ static void hpet_ram_write(void *opaque, hwaddr addr, } break; case HPET_TN_CMP + 4: // comparator register high order + if (timer->config & HPET_TN_32BIT) { + trace_hpet_ram_write_invalid_tn_cmp(); + break; + } trace_hpet_ram_write_tn_cmp(4); if (!timer_is_periodic(timer) || (timer->config & HPET_TN_SETVAL)) { diff --git a/hw/timer/trace-events b/hw/timer/trace-events index de769f4b716..a5fafbc6796 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -111,6 +111,7 @@ hpet_ram_write_timer_id(uint64_t timer_id) "hpet_ram_writel timer_id = 0x%" PRIx hpet_ram_write_tn_cfg(void) "hpet_ram_writel HPET_TN_CFG" hpet_ram_write_invalid_tn_cfg(uint8_t reg_off) "invalid HPET_TN_CFG + %" PRIu8 " write" hpet_ram_write_tn_cmp(uint8_t reg_off) "hpet_ram_writel HPET_TN_CMP + %" PRIu8 +hpet_ram_write_invalid_tn_cmp(void) "invalid HPET_TN_CMP + 4 write" hpet_ram_write_invalid(void) "invalid hpet_ram_writel" hpet_ram_write_counter_write_while_enabled(void) "Writing counter while HPET enabled!" hpet_ram_write_counter_written(uint8_t reg_off, uint64_t value, uint64_t counter) "HPET counter + %" PRIu8 "written. crt = 0x%" PRIx64 " -> 0x%" PRIx64 From patchwork Mon Jul 22 12:05:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13738794 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 683FAC3DA59 for ; Mon, 22 Jul 2024 12:06:30 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sVrnv-0008SY-Nw; Mon, 22 Jul 2024 08:06:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrni-0007bS-8C for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:06:00 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrnf-0007uz-OX for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:05:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1721649952; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=X4p0LHYIjMjvQI23Lts1WhjklTNehlg506joAY8S7dI=; b=TF9ibDQWjTxLPmKwH5EmfzaSQRYOmkVrMF5b4bYHtoMswarS/+2b5oNhImLZlnORR70uxn reEzPgnjrrzIGSjVTBL2HUXYXljkXjGBBypvwjsUKpf02jXWtGHHybSWbWhp4908rffHaU V4IW1Yv/Yc7F7j4l+OGYaGfEUlgA/J4= Received: from mail-ej1-f72.google.com (mail-ej1-f72.google.com [209.85.218.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-444-rDP7vz5mNkKgKUX41xw1KQ-1; Mon, 22 Jul 2024 08:05:51 -0400 X-MC-Unique: rDP7vz5mNkKgKUX41xw1KQ-1 Received: by mail-ej1-f72.google.com with SMTP id a640c23a62f3a-a77e59a53c4so339886266b.1 for ; Mon, 22 Jul 2024 05:05:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721649950; x=1722254750; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X4p0LHYIjMjvQI23Lts1WhjklTNehlg506joAY8S7dI=; b=qw2xISquWwvnVz7P6G7XSNBuFfS4oe0DRBa3GQvDOwXWnQT6t6H5xgt/rKp9+R7DEZ uP9bRfOcoshXTMpH2SeA3r17NrY5qwsN89NNI9EXCS/Hg5xsqDQl6cIpzxyx5van9r6L G2ibeOmtBkDp1aI+q5vZUgRciSCVMlr6nRwewcN6/hlqHHRdnyE7S32NfJ5NPBti0Qi5 YLL8qX0Mqjm1RbW3tttmzNfXcsu63CwYx0NN/mACMOWGHzVwiyKxwq5Ljqiw0wn5b/AF WK3A+g1ByHdZqQgsXNl2hdrwOwg+KNI2TIFvsfTTcompaiUZYfUkx4GoNK5uHeviQhh2 a5VA== X-Gm-Message-State: AOJu0YyQ6dxsxQNd4+Z9HU6Eg0R+hUx19duLD2y95d2xZn6MPcc87v0Q 4nJQN5bZCjqfrwl45wMYeKptPCShn8kWD8NRxAOlboHCFM6Ca9CcC9Wb4lUclsyWJvzzHAiHwBH 4kUoomXtirORHE1P5MI11TY4oUUMnCnzyfauRvIB3y1fnzK2rq18vwbH6eeEQ68eGBe3HSpp3MR sg8aoHXHM7Ym5SOv6621DThc1q28f9Yptafory X-Received: by 2002:a17:907:3e1a:b0:a75:23bb:6087 with SMTP id a640c23a62f3a-a7a4c016cafmr472537566b.29.1721649949867; Mon, 22 Jul 2024 05:05:49 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFL9DpPt69DCrN4oscH9ziF6uIM8tcAlf8QWRNxtUJbIWNMpmLv23fuEI7m5SAgEAyUWDNzjg== X-Received: by 2002:a17:907:3e1a:b0:a75:23bb:6087 with SMTP id a640c23a62f3a-a7a4c016cafmr472535766b.29.1721649949508; Mon, 22 Jul 2024 05:05:49 -0700 (PDT) Received: from avogadro.local ([151.95.101.29]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7a3c8bf32esm414269566b.134.2024.07.22.05.05.48 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 05:05:49 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 3/7] hpet: remove unnecessary variable "index" Date: Mon, 22 Jul 2024 14:05:37 +0200 Message-ID: <20240722120541.70790-4-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240722120541.70790-1-pbonzini@redhat.com> References: <20240722120541.70790-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.133, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Paolo Bonzini --- hw/timer/hpet.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index bbb1e5f0897..380e272fbeb 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -437,12 +437,12 @@ static uint64_t hpet_ram_read(void *opaque, hwaddr addr, unsigned size) { HPETState *s = opaque; - uint64_t cur_tick, index; + uint64_t cur_tick; trace_hpet_ram_read(addr); - index = addr; + /*address range of all TN regs*/ - if (index >= 0x100 && index <= 0x3ff) { + if (addr >= 0x100 && addr <= 0x3ff) { uint8_t timer_id = (addr - 0x100) / 0x20; HPETTimer *timer = &s->timer[timer_id]; @@ -469,7 +469,7 @@ static uint64_t hpet_ram_read(void *opaque, hwaddr addr, break; } } else { - switch (index) { + switch (addr) { case HPET_ID: return s->capability; case HPET_PERIOD: @@ -510,15 +510,14 @@ static void hpet_ram_write(void *opaque, hwaddr addr, { int i; HPETState *s = opaque; - uint64_t old_val, new_val, val, index; + uint64_t old_val, new_val, val; trace_hpet_ram_write(addr, value); - index = addr; old_val = hpet_ram_read(opaque, addr, 4); new_val = value; /*address range of all TN regs*/ - if (index >= 0x100 && index <= 0x3ff) { + if (addr >= 0x100 && addr <= 0x3ff) { uint8_t timer_id = (addr - 0x100) / 0x20; HPETTimer *timer = &s->timer[timer_id]; @@ -620,7 +619,7 @@ static void hpet_ram_write(void *opaque, hwaddr addr, } return; } else { - switch (index) { + switch (addr) { case HPET_ID: return; case HPET_CFG: From patchwork Mon Jul 22 12:05:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13738804 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91218C3DA59 for ; Mon, 22 Jul 2024 12:07:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sVrny-0000LJ-QC; Mon, 22 Jul 2024 08:06:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrnj-0007hU-Np for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:06:00 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrng-0007v6-8i for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:05:59 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1721649955; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SH5zwolTSCtrBQQLhcJsS5itYtwTMNlK41Ys5KgMIiY=; b=b3cj+rgx9wUcA2ef32h38nK0ZUkTjzLBEtn0F0f3ZkxiYWs3ihKUy1luTmyvRVVOlsf3+h 4012hsOsi7faB7Vn6mjFB3M4pBYMquvUBxrNmyaNnwxIP0GOLBnzjDh2kAdTq5X+fdVizK RIEzh/ui7sfQiO7Fk7WjSMM/S3HJXu4= Received: from mail-ej1-f70.google.com (mail-ej1-f70.google.com [209.85.218.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-138-o99HMqfeMZm0XJrUdc83Mw-1; Mon, 22 Jul 2024 08:05:54 -0400 X-MC-Unique: o99HMqfeMZm0XJrUdc83Mw-1 Received: by mail-ej1-f70.google.com with SMTP id a640c23a62f3a-a77e024eaa4so357554666b.0 for ; Mon, 22 Jul 2024 05:05:53 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721649952; x=1722254752; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SH5zwolTSCtrBQQLhcJsS5itYtwTMNlK41Ys5KgMIiY=; b=fGde4rO/9Xin9j8fx7JM0RJHfU/JjgTY6+6c4qf0bDWJ6Vf2GMhce24Fods5LBo+CL GsloUl9ArH05dFoMb3iRes+yZ8UMVsGvpexf9mEq2HYICqMeIHuue2/XpRyzQllC9a0k aqBubtEgdXVpXMxp+sZjEW4HtG1wIzr+pMvyCM1dF0+3vwRKCewjtAv9kfwMxvsAxxQW hWcgrsBYpe/yBumZE9saBKha1K65qM7x27cgSFsmoIoJCmD7YDk7tLuxFdP+FfT/GDr+ 9qwSzOp6OL/xpIGmMA9Jyw6/DUgHUSnh/xXiPLDZyCJJA7KIlllrA96KR0u2Jz4CSQ5e ipKA== X-Gm-Message-State: AOJu0YzRKgEjzxB9QKJaAUr45LUSftNUgX34aarxOlJSP0c3UFw6Dxlt 4v4iwYyu298kdh4jB5p/fFaGdnqYvm1A8QIgw1WzZMjq4APSP4l3WXzQYVKtj2MYLdZR4KnmiTG MbSc6Lh21bmnChPXtHVdbZW8s1xlKlgvKoDUCn6ETDb2poP6F9QaZ14CoLRZLwtt020/TvLH6YQ 14fjxJyPv7CVpQKtj1Nff59uOaq95pM51Y3Sq6 X-Received: by 2002:a17:907:2d94:b0:a72:84c9:cedc with SMTP id a640c23a62f3a-a7a01115d81mr1346834366b.8.1721649952491; Mon, 22 Jul 2024 05:05:52 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHVepP+xxO5pGcHlPO+wKcXAjNJ4FPyvbSy3siSoBPH/qkVtasWjrzo0eqA/o1biA4AQ2t1vQ== X-Received: by 2002:a17:907:2d94:b0:a72:84c9:cedc with SMTP id a640c23a62f3a-a7a01115d81mr1346833166b.8.1721649952009; Mon, 22 Jul 2024 05:05:52 -0700 (PDT) Received: from avogadro.local ([151.95.101.29]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7a3c91e2e8sm415014066b.156.2024.07.22.05.05.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 05:05:51 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 4/7] hpet: place read-only bits directly in "new_val" Date: Mon, 22 Jul 2024 14:05:38 +0200 Message-ID: <20240722120541.70790-5-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240722120541.70790-1-pbonzini@redhat.com> References: <20240722120541.70790-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.133, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The variable "val" is used for two different purposes. As an intermediate value when writing configuration registers, and to store the cleared bits when writing ISR. Use "new_val" for the former, and rename the variable so that it is clearer for the latter case. Signed-off-by: Paolo Bonzini --- hw/timer/hpet.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 380e272fbeb..831e5a95b09 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -510,7 +510,7 @@ static void hpet_ram_write(void *opaque, hwaddr addr, { int i; HPETState *s = opaque; - uint64_t old_val, new_val, val; + uint64_t old_val, new_val, cleared; trace_hpet_ram_write(addr, value); old_val = hpet_ram_read(opaque, addr, 4); @@ -536,13 +536,12 @@ static void hpet_ram_write(void *opaque, hwaddr addr, */ update_irq(timer, 0); } - val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK); - timer->config = (timer->config & 0xffffffff00000000ULL) | val; + new_val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK); + timer->config = (timer->config & 0xffffffff00000000ULL) | new_val; if (activating_bit(old_val, new_val, HPET_TN_ENABLE) && (s->isr & (1 << timer_id))) { update_irq(timer, 1); } - if (new_val & HPET_TN_32BIT) { timer->cmp = (uint32_t)timer->cmp; timer->period = (uint32_t)timer->period; @@ -623,8 +622,8 @@ static void hpet_ram_write(void *opaque, hwaddr addr, case HPET_ID: return; case HPET_CFG: - val = hpet_fixup_reg(new_val, old_val, HPET_CFG_WRITE_MASK); - s->config = (s->config & 0xffffffff00000000ULL) | val; + new_val = hpet_fixup_reg(new_val, old_val, HPET_CFG_WRITE_MASK); + s->config = (s->config & 0xffffffff00000000ULL) | new_val; if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) { /* Enable main counter and interrupt generation. */ s->hpet_offset = @@ -658,9 +657,9 @@ static void hpet_ram_write(void *opaque, hwaddr addr, trace_hpet_invalid_hpet_cfg(4); break; case HPET_STATUS: - val = new_val & s->isr; + cleared = new_val & s->isr; for (i = 0; i < s->num_timers; i++) { - if (val & (1 << i)) { + if (cleared & (1 << i)) { update_irq(&s->timer[i], 0); } } From patchwork Mon Jul 22 12:05:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13738796 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 216FEC3DA59 for ; Mon, 22 Jul 2024 12:06:50 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sVrnz-0000SO-Ka; Mon, 22 Jul 2024 08:06:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrnp-0008Ak-Sr for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:06:07 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrnl-0007vd-5v for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:06:03 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1721649959; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/9Fji9Ivp6/jtBZXZ8/sCNqAbb9UXPEOh7/iIjbW6HM=; b=C2v58XCxNIXw7VFXC9XZe+fpJDsPhRtBPKt/k2iWsMSYRAzisDNvysJTSUC5IeQzyP5Ayz G9JLPz43sRw4Sx9BEYqbW+BRGZqThJmr4uk940PFhmIadIH5qk++kbqrV37rUaJUBky0qD tTFMDZlnzIB7E/r1Lzquwa3bVQ9m6bM= Received: from mail-lf1-f69.google.com (mail-lf1-f69.google.com [209.85.167.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-245-VsmeqFCQOqys_4dVWDIEiQ-1; Mon, 22 Jul 2024 08:05:57 -0400 X-MC-Unique: VsmeqFCQOqys_4dVWDIEiQ-1 Received: by mail-lf1-f69.google.com with SMTP id 2adb3069b0e04-52ebdb0ef28so4846665e87.0 for ; Mon, 22 Jul 2024 05:05:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721649955; x=1722254755; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/9Fji9Ivp6/jtBZXZ8/sCNqAbb9UXPEOh7/iIjbW6HM=; b=Nbm5EZ6RBTOs1anDY8JLEmJv0otgufOmXOusY7XhTgoKnBPWk+cmtbnw0sQxjRi0aS YFUQptDbCEWZxOy61R4TW5aNJGNzBwsbsuNSPxLWBhYuxfhNldHQhhXbcLj6hWun3nJX s5d0F978iHJmrmqNXO+be6uw502qPiadbXL32AGoPUL+HIslp1jT7QlXZLl7tqpqqQQX Lf1O8Zcnb+CNA5joI38ReHk2gf8Ak7EjKkiRGCHImrk/utO7IchukQbNZxvpovclDHoc Fxa9KQ1Z90ScEEckPXHuQ6Que+Z46RFdS+vDB1jn6RCm3Cj6a1/TsCVsnvEQckHLOhu8 JLtQ== X-Gm-Message-State: AOJu0YzzBUoaecTzyGiHG3hKkzL7Z5YVrHGtsJY72O/7z62GJfPAzMKt 1XR+nPaY0yBtA3TdtbyzwO9FYxWxMSYaja4h0VbTmWu9i5Z5M80w6G3ITfi20Rft+xZuTcvmTWq bRJAW78E//lOM4/KSwcyftm68rZOKJdHKlgOTBc4O/NsXcjTSERf3fmzpFXK3mskn3O7LJ1nxTV 1o5szpHRxca+oXRASGLAeO8J/Qk5N0CbxswiN3 X-Received: by 2002:a05:6512:3b82:b0:52c:df77:6507 with SMTP id 2adb3069b0e04-52efb791e9cmr5057074e87.37.1721649955046; Mon, 22 Jul 2024 05:05:55 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFaRa8ZPK2DDNMjbnfZQFg2WdV2kMfJ2emnEir8QQZf/cyGJfMVu42ohmzHQBDxxjderS1bqw== X-Received: by 2002:a05:6512:3b82:b0:52c:df77:6507 with SMTP id 2adb3069b0e04-52efb791e9cmr5057042e87.37.1721649954490; Mon, 22 Jul 2024 05:05:54 -0700 (PDT) Received: from avogadro.local ([151.95.101.29]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7a3c8be70csm415101966b.125.2024.07.22.05.05.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 05:05:54 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 5/7] hpet: accept 64-bit reads and writes Date: Mon, 22 Jul 2024 14:05:39 +0200 Message-ID: <20240722120541.70790-6-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240722120541.70790-1-pbonzini@redhat.com> References: <20240722120541.70790-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.133, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Declare the MemoryRegionOps so that 64-bit reads and writes to the HPET are received directly. This makes it possible to unify the code to process low and high parts: for 32-bit reads, extract the desired word; for 32-bit writes, just merge the desired part into the old value and proceed as with a 64-bit write. Signed-off-by: Paolo Bonzini --- hw/timer/hpet.c | 137 +++++++++++++----------------------------- hw/timer/trace-events | 3 +- 2 files changed, 44 insertions(+), 96 deletions(-) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 831e5a95b09..ac55dd1ebd6 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -437,6 +437,7 @@ static uint64_t hpet_ram_read(void *opaque, hwaddr addr, unsigned size) { HPETState *s = opaque; + int shift = (addr & 4) * 8; uint64_t cur_tick; trace_hpet_ram_read(addr); @@ -451,52 +452,33 @@ static uint64_t hpet_ram_read(void *opaque, hwaddr addr, return 0; } - switch ((addr - 0x100) % 0x20) { - case HPET_TN_CFG: - return timer->config; - case HPET_TN_CFG + 4: // Interrupt capabilities - return timer->config >> 32; + switch (addr & 0x18) { + case HPET_TN_CFG: // including interrupt capabilities + return timer->config >> shift; case HPET_TN_CMP: // comparator register - return timer->cmp; - case HPET_TN_CMP + 4: - return timer->cmp >> 32; + return timer->cmp >> shift; case HPET_TN_ROUTE: - return timer->fsb; - case HPET_TN_ROUTE + 4: - return timer->fsb >> 32; + return timer->fsb >> shift; default: trace_hpet_ram_read_invalid(); break; } } else { - switch (addr) { - case HPET_ID: - return s->capability; - case HPET_PERIOD: - return s->capability >> 32; + switch (addr & ~4) { + case HPET_ID: // including HPET_PERIOD + return s->capability >> shift; case HPET_CFG: - return s->config; - case HPET_CFG + 4: - trace_hpet_invalid_hpet_cfg(4); - return 0; + return s->config >> shift; case HPET_COUNTER: if (hpet_enabled(s)) { cur_tick = hpet_get_ticks(s); } else { cur_tick = s->hpet_counter; } - trace_hpet_ram_read_reading_counter(0, cur_tick); - return cur_tick; - case HPET_COUNTER + 4: - if (hpet_enabled(s)) { - cur_tick = hpet_get_ticks(s); - } else { - cur_tick = s->hpet_counter; - } - trace_hpet_ram_read_reading_counter(4, cur_tick); - return cur_tick >> 32; + trace_hpet_ram_read_reading_counter(addr & 4, cur_tick); + return cur_tick >> shift; case HPET_STATUS: - return s->isr; + return s->isr >> shift; default: trace_hpet_ram_read_invalid(); break; @@ -510,11 +492,11 @@ static void hpet_ram_write(void *opaque, hwaddr addr, { int i; HPETState *s = opaque; + int shift = (addr & 4) * 8; + int len = MIN(size * 8, 64 - shift); uint64_t old_val, new_val, cleared; trace_hpet_ram_write(addr, value); - old_val = hpet_ram_read(opaque, addr, 4); - new_val = value; /*address range of all TN regs*/ if (addr >= 0x100 && addr <= 0x3ff) { @@ -526,9 +508,12 @@ static void hpet_ram_write(void *opaque, hwaddr addr, trace_hpet_timer_id_out_of_range(timer_id); return; } - switch ((addr - 0x100) % 0x20) { + switch (addr & 0x18) { case HPET_TN_CFG: - trace_hpet_ram_write_tn_cfg(); + trace_hpet_ram_write_tn_cfg(addr & 4); + old_val = timer->config; + new_val = deposit64(old_val, shift, len, value); + new_val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK); if (deactivating_bit(old_val, new_val, HPET_TN_TYPE_LEVEL)) { /* * Do this before changing timer->config; otherwise, if @@ -536,8 +521,7 @@ static void hpet_ram_write(void *opaque, hwaddr addr, */ update_irq(timer, 0); } - new_val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK); - timer->config = (timer->config & 0xffffffff00000000ULL) | new_val; + timer->config = new_val; if (activating_bit(old_val, new_val, HPET_TN_ENABLE) && (s->isr & (1 << timer_id))) { update_irq(timer, 1); @@ -550,56 +534,28 @@ static void hpet_ram_write(void *opaque, hwaddr addr, hpet_set_timer(timer); } break; - case HPET_TN_CFG + 4: // Interrupt capabilities - trace_hpet_ram_write_invalid_tn_cfg(4); - break; case HPET_TN_CMP: // comparator register - trace_hpet_ram_write_tn_cmp(0); if (timer->config & HPET_TN_32BIT) { - new_val = (uint32_t)new_val; - } - if (!timer_is_periodic(timer) - || (timer->config & HPET_TN_SETVAL)) { - timer->cmp = (timer->cmp & 0xffffffff00000000ULL) | new_val; - } - if (timer_is_periodic(timer)) { - /* - * FIXME: Clamp period to reasonable min value? - * Clamp period to reasonable max value - */ - if (timer->config & HPET_TN_32BIT) { - new_val = MIN(new_val, ~0u >> 1); + /* High 32-bits are zero, leave them untouched. */ + if (shift) { + trace_hpet_ram_write_invalid_tn_cmp(); + break; } - timer->period = - (timer->period & 0xffffffff00000000ULL) | new_val; + len = 64; + value = (uint32_t) value; } - /* - * FIXME: on a 64-bit write, HPET_TN_SETVAL should apply to the - * high bits part as well. - */ - timer->config &= ~HPET_TN_SETVAL; - if (hpet_enabled(s)) { - hpet_set_timer(timer); - } - break; - case HPET_TN_CMP + 4: // comparator register high order - if (timer->config & HPET_TN_32BIT) { - trace_hpet_ram_write_invalid_tn_cmp(); - break; - } - trace_hpet_ram_write_tn_cmp(4); + trace_hpet_ram_write_tn_cmp(addr & 4); if (!timer_is_periodic(timer) || (timer->config & HPET_TN_SETVAL)) { - timer->cmp = (timer->cmp & 0xffffffffULL) | new_val << 32; + timer->cmp = deposit64(timer->cmp, shift, len, value); } if (timer_is_periodic(timer)) { /* * FIXME: Clamp period to reasonable min value? * Clamp period to reasonable max value */ - new_val = MIN(new_val, ~0u >> 1); - timer->period = - (timer->period & 0xffffffffULL) | new_val << 32; + new_val = deposit64(timer->period, shift, len, value); + timer->period = MIN(new_val, (timer->config & HPET_TN_32BIT ? ~0u : ~0ull) >> 1); } timer->config &= ~HPET_TN_SETVAL; if (hpet_enabled(s)) { @@ -607,10 +563,7 @@ static void hpet_ram_write(void *opaque, hwaddr addr, } break; case HPET_TN_ROUTE: - timer->fsb = (timer->fsb & 0xffffffff00000000ULL) | new_val; - break; - case HPET_TN_ROUTE + 4: - timer->fsb = (new_val << 32) | (timer->fsb & 0xffffffff); + timer->fsb = deposit64(timer->fsb, shift, len, value); break; default: trace_hpet_ram_write_invalid(); @@ -618,12 +571,14 @@ static void hpet_ram_write(void *opaque, hwaddr addr, } return; } else { - switch (addr) { + switch (addr & ~4) { case HPET_ID: return; case HPET_CFG: + old_val = s->config; + new_val = deposit64(old_val, shift, len, value); new_val = hpet_fixup_reg(new_val, old_val, HPET_CFG_WRITE_MASK); - s->config = (s->config & 0xffffffff00000000ULL) | new_val; + s->config = new_val; if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) { /* Enable main counter and interrupt generation. */ s->hpet_offset = @@ -653,10 +608,8 @@ static void hpet_ram_write(void *opaque, hwaddr addr, qemu_set_irq(s->irqs[RTC_ISA_IRQ], s->rtc_irq_level); } break; - case HPET_CFG + 4: - trace_hpet_invalid_hpet_cfg(4); - break; case HPET_STATUS: + new_val = value << shift; cleared = new_val & s->isr; for (i = 0; i < s->num_timers; i++) { if (cleared & (1 << i)) { @@ -668,15 +621,7 @@ static void hpet_ram_write(void *opaque, hwaddr addr, if (hpet_enabled(s)) { trace_hpet_ram_write_counter_write_while_enabled(); } - s->hpet_counter = - (s->hpet_counter & 0xffffffff00000000ULL) | value; - trace_hpet_ram_write_counter_written(0, value, s->hpet_counter); - break; - case HPET_COUNTER + 4: - trace_hpet_ram_write_counter_write_while_enabled(); - s->hpet_counter = - (s->hpet_counter & 0xffffffffULL) | (((uint64_t)value) << 32); - trace_hpet_ram_write_counter_written(4, value, s->hpet_counter); + s->hpet_counter = deposit64(s->hpet_counter, shift, len, value); break; default: trace_hpet_ram_write_invalid(); @@ -690,7 +635,11 @@ static const MemoryRegionOps hpet_ram_ops = { .write = hpet_ram_write, .valid = { .min_access_size = 4, - .max_access_size = 4, + .max_access_size = 8, + }, + .impl = { + .min_access_size = 4, + .max_access_size = 8, }, .endianness = DEVICE_NATIVE_ENDIAN, }; diff --git a/hw/timer/trace-events b/hw/timer/trace-events index a5fafbc6796..f48a712801e 100644 --- a/hw/timer/trace-events +++ b/hw/timer/trace-events @@ -108,8 +108,7 @@ hpet_ram_read_reading_counter(uint8_t reg_off, uint64_t cur_tick) "reading count hpet_ram_read_invalid(void) "invalid hpet_ram_readl" hpet_ram_write(uint64_t addr, uint64_t value) "enter hpet_ram_writel at 0x%" PRIx64 " = 0x%" PRIx64 hpet_ram_write_timer_id(uint64_t timer_id) "hpet_ram_writel timer_id = 0x%" PRIx64 -hpet_ram_write_tn_cfg(void) "hpet_ram_writel HPET_TN_CFG" -hpet_ram_write_invalid_tn_cfg(uint8_t reg_off) "invalid HPET_TN_CFG + %" PRIu8 " write" +hpet_ram_write_tn_cfg(uint8_t reg_off) "hpet_ram_writel HPET_TN_CFG + %" PRIu8 hpet_ram_write_tn_cmp(uint8_t reg_off) "hpet_ram_writel HPET_TN_CMP + %" PRIu8 hpet_ram_write_invalid_tn_cmp(void) "invalid HPET_TN_CMP + 4 write" hpet_ram_write_invalid(void) "invalid hpet_ram_writel" From patchwork Mon Jul 22 12:05:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13738797 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8EA4CC3DA59 for ; Mon, 22 Jul 2024 12:07:13 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sVrnz-0000SK-Ke; Mon, 22 Jul 2024 08:06:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrnp-0008Ag-SJ for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:06:07 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrnl-0007vn-Px for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:06:03 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1721649960; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HJdZwCWA36rJai5fAzKET5M9D8dSbh2TfkiP88YY4YQ=; b=AkEU8VwAulbjkKbllz8NSfWF8x3W8CDhZ42iTQbVk0QYdywLRGM/SUEIPiC9n0PBO/3ymM Y2gcAQBscpwJgt17ZTZ1rzRZk9F+8BMss7HOZyuNJiiL+eyyASR9yOR5Qf0E7ceeSEm3t0 FzTNtGVVSytSpKapH2kcpR7rdhDsqaM= Received: from mail-ed1-f72.google.com (mail-ed1-f72.google.com [209.85.208.72]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-68-RYs2mCcKPkqM7WAQLY-ISg-1; Mon, 22 Jul 2024 08:05:59 -0400 X-MC-Unique: RYs2mCcKPkqM7WAQLY-ISg-1 Received: by mail-ed1-f72.google.com with SMTP id 4fb4d7f45d1cf-5a74845546bso833650a12.2 for ; Mon, 22 Jul 2024 05:05:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721649957; x=1722254757; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HJdZwCWA36rJai5fAzKET5M9D8dSbh2TfkiP88YY4YQ=; b=hEaygKFmWxvJZmtWbdM0pie1kf5ZHb1763W73PjoR0DkG4cgO1roGTtzpuYZvBtvX6 LW9laM9TOC02QiJ1Q4YLWPLpWiVG9qnwru2CkwUdX9vcdmWrO8fS0zYKMZLXWVze701h omn1zDl9X3X/0+FvWv2Mh/XSYvYL/K03ewr8UKZAvotTplGxsExuHqshYtu+SI1kkPVF 0scjZM/W5LzKGRjaAFoL6AOt48+hTCfiaYIq3Bv5GMw1O3HHKvEpflAEPwKDx1G+EyL+ E7PSQTQyuqYhazvZlvf9vlsgwCXrl00bMIQ5EWhTPBWwUAKiiNgUbFlSTTz0oc6N6373 a2Rw== X-Gm-Message-State: AOJu0YyaK5ifwKKp8q0YUN9g4wKBxJ5XnpXUrXoe2PpoP3sbw0ue74cb IevoEHWVHKHRnD1aoGZ+5C5fGPtArPnX1GGAZE1n0ZzFqr3MMmx2L0LYk1D3PDI3kmkNrM+SRiO So+JTUvyGsI3222WW4dDpae/aIwHxtmvBGjs3mvgSIvYAZd0ArFmorPb160VDXwxeE29367aVfn 8iysOwLByKVm2DIvSKU2tIC8RZBB8f8R7p8aht X-Received: by 2002:a05:6402:2809:b0:58c:804a:6ee2 with SMTP id 4fb4d7f45d1cf-5a4786822d1mr5482263a12.20.1721649957606; Mon, 22 Jul 2024 05:05:57 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGjwg/3jMJbl5UvUAai6tXajIZukHTRkAX/+1yr4OzDwu0u7EuqBwIiwEHwLRRKIMmoRFlBog== X-Received: by 2002:a05:6402:2809:b0:58c:804a:6ee2 with SMTP id 4fb4d7f45d1cf-5a4786822d1mr5482236a12.20.1721649957043; Mon, 22 Jul 2024 05:05:57 -0700 (PDT) Received: from avogadro.local ([151.95.101.29]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5a307af8d82sm6066916a12.0.2024.07.22.05.05.56 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 05:05:56 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 6/7] hpet: store full 64-bit target value of the counter Date: Mon, 22 Jul 2024 14:05:40 +0200 Message-ID: <20240722120541.70790-7-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240722120541.70790-1-pbonzini@redhat.com> References: <20240722120541.70790-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.133, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Store the full 64-bit value at which the timer should fire. This makes it possible to skip the imprecise hpet_calculate_diff() step, and to remove the clamping of the period to 31 or 63 bits. Signed-off-by: Paolo Bonzini --- hw/timer/hpet.c | 111 +++++++++++++++++++++--------------------------- 1 file changed, 49 insertions(+), 62 deletions(-) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index ac55dd1ebd6..1654b7cb8b8 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -54,6 +54,7 @@ typedef struct HPETTimer { /* timers */ uint64_t cmp; /* comparator */ uint64_t fsb; /* FSB route */ /* Hidden register state */ + uint64_t cmp64; /* comparator (extended to counter width) */ uint64_t period; /* Last value written to comparator */ uint8_t wrap_flag; /* timer pop will indicate wrap for one-shot 32-bit * mode. Next pop will be actual timer expiration. @@ -115,11 +116,6 @@ static uint32_t timer_enabled(HPETTimer *t) } static uint32_t hpet_time_after(uint64_t a, uint64_t b) -{ - return ((int32_t)(b - a) < 0); -} - -static uint32_t hpet_time_after64(uint64_t a, uint64_t b) { return ((int64_t)(b - a) < 0); } @@ -156,29 +152,34 @@ static uint64_t hpet_get_ticks(HPETState *s) return ns_to_ticks(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->hpet_offset); } -/* - * calculate diff between comparator value and current ticks - */ -static inline uint64_t hpet_calculate_diff(HPETTimer *t, uint64_t current) +static uint64_t hpet_get_ns(HPETState *s, uint64_t tick) { + return ticks_to_ns(tick) - s->hpet_offset; +} +/* + * calculate next value of the general counter that matches the + * target (either entirely, or the low 32-bit only depending on + * the timer mode). + */ +static uint64_t hpet_calculate_cmp64(HPETTimer *t, uint64_t cur_tick, uint64_t target) +{ if (t->config & HPET_TN_32BIT) { - uint32_t diff, cmp; - - cmp = (uint32_t)t->cmp; - diff = cmp - (uint32_t)current; - diff = (int32_t)diff > 0 ? diff : (uint32_t)1; - return (uint64_t)diff; + uint64_t result = deposit64(cur_tick, 0, 32, target); + if (result < cur_tick) { + result += 0x100000000ULL; + } + return result; } else { - uint64_t diff, cmp; - - cmp = t->cmp; - diff = cmp - current; - diff = (int64_t)diff > 0 ? diff : (uint64_t)1; - return diff; + return target; } } +static uint64_t hpet_next_wrap(uint64_t cur_tick) +{ + return (cur_tick | 0xffffffffU) + 1; +} + static void update_irq(struct HPETTimer *timer, int set) { uint64_t mask; @@ -260,7 +261,12 @@ static bool hpet_validate_num_timers(void *opaque, int version_id) static int hpet_post_load(void *opaque, int version_id) { HPETState *s = opaque; + int i; + for (i = 0; i < s->num_timers; i++) { + HPETTimer *t = &s->timer[i]; + t->cmp64 = hpet_calculate_cmp64(t, s->hpet_counter, t->cmp); + } /* Recalculate the offset between the main counter and guest time */ if (!s->hpet_offset_saved) { s->hpet_offset = ticks_to_ns(s->hpet_counter) @@ -356,14 +362,10 @@ static const VMStateDescription vmstate_hpet = { } }; -static void hpet_arm(HPETTimer *t, uint64_t ticks) +static void hpet_arm(HPETTimer *t, uint64_t tick) { - if (ticks < ns_to_ticks(INT64_MAX / 2)) { - timer_mod(t->qemu_timer, - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + ticks_to_ns(ticks)); - } else { - timer_del(t->qemu_timer); - } + /* FIXME: Clamp period to reasonable min value? */ + timer_mod(t->qemu_timer, hpet_get_ns(t->state, tick)); } /* @@ -372,54 +374,44 @@ static void hpet_arm(HPETTimer *t, uint64_t ticks) static void hpet_timer(void *opaque) { HPETTimer *t = opaque; - uint64_t diff; - uint64_t period = t->period; uint64_t cur_tick = hpet_get_ticks(t->state); if (timer_is_periodic(t) && period != 0) { + while (hpet_time_after(cur_tick, t->cmp64)) { + t->cmp64 += period; + } if (t->config & HPET_TN_32BIT) { - while (hpet_time_after(cur_tick, t->cmp)) { - t->cmp = (uint32_t)(t->cmp + t->period); - } + t->cmp = (uint32_t)t->cmp64; } else { - while (hpet_time_after64(cur_tick, t->cmp)) { - t->cmp += period; - } - } - diff = hpet_calculate_diff(t, cur_tick); - hpet_arm(t, diff); - } else if (t->config & HPET_TN_32BIT && !timer_is_periodic(t)) { - if (t->wrap_flag) { - diff = hpet_calculate_diff(t, cur_tick); - hpet_arm(t, diff); - t->wrap_flag = 0; + t->cmp = t->cmp64; } + hpet_arm(t, t->cmp64); + } else if (t->wrap_flag) { + t->wrap_flag = 0; + hpet_arm(t, t->cmp64); } update_irq(t, 1); } static void hpet_set_timer(HPETTimer *t) { - uint64_t diff; - uint32_t wrap_diff; /* how many ticks until we wrap? */ uint64_t cur_tick = hpet_get_ticks(t->state); - /* whenever new timer is being set up, make sure wrap_flag is 0 */ t->wrap_flag = 0; - diff = hpet_calculate_diff(t, cur_tick); + t->cmp64 = hpet_calculate_cmp64(t, cur_tick, t->cmp); + if (t->config & HPET_TN_32BIT) { - /* hpet spec says in one-shot 32-bit mode, generate an interrupt when - * counter wraps in addition to an interrupt with comparator match. - */ - if (t->config & HPET_TN_32BIT && !timer_is_periodic(t)) { - wrap_diff = 0xffffffff - (uint32_t)cur_tick; - if (wrap_diff < (uint32_t)diff) { - diff = wrap_diff; + /* hpet spec says in one-shot 32-bit mode, generate an interrupt when + * counter wraps in addition to an interrupt with comparator match. + */ + if (!timer_is_periodic(t) && t->cmp64 > hpet_next_wrap(cur_tick)) { t->wrap_flag = 1; + hpet_arm(t, hpet_next_wrap(cur_tick)); + return; } } - hpet_arm(t, diff); + hpet_arm(t, t->cmp64); } static void hpet_del_timer(HPETTimer *t) @@ -550,12 +542,7 @@ static void hpet_ram_write(void *opaque, hwaddr addr, timer->cmp = deposit64(timer->cmp, shift, len, value); } if (timer_is_periodic(timer)) { - /* - * FIXME: Clamp period to reasonable min value? - * Clamp period to reasonable max value - */ - new_val = deposit64(timer->period, shift, len, value); - timer->period = MIN(new_val, (timer->config & HPET_TN_32BIT ? ~0u : ~0ull) >> 1); + timer->period = deposit64(timer->period, shift, len, value); } timer->config &= ~HPET_TN_SETVAL; if (hpet_enabled(s)) { From patchwork Mon Jul 22 12:05:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paolo Bonzini X-Patchwork-Id: 13738800 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 80E7CC3DA59 for ; Mon, 22 Jul 2024 12:07:40 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sVro0-0000VA-9l; Mon, 22 Jul 2024 08:06:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrnr-0008HA-Jy for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:06:07 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sVrno-0007w3-9w for qemu-devel@nongnu.org; Mon, 22 Jul 2024 08:06:06 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1721649963; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tClUS2s/M0YyRZbl85m11Cv3d2+aU9p8IaBUrdhpDqA=; b=d00ZvyTHrbRAsl1PRiWDFtlTiP8EBSV+Ko+9L7UsldeWOtbiPA3TGbXmKKm56VILRquItP g7Em09edJgWTTOroqIbtOfrFP2UB9IvnvPxNnHBFx4A0sMYkAtyNVcydHt66nMbfDPMfMk 1ZTZr5XB261B1P/CSt6mcdBN/tyoOJ8= Received: from mail-ej1-f70.google.com (mail-ej1-f70.google.com [209.85.218.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-15-SSc8k4EJMQO6zM22Gl4XwQ-1; Mon, 22 Jul 2024 08:06:01 -0400 X-MC-Unique: SSc8k4EJMQO6zM22Gl4XwQ-1 Received: by mail-ej1-f70.google.com with SMTP id a640c23a62f3a-a77df0dc240so347886766b.3 for ; Mon, 22 Jul 2024 05:06:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721649960; x=1722254760; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tClUS2s/M0YyRZbl85m11Cv3d2+aU9p8IaBUrdhpDqA=; b=wWd65Z4bNSK/oNyxjCKSSwb0m3vih1bGCXEaw/+PSmVVswEbDsNWM9uiLy+ohgDVZ7 blk4YW3E1of1KXm8L5dXAN/vY4BWjlX/CojzBR/bFl+tpFcyMur/2uzimYiLQ+Z+Xf/f FTDKFG3OR80ctzljdVHw94VMb/pls7VGl2FSSZPHK4g8PemiZ7jf7fRwTPoSeQyHKpD3 BXXCbzOYz5QmAgCVpeay/YhJrufCXWcA47Gc8nBQufeND9LJRsrjvjiQhbhUrN2nZ7Vo s8EX+BQSpwXENa11W+PB186cfOUHnA8OXWpkKwN5Tqt2wl9XNIDfB/CYdpPSzZj7L5h7 6okg== X-Gm-Message-State: AOJu0Yxxkq+GBiCatsxxGvxfsWkxpvRV+lg0ioFtVmSKj0T6ZS/Ry7bb iQqaySRD3NvqxLkYQvXUgC/DZN4GZGCSxSCFxGEvEGuUREUbADRlnpxuIlH1mtwofpZLrVIL8VH BLFHOd5lYBkKAXip/7NXAhhexr7s2t5C6Y+ZEHFGMg3c7gvB6oo8Nbhxc7BC1016lJbp03ORVGB zYbwiXoqVsvNVRjVtPEG7w4z58Zl5vwfEj5+QK X-Received: by 2002:a17:907:944b:b0:a77:d0a0:ea74 with SMTP id a640c23a62f3a-a7a4bfa4f77mr438361466b.3.1721649960154; Mon, 22 Jul 2024 05:06:00 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHoi/zm0pSQtqSuvPv3mMzgrC2a/0wb5qN0c+vcSDZdCPIPcvGvxGg0SVbFUVc0slbqB3WUxQ== X-Received: by 2002:a17:907:944b:b0:a77:d0a0:ea74 with SMTP id a640c23a62f3a-a7a4bfa4f77mr438359566b.3.1721649959811; Mon, 22 Jul 2024 05:05:59 -0700 (PDT) Received: from avogadro.local ([151.95.101.29]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7a3c92308dsm419969166b.170.2024.07.22.05.05.58 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Jul 2024 05:05:59 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 7/7] hpet: avoid timer storms on periodic timers Date: Mon, 22 Jul 2024 14:05:41 +0200 Message-ID: <20240722120541.70790-8-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240722120541.70790-1-pbonzini@redhat.com> References: <20240722120541.70790-1-pbonzini@redhat.com> MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.133, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org If the period is set to a value that is too low, there could be no time left to run the rest of QEMU. Do not trigger interrupts faster than 1 MHz. Signed-off-by: Paolo Bonzini --- hw/timer/hpet.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c index 1654b7cb8b8..471950adef1 100644 --- a/hw/timer/hpet.c +++ b/hw/timer/hpet.c @@ -59,6 +59,7 @@ typedef struct HPETTimer { /* timers */ uint8_t wrap_flag; /* timer pop will indicate wrap for one-shot 32-bit * mode. Next pop will be actual timer expiration. */ + uint64_t last; /* last value armed, to avoid timer storms */ } HPETTimer; struct HPETState { @@ -266,6 +267,7 @@ static int hpet_post_load(void *opaque, int version_id) for (i = 0; i < s->num_timers; i++) { HPETTimer *t = &s->timer[i]; t->cmp64 = hpet_calculate_cmp64(t, s->hpet_counter, t->cmp); + t->last = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - NANOSECONDS_PER_SECOND; } /* Recalculate the offset between the main counter and guest time */ if (!s->hpet_offset_saved) { @@ -364,8 +366,15 @@ static const VMStateDescription vmstate_hpet = { static void hpet_arm(HPETTimer *t, uint64_t tick) { - /* FIXME: Clamp period to reasonable min value? */ - timer_mod(t->qemu_timer, hpet_get_ns(t->state, tick)); + uint64_t ns = hpet_get_ns(t->state, tick); + + /* Clamp period to reasonable min value (1 us) */ + if (timer_is_periodic(t) && ns - t->last < 1000) { + ns = t->last + 1000; + } + + t->last = ns; + timer_mod(t->qemu_timer, ns); } /*