From patchwork Thu Jul 25 15:03:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kousik Sanagavarapu X-Patchwork-Id: 13742038 Received: from mail-pf1-f171.google.com (mail-pf1-f171.google.com [209.85.210.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F359219DF43; Thu, 25 Jul 2024 15:37:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721921858; cv=none; b=IB2z24gvIO9sgvIoaYIXEe9BXgedqLvfsFUxevWq+hGHbrHeal9NHFRSO9zklxeeMHjXDc/g5e8odvZc07ftEa/Qw/CoG9R0wuInWV6N5fgfWsKIONGKcoD3ur6JcKcA6LUt1QhYfsTFJOoQBuB41f0sjAM5aGQAxqjvWyOT7Ow= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721921858; c=relaxed/simple; bh=FSuF3PAXT4zQN8uB5Wd6/bf7kXarkHcV3ZrYugItyaI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MT4fwEvAnExGpf65TT+baBL039HxUO/P1HSXE86kfCa45uoNWfBolmRquB2rHin9IQBU+eLUcA/zTwwSh7q70+8mEZJatW3y+XtU0H7aw9ZUw+YewSKH6LbuGW8UlyEGj4BXX9NYnDiqedIFkOMPGpPQZylHul4RwkvG2pfKfN4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=P67Eu/mU; arc=none smtp.client-ip=209.85.210.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="P67Eu/mU" Received: by mail-pf1-f171.google.com with SMTP id d2e1a72fcca58-70d199fb3dfso891514b3a.3; Thu, 25 Jul 2024 08:37:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1721921856; x=1722526656; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XSPbC6awA+5MuLH5Ham/jLJImap7JGiCNhiiQ9tr4zU=; b=P67Eu/mUf/FXZVwbBeJaYUwUG7I8lt8A6J+0HrelldSoXEbAdN+te7eoCWPobhWTzw aaf1mt/zUkd6Znnz07MTjSlBMpFla9Eedru2cDV9RC9xKXfxjm7w45VJAPQtzsY6Tebx vORrVAjpPCw0XY9jhAo7U270MwWz1+PzlE1xc+kchxRgXXiMX2Zz8yWKGOZjWRjUPwkS D1Efx7HMcbPdfleVJKE7jUxhqCH1vsDey3SgKESkuLt4Iab2L3HwaYY3uVnG81LaXKTl rbL36I3l7k74bMNRM3b0HSMkE44ScQU44jb4wuAO1ieGbhg+yFcX/cBuDtu+s0QvVTAH lxXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1721921856; x=1722526656; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XSPbC6awA+5MuLH5Ham/jLJImap7JGiCNhiiQ9tr4zU=; b=QsNxdO9+o95cUlBEmE2zmiIDzRvTpkbU+JoSNy8C5wgy5xvCzpiwJVKAqlQVbK2swn Or5D0vTTyqKDGb6y+Db9nIDumwpK3RBbmXNpO/Kur8il6+XqS8d1331A46bwCj5PxrH4 o/SrHBMLBdOUhBH+E4sHs5I/Tq9c4KONIJUY2aTaL2iYNLzl+XUapDANQEY5t2YQdneh bqI4isuaJqpulo6E6K5+8ZgXZjF9YdozM3zJIYpd9PyKYUbLUgGzfzzY9PYrrB3uWC8n zwgIbYXwOdx/avSghfyRzKR3eTlaBgFu21zBXL1txU5NivwgZMbW99dPhzieXKrYk8+d 666g== X-Forwarded-Encrypted: i=1; AJvYcCVnjjPrb3jEG71xbvcMl27I0vvJfix9XlEbIpvuZzRhC+Hc2a8OOVSc56RZrrV6ZeqGZ42nzNf6znaOE2H/Zrsq8+4djMFQ9Jx+Ga9iwU2cEIecktiXL1CSTHqLBXxpnUOgdbeNjo0wJDRE+To= X-Gm-Message-State: AOJu0YzZhlaFwWwIrwk2kksHHCEcdl/WSriqEAqRPcz0dPA5SIOcmFkc lQpCcbbi5RBWX6FkC9uE/OxGXhFqzXsd7fViODtyJDJ60Qwe0yqa X-Google-Smtp-Source: AGHT+IHEh3D4Q5lbwKorUo7rZ7g98q+7yG488EEaoxz7a3qecqJYhmh793yvic7TFbjY0Jjng52ShQ== X-Received: by 2002:a05:6a20:a12b:b0:1c0:e9f5:f6bd with SMTP id adf61e73a8af0-1c472ce2ec2mr4678766637.41.1721921856110; Thu, 25 Jul 2024 08:37:36 -0700 (PDT) Received: from kousik.local ([2405:201:c006:380f:2afe:8fe2:1930:3917]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70ead712bf0sm1270369b3a.74.2024.07.25.08.37.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 25 Jul 2024 08:37:35 -0700 (PDT) From: Kousik Sanagavarapu To: Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-watchdog@vger.kernel.org, linux-kernel@vger.kernel.org, Kousik Sanagavarapu Subject: [PATCH v2 1/2] dt-bindings: timer: ti,davinci-timer: convert to dtschema Date: Thu, 25 Jul 2024 20:33:11 +0530 Message-ID: <20240725153711.16101-2-five231003@gmail.com> X-Mailer: git-send-email 2.45.2.827.g557ae147e6.dirty In-Reply-To: <20240725153711.16101-1-five231003@gmail.com> References: <20240725153711.16101-1-five231003@gmail.com> Precedence: bulk X-Mailing-List: linux-watchdog@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert txt binding of TI's DaVinci timer to dtschema to allow for validation. While at it, change the file name to match the compatible. Signed-off-by: Kousik Sanagavarapu Reviewed-by: Krzysztof Kozlowski --- .../bindings/timer/ti,da830-timer.yaml | 68 +++++++++++++++++++ .../bindings/timer/ti,davinci-timer.txt | 37 ---------- 2 files changed, 68 insertions(+), 37 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/ti,da830-timer.yaml delete mode 100644 Documentation/devicetree/bindings/timer/ti,davinci-timer.txt diff --git a/Documentation/devicetree/bindings/timer/ti,da830-timer.yaml b/Documentation/devicetree/bindings/timer/ti,da830-timer.yaml new file mode 100644 index 000000000000..e9646f4e86cc --- /dev/null +++ b/Documentation/devicetree/bindings/timer/ti,da830-timer.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/ti,da830-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI DaVinci Timer + +maintainers: + - Kousik Sanagavarapu + +description: | + This is a 64-bit timer found on TI's DaVinci architecture devices. The timer + can be configured as a general-purpose 64-bit timer, dual general-purpose + 32-bit timers. When configured as dual 32-bit timers, each half can operate + in conjunction (chain mode) or independently (unchained mode) of each other. + + The timer is a free running up-counter and can generate interrupts when the + counter reaches preset counter values. + +properties: + compatible: + const: ti,da830-timer + + reg: + maxItems: 1 + + interrupts: + minItems: 2 + maxItems: 10 + + interrupt-names: + minItems: 2 + items: + - const: tint12 + - const: tint34 + - const: cmpint0 + - const: cmpint1 + - const: cmpint2 + - const: cmpint3 + - const: cmpint4 + - const: cmpint5 + - const: cmpint6 + - const: cmpint7 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + +additionalProperties: false + +examples: + - | + timer@20000 { + compatible = "ti,da830-timer"; + reg = <0x20000 0x1000>; + interrupts = <21>, <22>; + interrupt-names = "tint12", "tint34"; + clocks = <&pll0_auxclk>; + }; + +... diff --git a/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt b/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt deleted file mode 100644 index 29bf91ccf5b7..000000000000 --- a/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Device tree bindings for Texas Instruments DaVinci timer - -This document provides bindings for the 64-bit timer in the DaVinci -architecture devices. The timer can be configured as a general-purpose 64-bit -timer, dual general-purpose 32-bit timers. When configured as dual 32-bit -timers, each half can operate in conjunction (chain mode) or independently -(unchained mode) of each other. - -The timer is a free running up-counter and can generate interrupts when the -counter reaches preset counter values. - -Also see ../watchdog/davinci-wdt.txt for timers that are configurable as -watchdog timers. - -Required properties: - -- compatible : should be "ti,da830-timer". -- reg : specifies base physical address and count of the registers. -- interrupts : interrupts generated by the timer. -- interrupt-names: should be "tint12", "tint34", "cmpint0", "cmpint1", - "cmpint2", "cmpint3", "cmpint4", "cmpint5", "cmpint6", - "cmpint7" ("cmpintX" may be omitted if not present in the - hardware). -- clocks : the clock feeding the timer clock. - -Example: - - clocksource: timer@20000 { - compatible = "ti,da830-timer"; - reg = <0x20000 0x1000>; - interrupts = <21>, <22>, <74>, <75>, <76>, <77>, <78>, <79>, - <80>, <81>; - interrupt-names = "tint12", "tint34", "cmpint0", "cmpint1", - "cmpint2", "cmpint3", "cmpint4", "cmpint5", - "cmpint6", "cmpint7"; - clocks = <&pll0_auxclk>; - }; From patchwork Thu Jul 25 15:03:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kousik Sanagavarapu X-Patchwork-Id: 13742039 Received: from mail-pf1-f179.google.com (mail-pf1-f179.google.com [209.85.210.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D95519D064; Thu, 25 Jul 2024 15:37:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721921865; cv=none; b=NJ2H1B4L4iKeSZ3rG0j/1MhSzhs46MXEinkTsGmJc8oIQg7EtHXIr89AX9eVs8AMPxFTH+WR2gwIlT84NadvcrCArQBVfdRyL7uJbnOQgfZyKSUprZv94c7KOZTnhWkRRkF73BozjNlvK/T/R9C40fEchaLLfaTG4WrSYXhebnE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721921865; c=relaxed/simple; bh=03tZ91A7YswpGipNDG8v4RkhR31fXoTuQYG/b0jTBkw=; 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While at it, change the order of the compatibles w.r.t. the txt binding to stay in sync with the existing DTS. Signed-off-by: Kousik Sanagavarapu --- .../bindings/watchdog/davinci-wdt.txt | 24 --------- .../bindings/watchdog/ti,davinci-wdt.yaml | 52 +++++++++++++++++++ 2 files changed, 52 insertions(+), 24 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/davinci-wdt.txt create mode 100644 Documentation/devicetree/bindings/watchdog/ti,davinci-wdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/davinci-wdt.txt b/Documentation/devicetree/bindings/watchdog/davinci-wdt.txt deleted file mode 100644 index aa10b8ec36e2..000000000000 --- a/Documentation/devicetree/bindings/watchdog/davinci-wdt.txt +++ /dev/null @@ -1,24 +0,0 @@ -Texas Instruments DaVinci/Keystone Watchdog Timer (WDT) Controller - -Required properties: -- compatible : Should be "ti,davinci-wdt", "ti,keystone-wdt" -- reg : Should contain WDT registers location and length - -Optional properties: -- timeout-sec : Contains the watchdog timeout in seconds -- clocks : the clock feeding the watchdog timer. - Needed if platform uses clocks. - See clock-bindings.txt - -Documentation: -Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf -Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf - -Examples: - -wdt: wdt@2320000 { - compatible = "ti,davinci-wdt"; - reg = <0x02320000 0x80>; - timeout-sec = <30>; - clocks = <&clkwdtimer0>; -}; diff --git a/Documentation/devicetree/bindings/watchdog/ti,davinci-wdt.yaml b/Documentation/devicetree/bindings/watchdog/ti,davinci-wdt.yaml new file mode 100644 index 000000000000..f1413e7370a1 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/ti,davinci-wdt.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/ti,davinci-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI DaVinci/Keystone Watchdog Timer Controller + +maintainers: + - Kousik Sanagavarapu + +description: | + TI's Watchdog Timer Controller for DaVinci and Keystone Processors. + + Datasheets + + Davinci DM646x - https://www.ti.com/lit/ug/spruer5b/spruer5b.pdf + Keystone - https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + items: + - const: ti,keystone-wdt + - const: ti,davinci-wdt + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + wdt: watchdog@22f0080 { + compatible = "ti,keystone-wdt", "ti,davinci-wdt"; + reg = <0x022f0080 0x80>; + clocks = <&clkwdtimer0>; + }; + +...