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pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , "Daniel P. Smith" Subject: [PATCH 1/3] xen: add no_instrument_function attributes Date: Mon, 29 Jul 2024 10:24:15 -0400 Message-ID: <20240729142421.137283-2-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240729142421.137283-1-stewart.hildebrand@amd.com> References: <20240729142421.137283-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB05.amd.com: stewart.hildebrand@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099D9:EE_|MW6PR12MB8757:EE_ X-MS-Office365-Filtering-Correlation-Id: 81cb6bc6-a952-4dc2-b27a-08dcafda2c42 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|82310400026; X-Microsoft-Antispam-Message-Info: OT6s7LNjrd4WTXde1/FTwFntz/jxUPE9GORxkoMI40z+7u3SVpowdOk3gS1nchUQFVC6fxmSW50yxHwOSkFBQAmuwjU1fzKahsJw2wjQsVD9nF1weUqa5edF/iNvbzh66IvvgA+C9EkDLjaIFR1iEm3NsXEIAiS3Fvfp0H21iv182/pq6DCDMkY8J++wtU0JuBCvVp5rK9vPP6nmLCeYh7F2Qp2rwv75uKp5X2miSn4fjlccEe/5aDYdzlaJnNyzCkdIBPSLPGc12oTRosIoFu0KXeAhAB3Ld/1gRhsSh0e5KKwkzrr8a0IxWd51vz7HNeGcojeFQtIP+smMxTxyzDZFTzIWMB+GkwVM7ZcCDYgxgd9BVQpsK0BJUMujOFf+eTWVvzj6K0QHxzg7h4nFFDRfwDe07SvE4sus4GPy0lLL5SclzO9FMZcVTK38KJvF0mH9YlkjunVSBXefSWnmWBtaJSc0vrfD6b2vE608+QriAe8i0pa3ayf1+vAsBsZbJv61jrae9EWbI4Dw91G4y7wFpHwtd+2Atk0c9FhnhGGTkG2gBbtEgEx6Vga8YYlMKEK9W5avyIZrZwCyR8dD8MwnV+hkxt2YZNBE5V1nrCtkfXIEegU9w/Sn81G0Bukp6AimFiMLDgwGXJb7pE+6kmmmF1dC+5+sff6DXIosngoCtwBMV1pVGWHlHRYAlFUDqTNxanseCYnRu0vhqIUKBBVLAIHkngRpn79pV0CYMLaPIH++wI/W8kWyWTedcb21W3Ae0vRs/X18xtaUum5lBm0YSz5kwEm4gGGAoL0HKLNFocALCHF+EvZKOb90/YJAqYms6gQKhoRmbDq2oIAede3fHAWOjzaqNifO2u1Zl1xNSkOpBbNUnIFCmPBrISOCqb2cbLAEgg397ckiG84mtzp7Ua2ANiCcTTDyq0PmZTyEqT7Q4Cj1+09uFWMnBtEc0AmZHnHLgF0VcBf1k7HZz8GA01j/W2/BCXeMwiclvkvNzAgTRSRi6ly2TLn+bg2XgdWv0tTvWmoYn+j4yUaj6YZYq/4SwpCtEXMby7NXD5UVBgYlWSQWCIVYf5AXwffdk1hTI9H2x7vlXFV9D0/m6DYy2KoHU0d95PfTi8/IHjfNgANdlTNjpN+7wsDidDX1t45g6K+DM/5QTbppOQfeMgxbtiIK7FCPyxp/hEVaHgnlL9bRKpOI8UX4NmMSQJXnvB49UsByNuC4fv8sJDiVF4eLuS42OYrAHEdlDzkkDrfO6ds30J8R9mGnyUatI21q/Y1w4QsGgcnt2GLJCnMUltP4A5lG2eVQxZe0uFsjNQYxKLAXIyGHfhpAtvp+XYucSUQcKer/g0G6vaTG7lHIsTjOAl/wPErk6uRGCWqn4Xvq5GXtvmj9j/CJ2DzuGm9Kcq9JqwXvJHgFVZus3K5RedN5epWTxMXPeDsdCIJ2I7AG81XoRH4CpvUEujQmgvhc X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(1800799024)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jul 2024 14:24:35.9130 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 81cb6bc6-a952-4dc2-b27a-08dcafda2c42 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099D9.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB8757 In preparation for using -finstrument-functions option, we need to tag a few functions that don't work well with such instrumentation. If we don't intervene, we would end up with linker errors such as undefined reference to __bad_cmpxchg. Signed-off-by: Stewart Hildebrand --- xen/arch/arm/include/asm/arm64/cmpxchg.h | 4 ++++ xen/arch/arm/include/asm/arm64/sve.h | 1 + xen/arch/arm/include/asm/atomic.h | 2 ++ xen/arch/arm/include/asm/guest_atomics.h | 1 + xen/include/xsm/dummy.h | 1 + 5 files changed, 9 insertions(+) diff --git a/xen/arch/arm/include/asm/arm64/cmpxchg.h b/xen/arch/arm/include/asm/arm64/cmpxchg.h index f160e8e7bcf9..acabd42ca986 100644 --- a/xen/arch/arm/include/asm/arm64/cmpxchg.h +++ b/xen/arch/arm/include/asm/arm64/cmpxchg.h @@ -5,6 +5,7 @@ extern void __bad_xchg(volatile void *ptr, int size); +__attribute__((no_instrument_function)) static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) { unsigned long ret, tmp; @@ -102,6 +103,7 @@ __CMPXCHG_CASE(w, h, 2) __CMPXCHG_CASE(w, , 4) __CMPXCHG_CASE( , , 8) +__attribute__((no_instrument_function)) static always_inline bool __int_cmpxchg(volatile void *ptr, unsigned long *old, unsigned long new, int size, bool timeout, unsigned int max_try) @@ -122,6 +124,7 @@ static always_inline bool __int_cmpxchg(volatile void *ptr, unsigned long *old, ASSERT_UNREACHABLE(); } +__attribute__((no_instrument_function)) static always_inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, @@ -145,6 +148,7 @@ static always_inline unsigned long __cmpxchg(volatile void *ptr, * The helper will return true when the update has succeeded (i.e no * timeout) and false if the update has failed. */ +__attribute__((no_instrument_function)) static always_inline bool __cmpxchg_timeout(volatile void *ptr, unsigned long *old, unsigned long new, diff --git a/xen/arch/arm/include/asm/arm64/sve.h b/xen/arch/arm/include/asm/arm64/sve.h index a71d6a295dcc..3090e1cb784b 100644 --- a/xen/arch/arm/include/asm/arm64/sve.h +++ b/xen/arch/arm/include/asm/arm64/sve.h @@ -48,6 +48,7 @@ unsigned int get_sys_vl_len(void); #define opt_dom0_sve 0 +__attribute__((no_instrument_function)) static inline bool is_sve_domain(const struct domain *d) { return false; diff --git a/xen/arch/arm/include/asm/atomic.h b/xen/arch/arm/include/asm/atomic.h index 517216d2a846..31c3b3c3745b 100644 --- a/xen/arch/arm/include/asm/atomic.h +++ b/xen/arch/arm/include/asm/atomic.h @@ -74,6 +74,7 @@ build_add_sized(add_u32_sized, "", WORD, uint32_t) void __bad_atomic_read(const volatile void *p, void *res); void __bad_atomic_size(void); +__attribute__((no_instrument_function)) static always_inline void read_atomic_size(const volatile void *p, void *res, unsigned int size) @@ -99,6 +100,7 @@ static always_inline void read_atomic_size(const volatile void *p, } } +__attribute__((no_instrument_function)) static always_inline void write_atomic_size(volatile void *p, void *val, unsigned int size) diff --git a/xen/arch/arm/include/asm/guest_atomics.h b/xen/arch/arm/include/asm/guest_atomics.h index 8893eb9a55d7..f5f4ba0df0b1 100644 --- a/xen/arch/arm/include/asm/guest_atomics.h +++ b/xen/arch/arm/include/asm/guest_atomics.h @@ -86,6 +86,7 @@ static inline void guest_clear_mask16(struct domain *d, uint16_t mask, domain_unpause(d); } +__attribute__((no_instrument_function)) static always_inline unsigned long __guest_cmpxchg(struct domain *d, volatile void *ptr, unsigned long old, diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h index 00d2cbebf25a..7b42f8faa61c 100644 --- a/xen/include/xsm/dummy.h +++ b/xen/include/xsm/dummy.h @@ -75,6 +75,7 @@ void __xsm_action_mismatch_detected(void); #endif /* CONFIG_XSM */ +__attribute__((no_instrument_function)) static always_inline int xsm_default_action( xsm_default_t action, struct domain *src, struct domain *target) { From patchwork Mon Jul 29 14:24:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Stewart Hildebrand X-Patchwork-Id: 13745021 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 373D2C3DA4A for ; Mon, 29 Jul 2024 14:24:54 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.766793.1177330 (Exim 4.92) (envelope-from ) id 1sYRIv-00039t-OM; Mon, 29 Jul 2024 14:24:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 766793.1177330; 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pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Dario Faggioli , Juergen Gross , George Dunlap Subject: [PATCH 2/3] xen: silence maybe-unitialized warning Date: Mon, 29 Jul 2024 10:24:16 -0400 Message-ID: <20240729142421.137283-3-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240729142421.137283-1-stewart.hildebrand@amd.com> References: <20240729142421.137283-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: stewart.hildebrand@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099DA:EE_|DS0PR12MB8318:EE_ X-MS-Office365-Filtering-Correlation-Id: c1c3a7ee-e25c-4d86-b9a5-08dcafda30b6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?utf-8?q?0hOA6carnYZ/PJLAoV3SK8QXyc2YBhV?= =?utf-8?q?m/RdkPadZlfZf5cVTtWJYYUufzhxHUGpydxJb5H2EK/nR1dzI7NMcQxMa9cDODpBL?= =?utf-8?q?81KdZMhy2pjxm5uB39B1PpQZKSMq/AOHcTzgPjSmuLjIChK31UMX7Ua4yyVW5y6NZ?= =?utf-8?q?AuFIHRInYrqccXN4+vA/ad7hyusY/CtbCnipATPbg7tnxG5i2m2zalGfBvNwq0F86?= =?utf-8?q?OC7ZYVBmpBbl0qhcv5ncqo2ZOflef8O6+AwaJ8iL6sc30VzdFtTcCKh18MRn0M4LR?= =?utf-8?q?bDXY4836juEib3HCnZpz/5DzS1o7zODNEgE0QNuJB0uzuk/e5r5VPUtqQxSDxnxIQ?= =?utf-8?q?rT7MNkA7hkkomaNpJskmo27V2PCLWYubNT8oig01+uoGgF+PRX6XcRrN+EA8b09RJ?= =?utf-8?q?lXphiOptsqzeOBRBXAfuydXrj+L2qB2l82gAY40//QCgjlzp/mmNsn6WK0FNcsdmH?= =?utf-8?q?fxzW1hiSyxsyHwIMTm867Jk7hCYi4cUtenGzfyCFKsjZG+fWPSrtGs859jQjgLxWL?= =?utf-8?q?w/po9hUhN8UFtyeegZWl7qwF33bjgp/IpqoNYQuDafPWy+VxlnV0HcqaYHluQxa3R?= =?utf-8?q?Si0rZAlDIcEYB8g/G12xlu1oRUUXN9K5yftaPJJvVqWr9y+FJ4p22FeosdEeZp+bQ?= =?utf-8?q?JDrE1g6g+4AK3blWfxzGEzWFcvf8uagxuIofGCZS4dcmGniKgElvhad3zR8p4Jgnc?= =?utf-8?q?M86EmM/pKQKcj0HgmldDZ7cAXOM5TP4A92X0bmgjHqWXUDNrNd5hzLsAQfQBgkCuL?= =?utf-8?q?ZeHgW04kl75NcvHPZ72FZeW5LQTLgtlg8jlSKQqZgtiJ/tGeq8O8/iVDzMzbD+Qoq?= =?utf-8?q?rfuujJ8jlLi43vE5YOsZbrhFoxltXqHGZVchrXUF3ggtE/EXbOdalz7dtOlqhA8n7?= =?utf-8?q?xwK1OwA8QOHVHZvYOSRpZnmy1iaGnSk3x2DlkafL27+K0uGvaMc4QDcvZ80FU2gTU?= =?utf-8?q?92DME0c+wNuVntyG4qtte1fhQLv2882s1UolotgCNqMlZaB45SUTkcRITLW9zpAjU?= =?utf-8?q?LRuruVJ40ohVYrrZrLktj81yDSq7NDu153xRo5BQ7B1StEY29ZBHhh9GGvm9s/agr?= =?utf-8?q?Qapv8fq4iE6gsWpI6sefssSl3u9XxXDlKutaPZKHEQY97bjjIWoSdkFSMf3HchhJY?= =?utf-8?q?HRRgqtPe4mz37EDzDp0NErOaS6c4lPKVEi+YQjs0H2+WzEe4W8POJoIZ6piDsPakt?= =?utf-8?q?FrqVhIT+u/4XFJjxtFyyONqx2mfMljjYhdm3v5pnOAUBmwmvR14BzrFOUgHUB8VAc?= =?utf-8?q?dvfrjOssSU+uZCbepgKasM2oOTZgVgm7gTk0L58LgcSWMXGKswaC7Qiyz1IEQ4bJK?= =?utf-8?q?DLKomF/m3Kyp+HeiI/1NGD0ZriZHq/hDepxmbh983j638LPtVttN6Ng2IFyUKb945?= =?utf-8?q?BFkJ9VZwhYA?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jul 2024 14:24:43.3530 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c1c3a7ee-e25c-4d86-b9a5-08dcafda30b6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099DA.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8318 When building with gcc with -finstrument-functions, optimization level -O1, CONFIG_HYPFS=y and # CONFIG_HAS_SCHED_GRANULARITY is not set, the the following build warning (error) is encountered: common/sched/cpupool.c: In function ‘cpupool_gran_write’: common/sched/cpupool.c:1220:26: error: ‘gran’ may be used uninitialized [-Werror=maybe-uninitialized] 1220 | 0 : cpupool_check_granularity(gran); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ common/sched/cpupool.c:1207:21: note: ‘gran’ declared here 1207 | enum sched_gran gran; | ^~~~ This is a false positive. Silence the warning (error) by initializing the variable. Signed-off-by: Stewart Hildebrand Reviewed-by: Juergen Gross --- xen/common/sched/cpupool.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/common/sched/cpupool.c b/xen/common/sched/cpupool.c index 57dfee26f21f..3d02c7b70690 100644 --- a/xen/common/sched/cpupool.c +++ b/xen/common/sched/cpupool.c @@ -103,6 +103,7 @@ custom_param("sched-gran", sched_select_granularity); #elif defined(CONFIG_HYPFS) static int sched_gran_get(const char *str, enum sched_gran *mode) { + *mode = SCHED_GRAN_cpu; return -EINVAL; } #endif From patchwork Mon Jul 29 14:24:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Hildebrand X-Patchwork-Id: 13745022 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CB81CC3DA61 for ; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jul 2024 14:24:50.6984 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7fb1ffd3-64e5-47c0-2937-08dcafda3515 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099D6.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8714 Use the -finstrument-functions option to check that the stack pointer is valid upon each function entry. Only enable it for debug builds due to the overhead introduced. Use per-cpu variables to store the stack base and nesting level. The nesting level is used to avoid invoking __cyg_profile_func_enter recursively. A check is added for whether per-cpu data has been initialized. Since TPIDR_EL2 resets to an unknown value, initialize it to an invalid value. Signed-off-by: Stewart Hildebrand --- RFC: I only tested this on arm64. I still need to test with arm32. RFC: Should we put this under its own config option instead of reusing CONFIG_DEBUG? RFC: Is there a better value for INVALID_PER_CPU_OFFSET? We can't use 0 because 0 is a valid value for get_per_cpu_offset(). --- xen/arch/arm/arch.mk | 1 + xen/arch/arm/arm64/head.S | 4 +++ xen/arch/arm/domain.c | 3 +++ xen/arch/arm/include/asm/page.h | 2 ++ xen/arch/arm/include/asm/traps.h | 8 ++++++ xen/arch/arm/setup.c | 4 +++ xen/arch/arm/smpboot.c | 3 +++ xen/arch/arm/traps.c | 45 ++++++++++++++++++++++++++++++++ 8 files changed, 70 insertions(+) diff --git a/xen/arch/arm/arch.mk b/xen/arch/arm/arch.mk index 022dcda19224..c39cb65d183d 100644 --- a/xen/arch/arm/arch.mk +++ b/xen/arch/arm/arch.mk @@ -12,6 +12,7 @@ CFLAGS-$(CONFIG_ARM_32) += -mno-unaligned-access CFLAGS-$(CONFIG_ARM_64) += -mcpu=generic CFLAGS-$(CONFIG_ARM_64) += -mgeneral-regs-only # No fp registers etc $(call cc-option-add,CFLAGS-$(CONFIG_ARM_64),CC,-mno-outline-atomics) +CFLAGS-$(CONFIG_DEBUG) += -finstrument-functions ifneq ($(filter command line environment,$(origin CONFIG_EARLY_PRINTK)),) $(error You must use 'make menuconfig' to enable/disable early printk now) diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 2fa07dc3a04b..4a332b9cbc7c 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -399,6 +399,10 @@ FUNC_LOCAL(cpu_init) * than SP_EL0. */ msr spsel, #1 + + ldr x0, =INVALID_PER_CPU_OFFSET + msr tpidr_el2, x0 + ret END(cpu_init) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 7cfcefd27944..93ebe6e5f8af 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -328,6 +329,8 @@ void context_switch(struct vcpu *prev, struct vcpu *next) set_current(next); + stack_set(next->arch.stack); + prev = __context_switch(prev, next); schedule_tail(prev); diff --git a/xen/arch/arm/include/asm/page.h b/xen/arch/arm/include/asm/page.h index 69f817d1e68a..6b5aaf1eb3ff 100644 --- a/xen/arch/arm/include/asm/page.h +++ b/xen/arch/arm/include/asm/page.h @@ -7,6 +7,8 @@ #include #include +#define INVALID_PER_CPU_OFFSET _AC(0x1, UL) + /* Shareability values for the LPAE entries */ #define LPAE_SH_NON_SHAREABLE 0x0 #define LPAE_SH_UNPREDICTALE 0x1 diff --git a/xen/arch/arm/include/asm/traps.h b/xen/arch/arm/include/asm/traps.h index 9a60dbf70e5b..13e6997c2643 100644 --- a/xen/arch/arm/include/asm/traps.h +++ b/xen/arch/arm/include/asm/traps.h @@ -118,6 +118,14 @@ static inline register_t sign_extend(const struct hsr_dabt dabt, register_t r) void finalize_instr_emulation(const struct instr_details *instr); +#ifdef CONFIG_DEBUG +void stack_check_init(void); +void stack_set(unsigned char *base); +#else +static inline void stack_check_init(void) { } +static inline void stack_set(unsigned char *base) { } +#endif + #endif /* __ASM_ARM_TRAPS__ */ /* * Local variables: diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 0c2fdaceaf21..07d07feff602 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -47,6 +47,7 @@ #include #include #include +#include struct bootinfo __initdata bootinfo = BOOTINFO_INIT; @@ -733,6 +734,8 @@ void asmlinkage __init start_xen(unsigned long boot_phys_offset, percpu_init_areas(); set_processor_id(0); /* needed early, for smp_processor_id() */ + stack_check_init(); + /* Initialize traps early allow us to get backtrace when an error occurred */ init_traps(); @@ -924,6 +927,7 @@ void asmlinkage __init start_xen(unsigned long boot_phys_offset, * since the static one we're running on is about to be freed. */ memcpy(idle_vcpu[0]->arch.cpu_info, get_cpu_info(), sizeof(struct cpu_info)); + stack_set(idle_vcpu[0]->arch.stack); switch_stack_and_jump(idle_vcpu[0]->arch.cpu_info, init_done); } diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 04e363088d60..1c689f2caed7 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -30,6 +30,7 @@ #include #include #include +#include /* Override macros from asm/page.h to make them work with mfn_t */ #undef virt_to_mfn @@ -329,6 +330,8 @@ void asmlinkage start_secondary(void) set_processor_id(cpuid); + stack_check_init(); + identify_cpu(¤t_cpu_data); processor_setup(); diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index aac6c599f878..b4890eec7ec4 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -2325,6 +2325,51 @@ void asmlinkage leave_hypervisor_to_guest(void) arm_smccc_1_1_smc(ARM_SMCCC_ARCH_WORKAROUND_2_FID, 0, NULL); } +#ifdef CONFIG_DEBUG +DEFINE_PER_CPU(unsigned int, stack_check_nesting); +DEFINE_PER_CPU(unsigned char *, stack_base); + +void __attribute__((no_instrument_function)) stack_set(unsigned char *base) +{ + this_cpu(stack_base) = base; +} + +void __init __attribute__((no_instrument_function)) stack_check_init(void) +{ + this_cpu(stack_check_nesting) = 0; + stack_set(init_data.stack); +} + +__attribute__((no_instrument_function)) +void __cyg_profile_func_enter(void *this_fn, void *call_site) +{ + unsigned char *sp; + + if ( get_per_cpu_offset() == INVALID_PER_CPU_OFFSET ) + return; + + asm volatile ("mov %0, sp" : "=r" (sp) ); + + if ( sp < this_cpu(stack_base) || + sp > (this_cpu(stack_base) + STACK_SIZE) ) + { + if ( this_cpu(stack_check_nesting) ) + return; + + this_cpu(stack_check_nesting)++; + printk("CPU %d stack pointer out of bounds (sp %#lx, stack base %#lx)\n", + smp_processor_id(), (uintptr_t)sp, + (uintptr_t)this_cpu(stack_base)); + BUG(); + } +} + +__attribute__((no_instrument_function)) +void __cyg_profile_func_exit(void *this_fn, void *call_site) +{ +} +#endif + /* * Local variables: * mode: C