From patchwork Tue Jul 30 07:31:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: marco@palumbi.it X-Patchwork-Id: 13746855 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 37B1BC3DA49 for ; Tue, 30 Jul 2024 07:32:35 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sYhL7-0001VU-VJ; Tue, 30 Jul 2024 03:32:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sYhL5-0001Tj-Hk for qemu-devel@nongnu.org; Tue, 30 Jul 2024 03:32:07 -0400 Received: from smtpcmd01-g.aruba.it ([62.149.158.217]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sYhL2-0003DV-MJ for qemu-devel@nongnu.org; Tue, 30 Jul 2024 03:32:07 -0400 Received: from localhost.localdomain ([93.48.145.82]) by Aruba Outgoing Smtp with ESMTPSA id YhKysiotWwy3rYhKzsii8y; Tue, 30 Jul 2024 09:32:01 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=aruba.it; s=a1; t=1722324721; bh=Tvbf28qA9MBLLj+jr2qMi+M5DKY5MhWJE5Q1kMhnhYc=; h=From:To:Subject:Date:MIME-Version; b=X2eEhZ8Xh0oFL9CsBB84vh3SOtyA2tHUbClldlgGXUnddedg8fYqDgJOGFGSDABjS eAB7tcyMgFtiDxsYWn+vnIcw8mDT5rpvGRL1reeYDNCS+69Z4XxpRdVWL7HRyvQC9x vns5HDTLAWxWJdnt2DzAp/DkAuyJm27YhrTTKkBDP1TUBOyHacbsauPykFoascin3G Fx4vMpBJhY1UchnUgpf0yZ/TCG7C3WIsR4FoCpiXVUiQYyZvsPRVPhFfEa9iCMOriE kpzshS34jkDZD8Pzv5X8s0sv5wwkIjXpcVi+f5cybUcY+7aMvwlgnBjlbYhzN9/TeR cKCAPW74FURjQ== From: marco@palumbi.it To: qemu-devel@nongnu.org Cc: Marco Palumbi , Peter Maydell , qemu-arm@nongnu.org, qemu-stable@nongnu.org, qemu-trivial@nongnu.org Subject: [PATCH] hw/arm/mps2-tz.c: fix RX/TX interrupts order Date: Tue, 30 Jul 2024 07:31:20 +0000 Message-ID: <20240730073123.72992-1-marco@palumbi.it> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-CMAE-Envelope: MS4xfMSoA+e7khEW/6IbU3GeJ1fEIFlEacat5jOKmPa6cAHigbpAXrLVPK4/niKYuYSDkTpcmmZqEABnZ19NJjoq+Ds2FOA+zoYnrPq7U7Rvk4rKdJIV17RP qLhHKzwboVe87RlKjF+2dp0QvtrxrOnE3o3JZ4Ytg1xRLamGl36A9sI8IUOMaVOB/ki7dL47LSqCFTWgKshJbGxmOqEBrZIrl7hLGffT9AxP67mtv0QBA1Ly uxp7T7/MXAYTyNrxsQ4D4bbqKDmq6LGr0kjQb8+0RGtKPvcJ0Fb9xwhdlr+A6u6GLDIrEmG0ar7KcYJt+HcwFDbcseKAvpvF7/vwThbj5eP6pVirEp+MColD K9gpRC5M Received-SPF: pass client-ip=62.149.158.217; envelope-from=marco@palumbi.it; helo=smtpcmd01-g.aruba.it X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Marco Palumbi The order of the RX and TX interrupts are swapped. This commit fixes the order as per the following documents: * https://developer.arm.com/documentation/dai0505/latest/ * https://developer.arm.com/documentation/dai0521/latest/ * https://developer.arm.com/documentation/dai0524/latest/ * https://developer.arm.com/documentation/dai0547/latest/ Signed-off-by: Marco Palumbi --- hw/arm/mps2-tz.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index a2d18afd79..aec57c0d68 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -435,7 +435,7 @@ static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque, const char *name, hwaddr size, const int *irqs, const PPCExtraData *extradata) { - /* The irq[] array is tx, rx, combined, in that order */ + /* The irq[] array is rx, tx, combined, in that order */ MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms); CMSDKAPBUART *uart = opaque; int i = uart - &mms->uart[0]; @@ -447,8 +447,8 @@ static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque, qdev_prop_set_uint32(DEVICE(uart), "pclk-frq", mmc->apb_periph_frq); sysbus_realize(SYS_BUS_DEVICE(uart), &error_fatal); s = SYS_BUS_DEVICE(uart); - sysbus_connect_irq(s, 0, get_sse_irq_in(mms, irqs[0])); - sysbus_connect_irq(s, 1, get_sse_irq_in(mms, irqs[1])); + sysbus_connect_irq(s, 0, get_sse_irq_in(mms, irqs[1])); + sysbus_connect_irq(s, 1, get_sse_irq_in(mms, irqs[0])); sysbus_connect_irq(s, 2, qdev_get_gpio_in(orgate_dev, i * 2)); sysbus_connect_irq(s, 3, qdev_get_gpio_in(orgate_dev, i * 2 + 1)); sysbus_connect_irq(s, 4, get_sse_irq_in(mms, irqs[2]));