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Tue, 30 Jul 2024 22:24:42 +0000 Received: from NALASPPMTA05.qualcomm.com (NALASPPMTA05.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 46UMOf3p002449; Tue, 30 Jul 2024 22:24:41 GMT Received: from hu-devc-lv-u18-c.qualcomm.com (hu-eserrao-lv.qualcomm.com [10.47.235.27]) by NALASPPMTA05.qualcomm.com (PPS) with ESMTP id 46UMOf6E002445; Tue, 30 Jul 2024 22:24:41 +0000 Received: by hu-devc-lv-u18-c.qualcomm.com (Postfix, from userid 464172) id AB988500188; Tue, 30 Jul 2024 15:24:41 -0700 (PDT) From: Elson Roy Serrao To: andersson@kernel.org, konrad.dybcio@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, gregkh@linuxfoundation.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Elson Roy Serrao Subject: [PATCH 1/8] dt-bindings: soc: qcom: eud: Add phy related bindings Date: Tue, 30 Jul 2024 15:24:32 -0700 Message-Id: <20240730222439.3469-2-quic_eserrao@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240730222439.3469-1-quic_eserrao@quicinc.com> References: <20240730222439.3469-1-quic_eserrao@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 27TQEd7jelb51tbnaoctfVZeQf5F33V4 X-Proofpoint-ORIG-GUID: 27TQEd7jelb51tbnaoctfVZeQf5F33V4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-30_18,2024-07-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxscore=0 priorityscore=1501 adultscore=0 mlxlogscore=961 clxscore=1011 impostorscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407300154 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Embedded USB Debugger(EUD) being a High-Speed USB hub needs HS-Phy support for it's operation. Hence document phy bindings to support this. Signed-off-by: Elson Roy Serrao --- .../devicetree/bindings/soc/qcom/qcom,eud.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml index f2c5ec7e6437..fca5b608ec63 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -29,6 +29,14 @@ properties: description: EUD interrupt maxItems: 1 + phys: + items: + - description: USB2/HS PHY needed for EUD functionality + + phy-names: + items: + - const: usb2-phy + ports: $ref: /schemas/graph.yaml#/properties/ports description: @@ -48,6 +56,8 @@ properties: required: - compatible - reg + - phys + - phy-names - ports additionalProperties: false @@ -58,6 +68,8 @@ examples: compatible = "qcom,sc7280-eud", "qcom,eud"; reg = <0x88e0000 0x2000>, <0x88e2000 0x1000>; + phys = <&usb_2_hsphy>; + phy-names = "usb2-phy"; ports { #address-cells = <1>; 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Tue, 30 Jul 2024 22:24:42 +0000 Received: from NALASPPMTA04.qualcomm.com (NALASPPMTA04.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 46UMKxoZ029327; Tue, 30 Jul 2024 22:24:42 GMT Received: from hu-devc-lv-u18-c.qualcomm.com (hu-eserrao-lv.qualcomm.com [10.47.235.27]) by NALASPPMTA04.qualcomm.com (PPS) with ESMTP id 46UMOf6m003283; Tue, 30 Jul 2024 22:24:42 +0000 Received: by hu-devc-lv-u18-c.qualcomm.com (Postfix, from userid 464172) id AC75750018E; Tue, 30 Jul 2024 15:24:41 -0700 (PDT) From: Elson Roy Serrao To: andersson@kernel.org, konrad.dybcio@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, gregkh@linuxfoundation.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Elson Roy Serrao Subject: [PATCH 2/8] dt-bindings: soc: qcom: eud: Add usb role switch property Date: Tue, 30 Jul 2024 15:24:33 -0700 Message-Id: <20240730222439.3469-3-quic_eserrao@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240730222439.3469-1-quic_eserrao@quicinc.com> References: <20240730222439.3469-1-quic_eserrao@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 7j6_I92iAjPZovQmsHAq9SNpnP7zWl8p X-Proofpoint-GUID: 7j6_I92iAjPZovQmsHAq9SNpnP7zWl8p X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-30_18,2024-07-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 impostorscore=0 mlxlogscore=961 bulkscore=0 malwarescore=0 phishscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 spamscore=0 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407300155 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: EUD hub is physically present in between the USB connector and the USB controller. So the role switch notifications originating from the connector should route through EUD. Hence to interpret the usb role assigned by the connector, role switch property is needed. Signed-off-by: Elson Roy Serrao --- Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml index fca5b608ec63..0fa4608568d0 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -37,6 +37,10 @@ properties: items: - const: usb2-phy + usb-role-switch: + $ref: /schemas/types.yaml#/definitions/flag + description: Support role switch. + ports: $ref: /schemas/graph.yaml#/properties/ports description: From patchwork Tue Jul 30 22:24:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elson Serrao X-Patchwork-Id: 13747933 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E3901917C0; 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Signed-off-by: Elson Roy Serrao --- Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml index 0fa4608568d0..d7a913bd5edb 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,eud.yaml @@ -18,6 +18,7 @@ properties: items: - enum: - qcom,sc7280-eud + - qcom,sm8450-eud - const: qcom,eud reg: From patchwork Tue Jul 30 22:24:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elson Serrao X-Patchwork-Id: 13747931 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95C8D191484; Tue, 30 Jul 2024 22:24:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Signed-off-by: Elson Roy Serrao --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 29 ++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 9bafb3b350ff..bcdf61223ff3 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -4693,6 +4693,35 @@ }; }; + eud: eud@88e0000 { + compatible = "qcom,sm8450-eud", "qcom,eud"; + reg = <0 0x88e0000 0 0x2000>, + <0 0x88e2000 0 0x1000>; + interrupts-extended = <&pdc 11 IRQ_TYPE_LEVEL_HIGH>; + + phys = <&usb_1_hsphy>; + phy-names = "usb2-phy"; + + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + eud_ep: endpoint { + }; + }; + + port@1 { + reg = <1>; + eud_con: endpoint { + }; + }; + }; + }; + nsp_noc: interconnect@320c0000 { compatible = "qcom,sm8450-nsp-noc"; reg = <0 0x320c0000 0 0x10000>; From patchwork Tue Jul 30 22:24:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elson Serrao X-Patchwork-Id: 13747935 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C09919149E; 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Signed-off-by: Elson Roy Serrao --- arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts index a754b8fe9167..21a63ad81aac 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -111,7 +111,7 @@ reg = <0>; pmic_glink_hs_in: endpoint { - remote-endpoint = <&usb_1_dwc3_hs>; + remote-endpoint = <&eud_con>; }; }; @@ -1102,9 +1102,22 @@ }; &usb_1_dwc3_hs { + remote-endpoint = <&eud_ep>; +}; + +&eud { + status = "okay"; + usb-role-switch; +}; + +&eud_con { remote-endpoint = <&pmic_glink_hs_in>; }; +&eud_ep { + remote-endpoint = <&usb_1_dwc3_hs>; +}; + &usb_1_hsphy { status = "okay"; From patchwork Tue Jul 30 22:24:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elson Serrao X-Patchwork-Id: 13747927 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D38FA190070; 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Tue, 30 Jul 2024 22:24:43 +0000 (GMT) Received: from pps.filterd (NALASPPMTA03.qualcomm.com [127.0.0.1]) by NALASPPMTA03.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTP id 46UMOg3g025870; Tue, 30 Jul 2024 22:24:42 GMT Received: from pps.reinject (localhost [127.0.0.1]) by NALASPPMTA03.qualcomm.com (PPS) with ESMTPS id 40pghqm6yt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Tue, 30 Jul 2024 22:24:42 +0000 Received: from NALASPPMTA03.qualcomm.com (NALASPPMTA03.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 46UMOgMH025850; Tue, 30 Jul 2024 22:24:42 GMT Received: from hu-devc-lv-u18-c.qualcomm.com (hu-eserrao-lv.qualcomm.com [10.47.235.27]) by NALASPPMTA03.qualcomm.com (PPS) with ESMTP id 46UMOgeQ025847; Tue, 30 Jul 2024 22:24:42 +0000 Received: by hu-devc-lv-u18-c.qualcomm.com (Postfix, from userid 464172) id B7BD9500198; Tue, 30 Jul 2024 15:24:41 -0700 (PDT) From: Elson Roy Serrao To: andersson@kernel.org, konrad.dybcio@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, gregkh@linuxfoundation.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Elson Roy Serrao Subject: [PATCH 6/8] usb: misc: eud: Add High-Speed Phy control for EUD operations Date: Tue, 30 Jul 2024 15:24:37 -0700 Message-Id: <20240730222439.3469-7-quic_eserrao@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240730222439.3469-1-quic_eserrao@quicinc.com> References: <20240730222439.3469-1-quic_eserrao@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Z45UKuvCHbIpVLggytp-x-SX_p8_Vahy X-Proofpoint-ORIG-GUID: Z45UKuvCHbIpVLggytp-x-SX_p8_Vahy X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-30_18,2024-07-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 clxscore=1015 spamscore=0 mlxscore=0 bulkscore=0 suspectscore=0 impostorscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407300154 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The Embedded USB Debugger(EUD) is a HS-USB on-chip hub to support the debug and trace capabilities on Qualcomm devices. It is physically present in between the usb connector and the usb controller. Being a HS USB hub, it relies on HS Phy for its functionality. Add HS phy support in the eud driver and control the phy during eud enable/disable operations. Signed-off-by: Elson Roy Serrao --- drivers/usb/misc/qcom_eud.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index 26e9b8749d8a..3de7d465912c 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -33,6 +34,7 @@ struct eud_chip { struct device *dev; struct usb_role_switch *role_sw; + struct phy *usb2_phy; void __iomem *base; void __iomem *mode_mgr; unsigned int int_status; @@ -41,8 +43,35 @@ struct eud_chip { bool usb_attached; }; +static int eud_phy_enable(struct eud_chip *chip) +{ + int ret; + + ret = phy_init(chip->usb2_phy); + if (ret) + return ret; + + ret = phy_power_on(chip->usb2_phy); + if (ret) + phy_exit(chip->usb2_phy); + + return ret; +} + +static void eud_phy_disable(struct eud_chip *chip) +{ + phy_power_off(chip->usb2_phy); + phy_exit(chip->usb2_phy); +} + static int enable_eud(struct eud_chip *priv) { + int ret; + + ret = eud_phy_enable(priv); + if (ret) + return ret; + writel(EUD_ENABLE, priv->base + EUD_REG_CSR_EUD_EN); writel(EUD_INT_VBUS | EUD_INT_SAFE_MODE, priv->base + EUD_REG_INT1_EN_MASK); @@ -55,6 +84,7 @@ static void disable_eud(struct eud_chip *priv) { writel(0, priv->base + EUD_REG_CSR_EUD_EN); writel(0, priv->mode_mgr + EUD_REG_EUD_EN2); + eud_phy_disable(priv); } static ssize_t enable_show(struct device *dev, @@ -186,6 +216,11 @@ static int eud_probe(struct platform_device *pdev) chip->dev = &pdev->dev; + chip->usb2_phy = devm_phy_get(chip->dev, "usb2-phy"); + if (IS_ERR(chip->usb2_phy)) + return dev_err_probe(chip->dev, PTR_ERR(chip->usb2_phy), + "no usb2 phy configured\n"); + chip->role_sw = usb_role_switch_get(&pdev->dev); if (IS_ERR(chip->role_sw)) return dev_err_probe(chip->dev, PTR_ERR(chip->role_sw), From patchwork Tue Jul 30 22:24:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elson Serrao X-Patchwork-Id: 13747932 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D38A0157466; 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Tue, 30 Jul 2024 22:24:43 +0000 (GMT) Received: from pps.filterd (NALASPPMTA01.qualcomm.com [127.0.0.1]) by NALASPPMTA01.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTP id 46UMOgCB024878; Tue, 30 Jul 2024 22:24:42 GMT Received: from pps.reinject (localhost [127.0.0.1]) by NALASPPMTA01.qualcomm.com (PPS) with ESMTPS id 40pfs7cjpg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Tue, 30 Jul 2024 22:24:42 +0000 Received: from NALASPPMTA01.qualcomm.com (NALASPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 46UMGpPO012780; Tue, 30 Jul 2024 22:24:42 GMT Received: from hu-devc-lv-u18-c.qualcomm.com (hu-eserrao-lv.qualcomm.com [10.47.235.27]) by NALASPPMTA01.qualcomm.com (PPS) with ESMTP id 46UMOg38024864; Tue, 30 Jul 2024 22:24:42 +0000 Received: by hu-devc-lv-u18-c.qualcomm.com (Postfix, from userid 464172) id BB34250019E; Tue, 30 Jul 2024 15:24:41 -0700 (PDT) From: Elson Roy Serrao To: andersson@kernel.org, konrad.dybcio@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, gregkh@linuxfoundation.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, Elson Roy Serrao Subject: [PATCH 7/8] usb: misc: eud: Handle usb role switch notifications Date: Tue, 30 Jul 2024 15:24:38 -0700 Message-Id: <20240730222439.3469-8-quic_eserrao@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240730222439.3469-1-quic_eserrao@quicinc.com> References: <20240730222439.3469-1-quic_eserrao@quicinc.com> X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: inWyBpmZbT2Ihr2501lAwyLuAjCm_CUm X-Proofpoint-ORIG-GUID: inWyBpmZbT2Ihr2501lAwyLuAjCm_CUm X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-07-30_18,2024-07-30_01,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 mlxlogscore=922 adultscore=0 priorityscore=1501 spamscore=0 bulkscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2407300155 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Since EUD is physically present between the USB connector and the USB controller, it should relay the usb role notifications from the connector. Hence register a role switch handler to process and relay these roles to the USB controller. This results in a common framework to send both connector related events and eud attach/detach events to the USB controller. Signed-off-by: Elson Roy Serrao --- drivers/usb/misc/qcom_eud.c | 91 ++++++++++++++++++++++++++++--------- 1 file changed, 69 insertions(+), 22 deletions(-) diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index 3de7d465912c..9a49c934e8cf 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -35,12 +36,16 @@ struct eud_chip { struct device *dev; struct usb_role_switch *role_sw; struct phy *usb2_phy; + + /* mode lock */ + struct mutex mutex; void __iomem *base; void __iomem *mode_mgr; unsigned int int_status; int irq; bool enabled; bool usb_attached; + enum usb_role current_role; }; static int eud_phy_enable(struct eud_chip *chip) @@ -64,6 +69,38 @@ static void eud_phy_disable(struct eud_chip *chip) phy_exit(chip->usb2_phy); } +static int eud_usb_role_set(struct eud_chip *chip, enum usb_role role) +{ + struct usb_role_switch *sw; + int ret = 0; + + mutex_lock(&chip->mutex); + + /* Avoid duplicate role handling */ + if (role == chip->current_role) + goto err; + + sw = usb_role_switch_get(chip->dev); + if (IS_ERR_OR_NULL(sw)) { + dev_err(chip->dev, "failed to get usb switch\n"); + ret = -EINVAL; + goto err; + } + + ret = usb_role_switch_set_role(sw, role); + usb_role_switch_put(sw); + + if (ret) { + dev_err(chip->dev, "failed to set role\n"); + goto err; + } + chip->current_role = role; +err: + mutex_unlock(&chip->mutex); + + return ret; +} + static int enable_eud(struct eud_chip *priv) { int ret; @@ -77,7 +114,7 @@ static int enable_eud(struct eud_chip *priv) priv->base + EUD_REG_INT1_EN_MASK); writel(1, priv->mode_mgr + EUD_REG_EUD_EN2); - return usb_role_switch_set_role(priv->role_sw, USB_ROLE_DEVICE); + return ret; } static void disable_eud(struct eud_chip *priv) @@ -106,15 +143,20 @@ static ssize_t enable_store(struct device *dev, if (kstrtobool(buf, &enable)) return -EINVAL; + /* EUD enable is applicable only in DEVICE mode */ + if (enable && chip->current_role != USB_ROLE_DEVICE) + return -EINVAL; + if (enable) { ret = enable_eud(chip); - if (!ret) - chip->enabled = enable; - else - disable_eud(chip); + if (ret) { + dev_err(chip->dev, "failed to enable eud\n"); + return count; + } } else { disable_eud(chip); } + chip->enabled = enable; return count; } @@ -185,11 +227,9 @@ static irqreturn_t handle_eud_irq_thread(int irq, void *data) int ret; if (chip->usb_attached) - ret = usb_role_switch_set_role(chip->role_sw, USB_ROLE_DEVICE); + ret = eud_usb_role_set(chip, USB_ROLE_DEVICE); else - ret = usb_role_switch_set_role(chip->role_sw, USB_ROLE_HOST); - if (ret) - dev_err(chip->dev, "failed to set role switch\n"); + ret = eud_usb_role_set(chip, USB_ROLE_HOST); /* set and clear vbus_int_clr[0] to clear interrupt */ writel(BIT(0), chip->base + EUD_REG_VBUS_INT_CLR); @@ -198,16 +238,18 @@ static irqreturn_t handle_eud_irq_thread(int irq, void *data) return IRQ_HANDLED; } -static void eud_role_switch_release(void *data) +static int eud_usb_role_switch_set(struct usb_role_switch *sw, + enum usb_role role) { - struct eud_chip *chip = data; + struct eud_chip *chip = usb_role_switch_get_drvdata(sw); - usb_role_switch_put(chip->role_sw); + return eud_usb_role_set(chip, role); } static int eud_probe(struct platform_device *pdev) { struct eud_chip *chip; + struct usb_role_switch_desc eud_role_switch = {NULL}; int ret; chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); @@ -221,16 +263,6 @@ static int eud_probe(struct platform_device *pdev) return dev_err_probe(chip->dev, PTR_ERR(chip->usb2_phy), "no usb2 phy configured\n"); - chip->role_sw = usb_role_switch_get(&pdev->dev); - if (IS_ERR(chip->role_sw)) - return dev_err_probe(chip->dev, PTR_ERR(chip->role_sw), - "failed to get role switch\n"); - - ret = devm_add_action_or_reset(chip->dev, eud_role_switch_release, chip); - if (ret) - return dev_err_probe(chip->dev, ret, - "failed to add role switch release action\n"); - chip->base = devm_platform_ioremap_resource(pdev, 0); if (IS_ERR(chip->base)) return PTR_ERR(chip->base); @@ -248,6 +280,18 @@ static int eud_probe(struct platform_device *pdev) if (ret) return dev_err_probe(chip->dev, ret, "failed to allocate irq\n"); + eud_role_switch.fwnode = dev_fwnode(chip->dev); + eud_role_switch.set = eud_usb_role_switch_set; + eud_role_switch.get = NULL; + eud_role_switch.driver_data = chip; + chip->role_sw = usb_role_switch_register(chip->dev, &eud_role_switch); + + if (IS_ERR(chip->role_sw)) + return dev_err_probe(chip->dev, PTR_ERR(chip->role_sw), + "failed to register role switch\n"); + + mutex_init(&chip->mutex); + enable_irq_wake(chip->irq); platform_set_drvdata(pdev, chip); @@ -262,6 +306,9 @@ static void eud_remove(struct platform_device *pdev) if (chip->enabled) disable_eud(chip); + if (chip->role_sw) + usb_role_switch_unregister(chip->role_sw); + device_init_wakeup(&pdev->dev, false); disable_irq_wake(chip->irq); } From patchwork Tue Jul 30 22:24:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Elson Serrao X-Patchwork-Id: 13747928 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F389190473; 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Signed-off-by: Elson Roy Serrao --- drivers/usb/misc/qcom_eud.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/misc/qcom_eud.c b/drivers/usb/misc/qcom_eud.c index 9a49c934e8cf..465d57c05c3c 100644 --- a/drivers/usb/misc/qcom_eud.c +++ b/drivers/usb/misc/qcom_eud.c @@ -315,6 +315,7 @@ static void eud_remove(struct platform_device *pdev) static const struct of_device_id eud_dt_match[] = { { .compatible = "qcom,sc7280-eud" }, + { .compatible = "qcom,sm8450-eud" }, { } }; MODULE_DEVICE_TABLE(of, eud_dt_match);