From patchwork Wed Jul 31 06:18:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748117 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 503EA1662E4; Wed, 31 Jul 2024 06:19:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406767; cv=none; b=UlslqpLaa8J8e3JSl605CZkJzWHoz6x0sqSnJZdEtO/StwqAsYIcptgpC4LKq3XrrlPNxvASefhVMV9I1Ja72Df6QwYjaJ9hXfC7LDIH3f86vHP2vPy6v57PK20cuJMtkO+m+kggbi+YxH6nS7GZU4Avhxn+pi0flkB3a4eTdKg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406767; c=relaxed/simple; bh=cUSGKsIFxCyeNPbg5c8vgwhFGGNRrlqC8mF33tDfnFs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ug7EATZTgJSUCD3UMerWjAHK+FKv4uC59pc8xh2cG+vuiw7RCi0uCdxv27CrGgo1+7S0qLn7C4Fma0TqtX0Ll4YwA+q679a8kK8yO7EvkSb9KjAeaLWvw3GunO8kcuXGP1VyeJo2cb5WGJN2/losuTg4+0cggyFUiF91QNIXOwg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=ZERhdFPi; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="ZERhdFPi" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WYhl02MgKz9wVl; Wed, 31 Jul 2024 06:19:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406764; bh=cUSGKsIFxCyeNPbg5c8vgwhFGGNRrlqC8mF33tDfnFs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ZERhdFPi1qPyC8g7UMIuRj7ZOlvDAK9gIRMInGAI5JVbMRQMbCuU4YV6lDMu16IYw dDw5DjDiXFa9dGO/UScd1QEz/FaBZC6YBEeVozKabXIb49ookJab9kLUKdIXtyk3VF TU0v4DQ4YvqmVOO8bfyzEumba5rU8Q57zW9SSffY= X-Riseup-User-ID: 9CE9222DC1411C00A954B18B5849673D27258BD325A47F047CACE6485FFB592F Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhkx3qpJzJrXc; Wed, 31 Jul 2024 06:19:21 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:42 +0700 Subject: [PATCH v3 01/11] arm64: dts: qcom: sm6115-pro1x: Add Hall Switch and Camera Button Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-1-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The Pro1X has a flip keyboard and a single-state camera button. Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 34 +++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 4a30024aa48f..70f479a63f2e 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright (c) 2023, Dang Huynh + * Copyright (c) 2023 - 2024, Dang Huynh */ /dts-v1/; @@ -35,9 +35,25 @@ framebuffer0: framebuffer@5c000000 { gpio-keys { compatible = "gpio-keys"; - pinctrl-0 = <&vol_up_n>; + pinctrl-0 = <&hall_sensor_n>, <&key_camera_n>, <&vol_up_n>; pinctrl-names = "default"; + hall-switch { + label = "Hall Switch"; + linux,input-type = ; + linux,code = ; + gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; + debounce-interval = <90>; + wakeup-source; + }; + + key-camera { + label = "Camera Button"; + linux,code = ; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + debounce-interval = <15>; + }; + key-volume-up { label = "Volume Up"; linux,code = ; @@ -212,6 +228,20 @@ &sleep_clk { &tlmm { gpio-reserved-ranges = <0 4>, <14 4>; + + key_camera_n: key-camera-n-state { + pins = "gpio18"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + hall_sensor_n: hall-sensor-n-state { + pins = "gpio96"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; }; &ufs_mem_hc { From patchwork Wed Jul 31 06:18:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748118 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E761C1BC40; Wed, 31 Jul 2024 06:19:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Wed, 31 Jul 2024 06:19:24 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:43 +0700 Subject: [PATCH v3 02/11] arm64: dts: qcom: sm6115-pro1x: Add PCA9534 IO Expander Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-2-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh F(x)tec Pro1X comes with PCA9534 IO Expander, it is used for enabling touch screen VDD/VDDIO and keyboard's caps lock LED. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh Reviewed-by: Caleb Connolly --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 70f479a63f2e..47e446249af6 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -70,6 +70,23 @@ &dispcc { status = "disabled"; }; +&gpi_dma0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + /* Clock frequency was not specified downstream, let's park it to 100 KHz */ + clock-frequency = <100000>; + + pca9534: gpio@21 { + compatible = "nxp,pca9534"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + &pm6125_gpios { vol_up_n: vol-up-n-state { pins = "gpio5"; @@ -89,6 +106,10 @@ &pon_resin { status = "okay"; }; +&qupv3_id_0 { + status = "okay"; +}; + &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm6125-regulators"; From patchwork Wed Jul 31 06:18:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748119 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E54BF16D326; Wed, 31 Jul 2024 06:19:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406772; cv=none; b=EFHpWQnZMrymQPAZJpi9Pj15Bi75XZTWUP7qZ3fxEWj/oI1We7dBNvs0bPYt6s0VCTJ8HCUrMVEGm4Ds4+z0uIwkLt5mFLZ2F5k63RZGFl5aeEeid6JcRVK7Q9mqkp4PjUEAgyrcfhgFwEnXz/YrCfksYTUDOht7wieoy7SmxEA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406772; c=relaxed/simple; bh=HGhNmscTLllRNAlkAcLvWKGyOF1yadzzxps8Ao8tcUs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dRtUXFdQCfUdbxbw6K1/mkjZsWyTTWfDgrJP/fuc24YvpS6xRSBQQov32/1OH9sdTg4iZmIBvYG4nWMJ/SxFgHJ9fmr++zgkkVLq/QgWIalU9PmzpFXvmZl1r77EHh8OhYSRflY39eTewwRVPomY7oGGmeVq33oQWaViYRFtUFQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=Cf08uzeF; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="Cf08uzeF" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WYhl624HCz9wV5; Wed, 31 Jul 2024 06:19:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406770; bh=HGhNmscTLllRNAlkAcLvWKGyOF1yadzzxps8Ao8tcUs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Cf08uzeFLGmBhRKVShibWKCepMM76iSIAKXV+P+EnBQFevXjwQ++iu7PvqdRP2SfV Da+coEu8unUxL91HO4rV96ujyDR8OMUOMsOwQGJi4o+1iOW4GkQs/TMPMKVRDywcUo wUXsJAXPfWSIk6dFJl1BRk7bUXavhKJELQDhuv1E= X-Riseup-User-ID: 654E9151BF075245306FD3DA83F94EE879C727E99A8CA6AC86C0C910F6BCF921 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhl33nbpzJrXc; Wed, 31 Jul 2024 06:19:27 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:44 +0700 Subject: [PATCH v3 03/11] arm64: dts: qcom: sm6115-pro1x: Add Goodix Touchscreen Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-3-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The Fxtec Pro1X touchscreen uses Goodix GT9286 chip. Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 49 +++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 47e446249af6..813cd22907c8 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -63,6 +63,20 @@ key-volume-up { wakeup-source; }; }; + + ts_vdd_supply: ts-vdd-supply { + compatible = "regulator-fixed"; + regulator-name = "ts_vdd_supply"; + gpio = <&pca9534 3 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + ts_vddio_supply: ts-vddio-supply { + compatible = "regulator-fixed"; + regulator-name = "ts_vddio_supply"; + gpio = <&pca9534 2 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &dispcc { @@ -87,6 +101,27 @@ pca9534: gpio@21 { }; }; +&i2c2 { + status = "okay"; + /* Clock frequency was not specified downstream, let's park it to 100 KHz */ + clock-frequency = <100000>; + + touchscreen@14 { + compatible = "goodix,gt9286"; + reg = <0x14>; + + interrupts-extended = <&tlmm 80 IRQ_TYPE_LEVEL_LOW>; + + irq-gpios = <&tlmm 80 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&tlmm 71 GPIO_ACTIVE_HIGH>; + AVDD28-supply = <&ts_vdd_supply>; + VDDIO-supply = <&ts_vddio_supply>; + + pinctrl-0 = <&ts_int_n>, <&ts_rst_n>; + pinctrl-names = "default"; + }; +}; + &pm6125_gpios { vol_up_n: vol-up-n-state { pins = "gpio5"; @@ -257,6 +292,20 @@ key_camera_n: key-camera-n-state { bias-pull-up; }; + ts_rst_n: ts-rst-n-state { + pins = "gpio71"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + ts_int_n: ts-int-n-state { + pins = "gpio80"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + hall_sensor_n: hall-sensor-n-state { pins = "gpio96"; function = "gpio"; From patchwork Wed Jul 31 06:18:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748120 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1FC616D4D4; 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Wed, 31 Jul 2024 06:19:30 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:45 +0700 Subject: [PATCH v3 04/11] arm64: dts: qcom: sm6115-pro1x: Add Caps Lock LED Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-4-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The Pro1X has a caps lock LED on the keyboard. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 813cd22907c8..b45ae3402741 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -8,6 +8,7 @@ #include "sm6115.dtsi" #include "pm6125.dtsi" #include +#include / { model = "F(x)tec Pro1X (QX1050)"; @@ -64,6 +65,19 @@ key-volume-up { }; }; + gpio-leds { + compatible = "gpio-leds"; + + capslock-led { + label = "green:capslock"; + function = LED_FUNCTION_CAPSLOCK; + color = ; + gpios = <&pca9534 1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "kbd-capslock"; + default-state = "off"; + }; + }; + ts_vdd_supply: ts-vdd-supply { compatible = "regulator-fixed"; regulator-name = "ts_vdd_supply"; From patchwork Wed Jul 31 06:18:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748121 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CFBE616D4F0; Wed, 31 Jul 2024 06:19:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406778; cv=none; b=mvc4QUmVyRsiDD7ATg8Qbbir3j7q7CnzrUc+M35keM8On5J/WdWjeNjldbYmWkQV1P2Y4hQgA1G2YPb2TCPG90St4SEs+IKC3pTqS1fUJtDDLhB7IsGS0KH+RdUdT+tOdMNbMMR/vkaG1FXX88peiurYFoHORJI6IHTgAJfTfwQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406778; c=relaxed/simple; bh=g/YbokrOUCi3VM6aKD3FpAQrmmvdCbVrYSg5eeD24EM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Y4eeAC9kzi2gpTwaokbi3ngCIhn5PHiF6zL+BrYmgEPsuYbgUN9V712O1rgH2pjm5CPSaD4OJHBpy8asTiDUK58Z0GlHVaGUWANG/U2f9MJb8krY/47lajfV9ILPdcCD8vOn83Vfbv+cqZqAwx+199QaNjgziiK9+VqPid7Wdl0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=EGSz/p/P; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="EGSz/p/P" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WYhlD1t9fz9thY; Wed, 31 Jul 2024 06:19:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406776; bh=g/YbokrOUCi3VM6aKD3FpAQrmmvdCbVrYSg5eeD24EM=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=EGSz/p/PytKkLO7A9c1LuDjv9ARAGtnwFrlH5cXMX363wK6B5pnWUWzC80Ai+Yriq VyqRSmJufenjMx6LG5W2ndm21Pnk0tKr9vUNJ6PikYGcKuwIh79EwHKdgUxcCn3Rtc VHp4+etQcyZbEnIyRk5vhXAyjvGhxABLcV3qqBZ8= X-Riseup-User-ID: B55F22F61BD3BBD69A8E232AAADFE083F58D2C6889FBBDF4791EC3D1EF363E2C Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhl93g4VzJmtl; Wed, 31 Jul 2024 06:19:33 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:46 +0700 Subject: [PATCH v3 05/11] arm64: dts: qcom: sm6115-pro1x: Enable SD card slot Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-5-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh Fxtec Pro1X has two card slots and allow either 2xSIM cards or 1xSIM, 1xSD Card configuration. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 32 +++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index b45ae3402741..67946d099976 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -191,6 +191,7 @@ pm6125_l4a: l4 { pm6125_l5a: l5 { regulator-min-microvolt = <1648000>; regulator-max-microvolt = <3056000>; + regulator-allow-set-load; }; pm6125_l6a: l6 { @@ -292,6 +293,37 @@ pm6125_l24a: l24 { }; }; +&sdc2_state_off { + cd-pins { + pins = "gpio88"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; + +&sdc2_state_on { + cd-pins { + pins = "gpio88"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; +}; + +&sdhc_2 { + pinctrl-0 = <&sdc2_state_on>; + pinctrl-1 = <&sdc2_state_off>; + pinctrl-names = "default", "sleep"; + + cd-gpios = <&tlmm 88 GPIO_ACTIVE_LOW>; + + vmmc-supply = <&pm6125_l22a>; + vqmmc-supply = <&pm6125_l5a>; + + status = "okay"; +}; + &sleep_clk { clock-frequency = <32764>; }; From patchwork Wed Jul 31 06:18:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748122 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E079416A94A; Wed, 31 Jul 2024 06:19:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406781; cv=none; b=HJ1cuYrO335+XrmJDLxzrAJfpPs7j+2N7f+5lWOxvTiE6Nyjd7UbaerzuLlRFN6LB9MR9or7CZQGPe2q4VHukYtC2iRH+2Te+mIrDaLBrb1DXAeBpB20OTmBR1mqu7YhBRVssGr/Lx5eMEGU/bSBrGZnfhaMtWlcuoCLtoo0Ei4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406781; c=relaxed/simple; bh=WNvPdgZ1+ApClON4sY9NXXmesMLCtDJAey8+OGBZ5nE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=n7rzYGiBh/3ujqNUUOoBNCzTbduy9R9NQVBNW+VhnOoNQRRcslLGC4u0j76xNlc95lAvB7f8Ff4XjJlDCIGkkHoGoxIU4t31MNVZv8d18Keo/n5T38MIyeeFqhQAzeLtIYtXAureMb4kPI+ca5WK6+z8EWfL2guJUOdH0+LwEUQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=sOmBICBv; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="sOmBICBv" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WYhlH2FgTz9thY; Wed, 31 Jul 2024 06:19:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406779; bh=WNvPdgZ1+ApClON4sY9NXXmesMLCtDJAey8+OGBZ5nE=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=sOmBICBvHq8jKxplOD4nr+bOsHRg1F4GHWnDJUmTKDzVJLTZSgKevnBgj7/YbGHAV lFcLzDh9ClyjmKdgixZv0k60YlrNgFyUtygloFxbmyP1dJTuvVoLd+FC5havpiVYSJ TbYl5w4cD9O8FfVFYNqgZEFA7vpdKr8O1C0kBiq0= X-Riseup-User-ID: B18A1D924C664FD30C65C4F28A5A2B6F1733CFC7BBAFBBEBF9C0A5646CB74593 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhlD3jC5zJt03; Wed, 31 Jul 2024 06:19:36 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:47 +0700 Subject: [PATCH v3 06/11] arm64: dts: qcom: sm6115-pro1x: Enable MDSS and GPU Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-6-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh Fxtec Pro1x uses the same display (BOE BF060Y8M-AJ0) as Pro1. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 84 +++++++++++++++++++++++-- 1 file changed, 80 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 67946d099976..0301f04041e7 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -33,6 +33,26 @@ framebuffer0: framebuffer@5c000000 { }; }; + disp_elvdd_supply: disp-elvdd-supply { + compatible = "regulator-fixed"; + regulator-name = "disp_elvdd_supply"; + }; + + disp_elvss_supply: disp-elvss-supply { + compatible = "regulator-fixed"; + regulator-name = "disp_elvss_supply"; + }; + + disp_vcc_supply: disp-vcc-supply { + compatible = "regulator-fixed"; + regulator-name = "disp_vcc_supply"; + }; + + disp_vci_supply: disp-vci-supply { + compatible = "regulator-fixed"; + regulator-name = "disp_vci_supply"; + }; + gpio-keys { compatible = "gpio-keys"; @@ -93,13 +113,16 @@ ts_vddio_supply: ts-vddio-supply { }; }; -&dispcc { - /* HACK: disable until a panel driver is ready to retain simplefb */ - status = "disabled"; +&gpi_dma0 { + status = "okay"; }; -&gpi_dma0 { +&gpu { status = "okay"; + + zap-shader { + firmware-name = "qcom/sm6115/Fxtec/QX1050/a610_zap.mbn"; + }; }; &i2c1 { @@ -136,6 +159,46 @@ touchscreen@14 { }; }; +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + vdda-supply = <&pm6125_l18a>; + status = "okay"; + + panel: panel@0 { + compatible = "boe,bf060y8m-aj0"; + reg = <0>; + + reset-gpios = <&tlmm 82 GPIO_ACTIVE_LOW>; + + elvdd-supply = <&disp_elvdd_supply>; + elvss-supply = <&disp_elvss_supply>; + vcc-supply = <&disp_vcc_supply>; + vci-supply = <&disp_vci_supply>; + vddio-supply = <&pm6125_l9a>; + + pinctrl-0 = <&mdss_dsi_n &panel_en_n>; + pinctrl-names = "default"; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + status = "okay"; +}; + &pm6125_gpios { vol_up_n: vol-up-n-state { pins = "gpio5"; @@ -338,6 +401,12 @@ key_camera_n: key-camera-n-state { bias-pull-up; }; + panel_en_n: panel-en-n-state { + pins = "gpio65"; + function = "gpio"; + bias-disable; + }; + ts_rst_n: ts-rst-n-state { pins = "gpio71"; function = "gpio"; @@ -352,6 +421,13 @@ ts_int_n: ts-int-n-state { bias-pull-up; }; + mdss_dsi_n: mdss-dsi-n-state { + pins = "gpio82"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + hall_sensor_n: hall-sensor-n-state { pins = "gpio96"; function = "gpio"; From patchwork Wed Jul 31 06:18:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748123 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E81E16C445; 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Wed, 31 Jul 2024 06:19:39 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:48 +0700 Subject: [PATCH v3 07/11] arm64: dts: qcom: sm6115-pro1x: Hook up USB3 SS Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-7-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The F(x)tec Pro1X supports USB 3.0 through it's USB-C port. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 0301f04041e7..d28b870320c9 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -457,7 +457,6 @@ &usb { &usb_dwc3 { /delete-property/ usb-role-switch; - maximum-speed = "high-speed"; dr_mode = "peripheral"; }; @@ -468,6 +467,12 @@ &usb_hsphy { status = "okay"; }; +&usb_qmpphy { + vdda-phy-supply = <&pm6125_l4a>; + vdda-pll-supply = <&pm6125_l12a>; + status = "okay"; +}; + &xo_board { clock-frequency = <19200000>; }; From patchwork Wed Jul 31 06:18:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748124 Received: from mx0.riseup.net (mx0.riseup.net [198.252.153.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8CB6416DC1D; Wed, 31 Jul 2024 06:19:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.6 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406786; cv=none; b=k+H9IlwzIUAOk/wE6wumSqMdhk5dpomg7g7bm6ls8r6IB9fGm+Zc1cCL9D+F6R6PvJTPUyo0323XdCWrVn4X78I9R6JTP0pOHluR9yEzhaiRIaA5lFN3rS6FLWt1oIHEQEzoO6jeEOBRFjN5JV+GeuP/KzHVufQQYi+8NcWXESY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406786; c=relaxed/simple; bh=4+E89Igb8pJU07wTpnP4b6t+jrZA950FAqCmNFzLwfU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MLq6BK+eagnUPoAToqT/opOQ8hTYp1cMwKBzJ5SOSrp277NGlr7OZ/BC3SRGeoOyfOPzxYvjDpDRZF2Pv7CqI4uB92Zisjpijoz04GUUu2weSadkbYjgZ962f8hcIlLD1QqyLEzfbFmAAonX3s/kUS09ZohAMBHzsvM989lfxgE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=X0cNyRUn; arc=none smtp.client-ip=198.252.153.6 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="X0cNyRUn" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx0.riseup.net (Postfix) with ESMTPS id 4WYhlP1gSVz9thY; Wed, 31 Jul 2024 06:19:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406785; bh=4+E89Igb8pJU07wTpnP4b6t+jrZA950FAqCmNFzLwfU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=X0cNyRUnRn+e5R10z+S/n4DSoD+Ymr+1o82z6g/nWEcuo1krSwiIRVIvN7nWDfcWE oLk7BDP1WCYkqwNbgCQ4MElAfioc6ZxEpen9POgr+xCmgqzcbDzgmQ5KFRkybMgmEw rhGVI7SLY3CdX//Ee327aNzhshtHuY4Pe1xHHOfw= X-Riseup-User-ID: EE02B06630D4F35A30203847CBE53B034F3A790A4F5A3427A4793BBFA8E12C18 Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhlL3jcxzJt03; Wed, 31 Jul 2024 06:19:42 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:49 +0700 Subject: [PATCH v3 08/11] arm64: dts: qcom: sm6115-pro1x: Add PMI632 Type-C property Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-8-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh The USB-C port is used for powering external devices and transfer data from/to them. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 51 +++++++++++++++++++++++-- 1 file changed, 48 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index d28b870320c9..be77a8318800 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -7,8 +7,10 @@ #include "sm6115.dtsi" #include "pm6125.dtsi" +#include "pmi632.dtsi" #include #include +#include / { model = "F(x)tec Pro1X (QX1050)"; @@ -209,6 +211,46 @@ vol_up_n: vol-up-n-state { }; }; +&pmi632_typec { + status = "okay"; + + connector { + compatible = "usb-c-connector"; + + power-role = "dual"; + data-role = "dual"; + self-powered; + + typec-power-opmode = "default"; + pd-disable; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + pmi632_hs_in: endpoint { + remote-endpoint = <&usb_dwc3_hs>; + }; + }; + + port@1 { + reg = <1>; + pmi632_ss_in: endpoint { + remote-endpoint = <&usb_qmpphy_out>; + }; + }; + }; + }; +}; + +&pmi632_vbus { + regulator-min-microamp = <500000>; + regulator-max-microamp = <1000000>; + status = "okay"; +}; + &pon_pwrkey { status = "okay"; }; @@ -455,9 +497,8 @@ &usb { status = "okay"; }; -&usb_dwc3 { - /delete-property/ usb-role-switch; - dr_mode = "peripheral"; +&usb_dwc3_hs { + remote-endpoint = <&pmi632_hs_in>; }; &usb_hsphy { @@ -473,6 +514,10 @@ &usb_qmpphy { status = "okay"; }; +&usb_qmpphy_out { + remote-endpoint = <&pmi632_ss_in>; +}; + &xo_board { clock-frequency = <19200000>; }; From patchwork Wed Jul 31 06:18:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748125 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B00216DEB1; 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Wed, 31 Jul 2024 06:19:45 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:50 +0700 Subject: [PATCH v3 09/11] arm64: dts: qcom: sm6115-pro1x: Enable RGB LED Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-9-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh This device has an RGB LED. It is used for notifications. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 27 +++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index be77a8318800..34834a3929b1 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -211,6 +211,33 @@ vol_up_n: vol-up-n-state { }; }; +&pmi632_lpg { + status = "okay"; + + multi-led { + color = ; + function = LED_FUNCTION_STATUS; + + #address-cells = <1>; + #size-cells = <0>; + + led@1 { + reg = <1>; + color = ; + }; + + led@2 { + reg = <2>; + color = ; + }; + + led@3 { + reg = <3>; + color = ; + }; + }; +}; + &pmi632_typec { status = "okay"; From patchwork Wed Jul 31 06:18:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748126 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BBD516DED4; Wed, 31 Jul 2024 06:19:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.129 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406793; cv=none; b=piwCAvV0E2aqU/IAvDMlmeh/UmT65CWMpKaW39Rn2Ap8cBNTzustkTz0lTrTUsDEm5Jk4v1i0CY+naWZZj1Ajk1mAxYUvPsJINj5z17NTo2yJ9+KIkzSnrfzzATEF7C6hSxlJSnH1yCj4SESY3JktEZDUW5WI5Gt221fGifeePk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406793; c=relaxed/simple; bh=9A9XxjgiZkQnUiLhkENcD3MwWKR/LJU4+iO1P+XyaNI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SokrGlnNxBg+Yg1u90ig23fRPmzEPKGo2gz89ge0S10DmQxqGc94HLu5dtKH0qCb7L0r6fNzQd4fAJraGbH5Gh43uxuSlwFlkE/St+U7xrSsJ3cpNp5o0i6SWsF9qJJyZvb4OpTG4M+t+gzKjL9dJNmAdxWcIcd9wHeFdJE7qQA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=QvpRbEKG; arc=none smtp.client-ip=198.252.153.129 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="QvpRbEKG" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx1.riseup.net (Postfix) with ESMTPS id 4WYhlW229dzDqPx; Wed, 31 Jul 2024 06:19:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406791; bh=9A9XxjgiZkQnUiLhkENcD3MwWKR/LJU4+iO1P+XyaNI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=QvpRbEKGI8M/p0COwIDSS0SHCJL5fkeA87APbpY2xIT6vDBSunaqo4LNEMMvjUO64 HgFbLRYtAULOUnvohKoFQnrHdzK4543VB5sw8I5a3Pix8HQX/FXz1L25EJu0Rhrdgr BZcfdaWQZgLSsbEzPiOiWNUKmb6I5DlfczUJeRJc= X-Riseup-User-ID: 6BC40A8C0B1387FB3AE791EC4542FF03DFDA41464EE6AFD8AEF624DFE6F3DC1F Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhlS3jnZzJt03; Wed, 31 Jul 2024 06:19:48 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:51 +0700 Subject: [PATCH v3 10/11] arm64: dts: qcom: sm6115-pro1x: Enable remoteprocs Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-10-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh Enable [A,C]DSP and MPSS remote processor on this device. Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index 34834a3929b1..d3782b2a7831 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -291,6 +291,21 @@ &qupv3_id_0 { status = "okay"; }; +&remoteproc_adsp { + firmware-name = "qcom/sm6115/Fxtec/QX1050/adsp.mbn"; + status = "okay"; +}; + +&remoteproc_cdsp { + firmware-name = "qcom/sm6115/Fxtec/QX1050/cdsp.mbn"; + status = "okay"; +}; + +&remoteproc_mpss { + firmware-name = "qcom/sm6115/Fxtec/QX1050/modem.mbn"; + status = "okay"; +}; + &rpm_requests { regulators-0 { compatible = "qcom,rpm-pm6125-regulators"; From patchwork Wed Jul 31 06:18:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dang Huynh X-Patchwork-Id: 13748127 Received: from mx1.riseup.net (mx1.riseup.net [198.252.153.129]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 87F9916E882; Wed, 31 Jul 2024 06:19:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.252.153.129 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406797; cv=none; b=NyptFD+S32peyDwnQvCn146RHww8aqu3H2GP2s135wAGCBSLNCJdo/XD1wR/7gmwqyQP/TnoYHwl/QPDzaz/Yqhhz0qUnv7p3cEtNkr43cC+v0wTPPjWG6fV4PjlJQ5LDagKX1L8EAnkJM8qX6AOvmFr/nMQ7Aex8Pn5HQysWLE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722406797; c=relaxed/simple; bh=4d7dJPqOfID8CMXCqgbV4y33y4RNKftN/ilG+Zx0HZc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gfGaMOkt1mFzGp0e9omrDWO2heuusAUgyFR7K5B/NCZotF0bw5atBGUiZlrqHA0E18iOlY3WN3gzzIGX4NWim/G7QNZnVAJ91q3xu1SbYF/8yIIlDWoQ5ROUeY6ayOatmQEI69cMZCeiygpI8WysEK2Hkqm4QHflCPCJproZtls= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net; spf=pass smtp.mailfrom=riseup.net; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b=k2lFNogQ; arc=none smtp.client-ip=198.252.153.129 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=riseup.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=riseup.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=riseup.net header.i=@riseup.net header.b="k2lFNogQ" Received: from fews01-sea.riseup.net (fews01-sea-pn.riseup.net [10.0.1.109]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx1.riseup.net (Postfix) with ESMTPS id 4WYhlZ5pgFzDqfm; Wed, 31 Jul 2024 06:19:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=riseup.net; s=squak; t=1722406795; bh=4d7dJPqOfID8CMXCqgbV4y33y4RNKftN/ilG+Zx0HZc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=k2lFNogQ9xUt3A3bqNNycG11t1zA5Wy3Pda41p6Bi6chO65Qnd69vIywdEgGKVFHC T4KwuFgHs9S3HuzoVKvnLeG0OeYZv3VFPR4hGjwVB7galpijo6Y6EHTczz/EozaOIN a/Z5ocbXUHvzVfQy7KqmoDpvALoPhLEs9rPB0e1E= X-Riseup-User-ID: 189FB079CBE3F2994AAA2370D583DDF537A2C03F983F7E60EC270CC0D40C633D Received: from [127.0.0.1] (localhost [127.0.0.1]) by fews01-sea.riseup.net (Postfix) with ESMTPSA id 4WYhlW3lBtzJmtl; Wed, 31 Jul 2024 06:19:51 +0000 (UTC) From: Dang Huynh Date: Wed, 31 Jul 2024 13:18:52 +0700 Subject: [PATCH v3 11/11] arm64: dts: qcom: sm6115-pro1x: Enable ATH10K WLAN Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240731-qx1050-feature-expansion-v3-11-b945527fa5d2@riseup.net> References: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> In-Reply-To: <20240731-qx1050-feature-expansion-v3-0-b945527fa5d2@riseup.net> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Dang Huynh Enable onboard Wi-Fi on the F(x)tec Pro1X. For reference, HW/SW identifies as: qmi chip_id 0x120 chip_family 0x4007 board_id 0xff soc_id 0x40670000 qmi fw_version 0x324103d6 fw_build_timestamp 2021-12-02 08:20 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.2.4-00982-QCAHLSWMTPLZ-1 Reviewed-by: Konrad Dybcio Signed-off-by: Dang Huynh --- arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts index d3782b2a7831..b419cd32215f 100644 --- a/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts +++ b/arch/arm64/boot/dts/qcom/sm6115-fxtec-pro1x.dts @@ -560,6 +560,17 @@ &usb_qmpphy_out { remote-endpoint = <&pmi632_ss_in>; }; +&wifi { + vdd-0.8-cx-mx-supply = <&pm6125_l8a>; + vdd-1.8-xo-supply = <&pm6125_l16a>; + vdd-1.3-rfa-supply = <&pm6125_l17a>; + vdd-3.3-ch0-supply = <&pm6125_l23a>; + + qcom,ath10k-calibration-variant = "Fxtec_QX1050"; + + status = "okay"; +}; + &xo_board { clock-frequency = <19200000>; };